xref: /OK3568_Linux_fs/kernel/drivers/scsi/hpsa.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  *    Disk Array driver for HP Smart Array SAS controllers
3*4882a593Smuzhiyun  *    Copyright (c) 2019-2020 Microchip Technology Inc. and its subsidiaries
4*4882a593Smuzhiyun  *    Copyright 2016 Microsemi Corporation
5*4882a593Smuzhiyun  *    Copyright 2014-2015 PMC-Sierra, Inc.
6*4882a593Smuzhiyun  *    Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P.
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  *    This program is free software; you can redistribute it and/or modify
9*4882a593Smuzhiyun  *    it under the terms of the GNU General Public License as published by
10*4882a593Smuzhiyun  *    the Free Software Foundation; version 2 of the License.
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  *    This program is distributed in the hope that it will be useful,
13*4882a593Smuzhiyun  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
14*4882a593Smuzhiyun  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
15*4882a593Smuzhiyun  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
16*4882a593Smuzhiyun  *
17*4882a593Smuzhiyun  *    Questions/Comments/Bugfixes to esc.storagedev@microsemi.com
18*4882a593Smuzhiyun  *
19*4882a593Smuzhiyun  */
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #include <linux/module.h>
22*4882a593Smuzhiyun #include <linux/interrupt.h>
23*4882a593Smuzhiyun #include <linux/types.h>
24*4882a593Smuzhiyun #include <linux/pci.h>
25*4882a593Smuzhiyun #include <linux/kernel.h>
26*4882a593Smuzhiyun #include <linux/slab.h>
27*4882a593Smuzhiyun #include <linux/delay.h>
28*4882a593Smuzhiyun #include <linux/fs.h>
29*4882a593Smuzhiyun #include <linux/timer.h>
30*4882a593Smuzhiyun #include <linux/init.h>
31*4882a593Smuzhiyun #include <linux/spinlock.h>
32*4882a593Smuzhiyun #include <linux/compat.h>
33*4882a593Smuzhiyun #include <linux/blktrace_api.h>
34*4882a593Smuzhiyun #include <linux/uaccess.h>
35*4882a593Smuzhiyun #include <linux/io.h>
36*4882a593Smuzhiyun #include <linux/dma-mapping.h>
37*4882a593Smuzhiyun #include <linux/completion.h>
38*4882a593Smuzhiyun #include <linux/moduleparam.h>
39*4882a593Smuzhiyun #include <scsi/scsi.h>
40*4882a593Smuzhiyun #include <scsi/scsi_cmnd.h>
41*4882a593Smuzhiyun #include <scsi/scsi_device.h>
42*4882a593Smuzhiyun #include <scsi/scsi_host.h>
43*4882a593Smuzhiyun #include <scsi/scsi_tcq.h>
44*4882a593Smuzhiyun #include <scsi/scsi_eh.h>
45*4882a593Smuzhiyun #include <scsi/scsi_transport_sas.h>
46*4882a593Smuzhiyun #include <scsi/scsi_dbg.h>
47*4882a593Smuzhiyun #include <linux/cciss_ioctl.h>
48*4882a593Smuzhiyun #include <linux/string.h>
49*4882a593Smuzhiyun #include <linux/bitmap.h>
50*4882a593Smuzhiyun #include <linux/atomic.h>
51*4882a593Smuzhiyun #include <linux/jiffies.h>
52*4882a593Smuzhiyun #include <linux/percpu-defs.h>
53*4882a593Smuzhiyun #include <linux/percpu.h>
54*4882a593Smuzhiyun #include <asm/unaligned.h>
55*4882a593Smuzhiyun #include <asm/div64.h>
56*4882a593Smuzhiyun #include "hpsa_cmd.h"
57*4882a593Smuzhiyun #include "hpsa.h"
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun /*
60*4882a593Smuzhiyun  * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.'
61*4882a593Smuzhiyun  * with an optional trailing '-' followed by a byte value (0-255).
62*4882a593Smuzhiyun  */
63*4882a593Smuzhiyun #define HPSA_DRIVER_VERSION "3.4.20-200"
64*4882a593Smuzhiyun #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
65*4882a593Smuzhiyun #define HPSA "hpsa"
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun /* How long to wait for CISS doorbell communication */
68*4882a593Smuzhiyun #define CLEAR_EVENT_WAIT_INTERVAL 20	/* ms for each msleep() call */
69*4882a593Smuzhiyun #define MODE_CHANGE_WAIT_INTERVAL 10	/* ms for each msleep() call */
70*4882a593Smuzhiyun #define MAX_CLEAR_EVENT_WAIT 30000	/* times 20 ms = 600 s */
71*4882a593Smuzhiyun #define MAX_MODE_CHANGE_WAIT 2000	/* times 10 ms = 20 s */
72*4882a593Smuzhiyun #define MAX_IOCTL_CONFIG_WAIT 1000
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun /*define how many times we will try a command because of bus resets */
75*4882a593Smuzhiyun #define MAX_CMD_RETRIES 3
76*4882a593Smuzhiyun /* How long to wait before giving up on a command */
77*4882a593Smuzhiyun #define HPSA_EH_PTRAID_TIMEOUT (240 * HZ)
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun /* Embedded module documentation macros - see modules.h */
80*4882a593Smuzhiyun MODULE_AUTHOR("Hewlett-Packard Company");
81*4882a593Smuzhiyun MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
82*4882a593Smuzhiyun 	HPSA_DRIVER_VERSION);
83*4882a593Smuzhiyun MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
84*4882a593Smuzhiyun MODULE_VERSION(HPSA_DRIVER_VERSION);
85*4882a593Smuzhiyun MODULE_LICENSE("GPL");
86*4882a593Smuzhiyun MODULE_ALIAS("cciss");
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun static int hpsa_simple_mode;
89*4882a593Smuzhiyun module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
90*4882a593Smuzhiyun MODULE_PARM_DESC(hpsa_simple_mode,
91*4882a593Smuzhiyun 	"Use 'simple mode' rather than 'performant mode'");
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun /* define the PCI info for the cards we can control */
94*4882a593Smuzhiyun static const struct pci_device_id hpsa_pci_device_id[] = {
95*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3241},
96*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3243},
97*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3245},
98*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3247},
99*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3249},
100*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324A},
101*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324B},
102*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3233},
103*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3350},
104*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3351},
105*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3352},
106*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3353},
107*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3354},
108*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3355},
109*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3356},
110*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103c, 0x1920},
111*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1921},
112*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1922},
113*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1923},
114*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1924},
115*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103c, 0x1925},
116*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1926},
117*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1928},
118*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1929},
119*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BD},
120*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BE},
121*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BF},
122*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C0},
123*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C1},
124*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C2},
125*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C3},
126*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C4},
127*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C5},
128*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C6},
129*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C7},
130*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C8},
131*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C9},
132*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CA},
133*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CB},
134*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CC},
135*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CD},
136*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CE},
137*4882a593Smuzhiyun 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580},
138*4882a593Smuzhiyun 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581},
139*4882a593Smuzhiyun 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582},
140*4882a593Smuzhiyun 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583},
141*4882a593Smuzhiyun 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584},
142*4882a593Smuzhiyun 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585},
143*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
144*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
145*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
146*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
147*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
148*4882a593Smuzhiyun 	{PCI_VENDOR_ID_HP,     PCI_ANY_ID,	PCI_ANY_ID, PCI_ANY_ID,
149*4882a593Smuzhiyun 		PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
150*4882a593Smuzhiyun 	{PCI_VENDOR_ID_COMPAQ,     PCI_ANY_ID,	PCI_ANY_ID, PCI_ANY_ID,
151*4882a593Smuzhiyun 		PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
152*4882a593Smuzhiyun 	{0,}
153*4882a593Smuzhiyun };
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun /*  board_id = Subsystem Device ID & Vendor ID
158*4882a593Smuzhiyun  *  product = Marketing Name for the board
159*4882a593Smuzhiyun  *  access = Address of the struct of function pointers
160*4882a593Smuzhiyun  */
161*4882a593Smuzhiyun static struct board_type products[] = {
162*4882a593Smuzhiyun 	{0x40700E11, "Smart Array 5300", &SA5A_access},
163*4882a593Smuzhiyun 	{0x40800E11, "Smart Array 5i", &SA5B_access},
164*4882a593Smuzhiyun 	{0x40820E11, "Smart Array 532", &SA5B_access},
165*4882a593Smuzhiyun 	{0x40830E11, "Smart Array 5312", &SA5B_access},
166*4882a593Smuzhiyun 	{0x409A0E11, "Smart Array 641", &SA5A_access},
167*4882a593Smuzhiyun 	{0x409B0E11, "Smart Array 642", &SA5A_access},
168*4882a593Smuzhiyun 	{0x409C0E11, "Smart Array 6400", &SA5A_access},
169*4882a593Smuzhiyun 	{0x409D0E11, "Smart Array 6400 EM", &SA5A_access},
170*4882a593Smuzhiyun 	{0x40910E11, "Smart Array 6i", &SA5A_access},
171*4882a593Smuzhiyun 	{0x3225103C, "Smart Array P600", &SA5A_access},
172*4882a593Smuzhiyun 	{0x3223103C, "Smart Array P800", &SA5A_access},
173*4882a593Smuzhiyun 	{0x3234103C, "Smart Array P400", &SA5A_access},
174*4882a593Smuzhiyun 	{0x3235103C, "Smart Array P400i", &SA5A_access},
175*4882a593Smuzhiyun 	{0x3211103C, "Smart Array E200i", &SA5A_access},
176*4882a593Smuzhiyun 	{0x3212103C, "Smart Array E200", &SA5A_access},
177*4882a593Smuzhiyun 	{0x3213103C, "Smart Array E200i", &SA5A_access},
178*4882a593Smuzhiyun 	{0x3214103C, "Smart Array E200i", &SA5A_access},
179*4882a593Smuzhiyun 	{0x3215103C, "Smart Array E200i", &SA5A_access},
180*4882a593Smuzhiyun 	{0x3237103C, "Smart Array E500", &SA5A_access},
181*4882a593Smuzhiyun 	{0x323D103C, "Smart Array P700m", &SA5A_access},
182*4882a593Smuzhiyun 	{0x3241103C, "Smart Array P212", &SA5_access},
183*4882a593Smuzhiyun 	{0x3243103C, "Smart Array P410", &SA5_access},
184*4882a593Smuzhiyun 	{0x3245103C, "Smart Array P410i", &SA5_access},
185*4882a593Smuzhiyun 	{0x3247103C, "Smart Array P411", &SA5_access},
186*4882a593Smuzhiyun 	{0x3249103C, "Smart Array P812", &SA5_access},
187*4882a593Smuzhiyun 	{0x324A103C, "Smart Array P712m", &SA5_access},
188*4882a593Smuzhiyun 	{0x324B103C, "Smart Array P711m", &SA5_access},
189*4882a593Smuzhiyun 	{0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
190*4882a593Smuzhiyun 	{0x3350103C, "Smart Array P222", &SA5_access},
191*4882a593Smuzhiyun 	{0x3351103C, "Smart Array P420", &SA5_access},
192*4882a593Smuzhiyun 	{0x3352103C, "Smart Array P421", &SA5_access},
193*4882a593Smuzhiyun 	{0x3353103C, "Smart Array P822", &SA5_access},
194*4882a593Smuzhiyun 	{0x3354103C, "Smart Array P420i", &SA5_access},
195*4882a593Smuzhiyun 	{0x3355103C, "Smart Array P220i", &SA5_access},
196*4882a593Smuzhiyun 	{0x3356103C, "Smart Array P721m", &SA5_access},
197*4882a593Smuzhiyun 	{0x1920103C, "Smart Array P430i", &SA5_access},
198*4882a593Smuzhiyun 	{0x1921103C, "Smart Array P830i", &SA5_access},
199*4882a593Smuzhiyun 	{0x1922103C, "Smart Array P430", &SA5_access},
200*4882a593Smuzhiyun 	{0x1923103C, "Smart Array P431", &SA5_access},
201*4882a593Smuzhiyun 	{0x1924103C, "Smart Array P830", &SA5_access},
202*4882a593Smuzhiyun 	{0x1925103C, "Smart Array P831", &SA5_access},
203*4882a593Smuzhiyun 	{0x1926103C, "Smart Array P731m", &SA5_access},
204*4882a593Smuzhiyun 	{0x1928103C, "Smart Array P230i", &SA5_access},
205*4882a593Smuzhiyun 	{0x1929103C, "Smart Array P530", &SA5_access},
206*4882a593Smuzhiyun 	{0x21BD103C, "Smart Array P244br", &SA5_access},
207*4882a593Smuzhiyun 	{0x21BE103C, "Smart Array P741m", &SA5_access},
208*4882a593Smuzhiyun 	{0x21BF103C, "Smart HBA H240ar", &SA5_access},
209*4882a593Smuzhiyun 	{0x21C0103C, "Smart Array P440ar", &SA5_access},
210*4882a593Smuzhiyun 	{0x21C1103C, "Smart Array P840ar", &SA5_access},
211*4882a593Smuzhiyun 	{0x21C2103C, "Smart Array P440", &SA5_access},
212*4882a593Smuzhiyun 	{0x21C3103C, "Smart Array P441", &SA5_access},
213*4882a593Smuzhiyun 	{0x21C4103C, "Smart Array", &SA5_access},
214*4882a593Smuzhiyun 	{0x21C5103C, "Smart Array P841", &SA5_access},
215*4882a593Smuzhiyun 	{0x21C6103C, "Smart HBA H244br", &SA5_access},
216*4882a593Smuzhiyun 	{0x21C7103C, "Smart HBA H240", &SA5_access},
217*4882a593Smuzhiyun 	{0x21C8103C, "Smart HBA H241", &SA5_access},
218*4882a593Smuzhiyun 	{0x21C9103C, "Smart Array", &SA5_access},
219*4882a593Smuzhiyun 	{0x21CA103C, "Smart Array P246br", &SA5_access},
220*4882a593Smuzhiyun 	{0x21CB103C, "Smart Array P840", &SA5_access},
221*4882a593Smuzhiyun 	{0x21CC103C, "Smart Array", &SA5_access},
222*4882a593Smuzhiyun 	{0x21CD103C, "Smart Array", &SA5_access},
223*4882a593Smuzhiyun 	{0x21CE103C, "Smart HBA", &SA5_access},
224*4882a593Smuzhiyun 	{0x05809005, "SmartHBA-SA", &SA5_access},
225*4882a593Smuzhiyun 	{0x05819005, "SmartHBA-SA 8i", &SA5_access},
226*4882a593Smuzhiyun 	{0x05829005, "SmartHBA-SA 8i8e", &SA5_access},
227*4882a593Smuzhiyun 	{0x05839005, "SmartHBA-SA 8e", &SA5_access},
228*4882a593Smuzhiyun 	{0x05849005, "SmartHBA-SA 16i", &SA5_access},
229*4882a593Smuzhiyun 	{0x05859005, "SmartHBA-SA 4i4e", &SA5_access},
230*4882a593Smuzhiyun 	{0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
231*4882a593Smuzhiyun 	{0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
232*4882a593Smuzhiyun 	{0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
233*4882a593Smuzhiyun 	{0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
234*4882a593Smuzhiyun 	{0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
235*4882a593Smuzhiyun 	{0xFFFF103C, "Unknown Smart Array", &SA5_access},
236*4882a593Smuzhiyun };
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun static struct scsi_transport_template *hpsa_sas_transport_template;
239*4882a593Smuzhiyun static int hpsa_add_sas_host(struct ctlr_info *h);
240*4882a593Smuzhiyun static void hpsa_delete_sas_host(struct ctlr_info *h);
241*4882a593Smuzhiyun static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
242*4882a593Smuzhiyun 			struct hpsa_scsi_dev_t *device);
243*4882a593Smuzhiyun static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device);
244*4882a593Smuzhiyun static struct hpsa_scsi_dev_t
245*4882a593Smuzhiyun 	*hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
246*4882a593Smuzhiyun 		struct sas_rphy *rphy);
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy)
249*4882a593Smuzhiyun static const struct scsi_cmnd hpsa_cmd_busy;
250*4882a593Smuzhiyun #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle)
251*4882a593Smuzhiyun static const struct scsi_cmnd hpsa_cmd_idle;
252*4882a593Smuzhiyun static int number_of_controllers;
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
255*4882a593Smuzhiyun static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
256*4882a593Smuzhiyun static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd,
257*4882a593Smuzhiyun 		      void __user *arg);
258*4882a593Smuzhiyun static int hpsa_passthru_ioctl(struct ctlr_info *h,
259*4882a593Smuzhiyun 			       IOCTL_Command_struct *iocommand);
260*4882a593Smuzhiyun static int hpsa_big_passthru_ioctl(struct ctlr_info *h,
261*4882a593Smuzhiyun 				   BIG_IOCTL_Command_struct *ioc);
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun #ifdef CONFIG_COMPAT
264*4882a593Smuzhiyun static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd,
265*4882a593Smuzhiyun 	void __user *arg);
266*4882a593Smuzhiyun #endif
267*4882a593Smuzhiyun 
268*4882a593Smuzhiyun static void cmd_free(struct ctlr_info *h, struct CommandList *c);
269*4882a593Smuzhiyun static struct CommandList *cmd_alloc(struct ctlr_info *h);
270*4882a593Smuzhiyun static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c);
271*4882a593Smuzhiyun static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
272*4882a593Smuzhiyun 					    struct scsi_cmnd *scmd);
273*4882a593Smuzhiyun static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
274*4882a593Smuzhiyun 	void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
275*4882a593Smuzhiyun 	int cmd_type);
276*4882a593Smuzhiyun static void hpsa_free_cmd_pool(struct ctlr_info *h);
277*4882a593Smuzhiyun #define VPD_PAGE (1 << 8)
278*4882a593Smuzhiyun #define HPSA_SIMPLE_ERROR_BITS 0x03
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
281*4882a593Smuzhiyun static void hpsa_scan_start(struct Scsi_Host *);
282*4882a593Smuzhiyun static int hpsa_scan_finished(struct Scsi_Host *sh,
283*4882a593Smuzhiyun 	unsigned long elapsed_time);
284*4882a593Smuzhiyun static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
287*4882a593Smuzhiyun static int hpsa_slave_alloc(struct scsi_device *sdev);
288*4882a593Smuzhiyun static int hpsa_slave_configure(struct scsi_device *sdev);
289*4882a593Smuzhiyun static void hpsa_slave_destroy(struct scsi_device *sdev);
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun static void hpsa_update_scsi_devices(struct ctlr_info *h);
292*4882a593Smuzhiyun static int check_for_unit_attention(struct ctlr_info *h,
293*4882a593Smuzhiyun 	struct CommandList *c);
294*4882a593Smuzhiyun static void check_ioctl_unit_attention(struct ctlr_info *h,
295*4882a593Smuzhiyun 	struct CommandList *c);
296*4882a593Smuzhiyun /* performant mode helper functions */
297*4882a593Smuzhiyun static void calc_bucket_map(int *bucket, int num_buckets,
298*4882a593Smuzhiyun 	int nsgs, int min_blocks, u32 *bucket_map);
299*4882a593Smuzhiyun static void hpsa_free_performant_mode(struct ctlr_info *h);
300*4882a593Smuzhiyun static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
301*4882a593Smuzhiyun static inline u32 next_command(struct ctlr_info *h, u8 q);
302*4882a593Smuzhiyun static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
303*4882a593Smuzhiyun 			       u32 *cfg_base_addr, u64 *cfg_base_addr_index,
304*4882a593Smuzhiyun 			       u64 *cfg_offset);
305*4882a593Smuzhiyun static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
306*4882a593Smuzhiyun 				    unsigned long *memory_bar);
307*4882a593Smuzhiyun static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
308*4882a593Smuzhiyun 				bool *legacy_board);
309*4882a593Smuzhiyun static int wait_for_device_to_become_ready(struct ctlr_info *h,
310*4882a593Smuzhiyun 					   unsigned char lunaddr[],
311*4882a593Smuzhiyun 					   int reply_queue);
312*4882a593Smuzhiyun static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
313*4882a593Smuzhiyun 				     int wait_for_ready);
314*4882a593Smuzhiyun static inline void finish_cmd(struct CommandList *c);
315*4882a593Smuzhiyun static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
316*4882a593Smuzhiyun #define BOARD_NOT_READY 0
317*4882a593Smuzhiyun #define BOARD_READY 1
318*4882a593Smuzhiyun static void hpsa_drain_accel_commands(struct ctlr_info *h);
319*4882a593Smuzhiyun static void hpsa_flush_cache(struct ctlr_info *h);
320*4882a593Smuzhiyun static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
321*4882a593Smuzhiyun 	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
322*4882a593Smuzhiyun 	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
323*4882a593Smuzhiyun static void hpsa_command_resubmit_worker(struct work_struct *work);
324*4882a593Smuzhiyun static u32 lockup_detected(struct ctlr_info *h);
325*4882a593Smuzhiyun static int detect_controller_lockup(struct ctlr_info *h);
326*4882a593Smuzhiyun static void hpsa_disable_rld_caching(struct ctlr_info *h);
327*4882a593Smuzhiyun static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
328*4882a593Smuzhiyun 	struct ReportExtendedLUNdata *buf, int bufsize);
329*4882a593Smuzhiyun static bool hpsa_vpd_page_supported(struct ctlr_info *h,
330*4882a593Smuzhiyun 	unsigned char scsi3addr[], u8 page);
331*4882a593Smuzhiyun static int hpsa_luns_changed(struct ctlr_info *h);
332*4882a593Smuzhiyun static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
333*4882a593Smuzhiyun 			       struct hpsa_scsi_dev_t *dev,
334*4882a593Smuzhiyun 			       unsigned char *scsi3addr);
335*4882a593Smuzhiyun 
sdev_to_hba(struct scsi_device * sdev)336*4882a593Smuzhiyun static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
337*4882a593Smuzhiyun {
338*4882a593Smuzhiyun 	unsigned long *priv = shost_priv(sdev->host);
339*4882a593Smuzhiyun 	return (struct ctlr_info *) *priv;
340*4882a593Smuzhiyun }
341*4882a593Smuzhiyun 
shost_to_hba(struct Scsi_Host * sh)342*4882a593Smuzhiyun static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
343*4882a593Smuzhiyun {
344*4882a593Smuzhiyun 	unsigned long *priv = shost_priv(sh);
345*4882a593Smuzhiyun 	return (struct ctlr_info *) *priv;
346*4882a593Smuzhiyun }
347*4882a593Smuzhiyun 
hpsa_is_cmd_idle(struct CommandList * c)348*4882a593Smuzhiyun static inline bool hpsa_is_cmd_idle(struct CommandList *c)
349*4882a593Smuzhiyun {
350*4882a593Smuzhiyun 	return c->scsi_cmd == SCSI_CMD_IDLE;
351*4882a593Smuzhiyun }
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun /* extract sense key, asc, and ascq from sense data.  -1 means invalid. */
decode_sense_data(const u8 * sense_data,int sense_data_len,u8 * sense_key,u8 * asc,u8 * ascq)354*4882a593Smuzhiyun static void decode_sense_data(const u8 *sense_data, int sense_data_len,
355*4882a593Smuzhiyun 			u8 *sense_key, u8 *asc, u8 *ascq)
356*4882a593Smuzhiyun {
357*4882a593Smuzhiyun 	struct scsi_sense_hdr sshdr;
358*4882a593Smuzhiyun 	bool rc;
359*4882a593Smuzhiyun 
360*4882a593Smuzhiyun 	*sense_key = -1;
361*4882a593Smuzhiyun 	*asc = -1;
362*4882a593Smuzhiyun 	*ascq = -1;
363*4882a593Smuzhiyun 
364*4882a593Smuzhiyun 	if (sense_data_len < 1)
365*4882a593Smuzhiyun 		return;
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun 	rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
368*4882a593Smuzhiyun 	if (rc) {
369*4882a593Smuzhiyun 		*sense_key = sshdr.sense_key;
370*4882a593Smuzhiyun 		*asc = sshdr.asc;
371*4882a593Smuzhiyun 		*ascq = sshdr.ascq;
372*4882a593Smuzhiyun 	}
373*4882a593Smuzhiyun }
374*4882a593Smuzhiyun 
check_for_unit_attention(struct ctlr_info * h,struct CommandList * c)375*4882a593Smuzhiyun static int check_for_unit_attention(struct ctlr_info *h,
376*4882a593Smuzhiyun 	struct CommandList *c)
377*4882a593Smuzhiyun {
378*4882a593Smuzhiyun 	u8 sense_key, asc, ascq;
379*4882a593Smuzhiyun 	int sense_len;
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun 	if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
382*4882a593Smuzhiyun 		sense_len = sizeof(c->err_info->SenseInfo);
383*4882a593Smuzhiyun 	else
384*4882a593Smuzhiyun 		sense_len = c->err_info->SenseLen;
385*4882a593Smuzhiyun 
386*4882a593Smuzhiyun 	decode_sense_data(c->err_info->SenseInfo, sense_len,
387*4882a593Smuzhiyun 				&sense_key, &asc, &ascq);
388*4882a593Smuzhiyun 	if (sense_key != UNIT_ATTENTION || asc == 0xff)
389*4882a593Smuzhiyun 		return 0;
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun 	switch (asc) {
392*4882a593Smuzhiyun 	case STATE_CHANGED:
393*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev,
394*4882a593Smuzhiyun 			"%s: a state change detected, command retried\n",
395*4882a593Smuzhiyun 			h->devname);
396*4882a593Smuzhiyun 		break;
397*4882a593Smuzhiyun 	case LUN_FAILED:
398*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev,
399*4882a593Smuzhiyun 			"%s: LUN failure detected\n", h->devname);
400*4882a593Smuzhiyun 		break;
401*4882a593Smuzhiyun 	case REPORT_LUNS_CHANGED:
402*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev,
403*4882a593Smuzhiyun 			"%s: report LUN data changed\n", h->devname);
404*4882a593Smuzhiyun 	/*
405*4882a593Smuzhiyun 	 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
406*4882a593Smuzhiyun 	 * target (array) devices.
407*4882a593Smuzhiyun 	 */
408*4882a593Smuzhiyun 		break;
409*4882a593Smuzhiyun 	case POWER_OR_RESET:
410*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev,
411*4882a593Smuzhiyun 			"%s: a power on or device reset detected\n",
412*4882a593Smuzhiyun 			h->devname);
413*4882a593Smuzhiyun 		break;
414*4882a593Smuzhiyun 	case UNIT_ATTENTION_CLEARED:
415*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev,
416*4882a593Smuzhiyun 			"%s: unit attention cleared by another initiator\n",
417*4882a593Smuzhiyun 			h->devname);
418*4882a593Smuzhiyun 		break;
419*4882a593Smuzhiyun 	default:
420*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev,
421*4882a593Smuzhiyun 			"%s: unknown unit attention detected\n",
422*4882a593Smuzhiyun 			h->devname);
423*4882a593Smuzhiyun 		break;
424*4882a593Smuzhiyun 	}
425*4882a593Smuzhiyun 	return 1;
426*4882a593Smuzhiyun }
427*4882a593Smuzhiyun 
check_for_busy(struct ctlr_info * h,struct CommandList * c)428*4882a593Smuzhiyun static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
429*4882a593Smuzhiyun {
430*4882a593Smuzhiyun 	if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
431*4882a593Smuzhiyun 		(c->err_info->ScsiStatus != SAM_STAT_BUSY &&
432*4882a593Smuzhiyun 		 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
433*4882a593Smuzhiyun 		return 0;
434*4882a593Smuzhiyun 	dev_warn(&h->pdev->dev, HPSA "device busy");
435*4882a593Smuzhiyun 	return 1;
436*4882a593Smuzhiyun }
437*4882a593Smuzhiyun 
438*4882a593Smuzhiyun static u32 lockup_detected(struct ctlr_info *h);
host_show_lockup_detected(struct device * dev,struct device_attribute * attr,char * buf)439*4882a593Smuzhiyun static ssize_t host_show_lockup_detected(struct device *dev,
440*4882a593Smuzhiyun 		struct device_attribute *attr, char *buf)
441*4882a593Smuzhiyun {
442*4882a593Smuzhiyun 	int ld;
443*4882a593Smuzhiyun 	struct ctlr_info *h;
444*4882a593Smuzhiyun 	struct Scsi_Host *shost = class_to_shost(dev);
445*4882a593Smuzhiyun 
446*4882a593Smuzhiyun 	h = shost_to_hba(shost);
447*4882a593Smuzhiyun 	ld = lockup_detected(h);
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun 	return sprintf(buf, "ld=%d\n", ld);
450*4882a593Smuzhiyun }
451*4882a593Smuzhiyun 
host_store_hp_ssd_smart_path_status(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)452*4882a593Smuzhiyun static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
453*4882a593Smuzhiyun 					 struct device_attribute *attr,
454*4882a593Smuzhiyun 					 const char *buf, size_t count)
455*4882a593Smuzhiyun {
456*4882a593Smuzhiyun 	int status, len;
457*4882a593Smuzhiyun 	struct ctlr_info *h;
458*4882a593Smuzhiyun 	struct Scsi_Host *shost = class_to_shost(dev);
459*4882a593Smuzhiyun 	char tmpbuf[10];
460*4882a593Smuzhiyun 
461*4882a593Smuzhiyun 	if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
462*4882a593Smuzhiyun 		return -EACCES;
463*4882a593Smuzhiyun 	len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
464*4882a593Smuzhiyun 	strncpy(tmpbuf, buf, len);
465*4882a593Smuzhiyun 	tmpbuf[len] = '\0';
466*4882a593Smuzhiyun 	if (sscanf(tmpbuf, "%d", &status) != 1)
467*4882a593Smuzhiyun 		return -EINVAL;
468*4882a593Smuzhiyun 	h = shost_to_hba(shost);
469*4882a593Smuzhiyun 	h->acciopath_status = !!status;
470*4882a593Smuzhiyun 	dev_warn(&h->pdev->dev,
471*4882a593Smuzhiyun 		"hpsa: HP SSD Smart Path %s via sysfs update.\n",
472*4882a593Smuzhiyun 		h->acciopath_status ? "enabled" : "disabled");
473*4882a593Smuzhiyun 	return count;
474*4882a593Smuzhiyun }
475*4882a593Smuzhiyun 
host_store_raid_offload_debug(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)476*4882a593Smuzhiyun static ssize_t host_store_raid_offload_debug(struct device *dev,
477*4882a593Smuzhiyun 					 struct device_attribute *attr,
478*4882a593Smuzhiyun 					 const char *buf, size_t count)
479*4882a593Smuzhiyun {
480*4882a593Smuzhiyun 	int debug_level, len;
481*4882a593Smuzhiyun 	struct ctlr_info *h;
482*4882a593Smuzhiyun 	struct Scsi_Host *shost = class_to_shost(dev);
483*4882a593Smuzhiyun 	char tmpbuf[10];
484*4882a593Smuzhiyun 
485*4882a593Smuzhiyun 	if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
486*4882a593Smuzhiyun 		return -EACCES;
487*4882a593Smuzhiyun 	len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
488*4882a593Smuzhiyun 	strncpy(tmpbuf, buf, len);
489*4882a593Smuzhiyun 	tmpbuf[len] = '\0';
490*4882a593Smuzhiyun 	if (sscanf(tmpbuf, "%d", &debug_level) != 1)
491*4882a593Smuzhiyun 		return -EINVAL;
492*4882a593Smuzhiyun 	if (debug_level < 0)
493*4882a593Smuzhiyun 		debug_level = 0;
494*4882a593Smuzhiyun 	h = shost_to_hba(shost);
495*4882a593Smuzhiyun 	h->raid_offload_debug = debug_level;
496*4882a593Smuzhiyun 	dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
497*4882a593Smuzhiyun 		h->raid_offload_debug);
498*4882a593Smuzhiyun 	return count;
499*4882a593Smuzhiyun }
500*4882a593Smuzhiyun 
host_store_rescan(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)501*4882a593Smuzhiyun static ssize_t host_store_rescan(struct device *dev,
502*4882a593Smuzhiyun 				 struct device_attribute *attr,
503*4882a593Smuzhiyun 				 const char *buf, size_t count)
504*4882a593Smuzhiyun {
505*4882a593Smuzhiyun 	struct ctlr_info *h;
506*4882a593Smuzhiyun 	struct Scsi_Host *shost = class_to_shost(dev);
507*4882a593Smuzhiyun 	h = shost_to_hba(shost);
508*4882a593Smuzhiyun 	hpsa_scan_start(h->scsi_host);
509*4882a593Smuzhiyun 	return count;
510*4882a593Smuzhiyun }
511*4882a593Smuzhiyun 
hpsa_turn_off_ioaccel_for_device(struct hpsa_scsi_dev_t * device)512*4882a593Smuzhiyun static void hpsa_turn_off_ioaccel_for_device(struct hpsa_scsi_dev_t *device)
513*4882a593Smuzhiyun {
514*4882a593Smuzhiyun 	device->offload_enabled = 0;
515*4882a593Smuzhiyun 	device->offload_to_be_enabled = 0;
516*4882a593Smuzhiyun }
517*4882a593Smuzhiyun 
host_show_firmware_revision(struct device * dev,struct device_attribute * attr,char * buf)518*4882a593Smuzhiyun static ssize_t host_show_firmware_revision(struct device *dev,
519*4882a593Smuzhiyun 	     struct device_attribute *attr, char *buf)
520*4882a593Smuzhiyun {
521*4882a593Smuzhiyun 	struct ctlr_info *h;
522*4882a593Smuzhiyun 	struct Scsi_Host *shost = class_to_shost(dev);
523*4882a593Smuzhiyun 	unsigned char *fwrev;
524*4882a593Smuzhiyun 
525*4882a593Smuzhiyun 	h = shost_to_hba(shost);
526*4882a593Smuzhiyun 	if (!h->hba_inquiry_data)
527*4882a593Smuzhiyun 		return 0;
528*4882a593Smuzhiyun 	fwrev = &h->hba_inquiry_data[32];
529*4882a593Smuzhiyun 	return snprintf(buf, 20, "%c%c%c%c\n",
530*4882a593Smuzhiyun 		fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
531*4882a593Smuzhiyun }
532*4882a593Smuzhiyun 
host_show_commands_outstanding(struct device * dev,struct device_attribute * attr,char * buf)533*4882a593Smuzhiyun static ssize_t host_show_commands_outstanding(struct device *dev,
534*4882a593Smuzhiyun 	     struct device_attribute *attr, char *buf)
535*4882a593Smuzhiyun {
536*4882a593Smuzhiyun 	struct Scsi_Host *shost = class_to_shost(dev);
537*4882a593Smuzhiyun 	struct ctlr_info *h = shost_to_hba(shost);
538*4882a593Smuzhiyun 
539*4882a593Smuzhiyun 	return snprintf(buf, 20, "%d\n",
540*4882a593Smuzhiyun 			atomic_read(&h->commands_outstanding));
541*4882a593Smuzhiyun }
542*4882a593Smuzhiyun 
host_show_transport_mode(struct device * dev,struct device_attribute * attr,char * buf)543*4882a593Smuzhiyun static ssize_t host_show_transport_mode(struct device *dev,
544*4882a593Smuzhiyun 	struct device_attribute *attr, char *buf)
545*4882a593Smuzhiyun {
546*4882a593Smuzhiyun 	struct ctlr_info *h;
547*4882a593Smuzhiyun 	struct Scsi_Host *shost = class_to_shost(dev);
548*4882a593Smuzhiyun 
549*4882a593Smuzhiyun 	h = shost_to_hba(shost);
550*4882a593Smuzhiyun 	return snprintf(buf, 20, "%s\n",
551*4882a593Smuzhiyun 		h->transMethod & CFGTBL_Trans_Performant ?
552*4882a593Smuzhiyun 			"performant" : "simple");
553*4882a593Smuzhiyun }
554*4882a593Smuzhiyun 
host_show_hp_ssd_smart_path_status(struct device * dev,struct device_attribute * attr,char * buf)555*4882a593Smuzhiyun static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
556*4882a593Smuzhiyun 	struct device_attribute *attr, char *buf)
557*4882a593Smuzhiyun {
558*4882a593Smuzhiyun 	struct ctlr_info *h;
559*4882a593Smuzhiyun 	struct Scsi_Host *shost = class_to_shost(dev);
560*4882a593Smuzhiyun 
561*4882a593Smuzhiyun 	h = shost_to_hba(shost);
562*4882a593Smuzhiyun 	return snprintf(buf, 30, "HP SSD Smart Path %s\n",
563*4882a593Smuzhiyun 		(h->acciopath_status == 1) ?  "enabled" : "disabled");
564*4882a593Smuzhiyun }
565*4882a593Smuzhiyun 
566*4882a593Smuzhiyun /* List of controllers which cannot be hard reset on kexec with reset_devices */
567*4882a593Smuzhiyun static u32 unresettable_controller[] = {
568*4882a593Smuzhiyun 	0x324a103C, /* Smart Array P712m */
569*4882a593Smuzhiyun 	0x324b103C, /* Smart Array P711m */
570*4882a593Smuzhiyun 	0x3223103C, /* Smart Array P800 */
571*4882a593Smuzhiyun 	0x3234103C, /* Smart Array P400 */
572*4882a593Smuzhiyun 	0x3235103C, /* Smart Array P400i */
573*4882a593Smuzhiyun 	0x3211103C, /* Smart Array E200i */
574*4882a593Smuzhiyun 	0x3212103C, /* Smart Array E200 */
575*4882a593Smuzhiyun 	0x3213103C, /* Smart Array E200i */
576*4882a593Smuzhiyun 	0x3214103C, /* Smart Array E200i */
577*4882a593Smuzhiyun 	0x3215103C, /* Smart Array E200i */
578*4882a593Smuzhiyun 	0x3237103C, /* Smart Array E500 */
579*4882a593Smuzhiyun 	0x323D103C, /* Smart Array P700m */
580*4882a593Smuzhiyun 	0x40800E11, /* Smart Array 5i */
581*4882a593Smuzhiyun 	0x409C0E11, /* Smart Array 6400 */
582*4882a593Smuzhiyun 	0x409D0E11, /* Smart Array 6400 EM */
583*4882a593Smuzhiyun 	0x40700E11, /* Smart Array 5300 */
584*4882a593Smuzhiyun 	0x40820E11, /* Smart Array 532 */
585*4882a593Smuzhiyun 	0x40830E11, /* Smart Array 5312 */
586*4882a593Smuzhiyun 	0x409A0E11, /* Smart Array 641 */
587*4882a593Smuzhiyun 	0x409B0E11, /* Smart Array 642 */
588*4882a593Smuzhiyun 	0x40910E11, /* Smart Array 6i */
589*4882a593Smuzhiyun };
590*4882a593Smuzhiyun 
591*4882a593Smuzhiyun /* List of controllers which cannot even be soft reset */
592*4882a593Smuzhiyun static u32 soft_unresettable_controller[] = {
593*4882a593Smuzhiyun 	0x40800E11, /* Smart Array 5i */
594*4882a593Smuzhiyun 	0x40700E11, /* Smart Array 5300 */
595*4882a593Smuzhiyun 	0x40820E11, /* Smart Array 532 */
596*4882a593Smuzhiyun 	0x40830E11, /* Smart Array 5312 */
597*4882a593Smuzhiyun 	0x409A0E11, /* Smart Array 641 */
598*4882a593Smuzhiyun 	0x409B0E11, /* Smart Array 642 */
599*4882a593Smuzhiyun 	0x40910E11, /* Smart Array 6i */
600*4882a593Smuzhiyun 	/* Exclude 640x boards.  These are two pci devices in one slot
601*4882a593Smuzhiyun 	 * which share a battery backed cache module.  One controls the
602*4882a593Smuzhiyun 	 * cache, the other accesses the cache through the one that controls
603*4882a593Smuzhiyun 	 * it.  If we reset the one controlling the cache, the other will
604*4882a593Smuzhiyun 	 * likely not be happy.  Just forbid resetting this conjoined mess.
605*4882a593Smuzhiyun 	 * The 640x isn't really supported by hpsa anyway.
606*4882a593Smuzhiyun 	 */
607*4882a593Smuzhiyun 	0x409C0E11, /* Smart Array 6400 */
608*4882a593Smuzhiyun 	0x409D0E11, /* Smart Array 6400 EM */
609*4882a593Smuzhiyun };
610*4882a593Smuzhiyun 
board_id_in_array(u32 a[],int nelems,u32 board_id)611*4882a593Smuzhiyun static int board_id_in_array(u32 a[], int nelems, u32 board_id)
612*4882a593Smuzhiyun {
613*4882a593Smuzhiyun 	int i;
614*4882a593Smuzhiyun 
615*4882a593Smuzhiyun 	for (i = 0; i < nelems; i++)
616*4882a593Smuzhiyun 		if (a[i] == board_id)
617*4882a593Smuzhiyun 			return 1;
618*4882a593Smuzhiyun 	return 0;
619*4882a593Smuzhiyun }
620*4882a593Smuzhiyun 
ctlr_is_hard_resettable(u32 board_id)621*4882a593Smuzhiyun static int ctlr_is_hard_resettable(u32 board_id)
622*4882a593Smuzhiyun {
623*4882a593Smuzhiyun 	return !board_id_in_array(unresettable_controller,
624*4882a593Smuzhiyun 			ARRAY_SIZE(unresettable_controller), board_id);
625*4882a593Smuzhiyun }
626*4882a593Smuzhiyun 
ctlr_is_soft_resettable(u32 board_id)627*4882a593Smuzhiyun static int ctlr_is_soft_resettable(u32 board_id)
628*4882a593Smuzhiyun {
629*4882a593Smuzhiyun 	return !board_id_in_array(soft_unresettable_controller,
630*4882a593Smuzhiyun 			ARRAY_SIZE(soft_unresettable_controller), board_id);
631*4882a593Smuzhiyun }
632*4882a593Smuzhiyun 
ctlr_is_resettable(u32 board_id)633*4882a593Smuzhiyun static int ctlr_is_resettable(u32 board_id)
634*4882a593Smuzhiyun {
635*4882a593Smuzhiyun 	return ctlr_is_hard_resettable(board_id) ||
636*4882a593Smuzhiyun 		ctlr_is_soft_resettable(board_id);
637*4882a593Smuzhiyun }
638*4882a593Smuzhiyun 
host_show_resettable(struct device * dev,struct device_attribute * attr,char * buf)639*4882a593Smuzhiyun static ssize_t host_show_resettable(struct device *dev,
640*4882a593Smuzhiyun 	struct device_attribute *attr, char *buf)
641*4882a593Smuzhiyun {
642*4882a593Smuzhiyun 	struct ctlr_info *h;
643*4882a593Smuzhiyun 	struct Scsi_Host *shost = class_to_shost(dev);
644*4882a593Smuzhiyun 
645*4882a593Smuzhiyun 	h = shost_to_hba(shost);
646*4882a593Smuzhiyun 	return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
647*4882a593Smuzhiyun }
648*4882a593Smuzhiyun 
is_logical_dev_addr_mode(unsigned char scsi3addr[])649*4882a593Smuzhiyun static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
650*4882a593Smuzhiyun {
651*4882a593Smuzhiyun 	return (scsi3addr[3] & 0xC0) == 0x40;
652*4882a593Smuzhiyun }
653*4882a593Smuzhiyun 
654*4882a593Smuzhiyun static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
655*4882a593Smuzhiyun 	"1(+0)ADM", "UNKNOWN", "PHYS DRV"
656*4882a593Smuzhiyun };
657*4882a593Smuzhiyun #define HPSA_RAID_0	0
658*4882a593Smuzhiyun #define HPSA_RAID_4	1
659*4882a593Smuzhiyun #define HPSA_RAID_1	2	/* also used for RAID 10 */
660*4882a593Smuzhiyun #define HPSA_RAID_5	3	/* also used for RAID 50 */
661*4882a593Smuzhiyun #define HPSA_RAID_51	4
662*4882a593Smuzhiyun #define HPSA_RAID_6	5	/* also used for RAID 60 */
663*4882a593Smuzhiyun #define HPSA_RAID_ADM	6	/* also used for RAID 1+0 ADM */
664*4882a593Smuzhiyun #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2)
665*4882a593Smuzhiyun #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1)
666*4882a593Smuzhiyun 
is_logical_device(struct hpsa_scsi_dev_t * device)667*4882a593Smuzhiyun static inline bool is_logical_device(struct hpsa_scsi_dev_t *device)
668*4882a593Smuzhiyun {
669*4882a593Smuzhiyun 	return !device->physical_device;
670*4882a593Smuzhiyun }
671*4882a593Smuzhiyun 
raid_level_show(struct device * dev,struct device_attribute * attr,char * buf)672*4882a593Smuzhiyun static ssize_t raid_level_show(struct device *dev,
673*4882a593Smuzhiyun 	     struct device_attribute *attr, char *buf)
674*4882a593Smuzhiyun {
675*4882a593Smuzhiyun 	ssize_t l = 0;
676*4882a593Smuzhiyun 	unsigned char rlevel;
677*4882a593Smuzhiyun 	struct ctlr_info *h;
678*4882a593Smuzhiyun 	struct scsi_device *sdev;
679*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *hdev;
680*4882a593Smuzhiyun 	unsigned long flags;
681*4882a593Smuzhiyun 
682*4882a593Smuzhiyun 	sdev = to_scsi_device(dev);
683*4882a593Smuzhiyun 	h = sdev_to_hba(sdev);
684*4882a593Smuzhiyun 	spin_lock_irqsave(&h->lock, flags);
685*4882a593Smuzhiyun 	hdev = sdev->hostdata;
686*4882a593Smuzhiyun 	if (!hdev) {
687*4882a593Smuzhiyun 		spin_unlock_irqrestore(&h->lock, flags);
688*4882a593Smuzhiyun 		return -ENODEV;
689*4882a593Smuzhiyun 	}
690*4882a593Smuzhiyun 
691*4882a593Smuzhiyun 	/* Is this even a logical drive? */
692*4882a593Smuzhiyun 	if (!is_logical_device(hdev)) {
693*4882a593Smuzhiyun 		spin_unlock_irqrestore(&h->lock, flags);
694*4882a593Smuzhiyun 		l = snprintf(buf, PAGE_SIZE, "N/A\n");
695*4882a593Smuzhiyun 		return l;
696*4882a593Smuzhiyun 	}
697*4882a593Smuzhiyun 
698*4882a593Smuzhiyun 	rlevel = hdev->raid_level;
699*4882a593Smuzhiyun 	spin_unlock_irqrestore(&h->lock, flags);
700*4882a593Smuzhiyun 	if (rlevel > RAID_UNKNOWN)
701*4882a593Smuzhiyun 		rlevel = RAID_UNKNOWN;
702*4882a593Smuzhiyun 	l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
703*4882a593Smuzhiyun 	return l;
704*4882a593Smuzhiyun }
705*4882a593Smuzhiyun 
lunid_show(struct device * dev,struct device_attribute * attr,char * buf)706*4882a593Smuzhiyun static ssize_t lunid_show(struct device *dev,
707*4882a593Smuzhiyun 	     struct device_attribute *attr, char *buf)
708*4882a593Smuzhiyun {
709*4882a593Smuzhiyun 	struct ctlr_info *h;
710*4882a593Smuzhiyun 	struct scsi_device *sdev;
711*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *hdev;
712*4882a593Smuzhiyun 	unsigned long flags;
713*4882a593Smuzhiyun 	unsigned char lunid[8];
714*4882a593Smuzhiyun 
715*4882a593Smuzhiyun 	sdev = to_scsi_device(dev);
716*4882a593Smuzhiyun 	h = sdev_to_hba(sdev);
717*4882a593Smuzhiyun 	spin_lock_irqsave(&h->lock, flags);
718*4882a593Smuzhiyun 	hdev = sdev->hostdata;
719*4882a593Smuzhiyun 	if (!hdev) {
720*4882a593Smuzhiyun 		spin_unlock_irqrestore(&h->lock, flags);
721*4882a593Smuzhiyun 		return -ENODEV;
722*4882a593Smuzhiyun 	}
723*4882a593Smuzhiyun 	memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
724*4882a593Smuzhiyun 	spin_unlock_irqrestore(&h->lock, flags);
725*4882a593Smuzhiyun 	return snprintf(buf, 20, "0x%8phN\n", lunid);
726*4882a593Smuzhiyun }
727*4882a593Smuzhiyun 
unique_id_show(struct device * dev,struct device_attribute * attr,char * buf)728*4882a593Smuzhiyun static ssize_t unique_id_show(struct device *dev,
729*4882a593Smuzhiyun 	     struct device_attribute *attr, char *buf)
730*4882a593Smuzhiyun {
731*4882a593Smuzhiyun 	struct ctlr_info *h;
732*4882a593Smuzhiyun 	struct scsi_device *sdev;
733*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *hdev;
734*4882a593Smuzhiyun 	unsigned long flags;
735*4882a593Smuzhiyun 	unsigned char sn[16];
736*4882a593Smuzhiyun 
737*4882a593Smuzhiyun 	sdev = to_scsi_device(dev);
738*4882a593Smuzhiyun 	h = sdev_to_hba(sdev);
739*4882a593Smuzhiyun 	spin_lock_irqsave(&h->lock, flags);
740*4882a593Smuzhiyun 	hdev = sdev->hostdata;
741*4882a593Smuzhiyun 	if (!hdev) {
742*4882a593Smuzhiyun 		spin_unlock_irqrestore(&h->lock, flags);
743*4882a593Smuzhiyun 		return -ENODEV;
744*4882a593Smuzhiyun 	}
745*4882a593Smuzhiyun 	memcpy(sn, hdev->device_id, sizeof(sn));
746*4882a593Smuzhiyun 	spin_unlock_irqrestore(&h->lock, flags);
747*4882a593Smuzhiyun 	return snprintf(buf, 16 * 2 + 2,
748*4882a593Smuzhiyun 			"%02X%02X%02X%02X%02X%02X%02X%02X"
749*4882a593Smuzhiyun 			"%02X%02X%02X%02X%02X%02X%02X%02X\n",
750*4882a593Smuzhiyun 			sn[0], sn[1], sn[2], sn[3],
751*4882a593Smuzhiyun 			sn[4], sn[5], sn[6], sn[7],
752*4882a593Smuzhiyun 			sn[8], sn[9], sn[10], sn[11],
753*4882a593Smuzhiyun 			sn[12], sn[13], sn[14], sn[15]);
754*4882a593Smuzhiyun }
755*4882a593Smuzhiyun 
sas_address_show(struct device * dev,struct device_attribute * attr,char * buf)756*4882a593Smuzhiyun static ssize_t sas_address_show(struct device *dev,
757*4882a593Smuzhiyun 	      struct device_attribute *attr, char *buf)
758*4882a593Smuzhiyun {
759*4882a593Smuzhiyun 	struct ctlr_info *h;
760*4882a593Smuzhiyun 	struct scsi_device *sdev;
761*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *hdev;
762*4882a593Smuzhiyun 	unsigned long flags;
763*4882a593Smuzhiyun 	u64 sas_address;
764*4882a593Smuzhiyun 
765*4882a593Smuzhiyun 	sdev = to_scsi_device(dev);
766*4882a593Smuzhiyun 	h = sdev_to_hba(sdev);
767*4882a593Smuzhiyun 	spin_lock_irqsave(&h->lock, flags);
768*4882a593Smuzhiyun 	hdev = sdev->hostdata;
769*4882a593Smuzhiyun 	if (!hdev || is_logical_device(hdev) || !hdev->expose_device) {
770*4882a593Smuzhiyun 		spin_unlock_irqrestore(&h->lock, flags);
771*4882a593Smuzhiyun 		return -ENODEV;
772*4882a593Smuzhiyun 	}
773*4882a593Smuzhiyun 	sas_address = hdev->sas_address;
774*4882a593Smuzhiyun 	spin_unlock_irqrestore(&h->lock, flags);
775*4882a593Smuzhiyun 
776*4882a593Smuzhiyun 	return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address);
777*4882a593Smuzhiyun }
778*4882a593Smuzhiyun 
host_show_hp_ssd_smart_path_enabled(struct device * dev,struct device_attribute * attr,char * buf)779*4882a593Smuzhiyun static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
780*4882a593Smuzhiyun 	     struct device_attribute *attr, char *buf)
781*4882a593Smuzhiyun {
782*4882a593Smuzhiyun 	struct ctlr_info *h;
783*4882a593Smuzhiyun 	struct scsi_device *sdev;
784*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *hdev;
785*4882a593Smuzhiyun 	unsigned long flags;
786*4882a593Smuzhiyun 	int offload_enabled;
787*4882a593Smuzhiyun 
788*4882a593Smuzhiyun 	sdev = to_scsi_device(dev);
789*4882a593Smuzhiyun 	h = sdev_to_hba(sdev);
790*4882a593Smuzhiyun 	spin_lock_irqsave(&h->lock, flags);
791*4882a593Smuzhiyun 	hdev = sdev->hostdata;
792*4882a593Smuzhiyun 	if (!hdev) {
793*4882a593Smuzhiyun 		spin_unlock_irqrestore(&h->lock, flags);
794*4882a593Smuzhiyun 		return -ENODEV;
795*4882a593Smuzhiyun 	}
796*4882a593Smuzhiyun 	offload_enabled = hdev->offload_enabled;
797*4882a593Smuzhiyun 	spin_unlock_irqrestore(&h->lock, flags);
798*4882a593Smuzhiyun 
799*4882a593Smuzhiyun 	if (hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC)
800*4882a593Smuzhiyun 		return snprintf(buf, 20, "%d\n", offload_enabled);
801*4882a593Smuzhiyun 	else
802*4882a593Smuzhiyun 		return snprintf(buf, 40, "%s\n",
803*4882a593Smuzhiyun 				"Not applicable for a controller");
804*4882a593Smuzhiyun }
805*4882a593Smuzhiyun 
806*4882a593Smuzhiyun #define MAX_PATHS 8
path_info_show(struct device * dev,struct device_attribute * attr,char * buf)807*4882a593Smuzhiyun static ssize_t path_info_show(struct device *dev,
808*4882a593Smuzhiyun 	     struct device_attribute *attr, char *buf)
809*4882a593Smuzhiyun {
810*4882a593Smuzhiyun 	struct ctlr_info *h;
811*4882a593Smuzhiyun 	struct scsi_device *sdev;
812*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *hdev;
813*4882a593Smuzhiyun 	unsigned long flags;
814*4882a593Smuzhiyun 	int i;
815*4882a593Smuzhiyun 	int output_len = 0;
816*4882a593Smuzhiyun 	u8 box;
817*4882a593Smuzhiyun 	u8 bay;
818*4882a593Smuzhiyun 	u8 path_map_index = 0;
819*4882a593Smuzhiyun 	char *active;
820*4882a593Smuzhiyun 	unsigned char phys_connector[2];
821*4882a593Smuzhiyun 
822*4882a593Smuzhiyun 	sdev = to_scsi_device(dev);
823*4882a593Smuzhiyun 	h = sdev_to_hba(sdev);
824*4882a593Smuzhiyun 	spin_lock_irqsave(&h->devlock, flags);
825*4882a593Smuzhiyun 	hdev = sdev->hostdata;
826*4882a593Smuzhiyun 	if (!hdev) {
827*4882a593Smuzhiyun 		spin_unlock_irqrestore(&h->devlock, flags);
828*4882a593Smuzhiyun 		return -ENODEV;
829*4882a593Smuzhiyun 	}
830*4882a593Smuzhiyun 
831*4882a593Smuzhiyun 	bay = hdev->bay;
832*4882a593Smuzhiyun 	for (i = 0; i < MAX_PATHS; i++) {
833*4882a593Smuzhiyun 		path_map_index = 1<<i;
834*4882a593Smuzhiyun 		if (i == hdev->active_path_index)
835*4882a593Smuzhiyun 			active = "Active";
836*4882a593Smuzhiyun 		else if (hdev->path_map & path_map_index)
837*4882a593Smuzhiyun 			active = "Inactive";
838*4882a593Smuzhiyun 		else
839*4882a593Smuzhiyun 			continue;
840*4882a593Smuzhiyun 
841*4882a593Smuzhiyun 		output_len += scnprintf(buf + output_len,
842*4882a593Smuzhiyun 				PAGE_SIZE - output_len,
843*4882a593Smuzhiyun 				"[%d:%d:%d:%d] %20.20s ",
844*4882a593Smuzhiyun 				h->scsi_host->host_no,
845*4882a593Smuzhiyun 				hdev->bus, hdev->target, hdev->lun,
846*4882a593Smuzhiyun 				scsi_device_type(hdev->devtype));
847*4882a593Smuzhiyun 
848*4882a593Smuzhiyun 		if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) {
849*4882a593Smuzhiyun 			output_len += scnprintf(buf + output_len,
850*4882a593Smuzhiyun 						PAGE_SIZE - output_len,
851*4882a593Smuzhiyun 						"%s\n", active);
852*4882a593Smuzhiyun 			continue;
853*4882a593Smuzhiyun 		}
854*4882a593Smuzhiyun 
855*4882a593Smuzhiyun 		box = hdev->box[i];
856*4882a593Smuzhiyun 		memcpy(&phys_connector, &hdev->phys_connector[i],
857*4882a593Smuzhiyun 			sizeof(phys_connector));
858*4882a593Smuzhiyun 		if (phys_connector[0] < '0')
859*4882a593Smuzhiyun 			phys_connector[0] = '0';
860*4882a593Smuzhiyun 		if (phys_connector[1] < '0')
861*4882a593Smuzhiyun 			phys_connector[1] = '0';
862*4882a593Smuzhiyun 		output_len += scnprintf(buf + output_len,
863*4882a593Smuzhiyun 				PAGE_SIZE - output_len,
864*4882a593Smuzhiyun 				"PORT: %.2s ",
865*4882a593Smuzhiyun 				phys_connector);
866*4882a593Smuzhiyun 		if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) &&
867*4882a593Smuzhiyun 			hdev->expose_device) {
868*4882a593Smuzhiyun 			if (box == 0 || box == 0xFF) {
869*4882a593Smuzhiyun 				output_len += scnprintf(buf + output_len,
870*4882a593Smuzhiyun 					PAGE_SIZE - output_len,
871*4882a593Smuzhiyun 					"BAY: %hhu %s\n",
872*4882a593Smuzhiyun 					bay, active);
873*4882a593Smuzhiyun 			} else {
874*4882a593Smuzhiyun 				output_len += scnprintf(buf + output_len,
875*4882a593Smuzhiyun 					PAGE_SIZE - output_len,
876*4882a593Smuzhiyun 					"BOX: %hhu BAY: %hhu %s\n",
877*4882a593Smuzhiyun 					box, bay, active);
878*4882a593Smuzhiyun 			}
879*4882a593Smuzhiyun 		} else if (box != 0 && box != 0xFF) {
880*4882a593Smuzhiyun 			output_len += scnprintf(buf + output_len,
881*4882a593Smuzhiyun 				PAGE_SIZE - output_len, "BOX: %hhu %s\n",
882*4882a593Smuzhiyun 				box, active);
883*4882a593Smuzhiyun 		} else
884*4882a593Smuzhiyun 			output_len += scnprintf(buf + output_len,
885*4882a593Smuzhiyun 				PAGE_SIZE - output_len, "%s\n", active);
886*4882a593Smuzhiyun 	}
887*4882a593Smuzhiyun 
888*4882a593Smuzhiyun 	spin_unlock_irqrestore(&h->devlock, flags);
889*4882a593Smuzhiyun 	return output_len;
890*4882a593Smuzhiyun }
891*4882a593Smuzhiyun 
host_show_ctlr_num(struct device * dev,struct device_attribute * attr,char * buf)892*4882a593Smuzhiyun static ssize_t host_show_ctlr_num(struct device *dev,
893*4882a593Smuzhiyun 	struct device_attribute *attr, char *buf)
894*4882a593Smuzhiyun {
895*4882a593Smuzhiyun 	struct ctlr_info *h;
896*4882a593Smuzhiyun 	struct Scsi_Host *shost = class_to_shost(dev);
897*4882a593Smuzhiyun 
898*4882a593Smuzhiyun 	h = shost_to_hba(shost);
899*4882a593Smuzhiyun 	return snprintf(buf, 20, "%d\n", h->ctlr);
900*4882a593Smuzhiyun }
901*4882a593Smuzhiyun 
host_show_legacy_board(struct device * dev,struct device_attribute * attr,char * buf)902*4882a593Smuzhiyun static ssize_t host_show_legacy_board(struct device *dev,
903*4882a593Smuzhiyun 	struct device_attribute *attr, char *buf)
904*4882a593Smuzhiyun {
905*4882a593Smuzhiyun 	struct ctlr_info *h;
906*4882a593Smuzhiyun 	struct Scsi_Host *shost = class_to_shost(dev);
907*4882a593Smuzhiyun 
908*4882a593Smuzhiyun 	h = shost_to_hba(shost);
909*4882a593Smuzhiyun 	return snprintf(buf, 20, "%d\n", h->legacy_board ? 1 : 0);
910*4882a593Smuzhiyun }
911*4882a593Smuzhiyun 
912*4882a593Smuzhiyun static DEVICE_ATTR_RO(raid_level);
913*4882a593Smuzhiyun static DEVICE_ATTR_RO(lunid);
914*4882a593Smuzhiyun static DEVICE_ATTR_RO(unique_id);
915*4882a593Smuzhiyun static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
916*4882a593Smuzhiyun static DEVICE_ATTR_RO(sas_address);
917*4882a593Smuzhiyun static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
918*4882a593Smuzhiyun 			host_show_hp_ssd_smart_path_enabled, NULL);
919*4882a593Smuzhiyun static DEVICE_ATTR_RO(path_info);
920*4882a593Smuzhiyun static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
921*4882a593Smuzhiyun 		host_show_hp_ssd_smart_path_status,
922*4882a593Smuzhiyun 		host_store_hp_ssd_smart_path_status);
923*4882a593Smuzhiyun static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
924*4882a593Smuzhiyun 			host_store_raid_offload_debug);
925*4882a593Smuzhiyun static DEVICE_ATTR(firmware_revision, S_IRUGO,
926*4882a593Smuzhiyun 	host_show_firmware_revision, NULL);
927*4882a593Smuzhiyun static DEVICE_ATTR(commands_outstanding, S_IRUGO,
928*4882a593Smuzhiyun 	host_show_commands_outstanding, NULL);
929*4882a593Smuzhiyun static DEVICE_ATTR(transport_mode, S_IRUGO,
930*4882a593Smuzhiyun 	host_show_transport_mode, NULL);
931*4882a593Smuzhiyun static DEVICE_ATTR(resettable, S_IRUGO,
932*4882a593Smuzhiyun 	host_show_resettable, NULL);
933*4882a593Smuzhiyun static DEVICE_ATTR(lockup_detected, S_IRUGO,
934*4882a593Smuzhiyun 	host_show_lockup_detected, NULL);
935*4882a593Smuzhiyun static DEVICE_ATTR(ctlr_num, S_IRUGO,
936*4882a593Smuzhiyun 	host_show_ctlr_num, NULL);
937*4882a593Smuzhiyun static DEVICE_ATTR(legacy_board, S_IRUGO,
938*4882a593Smuzhiyun 	host_show_legacy_board, NULL);
939*4882a593Smuzhiyun 
940*4882a593Smuzhiyun static struct device_attribute *hpsa_sdev_attrs[] = {
941*4882a593Smuzhiyun 	&dev_attr_raid_level,
942*4882a593Smuzhiyun 	&dev_attr_lunid,
943*4882a593Smuzhiyun 	&dev_attr_unique_id,
944*4882a593Smuzhiyun 	&dev_attr_hp_ssd_smart_path_enabled,
945*4882a593Smuzhiyun 	&dev_attr_path_info,
946*4882a593Smuzhiyun 	&dev_attr_sas_address,
947*4882a593Smuzhiyun 	NULL,
948*4882a593Smuzhiyun };
949*4882a593Smuzhiyun 
950*4882a593Smuzhiyun static struct device_attribute *hpsa_shost_attrs[] = {
951*4882a593Smuzhiyun 	&dev_attr_rescan,
952*4882a593Smuzhiyun 	&dev_attr_firmware_revision,
953*4882a593Smuzhiyun 	&dev_attr_commands_outstanding,
954*4882a593Smuzhiyun 	&dev_attr_transport_mode,
955*4882a593Smuzhiyun 	&dev_attr_resettable,
956*4882a593Smuzhiyun 	&dev_attr_hp_ssd_smart_path_status,
957*4882a593Smuzhiyun 	&dev_attr_raid_offload_debug,
958*4882a593Smuzhiyun 	&dev_attr_lockup_detected,
959*4882a593Smuzhiyun 	&dev_attr_ctlr_num,
960*4882a593Smuzhiyun 	&dev_attr_legacy_board,
961*4882a593Smuzhiyun 	NULL,
962*4882a593Smuzhiyun };
963*4882a593Smuzhiyun 
964*4882a593Smuzhiyun #define HPSA_NRESERVED_CMDS	(HPSA_CMDS_RESERVED_FOR_DRIVER +\
965*4882a593Smuzhiyun 				 HPSA_MAX_CONCURRENT_PASSTHRUS)
966*4882a593Smuzhiyun 
967*4882a593Smuzhiyun static struct scsi_host_template hpsa_driver_template = {
968*4882a593Smuzhiyun 	.module			= THIS_MODULE,
969*4882a593Smuzhiyun 	.name			= HPSA,
970*4882a593Smuzhiyun 	.proc_name		= HPSA,
971*4882a593Smuzhiyun 	.queuecommand		= hpsa_scsi_queue_command,
972*4882a593Smuzhiyun 	.scan_start		= hpsa_scan_start,
973*4882a593Smuzhiyun 	.scan_finished		= hpsa_scan_finished,
974*4882a593Smuzhiyun 	.change_queue_depth	= hpsa_change_queue_depth,
975*4882a593Smuzhiyun 	.this_id		= -1,
976*4882a593Smuzhiyun 	.eh_device_reset_handler = hpsa_eh_device_reset_handler,
977*4882a593Smuzhiyun 	.ioctl			= hpsa_ioctl,
978*4882a593Smuzhiyun 	.slave_alloc		= hpsa_slave_alloc,
979*4882a593Smuzhiyun 	.slave_configure	= hpsa_slave_configure,
980*4882a593Smuzhiyun 	.slave_destroy		= hpsa_slave_destroy,
981*4882a593Smuzhiyun #ifdef CONFIG_COMPAT
982*4882a593Smuzhiyun 	.compat_ioctl		= hpsa_compat_ioctl,
983*4882a593Smuzhiyun #endif
984*4882a593Smuzhiyun 	.sdev_attrs = hpsa_sdev_attrs,
985*4882a593Smuzhiyun 	.shost_attrs = hpsa_shost_attrs,
986*4882a593Smuzhiyun 	.max_sectors = 2048,
987*4882a593Smuzhiyun 	.no_write_same = 1,
988*4882a593Smuzhiyun };
989*4882a593Smuzhiyun 
next_command(struct ctlr_info * h,u8 q)990*4882a593Smuzhiyun static inline u32 next_command(struct ctlr_info *h, u8 q)
991*4882a593Smuzhiyun {
992*4882a593Smuzhiyun 	u32 a;
993*4882a593Smuzhiyun 	struct reply_queue_buffer *rq = &h->reply_queue[q];
994*4882a593Smuzhiyun 
995*4882a593Smuzhiyun 	if (h->transMethod & CFGTBL_Trans_io_accel1)
996*4882a593Smuzhiyun 		return h->access.command_completed(h, q);
997*4882a593Smuzhiyun 
998*4882a593Smuzhiyun 	if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
999*4882a593Smuzhiyun 		return h->access.command_completed(h, q);
1000*4882a593Smuzhiyun 
1001*4882a593Smuzhiyun 	if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
1002*4882a593Smuzhiyun 		a = rq->head[rq->current_entry];
1003*4882a593Smuzhiyun 		rq->current_entry++;
1004*4882a593Smuzhiyun 		atomic_dec(&h->commands_outstanding);
1005*4882a593Smuzhiyun 	} else {
1006*4882a593Smuzhiyun 		a = FIFO_EMPTY;
1007*4882a593Smuzhiyun 	}
1008*4882a593Smuzhiyun 	/* Check for wraparound */
1009*4882a593Smuzhiyun 	if (rq->current_entry == h->max_commands) {
1010*4882a593Smuzhiyun 		rq->current_entry = 0;
1011*4882a593Smuzhiyun 		rq->wraparound ^= 1;
1012*4882a593Smuzhiyun 	}
1013*4882a593Smuzhiyun 	return a;
1014*4882a593Smuzhiyun }
1015*4882a593Smuzhiyun 
1016*4882a593Smuzhiyun /*
1017*4882a593Smuzhiyun  * There are some special bits in the bus address of the
1018*4882a593Smuzhiyun  * command that we have to set for the controller to know
1019*4882a593Smuzhiyun  * how to process the command:
1020*4882a593Smuzhiyun  *
1021*4882a593Smuzhiyun  * Normal performant mode:
1022*4882a593Smuzhiyun  * bit 0: 1 means performant mode, 0 means simple mode.
1023*4882a593Smuzhiyun  * bits 1-3 = block fetch table entry
1024*4882a593Smuzhiyun  * bits 4-6 = command type (== 0)
1025*4882a593Smuzhiyun  *
1026*4882a593Smuzhiyun  * ioaccel1 mode:
1027*4882a593Smuzhiyun  * bit 0 = "performant mode" bit.
1028*4882a593Smuzhiyun  * bits 1-3 = block fetch table entry
1029*4882a593Smuzhiyun  * bits 4-6 = command type (== 110)
1030*4882a593Smuzhiyun  * (command type is needed because ioaccel1 mode
1031*4882a593Smuzhiyun  * commands are submitted through the same register as normal
1032*4882a593Smuzhiyun  * mode commands, so this is how the controller knows whether
1033*4882a593Smuzhiyun  * the command is normal mode or ioaccel1 mode.)
1034*4882a593Smuzhiyun  *
1035*4882a593Smuzhiyun  * ioaccel2 mode:
1036*4882a593Smuzhiyun  * bit 0 = "performant mode" bit.
1037*4882a593Smuzhiyun  * bits 1-4 = block fetch table entry (note extra bit)
1038*4882a593Smuzhiyun  * bits 4-6 = not needed, because ioaccel2 mode has
1039*4882a593Smuzhiyun  * a separate special register for submitting commands.
1040*4882a593Smuzhiyun  */
1041*4882a593Smuzhiyun 
1042*4882a593Smuzhiyun /*
1043*4882a593Smuzhiyun  * set_performant_mode: Modify the tag for cciss performant
1044*4882a593Smuzhiyun  * set bit 0 for pull model, bits 3-1 for block fetch
1045*4882a593Smuzhiyun  * register number
1046*4882a593Smuzhiyun  */
1047*4882a593Smuzhiyun #define DEFAULT_REPLY_QUEUE (-1)
set_performant_mode(struct ctlr_info * h,struct CommandList * c,int reply_queue)1048*4882a593Smuzhiyun static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
1049*4882a593Smuzhiyun 					int reply_queue)
1050*4882a593Smuzhiyun {
1051*4882a593Smuzhiyun 	if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
1052*4882a593Smuzhiyun 		c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
1053*4882a593Smuzhiyun 		if (unlikely(!h->msix_vectors))
1054*4882a593Smuzhiyun 			return;
1055*4882a593Smuzhiyun 		c->Header.ReplyQueue = reply_queue;
1056*4882a593Smuzhiyun 	}
1057*4882a593Smuzhiyun }
1058*4882a593Smuzhiyun 
set_ioaccel1_performant_mode(struct ctlr_info * h,struct CommandList * c,int reply_queue)1059*4882a593Smuzhiyun static void set_ioaccel1_performant_mode(struct ctlr_info *h,
1060*4882a593Smuzhiyun 						struct CommandList *c,
1061*4882a593Smuzhiyun 						int reply_queue)
1062*4882a593Smuzhiyun {
1063*4882a593Smuzhiyun 	struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
1064*4882a593Smuzhiyun 
1065*4882a593Smuzhiyun 	/*
1066*4882a593Smuzhiyun 	 * Tell the controller to post the reply to the queue for this
1067*4882a593Smuzhiyun 	 * processor.  This seems to give the best I/O throughput.
1068*4882a593Smuzhiyun 	 */
1069*4882a593Smuzhiyun 	cp->ReplyQueue = reply_queue;
1070*4882a593Smuzhiyun 	/*
1071*4882a593Smuzhiyun 	 * Set the bits in the address sent down to include:
1072*4882a593Smuzhiyun 	 *  - performant mode bit (bit 0)
1073*4882a593Smuzhiyun 	 *  - pull count (bits 1-3)
1074*4882a593Smuzhiyun 	 *  - command type (bits 4-6)
1075*4882a593Smuzhiyun 	 */
1076*4882a593Smuzhiyun 	c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
1077*4882a593Smuzhiyun 					IOACCEL1_BUSADDR_CMDTYPE;
1078*4882a593Smuzhiyun }
1079*4882a593Smuzhiyun 
set_ioaccel2_tmf_performant_mode(struct ctlr_info * h,struct CommandList * c,int reply_queue)1080*4882a593Smuzhiyun static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h,
1081*4882a593Smuzhiyun 						struct CommandList *c,
1082*4882a593Smuzhiyun 						int reply_queue)
1083*4882a593Smuzhiyun {
1084*4882a593Smuzhiyun 	struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *)
1085*4882a593Smuzhiyun 		&h->ioaccel2_cmd_pool[c->cmdindex];
1086*4882a593Smuzhiyun 
1087*4882a593Smuzhiyun 	/* Tell the controller to post the reply to the queue for this
1088*4882a593Smuzhiyun 	 * processor.  This seems to give the best I/O throughput.
1089*4882a593Smuzhiyun 	 */
1090*4882a593Smuzhiyun 	cp->reply_queue = reply_queue;
1091*4882a593Smuzhiyun 	/* Set the bits in the address sent down to include:
1092*4882a593Smuzhiyun 	 *  - performant mode bit not used in ioaccel mode 2
1093*4882a593Smuzhiyun 	 *  - pull count (bits 0-3)
1094*4882a593Smuzhiyun 	 *  - command type isn't needed for ioaccel2
1095*4882a593Smuzhiyun 	 */
1096*4882a593Smuzhiyun 	c->busaddr |= h->ioaccel2_blockFetchTable[0];
1097*4882a593Smuzhiyun }
1098*4882a593Smuzhiyun 
set_ioaccel2_performant_mode(struct ctlr_info * h,struct CommandList * c,int reply_queue)1099*4882a593Smuzhiyun static void set_ioaccel2_performant_mode(struct ctlr_info *h,
1100*4882a593Smuzhiyun 						struct CommandList *c,
1101*4882a593Smuzhiyun 						int reply_queue)
1102*4882a593Smuzhiyun {
1103*4882a593Smuzhiyun 	struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
1104*4882a593Smuzhiyun 
1105*4882a593Smuzhiyun 	/*
1106*4882a593Smuzhiyun 	 * Tell the controller to post the reply to the queue for this
1107*4882a593Smuzhiyun 	 * processor.  This seems to give the best I/O throughput.
1108*4882a593Smuzhiyun 	 */
1109*4882a593Smuzhiyun 	cp->reply_queue = reply_queue;
1110*4882a593Smuzhiyun 	/*
1111*4882a593Smuzhiyun 	 * Set the bits in the address sent down to include:
1112*4882a593Smuzhiyun 	 *  - performant mode bit not used in ioaccel mode 2
1113*4882a593Smuzhiyun 	 *  - pull count (bits 0-3)
1114*4882a593Smuzhiyun 	 *  - command type isn't needed for ioaccel2
1115*4882a593Smuzhiyun 	 */
1116*4882a593Smuzhiyun 	c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
1117*4882a593Smuzhiyun }
1118*4882a593Smuzhiyun 
is_firmware_flash_cmd(u8 * cdb)1119*4882a593Smuzhiyun static int is_firmware_flash_cmd(u8 *cdb)
1120*4882a593Smuzhiyun {
1121*4882a593Smuzhiyun 	return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
1122*4882a593Smuzhiyun }
1123*4882a593Smuzhiyun 
1124*4882a593Smuzhiyun /*
1125*4882a593Smuzhiyun  * During firmware flash, the heartbeat register may not update as frequently
1126*4882a593Smuzhiyun  * as it should.  So we dial down lockup detection during firmware flash. and
1127*4882a593Smuzhiyun  * dial it back up when firmware flash completes.
1128*4882a593Smuzhiyun  */
1129*4882a593Smuzhiyun #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
1130*4882a593Smuzhiyun #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
1131*4882a593Smuzhiyun #define HPSA_EVENT_MONITOR_INTERVAL (15 * HZ)
dial_down_lockup_detection_during_fw_flash(struct ctlr_info * h,struct CommandList * c)1132*4882a593Smuzhiyun static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
1133*4882a593Smuzhiyun 		struct CommandList *c)
1134*4882a593Smuzhiyun {
1135*4882a593Smuzhiyun 	if (!is_firmware_flash_cmd(c->Request.CDB))
1136*4882a593Smuzhiyun 		return;
1137*4882a593Smuzhiyun 	atomic_inc(&h->firmware_flash_in_progress);
1138*4882a593Smuzhiyun 	h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
1139*4882a593Smuzhiyun }
1140*4882a593Smuzhiyun 
dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info * h,struct CommandList * c)1141*4882a593Smuzhiyun static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
1142*4882a593Smuzhiyun 		struct CommandList *c)
1143*4882a593Smuzhiyun {
1144*4882a593Smuzhiyun 	if (is_firmware_flash_cmd(c->Request.CDB) &&
1145*4882a593Smuzhiyun 		atomic_dec_and_test(&h->firmware_flash_in_progress))
1146*4882a593Smuzhiyun 		h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
1147*4882a593Smuzhiyun }
1148*4882a593Smuzhiyun 
__enqueue_cmd_and_start_io(struct ctlr_info * h,struct CommandList * c,int reply_queue)1149*4882a593Smuzhiyun static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
1150*4882a593Smuzhiyun 	struct CommandList *c, int reply_queue)
1151*4882a593Smuzhiyun {
1152*4882a593Smuzhiyun 	dial_down_lockup_detection_during_fw_flash(h, c);
1153*4882a593Smuzhiyun 	atomic_inc(&h->commands_outstanding);
1154*4882a593Smuzhiyun 	if (c->device)
1155*4882a593Smuzhiyun 		atomic_inc(&c->device->commands_outstanding);
1156*4882a593Smuzhiyun 
1157*4882a593Smuzhiyun 	reply_queue = h->reply_map[raw_smp_processor_id()];
1158*4882a593Smuzhiyun 	switch (c->cmd_type) {
1159*4882a593Smuzhiyun 	case CMD_IOACCEL1:
1160*4882a593Smuzhiyun 		set_ioaccel1_performant_mode(h, c, reply_queue);
1161*4882a593Smuzhiyun 		writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
1162*4882a593Smuzhiyun 		break;
1163*4882a593Smuzhiyun 	case CMD_IOACCEL2:
1164*4882a593Smuzhiyun 		set_ioaccel2_performant_mode(h, c, reply_queue);
1165*4882a593Smuzhiyun 		writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1166*4882a593Smuzhiyun 		break;
1167*4882a593Smuzhiyun 	case IOACCEL2_TMF:
1168*4882a593Smuzhiyun 		set_ioaccel2_tmf_performant_mode(h, c, reply_queue);
1169*4882a593Smuzhiyun 		writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1170*4882a593Smuzhiyun 		break;
1171*4882a593Smuzhiyun 	default:
1172*4882a593Smuzhiyun 		set_performant_mode(h, c, reply_queue);
1173*4882a593Smuzhiyun 		h->access.submit_command(h, c);
1174*4882a593Smuzhiyun 	}
1175*4882a593Smuzhiyun }
1176*4882a593Smuzhiyun 
enqueue_cmd_and_start_io(struct ctlr_info * h,struct CommandList * c)1177*4882a593Smuzhiyun static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c)
1178*4882a593Smuzhiyun {
1179*4882a593Smuzhiyun 	__enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
1180*4882a593Smuzhiyun }
1181*4882a593Smuzhiyun 
is_hba_lunid(unsigned char scsi3addr[])1182*4882a593Smuzhiyun static inline int is_hba_lunid(unsigned char scsi3addr[])
1183*4882a593Smuzhiyun {
1184*4882a593Smuzhiyun 	return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
1185*4882a593Smuzhiyun }
1186*4882a593Smuzhiyun 
is_scsi_rev_5(struct ctlr_info * h)1187*4882a593Smuzhiyun static inline int is_scsi_rev_5(struct ctlr_info *h)
1188*4882a593Smuzhiyun {
1189*4882a593Smuzhiyun 	if (!h->hba_inquiry_data)
1190*4882a593Smuzhiyun 		return 0;
1191*4882a593Smuzhiyun 	if ((h->hba_inquiry_data[2] & 0x07) == 5)
1192*4882a593Smuzhiyun 		return 1;
1193*4882a593Smuzhiyun 	return 0;
1194*4882a593Smuzhiyun }
1195*4882a593Smuzhiyun 
hpsa_find_target_lun(struct ctlr_info * h,unsigned char scsi3addr[],int bus,int * target,int * lun)1196*4882a593Smuzhiyun static int hpsa_find_target_lun(struct ctlr_info *h,
1197*4882a593Smuzhiyun 	unsigned char scsi3addr[], int bus, int *target, int *lun)
1198*4882a593Smuzhiyun {
1199*4882a593Smuzhiyun 	/* finds an unused bus, target, lun for a new physical device
1200*4882a593Smuzhiyun 	 * assumes h->devlock is held
1201*4882a593Smuzhiyun 	 */
1202*4882a593Smuzhiyun 	int i, found = 0;
1203*4882a593Smuzhiyun 	DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
1204*4882a593Smuzhiyun 
1205*4882a593Smuzhiyun 	bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
1206*4882a593Smuzhiyun 
1207*4882a593Smuzhiyun 	for (i = 0; i < h->ndevices; i++) {
1208*4882a593Smuzhiyun 		if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
1209*4882a593Smuzhiyun 			__set_bit(h->dev[i]->target, lun_taken);
1210*4882a593Smuzhiyun 	}
1211*4882a593Smuzhiyun 
1212*4882a593Smuzhiyun 	i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
1213*4882a593Smuzhiyun 	if (i < HPSA_MAX_DEVICES) {
1214*4882a593Smuzhiyun 		/* *bus = 1; */
1215*4882a593Smuzhiyun 		*target = i;
1216*4882a593Smuzhiyun 		*lun = 0;
1217*4882a593Smuzhiyun 		found = 1;
1218*4882a593Smuzhiyun 	}
1219*4882a593Smuzhiyun 	return !found;
1220*4882a593Smuzhiyun }
1221*4882a593Smuzhiyun 
hpsa_show_dev_msg(const char * level,struct ctlr_info * h,struct hpsa_scsi_dev_t * dev,char * description)1222*4882a593Smuzhiyun static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
1223*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *dev, char *description)
1224*4882a593Smuzhiyun {
1225*4882a593Smuzhiyun #define LABEL_SIZE 25
1226*4882a593Smuzhiyun 	char label[LABEL_SIZE];
1227*4882a593Smuzhiyun 
1228*4882a593Smuzhiyun 	if (h == NULL || h->pdev == NULL || h->scsi_host == NULL)
1229*4882a593Smuzhiyun 		return;
1230*4882a593Smuzhiyun 
1231*4882a593Smuzhiyun 	switch (dev->devtype) {
1232*4882a593Smuzhiyun 	case TYPE_RAID:
1233*4882a593Smuzhiyun 		snprintf(label, LABEL_SIZE, "controller");
1234*4882a593Smuzhiyun 		break;
1235*4882a593Smuzhiyun 	case TYPE_ENCLOSURE:
1236*4882a593Smuzhiyun 		snprintf(label, LABEL_SIZE, "enclosure");
1237*4882a593Smuzhiyun 		break;
1238*4882a593Smuzhiyun 	case TYPE_DISK:
1239*4882a593Smuzhiyun 	case TYPE_ZBC:
1240*4882a593Smuzhiyun 		if (dev->external)
1241*4882a593Smuzhiyun 			snprintf(label, LABEL_SIZE, "external");
1242*4882a593Smuzhiyun 		else if (!is_logical_dev_addr_mode(dev->scsi3addr))
1243*4882a593Smuzhiyun 			snprintf(label, LABEL_SIZE, "%s",
1244*4882a593Smuzhiyun 				raid_label[PHYSICAL_DRIVE]);
1245*4882a593Smuzhiyun 		else
1246*4882a593Smuzhiyun 			snprintf(label, LABEL_SIZE, "RAID-%s",
1247*4882a593Smuzhiyun 				dev->raid_level > RAID_UNKNOWN ? "?" :
1248*4882a593Smuzhiyun 				raid_label[dev->raid_level]);
1249*4882a593Smuzhiyun 		break;
1250*4882a593Smuzhiyun 	case TYPE_ROM:
1251*4882a593Smuzhiyun 		snprintf(label, LABEL_SIZE, "rom");
1252*4882a593Smuzhiyun 		break;
1253*4882a593Smuzhiyun 	case TYPE_TAPE:
1254*4882a593Smuzhiyun 		snprintf(label, LABEL_SIZE, "tape");
1255*4882a593Smuzhiyun 		break;
1256*4882a593Smuzhiyun 	case TYPE_MEDIUM_CHANGER:
1257*4882a593Smuzhiyun 		snprintf(label, LABEL_SIZE, "changer");
1258*4882a593Smuzhiyun 		break;
1259*4882a593Smuzhiyun 	default:
1260*4882a593Smuzhiyun 		snprintf(label, LABEL_SIZE, "UNKNOWN");
1261*4882a593Smuzhiyun 		break;
1262*4882a593Smuzhiyun 	}
1263*4882a593Smuzhiyun 
1264*4882a593Smuzhiyun 	dev_printk(level, &h->pdev->dev,
1265*4882a593Smuzhiyun 			"scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n",
1266*4882a593Smuzhiyun 			h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
1267*4882a593Smuzhiyun 			description,
1268*4882a593Smuzhiyun 			scsi_device_type(dev->devtype),
1269*4882a593Smuzhiyun 			dev->vendor,
1270*4882a593Smuzhiyun 			dev->model,
1271*4882a593Smuzhiyun 			label,
1272*4882a593Smuzhiyun 			dev->offload_config ? '+' : '-',
1273*4882a593Smuzhiyun 			dev->offload_to_be_enabled ? '+' : '-',
1274*4882a593Smuzhiyun 			dev->expose_device);
1275*4882a593Smuzhiyun }
1276*4882a593Smuzhiyun 
1277*4882a593Smuzhiyun /* Add an entry into h->dev[] array. */
hpsa_scsi_add_entry(struct ctlr_info * h,struct hpsa_scsi_dev_t * device,struct hpsa_scsi_dev_t * added[],int * nadded)1278*4882a593Smuzhiyun static int hpsa_scsi_add_entry(struct ctlr_info *h,
1279*4882a593Smuzhiyun 		struct hpsa_scsi_dev_t *device,
1280*4882a593Smuzhiyun 		struct hpsa_scsi_dev_t *added[], int *nadded)
1281*4882a593Smuzhiyun {
1282*4882a593Smuzhiyun 	/* assumes h->devlock is held */
1283*4882a593Smuzhiyun 	int n = h->ndevices;
1284*4882a593Smuzhiyun 	int i;
1285*4882a593Smuzhiyun 	unsigned char addr1[8], addr2[8];
1286*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *sd;
1287*4882a593Smuzhiyun 
1288*4882a593Smuzhiyun 	if (n >= HPSA_MAX_DEVICES) {
1289*4882a593Smuzhiyun 		dev_err(&h->pdev->dev, "too many devices, some will be "
1290*4882a593Smuzhiyun 			"inaccessible.\n");
1291*4882a593Smuzhiyun 		return -1;
1292*4882a593Smuzhiyun 	}
1293*4882a593Smuzhiyun 
1294*4882a593Smuzhiyun 	/* physical devices do not have lun or target assigned until now. */
1295*4882a593Smuzhiyun 	if (device->lun != -1)
1296*4882a593Smuzhiyun 		/* Logical device, lun is already assigned. */
1297*4882a593Smuzhiyun 		goto lun_assigned;
1298*4882a593Smuzhiyun 
1299*4882a593Smuzhiyun 	/* If this device a non-zero lun of a multi-lun device
1300*4882a593Smuzhiyun 	 * byte 4 of the 8-byte LUN addr will contain the logical
1301*4882a593Smuzhiyun 	 * unit no, zero otherwise.
1302*4882a593Smuzhiyun 	 */
1303*4882a593Smuzhiyun 	if (device->scsi3addr[4] == 0) {
1304*4882a593Smuzhiyun 		/* This is not a non-zero lun of a multi-lun device */
1305*4882a593Smuzhiyun 		if (hpsa_find_target_lun(h, device->scsi3addr,
1306*4882a593Smuzhiyun 			device->bus, &device->target, &device->lun) != 0)
1307*4882a593Smuzhiyun 			return -1;
1308*4882a593Smuzhiyun 		goto lun_assigned;
1309*4882a593Smuzhiyun 	}
1310*4882a593Smuzhiyun 
1311*4882a593Smuzhiyun 	/* This is a non-zero lun of a multi-lun device.
1312*4882a593Smuzhiyun 	 * Search through our list and find the device which
1313*4882a593Smuzhiyun 	 * has the same 8 byte LUN address, excepting byte 4 and 5.
1314*4882a593Smuzhiyun 	 * Assign the same bus and target for this new LUN.
1315*4882a593Smuzhiyun 	 * Use the logical unit number from the firmware.
1316*4882a593Smuzhiyun 	 */
1317*4882a593Smuzhiyun 	memcpy(addr1, device->scsi3addr, 8);
1318*4882a593Smuzhiyun 	addr1[4] = 0;
1319*4882a593Smuzhiyun 	addr1[5] = 0;
1320*4882a593Smuzhiyun 	for (i = 0; i < n; i++) {
1321*4882a593Smuzhiyun 		sd = h->dev[i];
1322*4882a593Smuzhiyun 		memcpy(addr2, sd->scsi3addr, 8);
1323*4882a593Smuzhiyun 		addr2[4] = 0;
1324*4882a593Smuzhiyun 		addr2[5] = 0;
1325*4882a593Smuzhiyun 		/* differ only in byte 4 and 5? */
1326*4882a593Smuzhiyun 		if (memcmp(addr1, addr2, 8) == 0) {
1327*4882a593Smuzhiyun 			device->bus = sd->bus;
1328*4882a593Smuzhiyun 			device->target = sd->target;
1329*4882a593Smuzhiyun 			device->lun = device->scsi3addr[4];
1330*4882a593Smuzhiyun 			break;
1331*4882a593Smuzhiyun 		}
1332*4882a593Smuzhiyun 	}
1333*4882a593Smuzhiyun 	if (device->lun == -1) {
1334*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1335*4882a593Smuzhiyun 			" suspect firmware bug or unsupported hardware "
1336*4882a593Smuzhiyun 			"configuration.\n");
1337*4882a593Smuzhiyun 		return -1;
1338*4882a593Smuzhiyun 	}
1339*4882a593Smuzhiyun 
1340*4882a593Smuzhiyun lun_assigned:
1341*4882a593Smuzhiyun 
1342*4882a593Smuzhiyun 	h->dev[n] = device;
1343*4882a593Smuzhiyun 	h->ndevices++;
1344*4882a593Smuzhiyun 	added[*nadded] = device;
1345*4882a593Smuzhiyun 	(*nadded)++;
1346*4882a593Smuzhiyun 	hpsa_show_dev_msg(KERN_INFO, h, device,
1347*4882a593Smuzhiyun 		device->expose_device ? "added" : "masked");
1348*4882a593Smuzhiyun 	return 0;
1349*4882a593Smuzhiyun }
1350*4882a593Smuzhiyun 
1351*4882a593Smuzhiyun /*
1352*4882a593Smuzhiyun  * Called during a scan operation.
1353*4882a593Smuzhiyun  *
1354*4882a593Smuzhiyun  * Update an entry in h->dev[] array.
1355*4882a593Smuzhiyun  */
hpsa_scsi_update_entry(struct ctlr_info * h,int entry,struct hpsa_scsi_dev_t * new_entry)1356*4882a593Smuzhiyun static void hpsa_scsi_update_entry(struct ctlr_info *h,
1357*4882a593Smuzhiyun 	int entry, struct hpsa_scsi_dev_t *new_entry)
1358*4882a593Smuzhiyun {
1359*4882a593Smuzhiyun 	/* assumes h->devlock is held */
1360*4882a593Smuzhiyun 	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1361*4882a593Smuzhiyun 
1362*4882a593Smuzhiyun 	/* Raid level changed. */
1363*4882a593Smuzhiyun 	h->dev[entry]->raid_level = new_entry->raid_level;
1364*4882a593Smuzhiyun 
1365*4882a593Smuzhiyun 	/*
1366*4882a593Smuzhiyun 	 * ioacccel_handle may have changed for a dual domain disk
1367*4882a593Smuzhiyun 	 */
1368*4882a593Smuzhiyun 	h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1369*4882a593Smuzhiyun 
1370*4882a593Smuzhiyun 	/* Raid offload parameters changed.  Careful about the ordering. */
1371*4882a593Smuzhiyun 	if (new_entry->offload_config && new_entry->offload_to_be_enabled) {
1372*4882a593Smuzhiyun 		/*
1373*4882a593Smuzhiyun 		 * if drive is newly offload_enabled, we want to copy the
1374*4882a593Smuzhiyun 		 * raid map data first.  If previously offload_enabled and
1375*4882a593Smuzhiyun 		 * offload_config were set, raid map data had better be
1376*4882a593Smuzhiyun 		 * the same as it was before. If raid map data has changed
1377*4882a593Smuzhiyun 		 * then it had better be the case that
1378*4882a593Smuzhiyun 		 * h->dev[entry]->offload_enabled is currently 0.
1379*4882a593Smuzhiyun 		 */
1380*4882a593Smuzhiyun 		h->dev[entry]->raid_map = new_entry->raid_map;
1381*4882a593Smuzhiyun 		h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1382*4882a593Smuzhiyun 	}
1383*4882a593Smuzhiyun 	if (new_entry->offload_to_be_enabled) {
1384*4882a593Smuzhiyun 		h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1385*4882a593Smuzhiyun 		wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */
1386*4882a593Smuzhiyun 	}
1387*4882a593Smuzhiyun 	h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
1388*4882a593Smuzhiyun 	h->dev[entry]->offload_config = new_entry->offload_config;
1389*4882a593Smuzhiyun 	h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
1390*4882a593Smuzhiyun 	h->dev[entry]->queue_depth = new_entry->queue_depth;
1391*4882a593Smuzhiyun 
1392*4882a593Smuzhiyun 	/*
1393*4882a593Smuzhiyun 	 * We can turn off ioaccel offload now, but need to delay turning
1394*4882a593Smuzhiyun 	 * ioaccel on until we can update h->dev[entry]->phys_disk[], but we
1395*4882a593Smuzhiyun 	 * can't do that until all the devices are updated.
1396*4882a593Smuzhiyun 	 */
1397*4882a593Smuzhiyun 	h->dev[entry]->offload_to_be_enabled = new_entry->offload_to_be_enabled;
1398*4882a593Smuzhiyun 
1399*4882a593Smuzhiyun 	/*
1400*4882a593Smuzhiyun 	 * turn ioaccel off immediately if told to do so.
1401*4882a593Smuzhiyun 	 */
1402*4882a593Smuzhiyun 	if (!new_entry->offload_to_be_enabled)
1403*4882a593Smuzhiyun 		h->dev[entry]->offload_enabled = 0;
1404*4882a593Smuzhiyun 
1405*4882a593Smuzhiyun 	hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1406*4882a593Smuzhiyun }
1407*4882a593Smuzhiyun 
1408*4882a593Smuzhiyun /* Replace an entry from h->dev[] array. */
hpsa_scsi_replace_entry(struct ctlr_info * h,int entry,struct hpsa_scsi_dev_t * new_entry,struct hpsa_scsi_dev_t * added[],int * nadded,struct hpsa_scsi_dev_t * removed[],int * nremoved)1409*4882a593Smuzhiyun static void hpsa_scsi_replace_entry(struct ctlr_info *h,
1410*4882a593Smuzhiyun 	int entry, struct hpsa_scsi_dev_t *new_entry,
1411*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *added[], int *nadded,
1412*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *removed[], int *nremoved)
1413*4882a593Smuzhiyun {
1414*4882a593Smuzhiyun 	/* assumes h->devlock is held */
1415*4882a593Smuzhiyun 	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1416*4882a593Smuzhiyun 	removed[*nremoved] = h->dev[entry];
1417*4882a593Smuzhiyun 	(*nremoved)++;
1418*4882a593Smuzhiyun 
1419*4882a593Smuzhiyun 	/*
1420*4882a593Smuzhiyun 	 * New physical devices won't have target/lun assigned yet
1421*4882a593Smuzhiyun 	 * so we need to preserve the values in the slot we are replacing.
1422*4882a593Smuzhiyun 	 */
1423*4882a593Smuzhiyun 	if (new_entry->target == -1) {
1424*4882a593Smuzhiyun 		new_entry->target = h->dev[entry]->target;
1425*4882a593Smuzhiyun 		new_entry->lun = h->dev[entry]->lun;
1426*4882a593Smuzhiyun 	}
1427*4882a593Smuzhiyun 
1428*4882a593Smuzhiyun 	h->dev[entry] = new_entry;
1429*4882a593Smuzhiyun 	added[*nadded] = new_entry;
1430*4882a593Smuzhiyun 	(*nadded)++;
1431*4882a593Smuzhiyun 
1432*4882a593Smuzhiyun 	hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
1433*4882a593Smuzhiyun }
1434*4882a593Smuzhiyun 
1435*4882a593Smuzhiyun /* Remove an entry from h->dev[] array. */
hpsa_scsi_remove_entry(struct ctlr_info * h,int entry,struct hpsa_scsi_dev_t * removed[],int * nremoved)1436*4882a593Smuzhiyun static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry,
1437*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *removed[], int *nremoved)
1438*4882a593Smuzhiyun {
1439*4882a593Smuzhiyun 	/* assumes h->devlock is held */
1440*4882a593Smuzhiyun 	int i;
1441*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *sd;
1442*4882a593Smuzhiyun 
1443*4882a593Smuzhiyun 	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1444*4882a593Smuzhiyun 
1445*4882a593Smuzhiyun 	sd = h->dev[entry];
1446*4882a593Smuzhiyun 	removed[*nremoved] = h->dev[entry];
1447*4882a593Smuzhiyun 	(*nremoved)++;
1448*4882a593Smuzhiyun 
1449*4882a593Smuzhiyun 	for (i = entry; i < h->ndevices-1; i++)
1450*4882a593Smuzhiyun 		h->dev[i] = h->dev[i+1];
1451*4882a593Smuzhiyun 	h->ndevices--;
1452*4882a593Smuzhiyun 	hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1453*4882a593Smuzhiyun }
1454*4882a593Smuzhiyun 
1455*4882a593Smuzhiyun #define SCSI3ADDR_EQ(a, b) ( \
1456*4882a593Smuzhiyun 	(a)[7] == (b)[7] && \
1457*4882a593Smuzhiyun 	(a)[6] == (b)[6] && \
1458*4882a593Smuzhiyun 	(a)[5] == (b)[5] && \
1459*4882a593Smuzhiyun 	(a)[4] == (b)[4] && \
1460*4882a593Smuzhiyun 	(a)[3] == (b)[3] && \
1461*4882a593Smuzhiyun 	(a)[2] == (b)[2] && \
1462*4882a593Smuzhiyun 	(a)[1] == (b)[1] && \
1463*4882a593Smuzhiyun 	(a)[0] == (b)[0])
1464*4882a593Smuzhiyun 
fixup_botched_add(struct ctlr_info * h,struct hpsa_scsi_dev_t * added)1465*4882a593Smuzhiyun static void fixup_botched_add(struct ctlr_info *h,
1466*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *added)
1467*4882a593Smuzhiyun {
1468*4882a593Smuzhiyun 	/* called when scsi_add_device fails in order to re-adjust
1469*4882a593Smuzhiyun 	 * h->dev[] to match the mid layer's view.
1470*4882a593Smuzhiyun 	 */
1471*4882a593Smuzhiyun 	unsigned long flags;
1472*4882a593Smuzhiyun 	int i, j;
1473*4882a593Smuzhiyun 
1474*4882a593Smuzhiyun 	spin_lock_irqsave(&h->lock, flags);
1475*4882a593Smuzhiyun 	for (i = 0; i < h->ndevices; i++) {
1476*4882a593Smuzhiyun 		if (h->dev[i] == added) {
1477*4882a593Smuzhiyun 			for (j = i; j < h->ndevices-1; j++)
1478*4882a593Smuzhiyun 				h->dev[j] = h->dev[j+1];
1479*4882a593Smuzhiyun 			h->ndevices--;
1480*4882a593Smuzhiyun 			break;
1481*4882a593Smuzhiyun 		}
1482*4882a593Smuzhiyun 	}
1483*4882a593Smuzhiyun 	spin_unlock_irqrestore(&h->lock, flags);
1484*4882a593Smuzhiyun 	kfree(added);
1485*4882a593Smuzhiyun }
1486*4882a593Smuzhiyun 
device_is_the_same(struct hpsa_scsi_dev_t * dev1,struct hpsa_scsi_dev_t * dev2)1487*4882a593Smuzhiyun static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1488*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *dev2)
1489*4882a593Smuzhiyun {
1490*4882a593Smuzhiyun 	/* we compare everything except lun and target as these
1491*4882a593Smuzhiyun 	 * are not yet assigned.  Compare parts likely
1492*4882a593Smuzhiyun 	 * to differ first
1493*4882a593Smuzhiyun 	 */
1494*4882a593Smuzhiyun 	if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1495*4882a593Smuzhiyun 		sizeof(dev1->scsi3addr)) != 0)
1496*4882a593Smuzhiyun 		return 0;
1497*4882a593Smuzhiyun 	if (memcmp(dev1->device_id, dev2->device_id,
1498*4882a593Smuzhiyun 		sizeof(dev1->device_id)) != 0)
1499*4882a593Smuzhiyun 		return 0;
1500*4882a593Smuzhiyun 	if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1501*4882a593Smuzhiyun 		return 0;
1502*4882a593Smuzhiyun 	if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1503*4882a593Smuzhiyun 		return 0;
1504*4882a593Smuzhiyun 	if (dev1->devtype != dev2->devtype)
1505*4882a593Smuzhiyun 		return 0;
1506*4882a593Smuzhiyun 	if (dev1->bus != dev2->bus)
1507*4882a593Smuzhiyun 		return 0;
1508*4882a593Smuzhiyun 	return 1;
1509*4882a593Smuzhiyun }
1510*4882a593Smuzhiyun 
device_updated(struct hpsa_scsi_dev_t * dev1,struct hpsa_scsi_dev_t * dev2)1511*4882a593Smuzhiyun static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1512*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *dev2)
1513*4882a593Smuzhiyun {
1514*4882a593Smuzhiyun 	/* Device attributes that can change, but don't mean
1515*4882a593Smuzhiyun 	 * that the device is a different device, nor that the OS
1516*4882a593Smuzhiyun 	 * needs to be told anything about the change.
1517*4882a593Smuzhiyun 	 */
1518*4882a593Smuzhiyun 	if (dev1->raid_level != dev2->raid_level)
1519*4882a593Smuzhiyun 		return 1;
1520*4882a593Smuzhiyun 	if (dev1->offload_config != dev2->offload_config)
1521*4882a593Smuzhiyun 		return 1;
1522*4882a593Smuzhiyun 	if (dev1->offload_to_be_enabled != dev2->offload_to_be_enabled)
1523*4882a593Smuzhiyun 		return 1;
1524*4882a593Smuzhiyun 	if (!is_logical_dev_addr_mode(dev1->scsi3addr))
1525*4882a593Smuzhiyun 		if (dev1->queue_depth != dev2->queue_depth)
1526*4882a593Smuzhiyun 			return 1;
1527*4882a593Smuzhiyun 	/*
1528*4882a593Smuzhiyun 	 * This can happen for dual domain devices. An active
1529*4882a593Smuzhiyun 	 * path change causes the ioaccel handle to change
1530*4882a593Smuzhiyun 	 *
1531*4882a593Smuzhiyun 	 * for example note the handle differences between p0 and p1
1532*4882a593Smuzhiyun 	 * Device                    WWN               ,WWN hash,Handle
1533*4882a593Smuzhiyun 	 * D016 p0|0x3 [02]P2E:01:01,0x5000C5005FC4DACA,0x9B5616,0x01030003
1534*4882a593Smuzhiyun 	 *	p1                   0x5000C5005FC4DAC9,0x6798C0,0x00040004
1535*4882a593Smuzhiyun 	 */
1536*4882a593Smuzhiyun 	if (dev1->ioaccel_handle != dev2->ioaccel_handle)
1537*4882a593Smuzhiyun 		return 1;
1538*4882a593Smuzhiyun 	return 0;
1539*4882a593Smuzhiyun }
1540*4882a593Smuzhiyun 
1541*4882a593Smuzhiyun /* Find needle in haystack.  If exact match found, return DEVICE_SAME,
1542*4882a593Smuzhiyun  * and return needle location in *index.  If scsi3addr matches, but not
1543*4882a593Smuzhiyun  * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1544*4882a593Smuzhiyun  * location in *index.
1545*4882a593Smuzhiyun  * In the case of a minor device attribute change, such as RAID level, just
1546*4882a593Smuzhiyun  * return DEVICE_UPDATED, along with the updated device's location in index.
1547*4882a593Smuzhiyun  * If needle not found, return DEVICE_NOT_FOUND.
1548*4882a593Smuzhiyun  */
hpsa_scsi_find_entry(struct hpsa_scsi_dev_t * needle,struct hpsa_scsi_dev_t * haystack[],int haystack_size,int * index)1549*4882a593Smuzhiyun static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1550*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1551*4882a593Smuzhiyun 	int *index)
1552*4882a593Smuzhiyun {
1553*4882a593Smuzhiyun 	int i;
1554*4882a593Smuzhiyun #define DEVICE_NOT_FOUND 0
1555*4882a593Smuzhiyun #define DEVICE_CHANGED 1
1556*4882a593Smuzhiyun #define DEVICE_SAME 2
1557*4882a593Smuzhiyun #define DEVICE_UPDATED 3
1558*4882a593Smuzhiyun 	if (needle == NULL)
1559*4882a593Smuzhiyun 		return DEVICE_NOT_FOUND;
1560*4882a593Smuzhiyun 
1561*4882a593Smuzhiyun 	for (i = 0; i < haystack_size; i++) {
1562*4882a593Smuzhiyun 		if (haystack[i] == NULL) /* previously removed. */
1563*4882a593Smuzhiyun 			continue;
1564*4882a593Smuzhiyun 		if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1565*4882a593Smuzhiyun 			*index = i;
1566*4882a593Smuzhiyun 			if (device_is_the_same(needle, haystack[i])) {
1567*4882a593Smuzhiyun 				if (device_updated(needle, haystack[i]))
1568*4882a593Smuzhiyun 					return DEVICE_UPDATED;
1569*4882a593Smuzhiyun 				return DEVICE_SAME;
1570*4882a593Smuzhiyun 			} else {
1571*4882a593Smuzhiyun 				/* Keep offline devices offline */
1572*4882a593Smuzhiyun 				if (needle->volume_offline)
1573*4882a593Smuzhiyun 					return DEVICE_NOT_FOUND;
1574*4882a593Smuzhiyun 				return DEVICE_CHANGED;
1575*4882a593Smuzhiyun 			}
1576*4882a593Smuzhiyun 		}
1577*4882a593Smuzhiyun 	}
1578*4882a593Smuzhiyun 	*index = -1;
1579*4882a593Smuzhiyun 	return DEVICE_NOT_FOUND;
1580*4882a593Smuzhiyun }
1581*4882a593Smuzhiyun 
hpsa_monitor_offline_device(struct ctlr_info * h,unsigned char scsi3addr[])1582*4882a593Smuzhiyun static void hpsa_monitor_offline_device(struct ctlr_info *h,
1583*4882a593Smuzhiyun 					unsigned char scsi3addr[])
1584*4882a593Smuzhiyun {
1585*4882a593Smuzhiyun 	struct offline_device_entry *device;
1586*4882a593Smuzhiyun 	unsigned long flags;
1587*4882a593Smuzhiyun 
1588*4882a593Smuzhiyun 	/* Check to see if device is already on the list */
1589*4882a593Smuzhiyun 	spin_lock_irqsave(&h->offline_device_lock, flags);
1590*4882a593Smuzhiyun 	list_for_each_entry(device, &h->offline_device_list, offline_list) {
1591*4882a593Smuzhiyun 		if (memcmp(device->scsi3addr, scsi3addr,
1592*4882a593Smuzhiyun 			sizeof(device->scsi3addr)) == 0) {
1593*4882a593Smuzhiyun 			spin_unlock_irqrestore(&h->offline_device_lock, flags);
1594*4882a593Smuzhiyun 			return;
1595*4882a593Smuzhiyun 		}
1596*4882a593Smuzhiyun 	}
1597*4882a593Smuzhiyun 	spin_unlock_irqrestore(&h->offline_device_lock, flags);
1598*4882a593Smuzhiyun 
1599*4882a593Smuzhiyun 	/* Device is not on the list, add it. */
1600*4882a593Smuzhiyun 	device = kmalloc(sizeof(*device), GFP_KERNEL);
1601*4882a593Smuzhiyun 	if (!device)
1602*4882a593Smuzhiyun 		return;
1603*4882a593Smuzhiyun 
1604*4882a593Smuzhiyun 	memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1605*4882a593Smuzhiyun 	spin_lock_irqsave(&h->offline_device_lock, flags);
1606*4882a593Smuzhiyun 	list_add_tail(&device->offline_list, &h->offline_device_list);
1607*4882a593Smuzhiyun 	spin_unlock_irqrestore(&h->offline_device_lock, flags);
1608*4882a593Smuzhiyun }
1609*4882a593Smuzhiyun 
1610*4882a593Smuzhiyun /* Print a message explaining various offline volume states */
hpsa_show_volume_status(struct ctlr_info * h,struct hpsa_scsi_dev_t * sd)1611*4882a593Smuzhiyun static void hpsa_show_volume_status(struct ctlr_info *h,
1612*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *sd)
1613*4882a593Smuzhiyun {
1614*4882a593Smuzhiyun 	if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1615*4882a593Smuzhiyun 		dev_info(&h->pdev->dev,
1616*4882a593Smuzhiyun 			"C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1617*4882a593Smuzhiyun 			h->scsi_host->host_no,
1618*4882a593Smuzhiyun 			sd->bus, sd->target, sd->lun);
1619*4882a593Smuzhiyun 	switch (sd->volume_offline) {
1620*4882a593Smuzhiyun 	case HPSA_LV_OK:
1621*4882a593Smuzhiyun 		break;
1622*4882a593Smuzhiyun 	case HPSA_LV_UNDERGOING_ERASE:
1623*4882a593Smuzhiyun 		dev_info(&h->pdev->dev,
1624*4882a593Smuzhiyun 			"C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1625*4882a593Smuzhiyun 			h->scsi_host->host_no,
1626*4882a593Smuzhiyun 			sd->bus, sd->target, sd->lun);
1627*4882a593Smuzhiyun 		break;
1628*4882a593Smuzhiyun 	case HPSA_LV_NOT_AVAILABLE:
1629*4882a593Smuzhiyun 		dev_info(&h->pdev->dev,
1630*4882a593Smuzhiyun 			"C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n",
1631*4882a593Smuzhiyun 			h->scsi_host->host_no,
1632*4882a593Smuzhiyun 			sd->bus, sd->target, sd->lun);
1633*4882a593Smuzhiyun 		break;
1634*4882a593Smuzhiyun 	case HPSA_LV_UNDERGOING_RPI:
1635*4882a593Smuzhiyun 		dev_info(&h->pdev->dev,
1636*4882a593Smuzhiyun 			"C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n",
1637*4882a593Smuzhiyun 			h->scsi_host->host_no,
1638*4882a593Smuzhiyun 			sd->bus, sd->target, sd->lun);
1639*4882a593Smuzhiyun 		break;
1640*4882a593Smuzhiyun 	case HPSA_LV_PENDING_RPI:
1641*4882a593Smuzhiyun 		dev_info(&h->pdev->dev,
1642*4882a593Smuzhiyun 			"C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1643*4882a593Smuzhiyun 			h->scsi_host->host_no,
1644*4882a593Smuzhiyun 			sd->bus, sd->target, sd->lun);
1645*4882a593Smuzhiyun 		break;
1646*4882a593Smuzhiyun 	case HPSA_LV_ENCRYPTED_NO_KEY:
1647*4882a593Smuzhiyun 		dev_info(&h->pdev->dev,
1648*4882a593Smuzhiyun 			"C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1649*4882a593Smuzhiyun 			h->scsi_host->host_no,
1650*4882a593Smuzhiyun 			sd->bus, sd->target, sd->lun);
1651*4882a593Smuzhiyun 		break;
1652*4882a593Smuzhiyun 	case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1653*4882a593Smuzhiyun 		dev_info(&h->pdev->dev,
1654*4882a593Smuzhiyun 			"C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1655*4882a593Smuzhiyun 			h->scsi_host->host_no,
1656*4882a593Smuzhiyun 			sd->bus, sd->target, sd->lun);
1657*4882a593Smuzhiyun 		break;
1658*4882a593Smuzhiyun 	case HPSA_LV_UNDERGOING_ENCRYPTION:
1659*4882a593Smuzhiyun 		dev_info(&h->pdev->dev,
1660*4882a593Smuzhiyun 			"C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1661*4882a593Smuzhiyun 			h->scsi_host->host_no,
1662*4882a593Smuzhiyun 			sd->bus, sd->target, sd->lun);
1663*4882a593Smuzhiyun 		break;
1664*4882a593Smuzhiyun 	case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1665*4882a593Smuzhiyun 		dev_info(&h->pdev->dev,
1666*4882a593Smuzhiyun 			"C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1667*4882a593Smuzhiyun 			h->scsi_host->host_no,
1668*4882a593Smuzhiyun 			sd->bus, sd->target, sd->lun);
1669*4882a593Smuzhiyun 		break;
1670*4882a593Smuzhiyun 	case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1671*4882a593Smuzhiyun 		dev_info(&h->pdev->dev,
1672*4882a593Smuzhiyun 			"C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1673*4882a593Smuzhiyun 			h->scsi_host->host_no,
1674*4882a593Smuzhiyun 			sd->bus, sd->target, sd->lun);
1675*4882a593Smuzhiyun 		break;
1676*4882a593Smuzhiyun 	case HPSA_LV_PENDING_ENCRYPTION:
1677*4882a593Smuzhiyun 		dev_info(&h->pdev->dev,
1678*4882a593Smuzhiyun 			"C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1679*4882a593Smuzhiyun 			h->scsi_host->host_no,
1680*4882a593Smuzhiyun 			sd->bus, sd->target, sd->lun);
1681*4882a593Smuzhiyun 		break;
1682*4882a593Smuzhiyun 	case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1683*4882a593Smuzhiyun 		dev_info(&h->pdev->dev,
1684*4882a593Smuzhiyun 			"C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1685*4882a593Smuzhiyun 			h->scsi_host->host_no,
1686*4882a593Smuzhiyun 			sd->bus, sd->target, sd->lun);
1687*4882a593Smuzhiyun 		break;
1688*4882a593Smuzhiyun 	}
1689*4882a593Smuzhiyun }
1690*4882a593Smuzhiyun 
1691*4882a593Smuzhiyun /*
1692*4882a593Smuzhiyun  * Figure the list of physical drive pointers for a logical drive with
1693*4882a593Smuzhiyun  * raid offload configured.
1694*4882a593Smuzhiyun  */
hpsa_figure_phys_disk_ptrs(struct ctlr_info * h,struct hpsa_scsi_dev_t * dev[],int ndevices,struct hpsa_scsi_dev_t * logical_drive)1695*4882a593Smuzhiyun static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
1696*4882a593Smuzhiyun 				struct hpsa_scsi_dev_t *dev[], int ndevices,
1697*4882a593Smuzhiyun 				struct hpsa_scsi_dev_t *logical_drive)
1698*4882a593Smuzhiyun {
1699*4882a593Smuzhiyun 	struct raid_map_data *map = &logical_drive->raid_map;
1700*4882a593Smuzhiyun 	struct raid_map_disk_data *dd = &map->data[0];
1701*4882a593Smuzhiyun 	int i, j;
1702*4882a593Smuzhiyun 	int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
1703*4882a593Smuzhiyun 				le16_to_cpu(map->metadata_disks_per_row);
1704*4882a593Smuzhiyun 	int nraid_map_entries = le16_to_cpu(map->row_cnt) *
1705*4882a593Smuzhiyun 				le16_to_cpu(map->layout_map_count) *
1706*4882a593Smuzhiyun 				total_disks_per_row;
1707*4882a593Smuzhiyun 	int nphys_disk = le16_to_cpu(map->layout_map_count) *
1708*4882a593Smuzhiyun 				total_disks_per_row;
1709*4882a593Smuzhiyun 	int qdepth;
1710*4882a593Smuzhiyun 
1711*4882a593Smuzhiyun 	if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
1712*4882a593Smuzhiyun 		nraid_map_entries = RAID_MAP_MAX_ENTRIES;
1713*4882a593Smuzhiyun 
1714*4882a593Smuzhiyun 	logical_drive->nphysical_disks = nraid_map_entries;
1715*4882a593Smuzhiyun 
1716*4882a593Smuzhiyun 	qdepth = 0;
1717*4882a593Smuzhiyun 	for (i = 0; i < nraid_map_entries; i++) {
1718*4882a593Smuzhiyun 		logical_drive->phys_disk[i] = NULL;
1719*4882a593Smuzhiyun 		if (!logical_drive->offload_config)
1720*4882a593Smuzhiyun 			continue;
1721*4882a593Smuzhiyun 		for (j = 0; j < ndevices; j++) {
1722*4882a593Smuzhiyun 			if (dev[j] == NULL)
1723*4882a593Smuzhiyun 				continue;
1724*4882a593Smuzhiyun 			if (dev[j]->devtype != TYPE_DISK &&
1725*4882a593Smuzhiyun 			    dev[j]->devtype != TYPE_ZBC)
1726*4882a593Smuzhiyun 				continue;
1727*4882a593Smuzhiyun 			if (is_logical_device(dev[j]))
1728*4882a593Smuzhiyun 				continue;
1729*4882a593Smuzhiyun 			if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
1730*4882a593Smuzhiyun 				continue;
1731*4882a593Smuzhiyun 
1732*4882a593Smuzhiyun 			logical_drive->phys_disk[i] = dev[j];
1733*4882a593Smuzhiyun 			if (i < nphys_disk)
1734*4882a593Smuzhiyun 				qdepth = min(h->nr_cmds, qdepth +
1735*4882a593Smuzhiyun 				    logical_drive->phys_disk[i]->queue_depth);
1736*4882a593Smuzhiyun 			break;
1737*4882a593Smuzhiyun 		}
1738*4882a593Smuzhiyun 
1739*4882a593Smuzhiyun 		/*
1740*4882a593Smuzhiyun 		 * This can happen if a physical drive is removed and
1741*4882a593Smuzhiyun 		 * the logical drive is degraded.  In that case, the RAID
1742*4882a593Smuzhiyun 		 * map data will refer to a physical disk which isn't actually
1743*4882a593Smuzhiyun 		 * present.  And in that case offload_enabled should already
1744*4882a593Smuzhiyun 		 * be 0, but we'll turn it off here just in case
1745*4882a593Smuzhiyun 		 */
1746*4882a593Smuzhiyun 		if (!logical_drive->phys_disk[i]) {
1747*4882a593Smuzhiyun 			dev_warn(&h->pdev->dev,
1748*4882a593Smuzhiyun 				"%s: [%d:%d:%d:%d] A phys disk component of LV is missing, turning off offload_enabled for LV.\n",
1749*4882a593Smuzhiyun 				__func__,
1750*4882a593Smuzhiyun 				h->scsi_host->host_no, logical_drive->bus,
1751*4882a593Smuzhiyun 				logical_drive->target, logical_drive->lun);
1752*4882a593Smuzhiyun 			hpsa_turn_off_ioaccel_for_device(logical_drive);
1753*4882a593Smuzhiyun 			logical_drive->queue_depth = 8;
1754*4882a593Smuzhiyun 		}
1755*4882a593Smuzhiyun 	}
1756*4882a593Smuzhiyun 	if (nraid_map_entries)
1757*4882a593Smuzhiyun 		/*
1758*4882a593Smuzhiyun 		 * This is correct for reads, too high for full stripe writes,
1759*4882a593Smuzhiyun 		 * way too high for partial stripe writes
1760*4882a593Smuzhiyun 		 */
1761*4882a593Smuzhiyun 		logical_drive->queue_depth = qdepth;
1762*4882a593Smuzhiyun 	else {
1763*4882a593Smuzhiyun 		if (logical_drive->external)
1764*4882a593Smuzhiyun 			logical_drive->queue_depth = EXTERNAL_QD;
1765*4882a593Smuzhiyun 		else
1766*4882a593Smuzhiyun 			logical_drive->queue_depth = h->nr_cmds;
1767*4882a593Smuzhiyun 	}
1768*4882a593Smuzhiyun }
1769*4882a593Smuzhiyun 
hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info * h,struct hpsa_scsi_dev_t * dev[],int ndevices)1770*4882a593Smuzhiyun static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
1771*4882a593Smuzhiyun 				struct hpsa_scsi_dev_t *dev[], int ndevices)
1772*4882a593Smuzhiyun {
1773*4882a593Smuzhiyun 	int i;
1774*4882a593Smuzhiyun 
1775*4882a593Smuzhiyun 	for (i = 0; i < ndevices; i++) {
1776*4882a593Smuzhiyun 		if (dev[i] == NULL)
1777*4882a593Smuzhiyun 			continue;
1778*4882a593Smuzhiyun 		if (dev[i]->devtype != TYPE_DISK &&
1779*4882a593Smuzhiyun 		    dev[i]->devtype != TYPE_ZBC)
1780*4882a593Smuzhiyun 			continue;
1781*4882a593Smuzhiyun 		if (!is_logical_device(dev[i]))
1782*4882a593Smuzhiyun 			continue;
1783*4882a593Smuzhiyun 
1784*4882a593Smuzhiyun 		/*
1785*4882a593Smuzhiyun 		 * If offload is currently enabled, the RAID map and
1786*4882a593Smuzhiyun 		 * phys_disk[] assignment *better* not be changing
1787*4882a593Smuzhiyun 		 * because we would be changing ioaccel phsy_disk[] pointers
1788*4882a593Smuzhiyun 		 * on a ioaccel volume processing I/O requests.
1789*4882a593Smuzhiyun 		 *
1790*4882a593Smuzhiyun 		 * If an ioaccel volume status changed, initially because it was
1791*4882a593Smuzhiyun 		 * re-configured and thus underwent a transformation, or
1792*4882a593Smuzhiyun 		 * a drive failed, we would have received a state change
1793*4882a593Smuzhiyun 		 * request and ioaccel should have been turned off. When the
1794*4882a593Smuzhiyun 		 * transformation completes, we get another state change
1795*4882a593Smuzhiyun 		 * request to turn ioaccel back on. In this case, we need
1796*4882a593Smuzhiyun 		 * to update the ioaccel information.
1797*4882a593Smuzhiyun 		 *
1798*4882a593Smuzhiyun 		 * Thus: If it is not currently enabled, but will be after
1799*4882a593Smuzhiyun 		 * the scan completes, make sure the ioaccel pointers
1800*4882a593Smuzhiyun 		 * are up to date.
1801*4882a593Smuzhiyun 		 */
1802*4882a593Smuzhiyun 
1803*4882a593Smuzhiyun 		if (!dev[i]->offload_enabled && dev[i]->offload_to_be_enabled)
1804*4882a593Smuzhiyun 			hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
1805*4882a593Smuzhiyun 	}
1806*4882a593Smuzhiyun }
1807*4882a593Smuzhiyun 
hpsa_add_device(struct ctlr_info * h,struct hpsa_scsi_dev_t * device)1808*4882a593Smuzhiyun static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1809*4882a593Smuzhiyun {
1810*4882a593Smuzhiyun 	int rc = 0;
1811*4882a593Smuzhiyun 
1812*4882a593Smuzhiyun 	if (!h->scsi_host)
1813*4882a593Smuzhiyun 		return 1;
1814*4882a593Smuzhiyun 
1815*4882a593Smuzhiyun 	if (is_logical_device(device)) /* RAID */
1816*4882a593Smuzhiyun 		rc = scsi_add_device(h->scsi_host, device->bus,
1817*4882a593Smuzhiyun 					device->target, device->lun);
1818*4882a593Smuzhiyun 	else /* HBA */
1819*4882a593Smuzhiyun 		rc = hpsa_add_sas_device(h->sas_host, device);
1820*4882a593Smuzhiyun 
1821*4882a593Smuzhiyun 	return rc;
1822*4882a593Smuzhiyun }
1823*4882a593Smuzhiyun 
hpsa_find_outstanding_commands_for_dev(struct ctlr_info * h,struct hpsa_scsi_dev_t * dev)1824*4882a593Smuzhiyun static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h,
1825*4882a593Smuzhiyun 						struct hpsa_scsi_dev_t *dev)
1826*4882a593Smuzhiyun {
1827*4882a593Smuzhiyun 	int i;
1828*4882a593Smuzhiyun 	int count = 0;
1829*4882a593Smuzhiyun 
1830*4882a593Smuzhiyun 	for (i = 0; i < h->nr_cmds; i++) {
1831*4882a593Smuzhiyun 		struct CommandList *c = h->cmd_pool + i;
1832*4882a593Smuzhiyun 		int refcount = atomic_inc_return(&c->refcount);
1833*4882a593Smuzhiyun 
1834*4882a593Smuzhiyun 		if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev,
1835*4882a593Smuzhiyun 				dev->scsi3addr)) {
1836*4882a593Smuzhiyun 			unsigned long flags;
1837*4882a593Smuzhiyun 
1838*4882a593Smuzhiyun 			spin_lock_irqsave(&h->lock, flags);	/* Implied MB */
1839*4882a593Smuzhiyun 			if (!hpsa_is_cmd_idle(c))
1840*4882a593Smuzhiyun 				++count;
1841*4882a593Smuzhiyun 			spin_unlock_irqrestore(&h->lock, flags);
1842*4882a593Smuzhiyun 		}
1843*4882a593Smuzhiyun 
1844*4882a593Smuzhiyun 		cmd_free(h, c);
1845*4882a593Smuzhiyun 	}
1846*4882a593Smuzhiyun 
1847*4882a593Smuzhiyun 	return count;
1848*4882a593Smuzhiyun }
1849*4882a593Smuzhiyun 
1850*4882a593Smuzhiyun #define NUM_WAIT 20
hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info * h,struct hpsa_scsi_dev_t * device)1851*4882a593Smuzhiyun static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h,
1852*4882a593Smuzhiyun 						struct hpsa_scsi_dev_t *device)
1853*4882a593Smuzhiyun {
1854*4882a593Smuzhiyun 	int cmds = 0;
1855*4882a593Smuzhiyun 	int waits = 0;
1856*4882a593Smuzhiyun 	int num_wait = NUM_WAIT;
1857*4882a593Smuzhiyun 
1858*4882a593Smuzhiyun 	if (device->external)
1859*4882a593Smuzhiyun 		num_wait = HPSA_EH_PTRAID_TIMEOUT;
1860*4882a593Smuzhiyun 
1861*4882a593Smuzhiyun 	while (1) {
1862*4882a593Smuzhiyun 		cmds = hpsa_find_outstanding_commands_for_dev(h, device);
1863*4882a593Smuzhiyun 		if (cmds == 0)
1864*4882a593Smuzhiyun 			break;
1865*4882a593Smuzhiyun 		if (++waits > num_wait)
1866*4882a593Smuzhiyun 			break;
1867*4882a593Smuzhiyun 		msleep(1000);
1868*4882a593Smuzhiyun 	}
1869*4882a593Smuzhiyun 
1870*4882a593Smuzhiyun 	if (waits > num_wait) {
1871*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev,
1872*4882a593Smuzhiyun 			"%s: removing device [%d:%d:%d:%d] with %d outstanding commands!\n",
1873*4882a593Smuzhiyun 			__func__,
1874*4882a593Smuzhiyun 			h->scsi_host->host_no,
1875*4882a593Smuzhiyun 			device->bus, device->target, device->lun, cmds);
1876*4882a593Smuzhiyun 	}
1877*4882a593Smuzhiyun }
1878*4882a593Smuzhiyun 
hpsa_remove_device(struct ctlr_info * h,struct hpsa_scsi_dev_t * device)1879*4882a593Smuzhiyun static void hpsa_remove_device(struct ctlr_info *h,
1880*4882a593Smuzhiyun 			struct hpsa_scsi_dev_t *device)
1881*4882a593Smuzhiyun {
1882*4882a593Smuzhiyun 	struct scsi_device *sdev = NULL;
1883*4882a593Smuzhiyun 
1884*4882a593Smuzhiyun 	if (!h->scsi_host)
1885*4882a593Smuzhiyun 		return;
1886*4882a593Smuzhiyun 
1887*4882a593Smuzhiyun 	/*
1888*4882a593Smuzhiyun 	 * Allow for commands to drain
1889*4882a593Smuzhiyun 	 */
1890*4882a593Smuzhiyun 	device->removed = 1;
1891*4882a593Smuzhiyun 	hpsa_wait_for_outstanding_commands_for_dev(h, device);
1892*4882a593Smuzhiyun 
1893*4882a593Smuzhiyun 	if (is_logical_device(device)) { /* RAID */
1894*4882a593Smuzhiyun 		sdev = scsi_device_lookup(h->scsi_host, device->bus,
1895*4882a593Smuzhiyun 						device->target, device->lun);
1896*4882a593Smuzhiyun 		if (sdev) {
1897*4882a593Smuzhiyun 			scsi_remove_device(sdev);
1898*4882a593Smuzhiyun 			scsi_device_put(sdev);
1899*4882a593Smuzhiyun 		} else {
1900*4882a593Smuzhiyun 			/*
1901*4882a593Smuzhiyun 			 * We don't expect to get here.  Future commands
1902*4882a593Smuzhiyun 			 * to this device will get a selection timeout as
1903*4882a593Smuzhiyun 			 * if the device were gone.
1904*4882a593Smuzhiyun 			 */
1905*4882a593Smuzhiyun 			hpsa_show_dev_msg(KERN_WARNING, h, device,
1906*4882a593Smuzhiyun 					"didn't find device for removal.");
1907*4882a593Smuzhiyun 		}
1908*4882a593Smuzhiyun 	} else { /* HBA */
1909*4882a593Smuzhiyun 
1910*4882a593Smuzhiyun 		hpsa_remove_sas_device(device);
1911*4882a593Smuzhiyun 	}
1912*4882a593Smuzhiyun }
1913*4882a593Smuzhiyun 
adjust_hpsa_scsi_table(struct ctlr_info * h,struct hpsa_scsi_dev_t * sd[],int nsds)1914*4882a593Smuzhiyun static void adjust_hpsa_scsi_table(struct ctlr_info *h,
1915*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *sd[], int nsds)
1916*4882a593Smuzhiyun {
1917*4882a593Smuzhiyun 	/* sd contains scsi3 addresses and devtypes, and inquiry
1918*4882a593Smuzhiyun 	 * data.  This function takes what's in sd to be the current
1919*4882a593Smuzhiyun 	 * reality and updates h->dev[] to reflect that reality.
1920*4882a593Smuzhiyun 	 */
1921*4882a593Smuzhiyun 	int i, entry, device_change, changes = 0;
1922*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *csd;
1923*4882a593Smuzhiyun 	unsigned long flags;
1924*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t **added, **removed;
1925*4882a593Smuzhiyun 	int nadded, nremoved;
1926*4882a593Smuzhiyun 
1927*4882a593Smuzhiyun 	/*
1928*4882a593Smuzhiyun 	 * A reset can cause a device status to change
1929*4882a593Smuzhiyun 	 * re-schedule the scan to see what happened.
1930*4882a593Smuzhiyun 	 */
1931*4882a593Smuzhiyun 	spin_lock_irqsave(&h->reset_lock, flags);
1932*4882a593Smuzhiyun 	if (h->reset_in_progress) {
1933*4882a593Smuzhiyun 		h->drv_req_rescan = 1;
1934*4882a593Smuzhiyun 		spin_unlock_irqrestore(&h->reset_lock, flags);
1935*4882a593Smuzhiyun 		return;
1936*4882a593Smuzhiyun 	}
1937*4882a593Smuzhiyun 	spin_unlock_irqrestore(&h->reset_lock, flags);
1938*4882a593Smuzhiyun 
1939*4882a593Smuzhiyun 	added = kcalloc(HPSA_MAX_DEVICES, sizeof(*added), GFP_KERNEL);
1940*4882a593Smuzhiyun 	removed = kcalloc(HPSA_MAX_DEVICES, sizeof(*removed), GFP_KERNEL);
1941*4882a593Smuzhiyun 
1942*4882a593Smuzhiyun 	if (!added || !removed) {
1943*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev, "out of memory in "
1944*4882a593Smuzhiyun 			"adjust_hpsa_scsi_table\n");
1945*4882a593Smuzhiyun 		goto free_and_out;
1946*4882a593Smuzhiyun 	}
1947*4882a593Smuzhiyun 
1948*4882a593Smuzhiyun 	spin_lock_irqsave(&h->devlock, flags);
1949*4882a593Smuzhiyun 
1950*4882a593Smuzhiyun 	/* find any devices in h->dev[] that are not in
1951*4882a593Smuzhiyun 	 * sd[] and remove them from h->dev[], and for any
1952*4882a593Smuzhiyun 	 * devices which have changed, remove the old device
1953*4882a593Smuzhiyun 	 * info and add the new device info.
1954*4882a593Smuzhiyun 	 * If minor device attributes change, just update
1955*4882a593Smuzhiyun 	 * the existing device structure.
1956*4882a593Smuzhiyun 	 */
1957*4882a593Smuzhiyun 	i = 0;
1958*4882a593Smuzhiyun 	nremoved = 0;
1959*4882a593Smuzhiyun 	nadded = 0;
1960*4882a593Smuzhiyun 	while (i < h->ndevices) {
1961*4882a593Smuzhiyun 		csd = h->dev[i];
1962*4882a593Smuzhiyun 		device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1963*4882a593Smuzhiyun 		if (device_change == DEVICE_NOT_FOUND) {
1964*4882a593Smuzhiyun 			changes++;
1965*4882a593Smuzhiyun 			hpsa_scsi_remove_entry(h, i, removed, &nremoved);
1966*4882a593Smuzhiyun 			continue; /* remove ^^^, hence i not incremented */
1967*4882a593Smuzhiyun 		} else if (device_change == DEVICE_CHANGED) {
1968*4882a593Smuzhiyun 			changes++;
1969*4882a593Smuzhiyun 			hpsa_scsi_replace_entry(h, i, sd[entry],
1970*4882a593Smuzhiyun 				added, &nadded, removed, &nremoved);
1971*4882a593Smuzhiyun 			/* Set it to NULL to prevent it from being freed
1972*4882a593Smuzhiyun 			 * at the bottom of hpsa_update_scsi_devices()
1973*4882a593Smuzhiyun 			 */
1974*4882a593Smuzhiyun 			sd[entry] = NULL;
1975*4882a593Smuzhiyun 		} else if (device_change == DEVICE_UPDATED) {
1976*4882a593Smuzhiyun 			hpsa_scsi_update_entry(h, i, sd[entry]);
1977*4882a593Smuzhiyun 		}
1978*4882a593Smuzhiyun 		i++;
1979*4882a593Smuzhiyun 	}
1980*4882a593Smuzhiyun 
1981*4882a593Smuzhiyun 	/* Now, make sure every device listed in sd[] is also
1982*4882a593Smuzhiyun 	 * listed in h->dev[], adding them if they aren't found
1983*4882a593Smuzhiyun 	 */
1984*4882a593Smuzhiyun 
1985*4882a593Smuzhiyun 	for (i = 0; i < nsds; i++) {
1986*4882a593Smuzhiyun 		if (!sd[i]) /* if already added above. */
1987*4882a593Smuzhiyun 			continue;
1988*4882a593Smuzhiyun 
1989*4882a593Smuzhiyun 		/* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1990*4882a593Smuzhiyun 		 * as the SCSI mid-layer does not handle such devices well.
1991*4882a593Smuzhiyun 		 * It relentlessly loops sending TUR at 3Hz, then READ(10)
1992*4882a593Smuzhiyun 		 * at 160Hz, and prevents the system from coming up.
1993*4882a593Smuzhiyun 		 */
1994*4882a593Smuzhiyun 		if (sd[i]->volume_offline) {
1995*4882a593Smuzhiyun 			hpsa_show_volume_status(h, sd[i]);
1996*4882a593Smuzhiyun 			hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
1997*4882a593Smuzhiyun 			continue;
1998*4882a593Smuzhiyun 		}
1999*4882a593Smuzhiyun 
2000*4882a593Smuzhiyun 		device_change = hpsa_scsi_find_entry(sd[i], h->dev,
2001*4882a593Smuzhiyun 					h->ndevices, &entry);
2002*4882a593Smuzhiyun 		if (device_change == DEVICE_NOT_FOUND) {
2003*4882a593Smuzhiyun 			changes++;
2004*4882a593Smuzhiyun 			if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0)
2005*4882a593Smuzhiyun 				break;
2006*4882a593Smuzhiyun 			sd[i] = NULL; /* prevent from being freed later. */
2007*4882a593Smuzhiyun 		} else if (device_change == DEVICE_CHANGED) {
2008*4882a593Smuzhiyun 			/* should never happen... */
2009*4882a593Smuzhiyun 			changes++;
2010*4882a593Smuzhiyun 			dev_warn(&h->pdev->dev,
2011*4882a593Smuzhiyun 				"device unexpectedly changed.\n");
2012*4882a593Smuzhiyun 			/* but if it does happen, we just ignore that device */
2013*4882a593Smuzhiyun 		}
2014*4882a593Smuzhiyun 	}
2015*4882a593Smuzhiyun 	hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
2016*4882a593Smuzhiyun 
2017*4882a593Smuzhiyun 	/*
2018*4882a593Smuzhiyun 	 * Now that h->dev[]->phys_disk[] is coherent, we can enable
2019*4882a593Smuzhiyun 	 * any logical drives that need it enabled.
2020*4882a593Smuzhiyun 	 *
2021*4882a593Smuzhiyun 	 * The raid map should be current by now.
2022*4882a593Smuzhiyun 	 *
2023*4882a593Smuzhiyun 	 * We are updating the device list used for I/O requests.
2024*4882a593Smuzhiyun 	 */
2025*4882a593Smuzhiyun 	for (i = 0; i < h->ndevices; i++) {
2026*4882a593Smuzhiyun 		if (h->dev[i] == NULL)
2027*4882a593Smuzhiyun 			continue;
2028*4882a593Smuzhiyun 		h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
2029*4882a593Smuzhiyun 	}
2030*4882a593Smuzhiyun 
2031*4882a593Smuzhiyun 	spin_unlock_irqrestore(&h->devlock, flags);
2032*4882a593Smuzhiyun 
2033*4882a593Smuzhiyun 	/* Monitor devices which are in one of several NOT READY states to be
2034*4882a593Smuzhiyun 	 * brought online later. This must be done without holding h->devlock,
2035*4882a593Smuzhiyun 	 * so don't touch h->dev[]
2036*4882a593Smuzhiyun 	 */
2037*4882a593Smuzhiyun 	for (i = 0; i < nsds; i++) {
2038*4882a593Smuzhiyun 		if (!sd[i]) /* if already added above. */
2039*4882a593Smuzhiyun 			continue;
2040*4882a593Smuzhiyun 		if (sd[i]->volume_offline)
2041*4882a593Smuzhiyun 			hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
2042*4882a593Smuzhiyun 	}
2043*4882a593Smuzhiyun 
2044*4882a593Smuzhiyun 	/* Don't notify scsi mid layer of any changes the first time through
2045*4882a593Smuzhiyun 	 * (or if there are no changes) scsi_scan_host will do it later the
2046*4882a593Smuzhiyun 	 * first time through.
2047*4882a593Smuzhiyun 	 */
2048*4882a593Smuzhiyun 	if (!changes)
2049*4882a593Smuzhiyun 		goto free_and_out;
2050*4882a593Smuzhiyun 
2051*4882a593Smuzhiyun 	/* Notify scsi mid layer of any removed devices */
2052*4882a593Smuzhiyun 	for (i = 0; i < nremoved; i++) {
2053*4882a593Smuzhiyun 		if (removed[i] == NULL)
2054*4882a593Smuzhiyun 			continue;
2055*4882a593Smuzhiyun 		if (removed[i]->expose_device)
2056*4882a593Smuzhiyun 			hpsa_remove_device(h, removed[i]);
2057*4882a593Smuzhiyun 		kfree(removed[i]);
2058*4882a593Smuzhiyun 		removed[i] = NULL;
2059*4882a593Smuzhiyun 	}
2060*4882a593Smuzhiyun 
2061*4882a593Smuzhiyun 	/* Notify scsi mid layer of any added devices */
2062*4882a593Smuzhiyun 	for (i = 0; i < nadded; i++) {
2063*4882a593Smuzhiyun 		int rc = 0;
2064*4882a593Smuzhiyun 
2065*4882a593Smuzhiyun 		if (added[i] == NULL)
2066*4882a593Smuzhiyun 			continue;
2067*4882a593Smuzhiyun 		if (!(added[i]->expose_device))
2068*4882a593Smuzhiyun 			continue;
2069*4882a593Smuzhiyun 		rc = hpsa_add_device(h, added[i]);
2070*4882a593Smuzhiyun 		if (!rc)
2071*4882a593Smuzhiyun 			continue;
2072*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev,
2073*4882a593Smuzhiyun 			"addition failed %d, device not added.", rc);
2074*4882a593Smuzhiyun 		/* now we have to remove it from h->dev,
2075*4882a593Smuzhiyun 		 * since it didn't get added to scsi mid layer
2076*4882a593Smuzhiyun 		 */
2077*4882a593Smuzhiyun 		fixup_botched_add(h, added[i]);
2078*4882a593Smuzhiyun 		h->drv_req_rescan = 1;
2079*4882a593Smuzhiyun 	}
2080*4882a593Smuzhiyun 
2081*4882a593Smuzhiyun free_and_out:
2082*4882a593Smuzhiyun 	kfree(added);
2083*4882a593Smuzhiyun 	kfree(removed);
2084*4882a593Smuzhiyun }
2085*4882a593Smuzhiyun 
2086*4882a593Smuzhiyun /*
2087*4882a593Smuzhiyun  * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
2088*4882a593Smuzhiyun  * Assume's h->devlock is held.
2089*4882a593Smuzhiyun  */
lookup_hpsa_scsi_dev(struct ctlr_info * h,int bus,int target,int lun)2090*4882a593Smuzhiyun static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
2091*4882a593Smuzhiyun 	int bus, int target, int lun)
2092*4882a593Smuzhiyun {
2093*4882a593Smuzhiyun 	int i;
2094*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *sd;
2095*4882a593Smuzhiyun 
2096*4882a593Smuzhiyun 	for (i = 0; i < h->ndevices; i++) {
2097*4882a593Smuzhiyun 		sd = h->dev[i];
2098*4882a593Smuzhiyun 		if (sd->bus == bus && sd->target == target && sd->lun == lun)
2099*4882a593Smuzhiyun 			return sd;
2100*4882a593Smuzhiyun 	}
2101*4882a593Smuzhiyun 	return NULL;
2102*4882a593Smuzhiyun }
2103*4882a593Smuzhiyun 
hpsa_slave_alloc(struct scsi_device * sdev)2104*4882a593Smuzhiyun static int hpsa_slave_alloc(struct scsi_device *sdev)
2105*4882a593Smuzhiyun {
2106*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *sd = NULL;
2107*4882a593Smuzhiyun 	unsigned long flags;
2108*4882a593Smuzhiyun 	struct ctlr_info *h;
2109*4882a593Smuzhiyun 
2110*4882a593Smuzhiyun 	h = sdev_to_hba(sdev);
2111*4882a593Smuzhiyun 	spin_lock_irqsave(&h->devlock, flags);
2112*4882a593Smuzhiyun 	if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) {
2113*4882a593Smuzhiyun 		struct scsi_target *starget;
2114*4882a593Smuzhiyun 		struct sas_rphy *rphy;
2115*4882a593Smuzhiyun 
2116*4882a593Smuzhiyun 		starget = scsi_target(sdev);
2117*4882a593Smuzhiyun 		rphy = target_to_rphy(starget);
2118*4882a593Smuzhiyun 		sd = hpsa_find_device_by_sas_rphy(h, rphy);
2119*4882a593Smuzhiyun 		if (sd) {
2120*4882a593Smuzhiyun 			sd->target = sdev_id(sdev);
2121*4882a593Smuzhiyun 			sd->lun = sdev->lun;
2122*4882a593Smuzhiyun 		}
2123*4882a593Smuzhiyun 	}
2124*4882a593Smuzhiyun 	if (!sd)
2125*4882a593Smuzhiyun 		sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
2126*4882a593Smuzhiyun 					sdev_id(sdev), sdev->lun);
2127*4882a593Smuzhiyun 
2128*4882a593Smuzhiyun 	if (sd && sd->expose_device) {
2129*4882a593Smuzhiyun 		atomic_set(&sd->ioaccel_cmds_out, 0);
2130*4882a593Smuzhiyun 		sdev->hostdata = sd;
2131*4882a593Smuzhiyun 	} else
2132*4882a593Smuzhiyun 		sdev->hostdata = NULL;
2133*4882a593Smuzhiyun 	spin_unlock_irqrestore(&h->devlock, flags);
2134*4882a593Smuzhiyun 	return 0;
2135*4882a593Smuzhiyun }
2136*4882a593Smuzhiyun 
2137*4882a593Smuzhiyun /* configure scsi device based on internal per-device structure */
2138*4882a593Smuzhiyun #define CTLR_TIMEOUT (120 * HZ)
hpsa_slave_configure(struct scsi_device * sdev)2139*4882a593Smuzhiyun static int hpsa_slave_configure(struct scsi_device *sdev)
2140*4882a593Smuzhiyun {
2141*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *sd;
2142*4882a593Smuzhiyun 	int queue_depth;
2143*4882a593Smuzhiyun 
2144*4882a593Smuzhiyun 	sd = sdev->hostdata;
2145*4882a593Smuzhiyun 	sdev->no_uld_attach = !sd || !sd->expose_device;
2146*4882a593Smuzhiyun 
2147*4882a593Smuzhiyun 	if (sd) {
2148*4882a593Smuzhiyun 		sd->was_removed = 0;
2149*4882a593Smuzhiyun 		queue_depth = sd->queue_depth != 0 ?
2150*4882a593Smuzhiyun 				sd->queue_depth : sdev->host->can_queue;
2151*4882a593Smuzhiyun 		if (sd->external) {
2152*4882a593Smuzhiyun 			queue_depth = EXTERNAL_QD;
2153*4882a593Smuzhiyun 			sdev->eh_timeout = HPSA_EH_PTRAID_TIMEOUT;
2154*4882a593Smuzhiyun 			blk_queue_rq_timeout(sdev->request_queue,
2155*4882a593Smuzhiyun 						HPSA_EH_PTRAID_TIMEOUT);
2156*4882a593Smuzhiyun 		}
2157*4882a593Smuzhiyun 		if (is_hba_lunid(sd->scsi3addr)) {
2158*4882a593Smuzhiyun 			sdev->eh_timeout = CTLR_TIMEOUT;
2159*4882a593Smuzhiyun 			blk_queue_rq_timeout(sdev->request_queue, CTLR_TIMEOUT);
2160*4882a593Smuzhiyun 		}
2161*4882a593Smuzhiyun 	} else {
2162*4882a593Smuzhiyun 		queue_depth = sdev->host->can_queue;
2163*4882a593Smuzhiyun 	}
2164*4882a593Smuzhiyun 
2165*4882a593Smuzhiyun 	scsi_change_queue_depth(sdev, queue_depth);
2166*4882a593Smuzhiyun 
2167*4882a593Smuzhiyun 	return 0;
2168*4882a593Smuzhiyun }
2169*4882a593Smuzhiyun 
hpsa_slave_destroy(struct scsi_device * sdev)2170*4882a593Smuzhiyun static void hpsa_slave_destroy(struct scsi_device *sdev)
2171*4882a593Smuzhiyun {
2172*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *hdev = NULL;
2173*4882a593Smuzhiyun 
2174*4882a593Smuzhiyun 	hdev = sdev->hostdata;
2175*4882a593Smuzhiyun 
2176*4882a593Smuzhiyun 	if (hdev)
2177*4882a593Smuzhiyun 		hdev->was_removed = 1;
2178*4882a593Smuzhiyun }
2179*4882a593Smuzhiyun 
hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info * h)2180*4882a593Smuzhiyun static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2181*4882a593Smuzhiyun {
2182*4882a593Smuzhiyun 	int i;
2183*4882a593Smuzhiyun 
2184*4882a593Smuzhiyun 	if (!h->ioaccel2_cmd_sg_list)
2185*4882a593Smuzhiyun 		return;
2186*4882a593Smuzhiyun 	for (i = 0; i < h->nr_cmds; i++) {
2187*4882a593Smuzhiyun 		kfree(h->ioaccel2_cmd_sg_list[i]);
2188*4882a593Smuzhiyun 		h->ioaccel2_cmd_sg_list[i] = NULL;
2189*4882a593Smuzhiyun 	}
2190*4882a593Smuzhiyun 	kfree(h->ioaccel2_cmd_sg_list);
2191*4882a593Smuzhiyun 	h->ioaccel2_cmd_sg_list = NULL;
2192*4882a593Smuzhiyun }
2193*4882a593Smuzhiyun 
hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info * h)2194*4882a593Smuzhiyun static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2195*4882a593Smuzhiyun {
2196*4882a593Smuzhiyun 	int i;
2197*4882a593Smuzhiyun 
2198*4882a593Smuzhiyun 	if (h->chainsize <= 0)
2199*4882a593Smuzhiyun 		return 0;
2200*4882a593Smuzhiyun 
2201*4882a593Smuzhiyun 	h->ioaccel2_cmd_sg_list =
2202*4882a593Smuzhiyun 		kcalloc(h->nr_cmds, sizeof(*h->ioaccel2_cmd_sg_list),
2203*4882a593Smuzhiyun 					GFP_KERNEL);
2204*4882a593Smuzhiyun 	if (!h->ioaccel2_cmd_sg_list)
2205*4882a593Smuzhiyun 		return -ENOMEM;
2206*4882a593Smuzhiyun 	for (i = 0; i < h->nr_cmds; i++) {
2207*4882a593Smuzhiyun 		h->ioaccel2_cmd_sg_list[i] =
2208*4882a593Smuzhiyun 			kmalloc_array(h->maxsgentries,
2209*4882a593Smuzhiyun 				      sizeof(*h->ioaccel2_cmd_sg_list[i]),
2210*4882a593Smuzhiyun 				      GFP_KERNEL);
2211*4882a593Smuzhiyun 		if (!h->ioaccel2_cmd_sg_list[i])
2212*4882a593Smuzhiyun 			goto clean;
2213*4882a593Smuzhiyun 	}
2214*4882a593Smuzhiyun 	return 0;
2215*4882a593Smuzhiyun 
2216*4882a593Smuzhiyun clean:
2217*4882a593Smuzhiyun 	hpsa_free_ioaccel2_sg_chain_blocks(h);
2218*4882a593Smuzhiyun 	return -ENOMEM;
2219*4882a593Smuzhiyun }
2220*4882a593Smuzhiyun 
hpsa_free_sg_chain_blocks(struct ctlr_info * h)2221*4882a593Smuzhiyun static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
2222*4882a593Smuzhiyun {
2223*4882a593Smuzhiyun 	int i;
2224*4882a593Smuzhiyun 
2225*4882a593Smuzhiyun 	if (!h->cmd_sg_list)
2226*4882a593Smuzhiyun 		return;
2227*4882a593Smuzhiyun 	for (i = 0; i < h->nr_cmds; i++) {
2228*4882a593Smuzhiyun 		kfree(h->cmd_sg_list[i]);
2229*4882a593Smuzhiyun 		h->cmd_sg_list[i] = NULL;
2230*4882a593Smuzhiyun 	}
2231*4882a593Smuzhiyun 	kfree(h->cmd_sg_list);
2232*4882a593Smuzhiyun 	h->cmd_sg_list = NULL;
2233*4882a593Smuzhiyun }
2234*4882a593Smuzhiyun 
hpsa_alloc_sg_chain_blocks(struct ctlr_info * h)2235*4882a593Smuzhiyun static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
2236*4882a593Smuzhiyun {
2237*4882a593Smuzhiyun 	int i;
2238*4882a593Smuzhiyun 
2239*4882a593Smuzhiyun 	if (h->chainsize <= 0)
2240*4882a593Smuzhiyun 		return 0;
2241*4882a593Smuzhiyun 
2242*4882a593Smuzhiyun 	h->cmd_sg_list = kcalloc(h->nr_cmds, sizeof(*h->cmd_sg_list),
2243*4882a593Smuzhiyun 				 GFP_KERNEL);
2244*4882a593Smuzhiyun 	if (!h->cmd_sg_list)
2245*4882a593Smuzhiyun 		return -ENOMEM;
2246*4882a593Smuzhiyun 
2247*4882a593Smuzhiyun 	for (i = 0; i < h->nr_cmds; i++) {
2248*4882a593Smuzhiyun 		h->cmd_sg_list[i] = kmalloc_array(h->chainsize,
2249*4882a593Smuzhiyun 						  sizeof(*h->cmd_sg_list[i]),
2250*4882a593Smuzhiyun 						  GFP_KERNEL);
2251*4882a593Smuzhiyun 		if (!h->cmd_sg_list[i])
2252*4882a593Smuzhiyun 			goto clean;
2253*4882a593Smuzhiyun 
2254*4882a593Smuzhiyun 	}
2255*4882a593Smuzhiyun 	return 0;
2256*4882a593Smuzhiyun 
2257*4882a593Smuzhiyun clean:
2258*4882a593Smuzhiyun 	hpsa_free_sg_chain_blocks(h);
2259*4882a593Smuzhiyun 	return -ENOMEM;
2260*4882a593Smuzhiyun }
2261*4882a593Smuzhiyun 
hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info * h,struct io_accel2_cmd * cp,struct CommandList * c)2262*4882a593Smuzhiyun static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h,
2263*4882a593Smuzhiyun 	struct io_accel2_cmd *cp, struct CommandList *c)
2264*4882a593Smuzhiyun {
2265*4882a593Smuzhiyun 	struct ioaccel2_sg_element *chain_block;
2266*4882a593Smuzhiyun 	u64 temp64;
2267*4882a593Smuzhiyun 	u32 chain_size;
2268*4882a593Smuzhiyun 
2269*4882a593Smuzhiyun 	chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex];
2270*4882a593Smuzhiyun 	chain_size = le32_to_cpu(cp->sg[0].length);
2271*4882a593Smuzhiyun 	temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_size,
2272*4882a593Smuzhiyun 				DMA_TO_DEVICE);
2273*4882a593Smuzhiyun 	if (dma_mapping_error(&h->pdev->dev, temp64)) {
2274*4882a593Smuzhiyun 		/* prevent subsequent unmapping */
2275*4882a593Smuzhiyun 		cp->sg->address = 0;
2276*4882a593Smuzhiyun 		return -1;
2277*4882a593Smuzhiyun 	}
2278*4882a593Smuzhiyun 	cp->sg->address = cpu_to_le64(temp64);
2279*4882a593Smuzhiyun 	return 0;
2280*4882a593Smuzhiyun }
2281*4882a593Smuzhiyun 
hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info * h,struct io_accel2_cmd * cp)2282*4882a593Smuzhiyun static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h,
2283*4882a593Smuzhiyun 	struct io_accel2_cmd *cp)
2284*4882a593Smuzhiyun {
2285*4882a593Smuzhiyun 	struct ioaccel2_sg_element *chain_sg;
2286*4882a593Smuzhiyun 	u64 temp64;
2287*4882a593Smuzhiyun 	u32 chain_size;
2288*4882a593Smuzhiyun 
2289*4882a593Smuzhiyun 	chain_sg = cp->sg;
2290*4882a593Smuzhiyun 	temp64 = le64_to_cpu(chain_sg->address);
2291*4882a593Smuzhiyun 	chain_size = le32_to_cpu(cp->sg[0].length);
2292*4882a593Smuzhiyun 	dma_unmap_single(&h->pdev->dev, temp64, chain_size, DMA_TO_DEVICE);
2293*4882a593Smuzhiyun }
2294*4882a593Smuzhiyun 
hpsa_map_sg_chain_block(struct ctlr_info * h,struct CommandList * c)2295*4882a593Smuzhiyun static int hpsa_map_sg_chain_block(struct ctlr_info *h,
2296*4882a593Smuzhiyun 	struct CommandList *c)
2297*4882a593Smuzhiyun {
2298*4882a593Smuzhiyun 	struct SGDescriptor *chain_sg, *chain_block;
2299*4882a593Smuzhiyun 	u64 temp64;
2300*4882a593Smuzhiyun 	u32 chain_len;
2301*4882a593Smuzhiyun 
2302*4882a593Smuzhiyun 	chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2303*4882a593Smuzhiyun 	chain_block = h->cmd_sg_list[c->cmdindex];
2304*4882a593Smuzhiyun 	chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
2305*4882a593Smuzhiyun 	chain_len = sizeof(*chain_sg) *
2306*4882a593Smuzhiyun 		(le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
2307*4882a593Smuzhiyun 	chain_sg->Len = cpu_to_le32(chain_len);
2308*4882a593Smuzhiyun 	temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_len,
2309*4882a593Smuzhiyun 				DMA_TO_DEVICE);
2310*4882a593Smuzhiyun 	if (dma_mapping_error(&h->pdev->dev, temp64)) {
2311*4882a593Smuzhiyun 		/* prevent subsequent unmapping */
2312*4882a593Smuzhiyun 		chain_sg->Addr = cpu_to_le64(0);
2313*4882a593Smuzhiyun 		return -1;
2314*4882a593Smuzhiyun 	}
2315*4882a593Smuzhiyun 	chain_sg->Addr = cpu_to_le64(temp64);
2316*4882a593Smuzhiyun 	return 0;
2317*4882a593Smuzhiyun }
2318*4882a593Smuzhiyun 
hpsa_unmap_sg_chain_block(struct ctlr_info * h,struct CommandList * c)2319*4882a593Smuzhiyun static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
2320*4882a593Smuzhiyun 	struct CommandList *c)
2321*4882a593Smuzhiyun {
2322*4882a593Smuzhiyun 	struct SGDescriptor *chain_sg;
2323*4882a593Smuzhiyun 
2324*4882a593Smuzhiyun 	if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
2325*4882a593Smuzhiyun 		return;
2326*4882a593Smuzhiyun 
2327*4882a593Smuzhiyun 	chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2328*4882a593Smuzhiyun 	dma_unmap_single(&h->pdev->dev, le64_to_cpu(chain_sg->Addr),
2329*4882a593Smuzhiyun 			le32_to_cpu(chain_sg->Len), DMA_TO_DEVICE);
2330*4882a593Smuzhiyun }
2331*4882a593Smuzhiyun 
2332*4882a593Smuzhiyun 
2333*4882a593Smuzhiyun /* Decode the various types of errors on ioaccel2 path.
2334*4882a593Smuzhiyun  * Return 1 for any error that should generate a RAID path retry.
2335*4882a593Smuzhiyun  * Return 0 for errors that don't require a RAID path retry.
2336*4882a593Smuzhiyun  */
handle_ioaccel_mode2_error(struct ctlr_info * h,struct CommandList * c,struct scsi_cmnd * cmd,struct io_accel2_cmd * c2,struct hpsa_scsi_dev_t * dev)2337*4882a593Smuzhiyun static int handle_ioaccel_mode2_error(struct ctlr_info *h,
2338*4882a593Smuzhiyun 					struct CommandList *c,
2339*4882a593Smuzhiyun 					struct scsi_cmnd *cmd,
2340*4882a593Smuzhiyun 					struct io_accel2_cmd *c2,
2341*4882a593Smuzhiyun 					struct hpsa_scsi_dev_t *dev)
2342*4882a593Smuzhiyun {
2343*4882a593Smuzhiyun 	int data_len;
2344*4882a593Smuzhiyun 	int retry = 0;
2345*4882a593Smuzhiyun 	u32 ioaccel2_resid = 0;
2346*4882a593Smuzhiyun 
2347*4882a593Smuzhiyun 	switch (c2->error_data.serv_response) {
2348*4882a593Smuzhiyun 	case IOACCEL2_SERV_RESPONSE_COMPLETE:
2349*4882a593Smuzhiyun 		switch (c2->error_data.status) {
2350*4882a593Smuzhiyun 		case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
2351*4882a593Smuzhiyun 			if (cmd)
2352*4882a593Smuzhiyun 				cmd->result = 0;
2353*4882a593Smuzhiyun 			break;
2354*4882a593Smuzhiyun 		case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
2355*4882a593Smuzhiyun 			cmd->result |= SAM_STAT_CHECK_CONDITION;
2356*4882a593Smuzhiyun 			if (c2->error_data.data_present !=
2357*4882a593Smuzhiyun 					IOACCEL2_SENSE_DATA_PRESENT) {
2358*4882a593Smuzhiyun 				memset(cmd->sense_buffer, 0,
2359*4882a593Smuzhiyun 					SCSI_SENSE_BUFFERSIZE);
2360*4882a593Smuzhiyun 				break;
2361*4882a593Smuzhiyun 			}
2362*4882a593Smuzhiyun 			/* copy the sense data */
2363*4882a593Smuzhiyun 			data_len = c2->error_data.sense_data_len;
2364*4882a593Smuzhiyun 			if (data_len > SCSI_SENSE_BUFFERSIZE)
2365*4882a593Smuzhiyun 				data_len = SCSI_SENSE_BUFFERSIZE;
2366*4882a593Smuzhiyun 			if (data_len > sizeof(c2->error_data.sense_data_buff))
2367*4882a593Smuzhiyun 				data_len =
2368*4882a593Smuzhiyun 					sizeof(c2->error_data.sense_data_buff);
2369*4882a593Smuzhiyun 			memcpy(cmd->sense_buffer,
2370*4882a593Smuzhiyun 				c2->error_data.sense_data_buff, data_len);
2371*4882a593Smuzhiyun 			retry = 1;
2372*4882a593Smuzhiyun 			break;
2373*4882a593Smuzhiyun 		case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
2374*4882a593Smuzhiyun 			retry = 1;
2375*4882a593Smuzhiyun 			break;
2376*4882a593Smuzhiyun 		case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
2377*4882a593Smuzhiyun 			retry = 1;
2378*4882a593Smuzhiyun 			break;
2379*4882a593Smuzhiyun 		case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
2380*4882a593Smuzhiyun 			retry = 1;
2381*4882a593Smuzhiyun 			break;
2382*4882a593Smuzhiyun 		case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
2383*4882a593Smuzhiyun 			retry = 1;
2384*4882a593Smuzhiyun 			break;
2385*4882a593Smuzhiyun 		default:
2386*4882a593Smuzhiyun 			retry = 1;
2387*4882a593Smuzhiyun 			break;
2388*4882a593Smuzhiyun 		}
2389*4882a593Smuzhiyun 		break;
2390*4882a593Smuzhiyun 	case IOACCEL2_SERV_RESPONSE_FAILURE:
2391*4882a593Smuzhiyun 		switch (c2->error_data.status) {
2392*4882a593Smuzhiyun 		case IOACCEL2_STATUS_SR_IO_ERROR:
2393*4882a593Smuzhiyun 		case IOACCEL2_STATUS_SR_IO_ABORTED:
2394*4882a593Smuzhiyun 		case IOACCEL2_STATUS_SR_OVERRUN:
2395*4882a593Smuzhiyun 			retry = 1;
2396*4882a593Smuzhiyun 			break;
2397*4882a593Smuzhiyun 		case IOACCEL2_STATUS_SR_UNDERRUN:
2398*4882a593Smuzhiyun 			cmd->result = (DID_OK << 16);		/* host byte */
2399*4882a593Smuzhiyun 			cmd->result |= (COMMAND_COMPLETE << 8);	/* msg byte */
2400*4882a593Smuzhiyun 			ioaccel2_resid = get_unaligned_le32(
2401*4882a593Smuzhiyun 						&c2->error_data.resid_cnt[0]);
2402*4882a593Smuzhiyun 			scsi_set_resid(cmd, ioaccel2_resid);
2403*4882a593Smuzhiyun 			break;
2404*4882a593Smuzhiyun 		case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
2405*4882a593Smuzhiyun 		case IOACCEL2_STATUS_SR_INVALID_DEVICE:
2406*4882a593Smuzhiyun 		case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
2407*4882a593Smuzhiyun 			/*
2408*4882a593Smuzhiyun 			 * Did an HBA disk disappear? We will eventually
2409*4882a593Smuzhiyun 			 * get a state change event from the controller but
2410*4882a593Smuzhiyun 			 * in the meantime, we need to tell the OS that the
2411*4882a593Smuzhiyun 			 * HBA disk is no longer there and stop I/O
2412*4882a593Smuzhiyun 			 * from going down. This allows the potential re-insert
2413*4882a593Smuzhiyun 			 * of the disk to get the same device node.
2414*4882a593Smuzhiyun 			 */
2415*4882a593Smuzhiyun 			if (dev->physical_device && dev->expose_device) {
2416*4882a593Smuzhiyun 				cmd->result = DID_NO_CONNECT << 16;
2417*4882a593Smuzhiyun 				dev->removed = 1;
2418*4882a593Smuzhiyun 				h->drv_req_rescan = 1;
2419*4882a593Smuzhiyun 				dev_warn(&h->pdev->dev,
2420*4882a593Smuzhiyun 					"%s: device is gone!\n", __func__);
2421*4882a593Smuzhiyun 			} else
2422*4882a593Smuzhiyun 				/*
2423*4882a593Smuzhiyun 				 * Retry by sending down the RAID path.
2424*4882a593Smuzhiyun 				 * We will get an event from ctlr to
2425*4882a593Smuzhiyun 				 * trigger rescan regardless.
2426*4882a593Smuzhiyun 				 */
2427*4882a593Smuzhiyun 				retry = 1;
2428*4882a593Smuzhiyun 			break;
2429*4882a593Smuzhiyun 		default:
2430*4882a593Smuzhiyun 			retry = 1;
2431*4882a593Smuzhiyun 		}
2432*4882a593Smuzhiyun 		break;
2433*4882a593Smuzhiyun 	case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
2434*4882a593Smuzhiyun 		break;
2435*4882a593Smuzhiyun 	case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
2436*4882a593Smuzhiyun 		break;
2437*4882a593Smuzhiyun 	case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
2438*4882a593Smuzhiyun 		retry = 1;
2439*4882a593Smuzhiyun 		break;
2440*4882a593Smuzhiyun 	case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
2441*4882a593Smuzhiyun 		break;
2442*4882a593Smuzhiyun 	default:
2443*4882a593Smuzhiyun 		retry = 1;
2444*4882a593Smuzhiyun 		break;
2445*4882a593Smuzhiyun 	}
2446*4882a593Smuzhiyun 
2447*4882a593Smuzhiyun 	if (dev->in_reset)
2448*4882a593Smuzhiyun 		retry = 0;
2449*4882a593Smuzhiyun 
2450*4882a593Smuzhiyun 	return retry;	/* retry on raid path? */
2451*4882a593Smuzhiyun }
2452*4882a593Smuzhiyun 
hpsa_cmd_resolve_events(struct ctlr_info * h,struct CommandList * c)2453*4882a593Smuzhiyun static void hpsa_cmd_resolve_events(struct ctlr_info *h,
2454*4882a593Smuzhiyun 		struct CommandList *c)
2455*4882a593Smuzhiyun {
2456*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *dev = c->device;
2457*4882a593Smuzhiyun 
2458*4882a593Smuzhiyun 	/*
2459*4882a593Smuzhiyun 	 * Reset c->scsi_cmd here so that the reset handler will know
2460*4882a593Smuzhiyun 	 * this command has completed.  Then, check to see if the handler is
2461*4882a593Smuzhiyun 	 * waiting for this command, and, if so, wake it.
2462*4882a593Smuzhiyun 	 */
2463*4882a593Smuzhiyun 	c->scsi_cmd = SCSI_CMD_IDLE;
2464*4882a593Smuzhiyun 	mb();	/* Declare command idle before checking for pending events. */
2465*4882a593Smuzhiyun 	if (dev) {
2466*4882a593Smuzhiyun 		atomic_dec(&dev->commands_outstanding);
2467*4882a593Smuzhiyun 		if (dev->in_reset &&
2468*4882a593Smuzhiyun 			atomic_read(&dev->commands_outstanding) <= 0)
2469*4882a593Smuzhiyun 			wake_up_all(&h->event_sync_wait_queue);
2470*4882a593Smuzhiyun 	}
2471*4882a593Smuzhiyun }
2472*4882a593Smuzhiyun 
hpsa_cmd_resolve_and_free(struct ctlr_info * h,struct CommandList * c)2473*4882a593Smuzhiyun static void hpsa_cmd_resolve_and_free(struct ctlr_info *h,
2474*4882a593Smuzhiyun 				      struct CommandList *c)
2475*4882a593Smuzhiyun {
2476*4882a593Smuzhiyun 	hpsa_cmd_resolve_events(h, c);
2477*4882a593Smuzhiyun 	cmd_tagged_free(h, c);
2478*4882a593Smuzhiyun }
2479*4882a593Smuzhiyun 
hpsa_cmd_free_and_done(struct ctlr_info * h,struct CommandList * c,struct scsi_cmnd * cmd)2480*4882a593Smuzhiyun static void hpsa_cmd_free_and_done(struct ctlr_info *h,
2481*4882a593Smuzhiyun 		struct CommandList *c, struct scsi_cmnd *cmd)
2482*4882a593Smuzhiyun {
2483*4882a593Smuzhiyun 	hpsa_cmd_resolve_and_free(h, c);
2484*4882a593Smuzhiyun 	if (cmd && cmd->scsi_done)
2485*4882a593Smuzhiyun 		cmd->scsi_done(cmd);
2486*4882a593Smuzhiyun }
2487*4882a593Smuzhiyun 
hpsa_retry_cmd(struct ctlr_info * h,struct CommandList * c)2488*4882a593Smuzhiyun static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c)
2489*4882a593Smuzhiyun {
2490*4882a593Smuzhiyun 	INIT_WORK(&c->work, hpsa_command_resubmit_worker);
2491*4882a593Smuzhiyun 	queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
2492*4882a593Smuzhiyun }
2493*4882a593Smuzhiyun 
process_ioaccel2_completion(struct ctlr_info * h,struct CommandList * c,struct scsi_cmnd * cmd,struct hpsa_scsi_dev_t * dev)2494*4882a593Smuzhiyun static void process_ioaccel2_completion(struct ctlr_info *h,
2495*4882a593Smuzhiyun 		struct CommandList *c, struct scsi_cmnd *cmd,
2496*4882a593Smuzhiyun 		struct hpsa_scsi_dev_t *dev)
2497*4882a593Smuzhiyun {
2498*4882a593Smuzhiyun 	struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2499*4882a593Smuzhiyun 
2500*4882a593Smuzhiyun 	/* check for good status */
2501*4882a593Smuzhiyun 	if (likely(c2->error_data.serv_response == 0 &&
2502*4882a593Smuzhiyun 			c2->error_data.status == 0)) {
2503*4882a593Smuzhiyun 		cmd->result = 0;
2504*4882a593Smuzhiyun 		return hpsa_cmd_free_and_done(h, c, cmd);
2505*4882a593Smuzhiyun 	}
2506*4882a593Smuzhiyun 
2507*4882a593Smuzhiyun 	/*
2508*4882a593Smuzhiyun 	 * Any RAID offload error results in retry which will use
2509*4882a593Smuzhiyun 	 * the normal I/O path so the controller can handle whatever is
2510*4882a593Smuzhiyun 	 * wrong.
2511*4882a593Smuzhiyun 	 */
2512*4882a593Smuzhiyun 	if (is_logical_device(dev) &&
2513*4882a593Smuzhiyun 		c2->error_data.serv_response ==
2514*4882a593Smuzhiyun 			IOACCEL2_SERV_RESPONSE_FAILURE) {
2515*4882a593Smuzhiyun 		if (c2->error_data.status ==
2516*4882a593Smuzhiyun 			IOACCEL2_STATUS_SR_IOACCEL_DISABLED) {
2517*4882a593Smuzhiyun 			hpsa_turn_off_ioaccel_for_device(dev);
2518*4882a593Smuzhiyun 		}
2519*4882a593Smuzhiyun 
2520*4882a593Smuzhiyun 		if (dev->in_reset) {
2521*4882a593Smuzhiyun 			cmd->result = DID_RESET << 16;
2522*4882a593Smuzhiyun 			return hpsa_cmd_free_and_done(h, c, cmd);
2523*4882a593Smuzhiyun 		}
2524*4882a593Smuzhiyun 
2525*4882a593Smuzhiyun 		return hpsa_retry_cmd(h, c);
2526*4882a593Smuzhiyun 	}
2527*4882a593Smuzhiyun 
2528*4882a593Smuzhiyun 	if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev))
2529*4882a593Smuzhiyun 		return hpsa_retry_cmd(h, c);
2530*4882a593Smuzhiyun 
2531*4882a593Smuzhiyun 	return hpsa_cmd_free_and_done(h, c, cmd);
2532*4882a593Smuzhiyun }
2533*4882a593Smuzhiyun 
2534*4882a593Smuzhiyun /* Returns 0 on success, < 0 otherwise. */
hpsa_evaluate_tmf_status(struct ctlr_info * h,struct CommandList * cp)2535*4882a593Smuzhiyun static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
2536*4882a593Smuzhiyun 					struct CommandList *cp)
2537*4882a593Smuzhiyun {
2538*4882a593Smuzhiyun 	u8 tmf_status = cp->err_info->ScsiStatus;
2539*4882a593Smuzhiyun 
2540*4882a593Smuzhiyun 	switch (tmf_status) {
2541*4882a593Smuzhiyun 	case CISS_TMF_COMPLETE:
2542*4882a593Smuzhiyun 		/*
2543*4882a593Smuzhiyun 		 * CISS_TMF_COMPLETE never happens, instead,
2544*4882a593Smuzhiyun 		 * ei->CommandStatus == 0 for this case.
2545*4882a593Smuzhiyun 		 */
2546*4882a593Smuzhiyun 	case CISS_TMF_SUCCESS:
2547*4882a593Smuzhiyun 		return 0;
2548*4882a593Smuzhiyun 	case CISS_TMF_INVALID_FRAME:
2549*4882a593Smuzhiyun 	case CISS_TMF_NOT_SUPPORTED:
2550*4882a593Smuzhiyun 	case CISS_TMF_FAILED:
2551*4882a593Smuzhiyun 	case CISS_TMF_WRONG_LUN:
2552*4882a593Smuzhiyun 	case CISS_TMF_OVERLAPPED_TAG:
2553*4882a593Smuzhiyun 		break;
2554*4882a593Smuzhiyun 	default:
2555*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
2556*4882a593Smuzhiyun 				tmf_status);
2557*4882a593Smuzhiyun 		break;
2558*4882a593Smuzhiyun 	}
2559*4882a593Smuzhiyun 	return -tmf_status;
2560*4882a593Smuzhiyun }
2561*4882a593Smuzhiyun 
complete_scsi_command(struct CommandList * cp)2562*4882a593Smuzhiyun static void complete_scsi_command(struct CommandList *cp)
2563*4882a593Smuzhiyun {
2564*4882a593Smuzhiyun 	struct scsi_cmnd *cmd;
2565*4882a593Smuzhiyun 	struct ctlr_info *h;
2566*4882a593Smuzhiyun 	struct ErrorInfo *ei;
2567*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *dev;
2568*4882a593Smuzhiyun 	struct io_accel2_cmd *c2;
2569*4882a593Smuzhiyun 
2570*4882a593Smuzhiyun 	u8 sense_key;
2571*4882a593Smuzhiyun 	u8 asc;      /* additional sense code */
2572*4882a593Smuzhiyun 	u8 ascq;     /* additional sense code qualifier */
2573*4882a593Smuzhiyun 	unsigned long sense_data_size;
2574*4882a593Smuzhiyun 
2575*4882a593Smuzhiyun 	ei = cp->err_info;
2576*4882a593Smuzhiyun 	cmd = cp->scsi_cmd;
2577*4882a593Smuzhiyun 	h = cp->h;
2578*4882a593Smuzhiyun 
2579*4882a593Smuzhiyun 	if (!cmd->device) {
2580*4882a593Smuzhiyun 		cmd->result = DID_NO_CONNECT << 16;
2581*4882a593Smuzhiyun 		return hpsa_cmd_free_and_done(h, cp, cmd);
2582*4882a593Smuzhiyun 	}
2583*4882a593Smuzhiyun 
2584*4882a593Smuzhiyun 	dev = cmd->device->hostdata;
2585*4882a593Smuzhiyun 	if (!dev) {
2586*4882a593Smuzhiyun 		cmd->result = DID_NO_CONNECT << 16;
2587*4882a593Smuzhiyun 		return hpsa_cmd_free_and_done(h, cp, cmd);
2588*4882a593Smuzhiyun 	}
2589*4882a593Smuzhiyun 	c2 = &h->ioaccel2_cmd_pool[cp->cmdindex];
2590*4882a593Smuzhiyun 
2591*4882a593Smuzhiyun 	scsi_dma_unmap(cmd); /* undo the DMA mappings */
2592*4882a593Smuzhiyun 	if ((cp->cmd_type == CMD_SCSI) &&
2593*4882a593Smuzhiyun 		(le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
2594*4882a593Smuzhiyun 		hpsa_unmap_sg_chain_block(h, cp);
2595*4882a593Smuzhiyun 
2596*4882a593Smuzhiyun 	if ((cp->cmd_type == CMD_IOACCEL2) &&
2597*4882a593Smuzhiyun 		(c2->sg[0].chain_indicator == IOACCEL2_CHAIN))
2598*4882a593Smuzhiyun 		hpsa_unmap_ioaccel2_sg_chain_block(h, c2);
2599*4882a593Smuzhiyun 
2600*4882a593Smuzhiyun 	cmd->result = (DID_OK << 16); 		/* host byte */
2601*4882a593Smuzhiyun 	cmd->result |= (COMMAND_COMPLETE << 8);	/* msg byte */
2602*4882a593Smuzhiyun 
2603*4882a593Smuzhiyun 	/* SCSI command has already been cleaned up in SML */
2604*4882a593Smuzhiyun 	if (dev->was_removed) {
2605*4882a593Smuzhiyun 		hpsa_cmd_resolve_and_free(h, cp);
2606*4882a593Smuzhiyun 		return;
2607*4882a593Smuzhiyun 	}
2608*4882a593Smuzhiyun 
2609*4882a593Smuzhiyun 	if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) {
2610*4882a593Smuzhiyun 		if (dev->physical_device && dev->expose_device &&
2611*4882a593Smuzhiyun 			dev->removed) {
2612*4882a593Smuzhiyun 			cmd->result = DID_NO_CONNECT << 16;
2613*4882a593Smuzhiyun 			return hpsa_cmd_free_and_done(h, cp, cmd);
2614*4882a593Smuzhiyun 		}
2615*4882a593Smuzhiyun 		if (likely(cp->phys_disk != NULL))
2616*4882a593Smuzhiyun 			atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
2617*4882a593Smuzhiyun 	}
2618*4882a593Smuzhiyun 
2619*4882a593Smuzhiyun 	/*
2620*4882a593Smuzhiyun 	 * We check for lockup status here as it may be set for
2621*4882a593Smuzhiyun 	 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
2622*4882a593Smuzhiyun 	 * fail_all_oustanding_cmds()
2623*4882a593Smuzhiyun 	 */
2624*4882a593Smuzhiyun 	if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
2625*4882a593Smuzhiyun 		/* DID_NO_CONNECT will prevent a retry */
2626*4882a593Smuzhiyun 		cmd->result = DID_NO_CONNECT << 16;
2627*4882a593Smuzhiyun 		return hpsa_cmd_free_and_done(h, cp, cmd);
2628*4882a593Smuzhiyun 	}
2629*4882a593Smuzhiyun 
2630*4882a593Smuzhiyun 	if (cp->cmd_type == CMD_IOACCEL2)
2631*4882a593Smuzhiyun 		return process_ioaccel2_completion(h, cp, cmd, dev);
2632*4882a593Smuzhiyun 
2633*4882a593Smuzhiyun 	scsi_set_resid(cmd, ei->ResidualCnt);
2634*4882a593Smuzhiyun 	if (ei->CommandStatus == 0)
2635*4882a593Smuzhiyun 		return hpsa_cmd_free_and_done(h, cp, cmd);
2636*4882a593Smuzhiyun 
2637*4882a593Smuzhiyun 	/* For I/O accelerator commands, copy over some fields to the normal
2638*4882a593Smuzhiyun 	 * CISS header used below for error handling.
2639*4882a593Smuzhiyun 	 */
2640*4882a593Smuzhiyun 	if (cp->cmd_type == CMD_IOACCEL1) {
2641*4882a593Smuzhiyun 		struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
2642*4882a593Smuzhiyun 		cp->Header.SGList = scsi_sg_count(cmd);
2643*4882a593Smuzhiyun 		cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
2644*4882a593Smuzhiyun 		cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
2645*4882a593Smuzhiyun 			IOACCEL1_IOFLAGS_CDBLEN_MASK;
2646*4882a593Smuzhiyun 		cp->Header.tag = c->tag;
2647*4882a593Smuzhiyun 		memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2648*4882a593Smuzhiyun 		memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2649*4882a593Smuzhiyun 
2650*4882a593Smuzhiyun 		/* Any RAID offload error results in retry which will use
2651*4882a593Smuzhiyun 		 * the normal I/O path so the controller can handle whatever's
2652*4882a593Smuzhiyun 		 * wrong.
2653*4882a593Smuzhiyun 		 */
2654*4882a593Smuzhiyun 		if (is_logical_device(dev)) {
2655*4882a593Smuzhiyun 			if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2656*4882a593Smuzhiyun 				dev->offload_enabled = 0;
2657*4882a593Smuzhiyun 			return hpsa_retry_cmd(h, cp);
2658*4882a593Smuzhiyun 		}
2659*4882a593Smuzhiyun 	}
2660*4882a593Smuzhiyun 
2661*4882a593Smuzhiyun 	/* an error has occurred */
2662*4882a593Smuzhiyun 	switch (ei->CommandStatus) {
2663*4882a593Smuzhiyun 
2664*4882a593Smuzhiyun 	case CMD_TARGET_STATUS:
2665*4882a593Smuzhiyun 		cmd->result |= ei->ScsiStatus;
2666*4882a593Smuzhiyun 		/* copy the sense data */
2667*4882a593Smuzhiyun 		if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
2668*4882a593Smuzhiyun 			sense_data_size = SCSI_SENSE_BUFFERSIZE;
2669*4882a593Smuzhiyun 		else
2670*4882a593Smuzhiyun 			sense_data_size = sizeof(ei->SenseInfo);
2671*4882a593Smuzhiyun 		if (ei->SenseLen < sense_data_size)
2672*4882a593Smuzhiyun 			sense_data_size = ei->SenseLen;
2673*4882a593Smuzhiyun 		memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
2674*4882a593Smuzhiyun 		if (ei->ScsiStatus)
2675*4882a593Smuzhiyun 			decode_sense_data(ei->SenseInfo, sense_data_size,
2676*4882a593Smuzhiyun 				&sense_key, &asc, &ascq);
2677*4882a593Smuzhiyun 		if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
2678*4882a593Smuzhiyun 			switch (sense_key) {
2679*4882a593Smuzhiyun 			case ABORTED_COMMAND:
2680*4882a593Smuzhiyun 				cmd->result |= DID_SOFT_ERROR << 16;
2681*4882a593Smuzhiyun 				break;
2682*4882a593Smuzhiyun 			case UNIT_ATTENTION:
2683*4882a593Smuzhiyun 				if (asc == 0x3F && ascq == 0x0E)
2684*4882a593Smuzhiyun 					h->drv_req_rescan = 1;
2685*4882a593Smuzhiyun 				break;
2686*4882a593Smuzhiyun 			case ILLEGAL_REQUEST:
2687*4882a593Smuzhiyun 				if (asc == 0x25 && ascq == 0x00) {
2688*4882a593Smuzhiyun 					dev->removed = 1;
2689*4882a593Smuzhiyun 					cmd->result = DID_NO_CONNECT << 16;
2690*4882a593Smuzhiyun 				}
2691*4882a593Smuzhiyun 				break;
2692*4882a593Smuzhiyun 			}
2693*4882a593Smuzhiyun 			break;
2694*4882a593Smuzhiyun 		}
2695*4882a593Smuzhiyun 		/* Problem was not a check condition
2696*4882a593Smuzhiyun 		 * Pass it up to the upper layers...
2697*4882a593Smuzhiyun 		 */
2698*4882a593Smuzhiyun 		if (ei->ScsiStatus) {
2699*4882a593Smuzhiyun 			dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2700*4882a593Smuzhiyun 				"Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2701*4882a593Smuzhiyun 				"Returning result: 0x%x\n",
2702*4882a593Smuzhiyun 				cp, ei->ScsiStatus,
2703*4882a593Smuzhiyun 				sense_key, asc, ascq,
2704*4882a593Smuzhiyun 				cmd->result);
2705*4882a593Smuzhiyun 		} else {  /* scsi status is zero??? How??? */
2706*4882a593Smuzhiyun 			dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2707*4882a593Smuzhiyun 				"Returning no connection.\n", cp),
2708*4882a593Smuzhiyun 
2709*4882a593Smuzhiyun 			/* Ordinarily, this case should never happen,
2710*4882a593Smuzhiyun 			 * but there is a bug in some released firmware
2711*4882a593Smuzhiyun 			 * revisions that allows it to happen if, for
2712*4882a593Smuzhiyun 			 * example, a 4100 backplane loses power and
2713*4882a593Smuzhiyun 			 * the tape drive is in it.  We assume that
2714*4882a593Smuzhiyun 			 * it's a fatal error of some kind because we
2715*4882a593Smuzhiyun 			 * can't show that it wasn't. We will make it
2716*4882a593Smuzhiyun 			 * look like selection timeout since that is
2717*4882a593Smuzhiyun 			 * the most common reason for this to occur,
2718*4882a593Smuzhiyun 			 * and it's severe enough.
2719*4882a593Smuzhiyun 			 */
2720*4882a593Smuzhiyun 
2721*4882a593Smuzhiyun 			cmd->result = DID_NO_CONNECT << 16;
2722*4882a593Smuzhiyun 		}
2723*4882a593Smuzhiyun 		break;
2724*4882a593Smuzhiyun 
2725*4882a593Smuzhiyun 	case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2726*4882a593Smuzhiyun 		break;
2727*4882a593Smuzhiyun 	case CMD_DATA_OVERRUN:
2728*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev,
2729*4882a593Smuzhiyun 			"CDB %16phN data overrun\n", cp->Request.CDB);
2730*4882a593Smuzhiyun 		break;
2731*4882a593Smuzhiyun 	case CMD_INVALID: {
2732*4882a593Smuzhiyun 		/* print_bytes(cp, sizeof(*cp), 1, 0);
2733*4882a593Smuzhiyun 		print_cmd(cp); */
2734*4882a593Smuzhiyun 		/* We get CMD_INVALID if you address a non-existent device
2735*4882a593Smuzhiyun 		 * instead of a selection timeout (no response).  You will
2736*4882a593Smuzhiyun 		 * see this if you yank out a drive, then try to access it.
2737*4882a593Smuzhiyun 		 * This is kind of a shame because it means that any other
2738*4882a593Smuzhiyun 		 * CMD_INVALID (e.g. driver bug) will get interpreted as a
2739*4882a593Smuzhiyun 		 * missing target. */
2740*4882a593Smuzhiyun 		cmd->result = DID_NO_CONNECT << 16;
2741*4882a593Smuzhiyun 	}
2742*4882a593Smuzhiyun 		break;
2743*4882a593Smuzhiyun 	case CMD_PROTOCOL_ERR:
2744*4882a593Smuzhiyun 		cmd->result = DID_ERROR << 16;
2745*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2746*4882a593Smuzhiyun 				cp->Request.CDB);
2747*4882a593Smuzhiyun 		break;
2748*4882a593Smuzhiyun 	case CMD_HARDWARE_ERR:
2749*4882a593Smuzhiyun 		cmd->result = DID_ERROR << 16;
2750*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2751*4882a593Smuzhiyun 			cp->Request.CDB);
2752*4882a593Smuzhiyun 		break;
2753*4882a593Smuzhiyun 	case CMD_CONNECTION_LOST:
2754*4882a593Smuzhiyun 		cmd->result = DID_ERROR << 16;
2755*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2756*4882a593Smuzhiyun 			cp->Request.CDB);
2757*4882a593Smuzhiyun 		break;
2758*4882a593Smuzhiyun 	case CMD_ABORTED:
2759*4882a593Smuzhiyun 		cmd->result = DID_ABORT << 16;
2760*4882a593Smuzhiyun 		break;
2761*4882a593Smuzhiyun 	case CMD_ABORT_FAILED:
2762*4882a593Smuzhiyun 		cmd->result = DID_ERROR << 16;
2763*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2764*4882a593Smuzhiyun 			cp->Request.CDB);
2765*4882a593Smuzhiyun 		break;
2766*4882a593Smuzhiyun 	case CMD_UNSOLICITED_ABORT:
2767*4882a593Smuzhiyun 		cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2768*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2769*4882a593Smuzhiyun 			cp->Request.CDB);
2770*4882a593Smuzhiyun 		break;
2771*4882a593Smuzhiyun 	case CMD_TIMEOUT:
2772*4882a593Smuzhiyun 		cmd->result = DID_TIME_OUT << 16;
2773*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2774*4882a593Smuzhiyun 			cp->Request.CDB);
2775*4882a593Smuzhiyun 		break;
2776*4882a593Smuzhiyun 	case CMD_UNABORTABLE:
2777*4882a593Smuzhiyun 		cmd->result = DID_ERROR << 16;
2778*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev, "Command unabortable\n");
2779*4882a593Smuzhiyun 		break;
2780*4882a593Smuzhiyun 	case CMD_TMF_STATUS:
2781*4882a593Smuzhiyun 		if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
2782*4882a593Smuzhiyun 			cmd->result = DID_ERROR << 16;
2783*4882a593Smuzhiyun 		break;
2784*4882a593Smuzhiyun 	case CMD_IOACCEL_DISABLED:
2785*4882a593Smuzhiyun 		/* This only handles the direct pass-through case since RAID
2786*4882a593Smuzhiyun 		 * offload is handled above.  Just attempt a retry.
2787*4882a593Smuzhiyun 		 */
2788*4882a593Smuzhiyun 		cmd->result = DID_SOFT_ERROR << 16;
2789*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev,
2790*4882a593Smuzhiyun 				"cp %p had HP SSD Smart Path error\n", cp);
2791*4882a593Smuzhiyun 		break;
2792*4882a593Smuzhiyun 	default:
2793*4882a593Smuzhiyun 		cmd->result = DID_ERROR << 16;
2794*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2795*4882a593Smuzhiyun 				cp, ei->CommandStatus);
2796*4882a593Smuzhiyun 	}
2797*4882a593Smuzhiyun 
2798*4882a593Smuzhiyun 	return hpsa_cmd_free_and_done(h, cp, cmd);
2799*4882a593Smuzhiyun }
2800*4882a593Smuzhiyun 
hpsa_pci_unmap(struct pci_dev * pdev,struct CommandList * c,int sg_used,enum dma_data_direction data_direction)2801*4882a593Smuzhiyun static void hpsa_pci_unmap(struct pci_dev *pdev, struct CommandList *c,
2802*4882a593Smuzhiyun 		int sg_used, enum dma_data_direction data_direction)
2803*4882a593Smuzhiyun {
2804*4882a593Smuzhiyun 	int i;
2805*4882a593Smuzhiyun 
2806*4882a593Smuzhiyun 	for (i = 0; i < sg_used; i++)
2807*4882a593Smuzhiyun 		dma_unmap_single(&pdev->dev, le64_to_cpu(c->SG[i].Addr),
2808*4882a593Smuzhiyun 				le32_to_cpu(c->SG[i].Len),
2809*4882a593Smuzhiyun 				data_direction);
2810*4882a593Smuzhiyun }
2811*4882a593Smuzhiyun 
hpsa_map_one(struct pci_dev * pdev,struct CommandList * cp,unsigned char * buf,size_t buflen,enum dma_data_direction data_direction)2812*4882a593Smuzhiyun static int hpsa_map_one(struct pci_dev *pdev,
2813*4882a593Smuzhiyun 		struct CommandList *cp,
2814*4882a593Smuzhiyun 		unsigned char *buf,
2815*4882a593Smuzhiyun 		size_t buflen,
2816*4882a593Smuzhiyun 		enum dma_data_direction data_direction)
2817*4882a593Smuzhiyun {
2818*4882a593Smuzhiyun 	u64 addr64;
2819*4882a593Smuzhiyun 
2820*4882a593Smuzhiyun 	if (buflen == 0 || data_direction == DMA_NONE) {
2821*4882a593Smuzhiyun 		cp->Header.SGList = 0;
2822*4882a593Smuzhiyun 		cp->Header.SGTotal = cpu_to_le16(0);
2823*4882a593Smuzhiyun 		return 0;
2824*4882a593Smuzhiyun 	}
2825*4882a593Smuzhiyun 
2826*4882a593Smuzhiyun 	addr64 = dma_map_single(&pdev->dev, buf, buflen, data_direction);
2827*4882a593Smuzhiyun 	if (dma_mapping_error(&pdev->dev, addr64)) {
2828*4882a593Smuzhiyun 		/* Prevent subsequent unmap of something never mapped */
2829*4882a593Smuzhiyun 		cp->Header.SGList = 0;
2830*4882a593Smuzhiyun 		cp->Header.SGTotal = cpu_to_le16(0);
2831*4882a593Smuzhiyun 		return -1;
2832*4882a593Smuzhiyun 	}
2833*4882a593Smuzhiyun 	cp->SG[0].Addr = cpu_to_le64(addr64);
2834*4882a593Smuzhiyun 	cp->SG[0].Len = cpu_to_le32(buflen);
2835*4882a593Smuzhiyun 	cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
2836*4882a593Smuzhiyun 	cp->Header.SGList = 1;   /* no. SGs contig in this cmd */
2837*4882a593Smuzhiyun 	cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2838*4882a593Smuzhiyun 	return 0;
2839*4882a593Smuzhiyun }
2840*4882a593Smuzhiyun 
2841*4882a593Smuzhiyun #define NO_TIMEOUT ((unsigned long) -1)
2842*4882a593Smuzhiyun #define DEFAULT_TIMEOUT 30000 /* milliseconds */
hpsa_scsi_do_simple_cmd_core(struct ctlr_info * h,struct CommandList * c,int reply_queue,unsigned long timeout_msecs)2843*4882a593Smuzhiyun static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
2844*4882a593Smuzhiyun 	struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2845*4882a593Smuzhiyun {
2846*4882a593Smuzhiyun 	DECLARE_COMPLETION_ONSTACK(wait);
2847*4882a593Smuzhiyun 
2848*4882a593Smuzhiyun 	c->waiting = &wait;
2849*4882a593Smuzhiyun 	__enqueue_cmd_and_start_io(h, c, reply_queue);
2850*4882a593Smuzhiyun 	if (timeout_msecs == NO_TIMEOUT) {
2851*4882a593Smuzhiyun 		/* TODO: get rid of this no-timeout thing */
2852*4882a593Smuzhiyun 		wait_for_completion_io(&wait);
2853*4882a593Smuzhiyun 		return IO_OK;
2854*4882a593Smuzhiyun 	}
2855*4882a593Smuzhiyun 	if (!wait_for_completion_io_timeout(&wait,
2856*4882a593Smuzhiyun 					msecs_to_jiffies(timeout_msecs))) {
2857*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev, "Command timed out.\n");
2858*4882a593Smuzhiyun 		return -ETIMEDOUT;
2859*4882a593Smuzhiyun 	}
2860*4882a593Smuzhiyun 	return IO_OK;
2861*4882a593Smuzhiyun }
2862*4882a593Smuzhiyun 
hpsa_scsi_do_simple_cmd(struct ctlr_info * h,struct CommandList * c,int reply_queue,unsigned long timeout_msecs)2863*4882a593Smuzhiyun static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
2864*4882a593Smuzhiyun 				   int reply_queue, unsigned long timeout_msecs)
2865*4882a593Smuzhiyun {
2866*4882a593Smuzhiyun 	if (unlikely(lockup_detected(h))) {
2867*4882a593Smuzhiyun 		c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
2868*4882a593Smuzhiyun 		return IO_OK;
2869*4882a593Smuzhiyun 	}
2870*4882a593Smuzhiyun 	return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2871*4882a593Smuzhiyun }
2872*4882a593Smuzhiyun 
lockup_detected(struct ctlr_info * h)2873*4882a593Smuzhiyun static u32 lockup_detected(struct ctlr_info *h)
2874*4882a593Smuzhiyun {
2875*4882a593Smuzhiyun 	int cpu;
2876*4882a593Smuzhiyun 	u32 rc, *lockup_detected;
2877*4882a593Smuzhiyun 
2878*4882a593Smuzhiyun 	cpu = get_cpu();
2879*4882a593Smuzhiyun 	lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2880*4882a593Smuzhiyun 	rc = *lockup_detected;
2881*4882a593Smuzhiyun 	put_cpu();
2882*4882a593Smuzhiyun 	return rc;
2883*4882a593Smuzhiyun }
2884*4882a593Smuzhiyun 
2885*4882a593Smuzhiyun #define MAX_DRIVER_CMD_RETRIES 25
hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info * h,struct CommandList * c,enum dma_data_direction data_direction,unsigned long timeout_msecs)2886*4882a593Smuzhiyun static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2887*4882a593Smuzhiyun 		struct CommandList *c, enum dma_data_direction data_direction,
2888*4882a593Smuzhiyun 		unsigned long timeout_msecs)
2889*4882a593Smuzhiyun {
2890*4882a593Smuzhiyun 	int backoff_time = 10, retry_count = 0;
2891*4882a593Smuzhiyun 	int rc;
2892*4882a593Smuzhiyun 
2893*4882a593Smuzhiyun 	do {
2894*4882a593Smuzhiyun 		memset(c->err_info, 0, sizeof(*c->err_info));
2895*4882a593Smuzhiyun 		rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
2896*4882a593Smuzhiyun 						  timeout_msecs);
2897*4882a593Smuzhiyun 		if (rc)
2898*4882a593Smuzhiyun 			break;
2899*4882a593Smuzhiyun 		retry_count++;
2900*4882a593Smuzhiyun 		if (retry_count > 3) {
2901*4882a593Smuzhiyun 			msleep(backoff_time);
2902*4882a593Smuzhiyun 			if (backoff_time < 1000)
2903*4882a593Smuzhiyun 				backoff_time *= 2;
2904*4882a593Smuzhiyun 		}
2905*4882a593Smuzhiyun 	} while ((check_for_unit_attention(h, c) ||
2906*4882a593Smuzhiyun 			check_for_busy(h, c)) &&
2907*4882a593Smuzhiyun 			retry_count <= MAX_DRIVER_CMD_RETRIES);
2908*4882a593Smuzhiyun 	hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2909*4882a593Smuzhiyun 	if (retry_count > MAX_DRIVER_CMD_RETRIES)
2910*4882a593Smuzhiyun 		rc = -EIO;
2911*4882a593Smuzhiyun 	return rc;
2912*4882a593Smuzhiyun }
2913*4882a593Smuzhiyun 
hpsa_print_cmd(struct ctlr_info * h,char * txt,struct CommandList * c)2914*4882a593Smuzhiyun static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2915*4882a593Smuzhiyun 				struct CommandList *c)
2916*4882a593Smuzhiyun {
2917*4882a593Smuzhiyun 	const u8 *cdb = c->Request.CDB;
2918*4882a593Smuzhiyun 	const u8 *lun = c->Header.LUN.LunAddrBytes;
2919*4882a593Smuzhiyun 
2920*4882a593Smuzhiyun 	dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n",
2921*4882a593Smuzhiyun 		 txt, lun, cdb);
2922*4882a593Smuzhiyun }
2923*4882a593Smuzhiyun 
hpsa_scsi_interpret_error(struct ctlr_info * h,struct CommandList * cp)2924*4882a593Smuzhiyun static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2925*4882a593Smuzhiyun 			struct CommandList *cp)
2926*4882a593Smuzhiyun {
2927*4882a593Smuzhiyun 	const struct ErrorInfo *ei = cp->err_info;
2928*4882a593Smuzhiyun 	struct device *d = &cp->h->pdev->dev;
2929*4882a593Smuzhiyun 	u8 sense_key, asc, ascq;
2930*4882a593Smuzhiyun 	int sense_len;
2931*4882a593Smuzhiyun 
2932*4882a593Smuzhiyun 	switch (ei->CommandStatus) {
2933*4882a593Smuzhiyun 	case CMD_TARGET_STATUS:
2934*4882a593Smuzhiyun 		if (ei->SenseLen > sizeof(ei->SenseInfo))
2935*4882a593Smuzhiyun 			sense_len = sizeof(ei->SenseInfo);
2936*4882a593Smuzhiyun 		else
2937*4882a593Smuzhiyun 			sense_len = ei->SenseLen;
2938*4882a593Smuzhiyun 		decode_sense_data(ei->SenseInfo, sense_len,
2939*4882a593Smuzhiyun 					&sense_key, &asc, &ascq);
2940*4882a593Smuzhiyun 		hpsa_print_cmd(h, "SCSI status", cp);
2941*4882a593Smuzhiyun 		if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2942*4882a593Smuzhiyun 			dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
2943*4882a593Smuzhiyun 				sense_key, asc, ascq);
2944*4882a593Smuzhiyun 		else
2945*4882a593Smuzhiyun 			dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2946*4882a593Smuzhiyun 		if (ei->ScsiStatus == 0)
2947*4882a593Smuzhiyun 			dev_warn(d, "SCSI status is abnormally zero.  "
2948*4882a593Smuzhiyun 			"(probably indicates selection timeout "
2949*4882a593Smuzhiyun 			"reported incorrectly due to a known "
2950*4882a593Smuzhiyun 			"firmware bug, circa July, 2001.)\n");
2951*4882a593Smuzhiyun 		break;
2952*4882a593Smuzhiyun 	case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2953*4882a593Smuzhiyun 		break;
2954*4882a593Smuzhiyun 	case CMD_DATA_OVERRUN:
2955*4882a593Smuzhiyun 		hpsa_print_cmd(h, "overrun condition", cp);
2956*4882a593Smuzhiyun 		break;
2957*4882a593Smuzhiyun 	case CMD_INVALID: {
2958*4882a593Smuzhiyun 		/* controller unfortunately reports SCSI passthru's
2959*4882a593Smuzhiyun 		 * to non-existent targets as invalid commands.
2960*4882a593Smuzhiyun 		 */
2961*4882a593Smuzhiyun 		hpsa_print_cmd(h, "invalid command", cp);
2962*4882a593Smuzhiyun 		dev_warn(d, "probably means device no longer present\n");
2963*4882a593Smuzhiyun 		}
2964*4882a593Smuzhiyun 		break;
2965*4882a593Smuzhiyun 	case CMD_PROTOCOL_ERR:
2966*4882a593Smuzhiyun 		hpsa_print_cmd(h, "protocol error", cp);
2967*4882a593Smuzhiyun 		break;
2968*4882a593Smuzhiyun 	case CMD_HARDWARE_ERR:
2969*4882a593Smuzhiyun 		hpsa_print_cmd(h, "hardware error", cp);
2970*4882a593Smuzhiyun 		break;
2971*4882a593Smuzhiyun 	case CMD_CONNECTION_LOST:
2972*4882a593Smuzhiyun 		hpsa_print_cmd(h, "connection lost", cp);
2973*4882a593Smuzhiyun 		break;
2974*4882a593Smuzhiyun 	case CMD_ABORTED:
2975*4882a593Smuzhiyun 		hpsa_print_cmd(h, "aborted", cp);
2976*4882a593Smuzhiyun 		break;
2977*4882a593Smuzhiyun 	case CMD_ABORT_FAILED:
2978*4882a593Smuzhiyun 		hpsa_print_cmd(h, "abort failed", cp);
2979*4882a593Smuzhiyun 		break;
2980*4882a593Smuzhiyun 	case CMD_UNSOLICITED_ABORT:
2981*4882a593Smuzhiyun 		hpsa_print_cmd(h, "unsolicited abort", cp);
2982*4882a593Smuzhiyun 		break;
2983*4882a593Smuzhiyun 	case CMD_TIMEOUT:
2984*4882a593Smuzhiyun 		hpsa_print_cmd(h, "timed out", cp);
2985*4882a593Smuzhiyun 		break;
2986*4882a593Smuzhiyun 	case CMD_UNABORTABLE:
2987*4882a593Smuzhiyun 		hpsa_print_cmd(h, "unabortable", cp);
2988*4882a593Smuzhiyun 		break;
2989*4882a593Smuzhiyun 	case CMD_CTLR_LOCKUP:
2990*4882a593Smuzhiyun 		hpsa_print_cmd(h, "controller lockup detected", cp);
2991*4882a593Smuzhiyun 		break;
2992*4882a593Smuzhiyun 	default:
2993*4882a593Smuzhiyun 		hpsa_print_cmd(h, "unknown status", cp);
2994*4882a593Smuzhiyun 		dev_warn(d, "Unknown command status %x\n",
2995*4882a593Smuzhiyun 				ei->CommandStatus);
2996*4882a593Smuzhiyun 	}
2997*4882a593Smuzhiyun }
2998*4882a593Smuzhiyun 
hpsa_do_receive_diagnostic(struct ctlr_info * h,u8 * scsi3addr,u8 page,u8 * buf,size_t bufsize)2999*4882a593Smuzhiyun static int hpsa_do_receive_diagnostic(struct ctlr_info *h, u8 *scsi3addr,
3000*4882a593Smuzhiyun 					u8 page, u8 *buf, size_t bufsize)
3001*4882a593Smuzhiyun {
3002*4882a593Smuzhiyun 	int rc = IO_OK;
3003*4882a593Smuzhiyun 	struct CommandList *c;
3004*4882a593Smuzhiyun 	struct ErrorInfo *ei;
3005*4882a593Smuzhiyun 
3006*4882a593Smuzhiyun 	c = cmd_alloc(h);
3007*4882a593Smuzhiyun 	if (fill_cmd(c, RECEIVE_DIAGNOSTIC, h, buf, bufsize,
3008*4882a593Smuzhiyun 			page, scsi3addr, TYPE_CMD)) {
3009*4882a593Smuzhiyun 		rc = -1;
3010*4882a593Smuzhiyun 		goto out;
3011*4882a593Smuzhiyun 	}
3012*4882a593Smuzhiyun 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3013*4882a593Smuzhiyun 			NO_TIMEOUT);
3014*4882a593Smuzhiyun 	if (rc)
3015*4882a593Smuzhiyun 		goto out;
3016*4882a593Smuzhiyun 	ei = c->err_info;
3017*4882a593Smuzhiyun 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3018*4882a593Smuzhiyun 		hpsa_scsi_interpret_error(h, c);
3019*4882a593Smuzhiyun 		rc = -1;
3020*4882a593Smuzhiyun 	}
3021*4882a593Smuzhiyun out:
3022*4882a593Smuzhiyun 	cmd_free(h, c);
3023*4882a593Smuzhiyun 	return rc;
3024*4882a593Smuzhiyun }
3025*4882a593Smuzhiyun 
hpsa_get_enclosure_logical_identifier(struct ctlr_info * h,u8 * scsi3addr)3026*4882a593Smuzhiyun static u64 hpsa_get_enclosure_logical_identifier(struct ctlr_info *h,
3027*4882a593Smuzhiyun 						u8 *scsi3addr)
3028*4882a593Smuzhiyun {
3029*4882a593Smuzhiyun 	u8 *buf;
3030*4882a593Smuzhiyun 	u64 sa = 0;
3031*4882a593Smuzhiyun 	int rc = 0;
3032*4882a593Smuzhiyun 
3033*4882a593Smuzhiyun 	buf = kzalloc(1024, GFP_KERNEL);
3034*4882a593Smuzhiyun 	if (!buf)
3035*4882a593Smuzhiyun 		return 0;
3036*4882a593Smuzhiyun 
3037*4882a593Smuzhiyun 	rc = hpsa_do_receive_diagnostic(h, scsi3addr, RECEIVE_DIAGNOSTIC,
3038*4882a593Smuzhiyun 					buf, 1024);
3039*4882a593Smuzhiyun 
3040*4882a593Smuzhiyun 	if (rc)
3041*4882a593Smuzhiyun 		goto out;
3042*4882a593Smuzhiyun 
3043*4882a593Smuzhiyun 	sa = get_unaligned_be64(buf+12);
3044*4882a593Smuzhiyun 
3045*4882a593Smuzhiyun out:
3046*4882a593Smuzhiyun 	kfree(buf);
3047*4882a593Smuzhiyun 	return sa;
3048*4882a593Smuzhiyun }
3049*4882a593Smuzhiyun 
hpsa_scsi_do_inquiry(struct ctlr_info * h,unsigned char * scsi3addr,u16 page,unsigned char * buf,unsigned char bufsize)3050*4882a593Smuzhiyun static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
3051*4882a593Smuzhiyun 			u16 page, unsigned char *buf,
3052*4882a593Smuzhiyun 			unsigned char bufsize)
3053*4882a593Smuzhiyun {
3054*4882a593Smuzhiyun 	int rc = IO_OK;
3055*4882a593Smuzhiyun 	struct CommandList *c;
3056*4882a593Smuzhiyun 	struct ErrorInfo *ei;
3057*4882a593Smuzhiyun 
3058*4882a593Smuzhiyun 	c = cmd_alloc(h);
3059*4882a593Smuzhiyun 
3060*4882a593Smuzhiyun 	if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
3061*4882a593Smuzhiyun 			page, scsi3addr, TYPE_CMD)) {
3062*4882a593Smuzhiyun 		rc = -1;
3063*4882a593Smuzhiyun 		goto out;
3064*4882a593Smuzhiyun 	}
3065*4882a593Smuzhiyun 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3066*4882a593Smuzhiyun 			NO_TIMEOUT);
3067*4882a593Smuzhiyun 	if (rc)
3068*4882a593Smuzhiyun 		goto out;
3069*4882a593Smuzhiyun 	ei = c->err_info;
3070*4882a593Smuzhiyun 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3071*4882a593Smuzhiyun 		hpsa_scsi_interpret_error(h, c);
3072*4882a593Smuzhiyun 		rc = -1;
3073*4882a593Smuzhiyun 	}
3074*4882a593Smuzhiyun out:
3075*4882a593Smuzhiyun 	cmd_free(h, c);
3076*4882a593Smuzhiyun 	return rc;
3077*4882a593Smuzhiyun }
3078*4882a593Smuzhiyun 
hpsa_send_reset(struct ctlr_info * h,struct hpsa_scsi_dev_t * dev,u8 reset_type,int reply_queue)3079*4882a593Smuzhiyun static int hpsa_send_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
3080*4882a593Smuzhiyun 	u8 reset_type, int reply_queue)
3081*4882a593Smuzhiyun {
3082*4882a593Smuzhiyun 	int rc = IO_OK;
3083*4882a593Smuzhiyun 	struct CommandList *c;
3084*4882a593Smuzhiyun 	struct ErrorInfo *ei;
3085*4882a593Smuzhiyun 
3086*4882a593Smuzhiyun 	c = cmd_alloc(h);
3087*4882a593Smuzhiyun 	c->device = dev;
3088*4882a593Smuzhiyun 
3089*4882a593Smuzhiyun 	/* fill_cmd can't fail here, no data buffer to map. */
3090*4882a593Smuzhiyun 	(void) fill_cmd(c, reset_type, h, NULL, 0, 0, dev->scsi3addr, TYPE_MSG);
3091*4882a593Smuzhiyun 	rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
3092*4882a593Smuzhiyun 	if (rc) {
3093*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev, "Failed to send reset command\n");
3094*4882a593Smuzhiyun 		goto out;
3095*4882a593Smuzhiyun 	}
3096*4882a593Smuzhiyun 	/* no unmap needed here because no data xfer. */
3097*4882a593Smuzhiyun 
3098*4882a593Smuzhiyun 	ei = c->err_info;
3099*4882a593Smuzhiyun 	if (ei->CommandStatus != 0) {
3100*4882a593Smuzhiyun 		hpsa_scsi_interpret_error(h, c);
3101*4882a593Smuzhiyun 		rc = -1;
3102*4882a593Smuzhiyun 	}
3103*4882a593Smuzhiyun out:
3104*4882a593Smuzhiyun 	cmd_free(h, c);
3105*4882a593Smuzhiyun 	return rc;
3106*4882a593Smuzhiyun }
3107*4882a593Smuzhiyun 
hpsa_cmd_dev_match(struct ctlr_info * h,struct CommandList * c,struct hpsa_scsi_dev_t * dev,unsigned char * scsi3addr)3108*4882a593Smuzhiyun static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
3109*4882a593Smuzhiyun 			       struct hpsa_scsi_dev_t *dev,
3110*4882a593Smuzhiyun 			       unsigned char *scsi3addr)
3111*4882a593Smuzhiyun {
3112*4882a593Smuzhiyun 	int i;
3113*4882a593Smuzhiyun 	bool match = false;
3114*4882a593Smuzhiyun 	struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
3115*4882a593Smuzhiyun 	struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
3116*4882a593Smuzhiyun 
3117*4882a593Smuzhiyun 	if (hpsa_is_cmd_idle(c))
3118*4882a593Smuzhiyun 		return false;
3119*4882a593Smuzhiyun 
3120*4882a593Smuzhiyun 	switch (c->cmd_type) {
3121*4882a593Smuzhiyun 	case CMD_SCSI:
3122*4882a593Smuzhiyun 	case CMD_IOCTL_PEND:
3123*4882a593Smuzhiyun 		match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes,
3124*4882a593Smuzhiyun 				sizeof(c->Header.LUN.LunAddrBytes));
3125*4882a593Smuzhiyun 		break;
3126*4882a593Smuzhiyun 
3127*4882a593Smuzhiyun 	case CMD_IOACCEL1:
3128*4882a593Smuzhiyun 	case CMD_IOACCEL2:
3129*4882a593Smuzhiyun 		if (c->phys_disk == dev) {
3130*4882a593Smuzhiyun 			/* HBA mode match */
3131*4882a593Smuzhiyun 			match = true;
3132*4882a593Smuzhiyun 		} else {
3133*4882a593Smuzhiyun 			/* Possible RAID mode -- check each phys dev. */
3134*4882a593Smuzhiyun 			/* FIXME:  Do we need to take out a lock here?  If
3135*4882a593Smuzhiyun 			 * so, we could just call hpsa_get_pdisk_of_ioaccel2()
3136*4882a593Smuzhiyun 			 * instead. */
3137*4882a593Smuzhiyun 			for (i = 0; i < dev->nphysical_disks && !match; i++) {
3138*4882a593Smuzhiyun 				/* FIXME: an alternate test might be
3139*4882a593Smuzhiyun 				 *
3140*4882a593Smuzhiyun 				 * match = dev->phys_disk[i]->ioaccel_handle
3141*4882a593Smuzhiyun 				 *              == c2->scsi_nexus;      */
3142*4882a593Smuzhiyun 				match = dev->phys_disk[i] == c->phys_disk;
3143*4882a593Smuzhiyun 			}
3144*4882a593Smuzhiyun 		}
3145*4882a593Smuzhiyun 		break;
3146*4882a593Smuzhiyun 
3147*4882a593Smuzhiyun 	case IOACCEL2_TMF:
3148*4882a593Smuzhiyun 		for (i = 0; i < dev->nphysical_disks && !match; i++) {
3149*4882a593Smuzhiyun 			match = dev->phys_disk[i]->ioaccel_handle ==
3150*4882a593Smuzhiyun 					le32_to_cpu(ac->it_nexus);
3151*4882a593Smuzhiyun 		}
3152*4882a593Smuzhiyun 		break;
3153*4882a593Smuzhiyun 
3154*4882a593Smuzhiyun 	case 0:		/* The command is in the middle of being initialized. */
3155*4882a593Smuzhiyun 		match = false;
3156*4882a593Smuzhiyun 		break;
3157*4882a593Smuzhiyun 
3158*4882a593Smuzhiyun 	default:
3159*4882a593Smuzhiyun 		dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n",
3160*4882a593Smuzhiyun 			c->cmd_type);
3161*4882a593Smuzhiyun 		BUG();
3162*4882a593Smuzhiyun 	}
3163*4882a593Smuzhiyun 
3164*4882a593Smuzhiyun 	return match;
3165*4882a593Smuzhiyun }
3166*4882a593Smuzhiyun 
hpsa_do_reset(struct ctlr_info * h,struct hpsa_scsi_dev_t * dev,u8 reset_type,int reply_queue)3167*4882a593Smuzhiyun static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
3168*4882a593Smuzhiyun 	u8 reset_type, int reply_queue)
3169*4882a593Smuzhiyun {
3170*4882a593Smuzhiyun 	int rc = 0;
3171*4882a593Smuzhiyun 
3172*4882a593Smuzhiyun 	/* We can really only handle one reset at a time */
3173*4882a593Smuzhiyun 	if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) {
3174*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n");
3175*4882a593Smuzhiyun 		return -EINTR;
3176*4882a593Smuzhiyun 	}
3177*4882a593Smuzhiyun 
3178*4882a593Smuzhiyun 	rc = hpsa_send_reset(h, dev, reset_type, reply_queue);
3179*4882a593Smuzhiyun 	if (!rc) {
3180*4882a593Smuzhiyun 		/* incremented by sending the reset request */
3181*4882a593Smuzhiyun 		atomic_dec(&dev->commands_outstanding);
3182*4882a593Smuzhiyun 		wait_event(h->event_sync_wait_queue,
3183*4882a593Smuzhiyun 			atomic_read(&dev->commands_outstanding) <= 0 ||
3184*4882a593Smuzhiyun 			lockup_detected(h));
3185*4882a593Smuzhiyun 	}
3186*4882a593Smuzhiyun 
3187*4882a593Smuzhiyun 	if (unlikely(lockup_detected(h))) {
3188*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev,
3189*4882a593Smuzhiyun 			 "Controller lockup detected during reset wait\n");
3190*4882a593Smuzhiyun 		rc = -ENODEV;
3191*4882a593Smuzhiyun 	}
3192*4882a593Smuzhiyun 
3193*4882a593Smuzhiyun 	if (!rc)
3194*4882a593Smuzhiyun 		rc = wait_for_device_to_become_ready(h, dev->scsi3addr, 0);
3195*4882a593Smuzhiyun 
3196*4882a593Smuzhiyun 	mutex_unlock(&h->reset_mutex);
3197*4882a593Smuzhiyun 	return rc;
3198*4882a593Smuzhiyun }
3199*4882a593Smuzhiyun 
hpsa_get_raid_level(struct ctlr_info * h,unsigned char * scsi3addr,unsigned char * raid_level)3200*4882a593Smuzhiyun static void hpsa_get_raid_level(struct ctlr_info *h,
3201*4882a593Smuzhiyun 	unsigned char *scsi3addr, unsigned char *raid_level)
3202*4882a593Smuzhiyun {
3203*4882a593Smuzhiyun 	int rc;
3204*4882a593Smuzhiyun 	unsigned char *buf;
3205*4882a593Smuzhiyun 
3206*4882a593Smuzhiyun 	*raid_level = RAID_UNKNOWN;
3207*4882a593Smuzhiyun 	buf = kzalloc(64, GFP_KERNEL);
3208*4882a593Smuzhiyun 	if (!buf)
3209*4882a593Smuzhiyun 		return;
3210*4882a593Smuzhiyun 
3211*4882a593Smuzhiyun 	if (!hpsa_vpd_page_supported(h, scsi3addr,
3212*4882a593Smuzhiyun 		HPSA_VPD_LV_DEVICE_GEOMETRY))
3213*4882a593Smuzhiyun 		goto exit;
3214*4882a593Smuzhiyun 
3215*4882a593Smuzhiyun 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3216*4882a593Smuzhiyun 		HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64);
3217*4882a593Smuzhiyun 
3218*4882a593Smuzhiyun 	if (rc == 0)
3219*4882a593Smuzhiyun 		*raid_level = buf[8];
3220*4882a593Smuzhiyun 	if (*raid_level > RAID_UNKNOWN)
3221*4882a593Smuzhiyun 		*raid_level = RAID_UNKNOWN;
3222*4882a593Smuzhiyun exit:
3223*4882a593Smuzhiyun 	kfree(buf);
3224*4882a593Smuzhiyun 	return;
3225*4882a593Smuzhiyun }
3226*4882a593Smuzhiyun 
3227*4882a593Smuzhiyun #define HPSA_MAP_DEBUG
3228*4882a593Smuzhiyun #ifdef HPSA_MAP_DEBUG
hpsa_debug_map_buff(struct ctlr_info * h,int rc,struct raid_map_data * map_buff)3229*4882a593Smuzhiyun static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
3230*4882a593Smuzhiyun 				struct raid_map_data *map_buff)
3231*4882a593Smuzhiyun {
3232*4882a593Smuzhiyun 	struct raid_map_disk_data *dd = &map_buff->data[0];
3233*4882a593Smuzhiyun 	int map, row, col;
3234*4882a593Smuzhiyun 	u16 map_cnt, row_cnt, disks_per_row;
3235*4882a593Smuzhiyun 
3236*4882a593Smuzhiyun 	if (rc != 0)
3237*4882a593Smuzhiyun 		return;
3238*4882a593Smuzhiyun 
3239*4882a593Smuzhiyun 	/* Show details only if debugging has been activated. */
3240*4882a593Smuzhiyun 	if (h->raid_offload_debug < 2)
3241*4882a593Smuzhiyun 		return;
3242*4882a593Smuzhiyun 
3243*4882a593Smuzhiyun 	dev_info(&h->pdev->dev, "structure_size = %u\n",
3244*4882a593Smuzhiyun 				le32_to_cpu(map_buff->structure_size));
3245*4882a593Smuzhiyun 	dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
3246*4882a593Smuzhiyun 			le32_to_cpu(map_buff->volume_blk_size));
3247*4882a593Smuzhiyun 	dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
3248*4882a593Smuzhiyun 			le64_to_cpu(map_buff->volume_blk_cnt));
3249*4882a593Smuzhiyun 	dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
3250*4882a593Smuzhiyun 			map_buff->phys_blk_shift);
3251*4882a593Smuzhiyun 	dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
3252*4882a593Smuzhiyun 			map_buff->parity_rotation_shift);
3253*4882a593Smuzhiyun 	dev_info(&h->pdev->dev, "strip_size = %u\n",
3254*4882a593Smuzhiyun 			le16_to_cpu(map_buff->strip_size));
3255*4882a593Smuzhiyun 	dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
3256*4882a593Smuzhiyun 			le64_to_cpu(map_buff->disk_starting_blk));
3257*4882a593Smuzhiyun 	dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
3258*4882a593Smuzhiyun 			le64_to_cpu(map_buff->disk_blk_cnt));
3259*4882a593Smuzhiyun 	dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
3260*4882a593Smuzhiyun 			le16_to_cpu(map_buff->data_disks_per_row));
3261*4882a593Smuzhiyun 	dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
3262*4882a593Smuzhiyun 			le16_to_cpu(map_buff->metadata_disks_per_row));
3263*4882a593Smuzhiyun 	dev_info(&h->pdev->dev, "row_cnt = %u\n",
3264*4882a593Smuzhiyun 			le16_to_cpu(map_buff->row_cnt));
3265*4882a593Smuzhiyun 	dev_info(&h->pdev->dev, "layout_map_count = %u\n",
3266*4882a593Smuzhiyun 			le16_to_cpu(map_buff->layout_map_count));
3267*4882a593Smuzhiyun 	dev_info(&h->pdev->dev, "flags = 0x%x\n",
3268*4882a593Smuzhiyun 			le16_to_cpu(map_buff->flags));
3269*4882a593Smuzhiyun 	dev_info(&h->pdev->dev, "encryption = %s\n",
3270*4882a593Smuzhiyun 			le16_to_cpu(map_buff->flags) &
3271*4882a593Smuzhiyun 			RAID_MAP_FLAG_ENCRYPT_ON ?  "ON" : "OFF");
3272*4882a593Smuzhiyun 	dev_info(&h->pdev->dev, "dekindex = %u\n",
3273*4882a593Smuzhiyun 			le16_to_cpu(map_buff->dekindex));
3274*4882a593Smuzhiyun 	map_cnt = le16_to_cpu(map_buff->layout_map_count);
3275*4882a593Smuzhiyun 	for (map = 0; map < map_cnt; map++) {
3276*4882a593Smuzhiyun 		dev_info(&h->pdev->dev, "Map%u:\n", map);
3277*4882a593Smuzhiyun 		row_cnt = le16_to_cpu(map_buff->row_cnt);
3278*4882a593Smuzhiyun 		for (row = 0; row < row_cnt; row++) {
3279*4882a593Smuzhiyun 			dev_info(&h->pdev->dev, "  Row%u:\n", row);
3280*4882a593Smuzhiyun 			disks_per_row =
3281*4882a593Smuzhiyun 				le16_to_cpu(map_buff->data_disks_per_row);
3282*4882a593Smuzhiyun 			for (col = 0; col < disks_per_row; col++, dd++)
3283*4882a593Smuzhiyun 				dev_info(&h->pdev->dev,
3284*4882a593Smuzhiyun 					"    D%02u: h=0x%04x xor=%u,%u\n",
3285*4882a593Smuzhiyun 					col, dd->ioaccel_handle,
3286*4882a593Smuzhiyun 					dd->xor_mult[0], dd->xor_mult[1]);
3287*4882a593Smuzhiyun 			disks_per_row =
3288*4882a593Smuzhiyun 				le16_to_cpu(map_buff->metadata_disks_per_row);
3289*4882a593Smuzhiyun 			for (col = 0; col < disks_per_row; col++, dd++)
3290*4882a593Smuzhiyun 				dev_info(&h->pdev->dev,
3291*4882a593Smuzhiyun 					"    M%02u: h=0x%04x xor=%u,%u\n",
3292*4882a593Smuzhiyun 					col, dd->ioaccel_handle,
3293*4882a593Smuzhiyun 					dd->xor_mult[0], dd->xor_mult[1]);
3294*4882a593Smuzhiyun 		}
3295*4882a593Smuzhiyun 	}
3296*4882a593Smuzhiyun }
3297*4882a593Smuzhiyun #else
hpsa_debug_map_buff(struct ctlr_info * h,int rc,struct raid_map_data * map_buff)3298*4882a593Smuzhiyun static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
3299*4882a593Smuzhiyun 			__attribute__((unused)) int rc,
3300*4882a593Smuzhiyun 			__attribute__((unused)) struct raid_map_data *map_buff)
3301*4882a593Smuzhiyun {
3302*4882a593Smuzhiyun }
3303*4882a593Smuzhiyun #endif
3304*4882a593Smuzhiyun 
hpsa_get_raid_map(struct ctlr_info * h,unsigned char * scsi3addr,struct hpsa_scsi_dev_t * this_device)3305*4882a593Smuzhiyun static int hpsa_get_raid_map(struct ctlr_info *h,
3306*4882a593Smuzhiyun 	unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3307*4882a593Smuzhiyun {
3308*4882a593Smuzhiyun 	int rc = 0;
3309*4882a593Smuzhiyun 	struct CommandList *c;
3310*4882a593Smuzhiyun 	struct ErrorInfo *ei;
3311*4882a593Smuzhiyun 
3312*4882a593Smuzhiyun 	c = cmd_alloc(h);
3313*4882a593Smuzhiyun 
3314*4882a593Smuzhiyun 	if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
3315*4882a593Smuzhiyun 			sizeof(this_device->raid_map), 0,
3316*4882a593Smuzhiyun 			scsi3addr, TYPE_CMD)) {
3317*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n");
3318*4882a593Smuzhiyun 		cmd_free(h, c);
3319*4882a593Smuzhiyun 		return -1;
3320*4882a593Smuzhiyun 	}
3321*4882a593Smuzhiyun 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3322*4882a593Smuzhiyun 			NO_TIMEOUT);
3323*4882a593Smuzhiyun 	if (rc)
3324*4882a593Smuzhiyun 		goto out;
3325*4882a593Smuzhiyun 	ei = c->err_info;
3326*4882a593Smuzhiyun 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3327*4882a593Smuzhiyun 		hpsa_scsi_interpret_error(h, c);
3328*4882a593Smuzhiyun 		rc = -1;
3329*4882a593Smuzhiyun 		goto out;
3330*4882a593Smuzhiyun 	}
3331*4882a593Smuzhiyun 	cmd_free(h, c);
3332*4882a593Smuzhiyun 
3333*4882a593Smuzhiyun 	/* @todo in the future, dynamically allocate RAID map memory */
3334*4882a593Smuzhiyun 	if (le32_to_cpu(this_device->raid_map.structure_size) >
3335*4882a593Smuzhiyun 				sizeof(this_device->raid_map)) {
3336*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
3337*4882a593Smuzhiyun 		rc = -1;
3338*4882a593Smuzhiyun 	}
3339*4882a593Smuzhiyun 	hpsa_debug_map_buff(h, rc, &this_device->raid_map);
3340*4882a593Smuzhiyun 	return rc;
3341*4882a593Smuzhiyun out:
3342*4882a593Smuzhiyun 	cmd_free(h, c);
3343*4882a593Smuzhiyun 	return rc;
3344*4882a593Smuzhiyun }
3345*4882a593Smuzhiyun 
hpsa_bmic_sense_subsystem_information(struct ctlr_info * h,unsigned char scsi3addr[],u16 bmic_device_index,struct bmic_sense_subsystem_info * buf,size_t bufsize)3346*4882a593Smuzhiyun static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h,
3347*4882a593Smuzhiyun 		unsigned char scsi3addr[], u16 bmic_device_index,
3348*4882a593Smuzhiyun 		struct bmic_sense_subsystem_info *buf, size_t bufsize)
3349*4882a593Smuzhiyun {
3350*4882a593Smuzhiyun 	int rc = IO_OK;
3351*4882a593Smuzhiyun 	struct CommandList *c;
3352*4882a593Smuzhiyun 	struct ErrorInfo *ei;
3353*4882a593Smuzhiyun 
3354*4882a593Smuzhiyun 	c = cmd_alloc(h);
3355*4882a593Smuzhiyun 
3356*4882a593Smuzhiyun 	rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize,
3357*4882a593Smuzhiyun 		0, RAID_CTLR_LUNID, TYPE_CMD);
3358*4882a593Smuzhiyun 	if (rc)
3359*4882a593Smuzhiyun 		goto out;
3360*4882a593Smuzhiyun 
3361*4882a593Smuzhiyun 	c->Request.CDB[2] = bmic_device_index & 0xff;
3362*4882a593Smuzhiyun 	c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3363*4882a593Smuzhiyun 
3364*4882a593Smuzhiyun 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3365*4882a593Smuzhiyun 			NO_TIMEOUT);
3366*4882a593Smuzhiyun 	if (rc)
3367*4882a593Smuzhiyun 		goto out;
3368*4882a593Smuzhiyun 	ei = c->err_info;
3369*4882a593Smuzhiyun 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3370*4882a593Smuzhiyun 		hpsa_scsi_interpret_error(h, c);
3371*4882a593Smuzhiyun 		rc = -1;
3372*4882a593Smuzhiyun 	}
3373*4882a593Smuzhiyun out:
3374*4882a593Smuzhiyun 	cmd_free(h, c);
3375*4882a593Smuzhiyun 	return rc;
3376*4882a593Smuzhiyun }
3377*4882a593Smuzhiyun 
hpsa_bmic_id_controller(struct ctlr_info * h,struct bmic_identify_controller * buf,size_t bufsize)3378*4882a593Smuzhiyun static int hpsa_bmic_id_controller(struct ctlr_info *h,
3379*4882a593Smuzhiyun 	struct bmic_identify_controller *buf, size_t bufsize)
3380*4882a593Smuzhiyun {
3381*4882a593Smuzhiyun 	int rc = IO_OK;
3382*4882a593Smuzhiyun 	struct CommandList *c;
3383*4882a593Smuzhiyun 	struct ErrorInfo *ei;
3384*4882a593Smuzhiyun 
3385*4882a593Smuzhiyun 	c = cmd_alloc(h);
3386*4882a593Smuzhiyun 
3387*4882a593Smuzhiyun 	rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize,
3388*4882a593Smuzhiyun 		0, RAID_CTLR_LUNID, TYPE_CMD);
3389*4882a593Smuzhiyun 	if (rc)
3390*4882a593Smuzhiyun 		goto out;
3391*4882a593Smuzhiyun 
3392*4882a593Smuzhiyun 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3393*4882a593Smuzhiyun 			NO_TIMEOUT);
3394*4882a593Smuzhiyun 	if (rc)
3395*4882a593Smuzhiyun 		goto out;
3396*4882a593Smuzhiyun 	ei = c->err_info;
3397*4882a593Smuzhiyun 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3398*4882a593Smuzhiyun 		hpsa_scsi_interpret_error(h, c);
3399*4882a593Smuzhiyun 		rc = -1;
3400*4882a593Smuzhiyun 	}
3401*4882a593Smuzhiyun out:
3402*4882a593Smuzhiyun 	cmd_free(h, c);
3403*4882a593Smuzhiyun 	return rc;
3404*4882a593Smuzhiyun }
3405*4882a593Smuzhiyun 
hpsa_bmic_id_physical_device(struct ctlr_info * h,unsigned char scsi3addr[],u16 bmic_device_index,struct bmic_identify_physical_device * buf,size_t bufsize)3406*4882a593Smuzhiyun static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
3407*4882a593Smuzhiyun 		unsigned char scsi3addr[], u16 bmic_device_index,
3408*4882a593Smuzhiyun 		struct bmic_identify_physical_device *buf, size_t bufsize)
3409*4882a593Smuzhiyun {
3410*4882a593Smuzhiyun 	int rc = IO_OK;
3411*4882a593Smuzhiyun 	struct CommandList *c;
3412*4882a593Smuzhiyun 	struct ErrorInfo *ei;
3413*4882a593Smuzhiyun 
3414*4882a593Smuzhiyun 	c = cmd_alloc(h);
3415*4882a593Smuzhiyun 	rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
3416*4882a593Smuzhiyun 		0, RAID_CTLR_LUNID, TYPE_CMD);
3417*4882a593Smuzhiyun 	if (rc)
3418*4882a593Smuzhiyun 		goto out;
3419*4882a593Smuzhiyun 
3420*4882a593Smuzhiyun 	c->Request.CDB[2] = bmic_device_index & 0xff;
3421*4882a593Smuzhiyun 	c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3422*4882a593Smuzhiyun 
3423*4882a593Smuzhiyun 	hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3424*4882a593Smuzhiyun 						NO_TIMEOUT);
3425*4882a593Smuzhiyun 	ei = c->err_info;
3426*4882a593Smuzhiyun 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3427*4882a593Smuzhiyun 		hpsa_scsi_interpret_error(h, c);
3428*4882a593Smuzhiyun 		rc = -1;
3429*4882a593Smuzhiyun 	}
3430*4882a593Smuzhiyun out:
3431*4882a593Smuzhiyun 	cmd_free(h, c);
3432*4882a593Smuzhiyun 
3433*4882a593Smuzhiyun 	return rc;
3434*4882a593Smuzhiyun }
3435*4882a593Smuzhiyun 
3436*4882a593Smuzhiyun /*
3437*4882a593Smuzhiyun  * get enclosure information
3438*4882a593Smuzhiyun  * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number
3439*4882a593Smuzhiyun  * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure
3440*4882a593Smuzhiyun  * Uses id_physical_device to determine the box_index.
3441*4882a593Smuzhiyun  */
hpsa_get_enclosure_info(struct ctlr_info * h,unsigned char * scsi3addr,struct ReportExtendedLUNdata * rlep,int rle_index,struct hpsa_scsi_dev_t * encl_dev)3442*4882a593Smuzhiyun static void hpsa_get_enclosure_info(struct ctlr_info *h,
3443*4882a593Smuzhiyun 			unsigned char *scsi3addr,
3444*4882a593Smuzhiyun 			struct ReportExtendedLUNdata *rlep, int rle_index,
3445*4882a593Smuzhiyun 			struct hpsa_scsi_dev_t *encl_dev)
3446*4882a593Smuzhiyun {
3447*4882a593Smuzhiyun 	int rc = -1;
3448*4882a593Smuzhiyun 	struct CommandList *c = NULL;
3449*4882a593Smuzhiyun 	struct ErrorInfo *ei = NULL;
3450*4882a593Smuzhiyun 	struct bmic_sense_storage_box_params *bssbp = NULL;
3451*4882a593Smuzhiyun 	struct bmic_identify_physical_device *id_phys = NULL;
3452*4882a593Smuzhiyun 	struct ext_report_lun_entry *rle;
3453*4882a593Smuzhiyun 	u16 bmic_device_index = 0;
3454*4882a593Smuzhiyun 
3455*4882a593Smuzhiyun 	if (rle_index < 0 || rle_index >= HPSA_MAX_PHYS_LUN)
3456*4882a593Smuzhiyun 		return;
3457*4882a593Smuzhiyun 
3458*4882a593Smuzhiyun 	rle = &rlep->LUN[rle_index];
3459*4882a593Smuzhiyun 
3460*4882a593Smuzhiyun 	encl_dev->eli =
3461*4882a593Smuzhiyun 		hpsa_get_enclosure_logical_identifier(h, scsi3addr);
3462*4882a593Smuzhiyun 
3463*4882a593Smuzhiyun 	bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]);
3464*4882a593Smuzhiyun 
3465*4882a593Smuzhiyun 	if (encl_dev->target == -1 || encl_dev->lun == -1) {
3466*4882a593Smuzhiyun 		rc = IO_OK;
3467*4882a593Smuzhiyun 		goto out;
3468*4882a593Smuzhiyun 	}
3469*4882a593Smuzhiyun 
3470*4882a593Smuzhiyun 	if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) {
3471*4882a593Smuzhiyun 		rc = IO_OK;
3472*4882a593Smuzhiyun 		goto out;
3473*4882a593Smuzhiyun 	}
3474*4882a593Smuzhiyun 
3475*4882a593Smuzhiyun 	bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL);
3476*4882a593Smuzhiyun 	if (!bssbp)
3477*4882a593Smuzhiyun 		goto out;
3478*4882a593Smuzhiyun 
3479*4882a593Smuzhiyun 	id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3480*4882a593Smuzhiyun 	if (!id_phys)
3481*4882a593Smuzhiyun 		goto out;
3482*4882a593Smuzhiyun 
3483*4882a593Smuzhiyun 	rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index,
3484*4882a593Smuzhiyun 						id_phys, sizeof(*id_phys));
3485*4882a593Smuzhiyun 	if (rc) {
3486*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n",
3487*4882a593Smuzhiyun 			__func__, encl_dev->external, bmic_device_index);
3488*4882a593Smuzhiyun 		goto out;
3489*4882a593Smuzhiyun 	}
3490*4882a593Smuzhiyun 
3491*4882a593Smuzhiyun 	c = cmd_alloc(h);
3492*4882a593Smuzhiyun 
3493*4882a593Smuzhiyun 	rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp,
3494*4882a593Smuzhiyun 			sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD);
3495*4882a593Smuzhiyun 
3496*4882a593Smuzhiyun 	if (rc)
3497*4882a593Smuzhiyun 		goto out;
3498*4882a593Smuzhiyun 
3499*4882a593Smuzhiyun 	if (id_phys->phys_connector[1] == 'E')
3500*4882a593Smuzhiyun 		c->Request.CDB[5] = id_phys->box_index;
3501*4882a593Smuzhiyun 	else
3502*4882a593Smuzhiyun 		c->Request.CDB[5] = 0;
3503*4882a593Smuzhiyun 
3504*4882a593Smuzhiyun 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3505*4882a593Smuzhiyun 						NO_TIMEOUT);
3506*4882a593Smuzhiyun 	if (rc)
3507*4882a593Smuzhiyun 		goto out;
3508*4882a593Smuzhiyun 
3509*4882a593Smuzhiyun 	ei = c->err_info;
3510*4882a593Smuzhiyun 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3511*4882a593Smuzhiyun 		rc = -1;
3512*4882a593Smuzhiyun 		goto out;
3513*4882a593Smuzhiyun 	}
3514*4882a593Smuzhiyun 
3515*4882a593Smuzhiyun 	encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port;
3516*4882a593Smuzhiyun 	memcpy(&encl_dev->phys_connector[id_phys->active_path_number],
3517*4882a593Smuzhiyun 		bssbp->phys_connector, sizeof(bssbp->phys_connector));
3518*4882a593Smuzhiyun 
3519*4882a593Smuzhiyun 	rc = IO_OK;
3520*4882a593Smuzhiyun out:
3521*4882a593Smuzhiyun 	kfree(bssbp);
3522*4882a593Smuzhiyun 	kfree(id_phys);
3523*4882a593Smuzhiyun 
3524*4882a593Smuzhiyun 	if (c)
3525*4882a593Smuzhiyun 		cmd_free(h, c);
3526*4882a593Smuzhiyun 
3527*4882a593Smuzhiyun 	if (rc != IO_OK)
3528*4882a593Smuzhiyun 		hpsa_show_dev_msg(KERN_INFO, h, encl_dev,
3529*4882a593Smuzhiyun 			"Error, could not get enclosure information");
3530*4882a593Smuzhiyun }
3531*4882a593Smuzhiyun 
hpsa_get_sas_address_from_report_physical(struct ctlr_info * h,unsigned char * scsi3addr)3532*4882a593Smuzhiyun static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h,
3533*4882a593Smuzhiyun 						unsigned char *scsi3addr)
3534*4882a593Smuzhiyun {
3535*4882a593Smuzhiyun 	struct ReportExtendedLUNdata *physdev;
3536*4882a593Smuzhiyun 	u32 nphysicals;
3537*4882a593Smuzhiyun 	u64 sa = 0;
3538*4882a593Smuzhiyun 	int i;
3539*4882a593Smuzhiyun 
3540*4882a593Smuzhiyun 	physdev = kzalloc(sizeof(*physdev), GFP_KERNEL);
3541*4882a593Smuzhiyun 	if (!physdev)
3542*4882a593Smuzhiyun 		return 0;
3543*4882a593Smuzhiyun 
3544*4882a593Smuzhiyun 	if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3545*4882a593Smuzhiyun 		dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3546*4882a593Smuzhiyun 		kfree(physdev);
3547*4882a593Smuzhiyun 		return 0;
3548*4882a593Smuzhiyun 	}
3549*4882a593Smuzhiyun 	nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24;
3550*4882a593Smuzhiyun 
3551*4882a593Smuzhiyun 	for (i = 0; i < nphysicals; i++)
3552*4882a593Smuzhiyun 		if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) {
3553*4882a593Smuzhiyun 			sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]);
3554*4882a593Smuzhiyun 			break;
3555*4882a593Smuzhiyun 		}
3556*4882a593Smuzhiyun 
3557*4882a593Smuzhiyun 	kfree(physdev);
3558*4882a593Smuzhiyun 
3559*4882a593Smuzhiyun 	return sa;
3560*4882a593Smuzhiyun }
3561*4882a593Smuzhiyun 
hpsa_get_sas_address(struct ctlr_info * h,unsigned char * scsi3addr,struct hpsa_scsi_dev_t * dev)3562*4882a593Smuzhiyun static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr,
3563*4882a593Smuzhiyun 					struct hpsa_scsi_dev_t *dev)
3564*4882a593Smuzhiyun {
3565*4882a593Smuzhiyun 	int rc;
3566*4882a593Smuzhiyun 	u64 sa = 0;
3567*4882a593Smuzhiyun 
3568*4882a593Smuzhiyun 	if (is_hba_lunid(scsi3addr)) {
3569*4882a593Smuzhiyun 		struct bmic_sense_subsystem_info *ssi;
3570*4882a593Smuzhiyun 
3571*4882a593Smuzhiyun 		ssi = kzalloc(sizeof(*ssi), GFP_KERNEL);
3572*4882a593Smuzhiyun 		if (!ssi)
3573*4882a593Smuzhiyun 			return;
3574*4882a593Smuzhiyun 
3575*4882a593Smuzhiyun 		rc = hpsa_bmic_sense_subsystem_information(h,
3576*4882a593Smuzhiyun 					scsi3addr, 0, ssi, sizeof(*ssi));
3577*4882a593Smuzhiyun 		if (rc == 0) {
3578*4882a593Smuzhiyun 			sa = get_unaligned_be64(ssi->primary_world_wide_id);
3579*4882a593Smuzhiyun 			h->sas_address = sa;
3580*4882a593Smuzhiyun 		}
3581*4882a593Smuzhiyun 
3582*4882a593Smuzhiyun 		kfree(ssi);
3583*4882a593Smuzhiyun 	} else
3584*4882a593Smuzhiyun 		sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr);
3585*4882a593Smuzhiyun 
3586*4882a593Smuzhiyun 	dev->sas_address = sa;
3587*4882a593Smuzhiyun }
3588*4882a593Smuzhiyun 
hpsa_ext_ctrl_present(struct ctlr_info * h,struct ReportExtendedLUNdata * physdev)3589*4882a593Smuzhiyun static void hpsa_ext_ctrl_present(struct ctlr_info *h,
3590*4882a593Smuzhiyun 	struct ReportExtendedLUNdata *physdev)
3591*4882a593Smuzhiyun {
3592*4882a593Smuzhiyun 	u32 nphysicals;
3593*4882a593Smuzhiyun 	int i;
3594*4882a593Smuzhiyun 
3595*4882a593Smuzhiyun 	if (h->discovery_polling)
3596*4882a593Smuzhiyun 		return;
3597*4882a593Smuzhiyun 
3598*4882a593Smuzhiyun 	nphysicals = (get_unaligned_be32(physdev->LUNListLength) / 24) + 1;
3599*4882a593Smuzhiyun 
3600*4882a593Smuzhiyun 	for (i = 0; i < nphysicals; i++) {
3601*4882a593Smuzhiyun 		if (physdev->LUN[i].device_type ==
3602*4882a593Smuzhiyun 			BMIC_DEVICE_TYPE_CONTROLLER
3603*4882a593Smuzhiyun 			&& !is_hba_lunid(physdev->LUN[i].lunid)) {
3604*4882a593Smuzhiyun 			dev_info(&h->pdev->dev,
3605*4882a593Smuzhiyun 				"External controller present, activate discovery polling and disable rld caching\n");
3606*4882a593Smuzhiyun 			hpsa_disable_rld_caching(h);
3607*4882a593Smuzhiyun 			h->discovery_polling = 1;
3608*4882a593Smuzhiyun 			break;
3609*4882a593Smuzhiyun 		}
3610*4882a593Smuzhiyun 	}
3611*4882a593Smuzhiyun }
3612*4882a593Smuzhiyun 
3613*4882a593Smuzhiyun /* Get a device id from inquiry page 0x83 */
hpsa_vpd_page_supported(struct ctlr_info * h,unsigned char scsi3addr[],u8 page)3614*4882a593Smuzhiyun static bool hpsa_vpd_page_supported(struct ctlr_info *h,
3615*4882a593Smuzhiyun 	unsigned char scsi3addr[], u8 page)
3616*4882a593Smuzhiyun {
3617*4882a593Smuzhiyun 	int rc;
3618*4882a593Smuzhiyun 	int i;
3619*4882a593Smuzhiyun 	int pages;
3620*4882a593Smuzhiyun 	unsigned char *buf, bufsize;
3621*4882a593Smuzhiyun 
3622*4882a593Smuzhiyun 	buf = kzalloc(256, GFP_KERNEL);
3623*4882a593Smuzhiyun 	if (!buf)
3624*4882a593Smuzhiyun 		return false;
3625*4882a593Smuzhiyun 
3626*4882a593Smuzhiyun 	/* Get the size of the page list first */
3627*4882a593Smuzhiyun 	rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3628*4882a593Smuzhiyun 				VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3629*4882a593Smuzhiyun 				buf, HPSA_VPD_HEADER_SZ);
3630*4882a593Smuzhiyun 	if (rc != 0)
3631*4882a593Smuzhiyun 		goto exit_unsupported;
3632*4882a593Smuzhiyun 	pages = buf[3];
3633*4882a593Smuzhiyun 	if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
3634*4882a593Smuzhiyun 		bufsize = pages + HPSA_VPD_HEADER_SZ;
3635*4882a593Smuzhiyun 	else
3636*4882a593Smuzhiyun 		bufsize = 255;
3637*4882a593Smuzhiyun 
3638*4882a593Smuzhiyun 	/* Get the whole VPD page list */
3639*4882a593Smuzhiyun 	rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3640*4882a593Smuzhiyun 				VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3641*4882a593Smuzhiyun 				buf, bufsize);
3642*4882a593Smuzhiyun 	if (rc != 0)
3643*4882a593Smuzhiyun 		goto exit_unsupported;
3644*4882a593Smuzhiyun 
3645*4882a593Smuzhiyun 	pages = buf[3];
3646*4882a593Smuzhiyun 	for (i = 1; i <= pages; i++)
3647*4882a593Smuzhiyun 		if (buf[3 + i] == page)
3648*4882a593Smuzhiyun 			goto exit_supported;
3649*4882a593Smuzhiyun exit_unsupported:
3650*4882a593Smuzhiyun 	kfree(buf);
3651*4882a593Smuzhiyun 	return false;
3652*4882a593Smuzhiyun exit_supported:
3653*4882a593Smuzhiyun 	kfree(buf);
3654*4882a593Smuzhiyun 	return true;
3655*4882a593Smuzhiyun }
3656*4882a593Smuzhiyun 
3657*4882a593Smuzhiyun /*
3658*4882a593Smuzhiyun  * Called during a scan operation.
3659*4882a593Smuzhiyun  * Sets ioaccel status on the new device list, not the existing device list
3660*4882a593Smuzhiyun  *
3661*4882a593Smuzhiyun  * The device list used during I/O will be updated later in
3662*4882a593Smuzhiyun  * adjust_hpsa_scsi_table.
3663*4882a593Smuzhiyun  */
hpsa_get_ioaccel_status(struct ctlr_info * h,unsigned char * scsi3addr,struct hpsa_scsi_dev_t * this_device)3664*4882a593Smuzhiyun static void hpsa_get_ioaccel_status(struct ctlr_info *h,
3665*4882a593Smuzhiyun 	unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3666*4882a593Smuzhiyun {
3667*4882a593Smuzhiyun 	int rc;
3668*4882a593Smuzhiyun 	unsigned char *buf;
3669*4882a593Smuzhiyun 	u8 ioaccel_status;
3670*4882a593Smuzhiyun 
3671*4882a593Smuzhiyun 	this_device->offload_config = 0;
3672*4882a593Smuzhiyun 	this_device->offload_enabled = 0;
3673*4882a593Smuzhiyun 	this_device->offload_to_be_enabled = 0;
3674*4882a593Smuzhiyun 
3675*4882a593Smuzhiyun 	buf = kzalloc(64, GFP_KERNEL);
3676*4882a593Smuzhiyun 	if (!buf)
3677*4882a593Smuzhiyun 		return;
3678*4882a593Smuzhiyun 	if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
3679*4882a593Smuzhiyun 		goto out;
3680*4882a593Smuzhiyun 	rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3681*4882a593Smuzhiyun 			VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
3682*4882a593Smuzhiyun 	if (rc != 0)
3683*4882a593Smuzhiyun 		goto out;
3684*4882a593Smuzhiyun 
3685*4882a593Smuzhiyun #define IOACCEL_STATUS_BYTE 4
3686*4882a593Smuzhiyun #define OFFLOAD_CONFIGURED_BIT 0x01
3687*4882a593Smuzhiyun #define OFFLOAD_ENABLED_BIT 0x02
3688*4882a593Smuzhiyun 	ioaccel_status = buf[IOACCEL_STATUS_BYTE];
3689*4882a593Smuzhiyun 	this_device->offload_config =
3690*4882a593Smuzhiyun 		!!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
3691*4882a593Smuzhiyun 	if (this_device->offload_config) {
3692*4882a593Smuzhiyun 		bool offload_enabled =
3693*4882a593Smuzhiyun 			!!(ioaccel_status & OFFLOAD_ENABLED_BIT);
3694*4882a593Smuzhiyun 		/*
3695*4882a593Smuzhiyun 		 * Check to see if offload can be enabled.
3696*4882a593Smuzhiyun 		 */
3697*4882a593Smuzhiyun 		if (offload_enabled) {
3698*4882a593Smuzhiyun 			rc = hpsa_get_raid_map(h, scsi3addr, this_device);
3699*4882a593Smuzhiyun 			if (rc) /* could not load raid_map */
3700*4882a593Smuzhiyun 				goto out;
3701*4882a593Smuzhiyun 			this_device->offload_to_be_enabled = 1;
3702*4882a593Smuzhiyun 		}
3703*4882a593Smuzhiyun 	}
3704*4882a593Smuzhiyun 
3705*4882a593Smuzhiyun out:
3706*4882a593Smuzhiyun 	kfree(buf);
3707*4882a593Smuzhiyun 	return;
3708*4882a593Smuzhiyun }
3709*4882a593Smuzhiyun 
3710*4882a593Smuzhiyun /* Get the device id from inquiry page 0x83 */
hpsa_get_device_id(struct ctlr_info * h,unsigned char * scsi3addr,unsigned char * device_id,int index,int buflen)3711*4882a593Smuzhiyun static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
3712*4882a593Smuzhiyun 	unsigned char *device_id, int index, int buflen)
3713*4882a593Smuzhiyun {
3714*4882a593Smuzhiyun 	int rc;
3715*4882a593Smuzhiyun 	unsigned char *buf;
3716*4882a593Smuzhiyun 
3717*4882a593Smuzhiyun 	/* Does controller have VPD for device id? */
3718*4882a593Smuzhiyun 	if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID))
3719*4882a593Smuzhiyun 		return 1; /* not supported */
3720*4882a593Smuzhiyun 
3721*4882a593Smuzhiyun 	buf = kzalloc(64, GFP_KERNEL);
3722*4882a593Smuzhiyun 	if (!buf)
3723*4882a593Smuzhiyun 		return -ENOMEM;
3724*4882a593Smuzhiyun 
3725*4882a593Smuzhiyun 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3726*4882a593Smuzhiyun 					HPSA_VPD_LV_DEVICE_ID, buf, 64);
3727*4882a593Smuzhiyun 	if (rc == 0) {
3728*4882a593Smuzhiyun 		if (buflen > 16)
3729*4882a593Smuzhiyun 			buflen = 16;
3730*4882a593Smuzhiyun 		memcpy(device_id, &buf[8], buflen);
3731*4882a593Smuzhiyun 	}
3732*4882a593Smuzhiyun 
3733*4882a593Smuzhiyun 	kfree(buf);
3734*4882a593Smuzhiyun 
3735*4882a593Smuzhiyun 	return rc; /*0 - got id,  otherwise, didn't */
3736*4882a593Smuzhiyun }
3737*4882a593Smuzhiyun 
hpsa_scsi_do_report_luns(struct ctlr_info * h,int logical,void * buf,int bufsize,int extended_response)3738*4882a593Smuzhiyun static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
3739*4882a593Smuzhiyun 		void *buf, int bufsize,
3740*4882a593Smuzhiyun 		int extended_response)
3741*4882a593Smuzhiyun {
3742*4882a593Smuzhiyun 	int rc = IO_OK;
3743*4882a593Smuzhiyun 	struct CommandList *c;
3744*4882a593Smuzhiyun 	unsigned char scsi3addr[8];
3745*4882a593Smuzhiyun 	struct ErrorInfo *ei;
3746*4882a593Smuzhiyun 
3747*4882a593Smuzhiyun 	c = cmd_alloc(h);
3748*4882a593Smuzhiyun 
3749*4882a593Smuzhiyun 	/* address the controller */
3750*4882a593Smuzhiyun 	memset(scsi3addr, 0, sizeof(scsi3addr));
3751*4882a593Smuzhiyun 	if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
3752*4882a593Smuzhiyun 		buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
3753*4882a593Smuzhiyun 		rc = -EAGAIN;
3754*4882a593Smuzhiyun 		goto out;
3755*4882a593Smuzhiyun 	}
3756*4882a593Smuzhiyun 	if (extended_response)
3757*4882a593Smuzhiyun 		c->Request.CDB[1] = extended_response;
3758*4882a593Smuzhiyun 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3759*4882a593Smuzhiyun 			NO_TIMEOUT);
3760*4882a593Smuzhiyun 	if (rc)
3761*4882a593Smuzhiyun 		goto out;
3762*4882a593Smuzhiyun 	ei = c->err_info;
3763*4882a593Smuzhiyun 	if (ei->CommandStatus != 0 &&
3764*4882a593Smuzhiyun 	    ei->CommandStatus != CMD_DATA_UNDERRUN) {
3765*4882a593Smuzhiyun 		hpsa_scsi_interpret_error(h, c);
3766*4882a593Smuzhiyun 		rc = -EIO;
3767*4882a593Smuzhiyun 	} else {
3768*4882a593Smuzhiyun 		struct ReportLUNdata *rld = buf;
3769*4882a593Smuzhiyun 
3770*4882a593Smuzhiyun 		if (rld->extended_response_flag != extended_response) {
3771*4882a593Smuzhiyun 			if (!h->legacy_board) {
3772*4882a593Smuzhiyun 				dev_err(&h->pdev->dev,
3773*4882a593Smuzhiyun 					"report luns requested format %u, got %u\n",
3774*4882a593Smuzhiyun 					extended_response,
3775*4882a593Smuzhiyun 					rld->extended_response_flag);
3776*4882a593Smuzhiyun 				rc = -EINVAL;
3777*4882a593Smuzhiyun 			} else
3778*4882a593Smuzhiyun 				rc = -EOPNOTSUPP;
3779*4882a593Smuzhiyun 		}
3780*4882a593Smuzhiyun 	}
3781*4882a593Smuzhiyun out:
3782*4882a593Smuzhiyun 	cmd_free(h, c);
3783*4882a593Smuzhiyun 	return rc;
3784*4882a593Smuzhiyun }
3785*4882a593Smuzhiyun 
hpsa_scsi_do_report_phys_luns(struct ctlr_info * h,struct ReportExtendedLUNdata * buf,int bufsize)3786*4882a593Smuzhiyun static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
3787*4882a593Smuzhiyun 		struct ReportExtendedLUNdata *buf, int bufsize)
3788*4882a593Smuzhiyun {
3789*4882a593Smuzhiyun 	int rc;
3790*4882a593Smuzhiyun 	struct ReportLUNdata *lbuf;
3791*4882a593Smuzhiyun 
3792*4882a593Smuzhiyun 	rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
3793*4882a593Smuzhiyun 				      HPSA_REPORT_PHYS_EXTENDED);
3794*4882a593Smuzhiyun 	if (!rc || rc != -EOPNOTSUPP)
3795*4882a593Smuzhiyun 		return rc;
3796*4882a593Smuzhiyun 
3797*4882a593Smuzhiyun 	/* REPORT PHYS EXTENDED is not supported */
3798*4882a593Smuzhiyun 	lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL);
3799*4882a593Smuzhiyun 	if (!lbuf)
3800*4882a593Smuzhiyun 		return -ENOMEM;
3801*4882a593Smuzhiyun 
3802*4882a593Smuzhiyun 	rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0);
3803*4882a593Smuzhiyun 	if (!rc) {
3804*4882a593Smuzhiyun 		int i;
3805*4882a593Smuzhiyun 		u32 nphys;
3806*4882a593Smuzhiyun 
3807*4882a593Smuzhiyun 		/* Copy ReportLUNdata header */
3808*4882a593Smuzhiyun 		memcpy(buf, lbuf, 8);
3809*4882a593Smuzhiyun 		nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8;
3810*4882a593Smuzhiyun 		for (i = 0; i < nphys; i++)
3811*4882a593Smuzhiyun 			memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8);
3812*4882a593Smuzhiyun 	}
3813*4882a593Smuzhiyun 	kfree(lbuf);
3814*4882a593Smuzhiyun 	return rc;
3815*4882a593Smuzhiyun }
3816*4882a593Smuzhiyun 
hpsa_scsi_do_report_log_luns(struct ctlr_info * h,struct ReportLUNdata * buf,int bufsize)3817*4882a593Smuzhiyun static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
3818*4882a593Smuzhiyun 		struct ReportLUNdata *buf, int bufsize)
3819*4882a593Smuzhiyun {
3820*4882a593Smuzhiyun 	return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
3821*4882a593Smuzhiyun }
3822*4882a593Smuzhiyun 
hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t * device,int bus,int target,int lun)3823*4882a593Smuzhiyun static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
3824*4882a593Smuzhiyun 	int bus, int target, int lun)
3825*4882a593Smuzhiyun {
3826*4882a593Smuzhiyun 	device->bus = bus;
3827*4882a593Smuzhiyun 	device->target = target;
3828*4882a593Smuzhiyun 	device->lun = lun;
3829*4882a593Smuzhiyun }
3830*4882a593Smuzhiyun 
3831*4882a593Smuzhiyun /* Use VPD inquiry to get details of volume status */
hpsa_get_volume_status(struct ctlr_info * h,unsigned char scsi3addr[])3832*4882a593Smuzhiyun static int hpsa_get_volume_status(struct ctlr_info *h,
3833*4882a593Smuzhiyun 					unsigned char scsi3addr[])
3834*4882a593Smuzhiyun {
3835*4882a593Smuzhiyun 	int rc;
3836*4882a593Smuzhiyun 	int status;
3837*4882a593Smuzhiyun 	int size;
3838*4882a593Smuzhiyun 	unsigned char *buf;
3839*4882a593Smuzhiyun 
3840*4882a593Smuzhiyun 	buf = kzalloc(64, GFP_KERNEL);
3841*4882a593Smuzhiyun 	if (!buf)
3842*4882a593Smuzhiyun 		return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3843*4882a593Smuzhiyun 
3844*4882a593Smuzhiyun 	/* Does controller have VPD for logical volume status? */
3845*4882a593Smuzhiyun 	if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
3846*4882a593Smuzhiyun 		goto exit_failed;
3847*4882a593Smuzhiyun 
3848*4882a593Smuzhiyun 	/* Get the size of the VPD return buffer */
3849*4882a593Smuzhiyun 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3850*4882a593Smuzhiyun 					buf, HPSA_VPD_HEADER_SZ);
3851*4882a593Smuzhiyun 	if (rc != 0)
3852*4882a593Smuzhiyun 		goto exit_failed;
3853*4882a593Smuzhiyun 	size = buf[3];
3854*4882a593Smuzhiyun 
3855*4882a593Smuzhiyun 	/* Now get the whole VPD buffer */
3856*4882a593Smuzhiyun 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3857*4882a593Smuzhiyun 					buf, size + HPSA_VPD_HEADER_SZ);
3858*4882a593Smuzhiyun 	if (rc != 0)
3859*4882a593Smuzhiyun 		goto exit_failed;
3860*4882a593Smuzhiyun 	status = buf[4]; /* status byte */
3861*4882a593Smuzhiyun 
3862*4882a593Smuzhiyun 	kfree(buf);
3863*4882a593Smuzhiyun 	return status;
3864*4882a593Smuzhiyun exit_failed:
3865*4882a593Smuzhiyun 	kfree(buf);
3866*4882a593Smuzhiyun 	return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3867*4882a593Smuzhiyun }
3868*4882a593Smuzhiyun 
3869*4882a593Smuzhiyun /* Determine offline status of a volume.
3870*4882a593Smuzhiyun  * Return either:
3871*4882a593Smuzhiyun  *  0 (not offline)
3872*4882a593Smuzhiyun  *  0xff (offline for unknown reasons)
3873*4882a593Smuzhiyun  *  # (integer code indicating one of several NOT READY states
3874*4882a593Smuzhiyun  *     describing why a volume is to be kept offline)
3875*4882a593Smuzhiyun  */
hpsa_volume_offline(struct ctlr_info * h,unsigned char scsi3addr[])3876*4882a593Smuzhiyun static unsigned char hpsa_volume_offline(struct ctlr_info *h,
3877*4882a593Smuzhiyun 					unsigned char scsi3addr[])
3878*4882a593Smuzhiyun {
3879*4882a593Smuzhiyun 	struct CommandList *c;
3880*4882a593Smuzhiyun 	unsigned char *sense;
3881*4882a593Smuzhiyun 	u8 sense_key, asc, ascq;
3882*4882a593Smuzhiyun 	int sense_len;
3883*4882a593Smuzhiyun 	int rc, ldstat = 0;
3884*4882a593Smuzhiyun 	u16 cmd_status;
3885*4882a593Smuzhiyun 	u8 scsi_status;
3886*4882a593Smuzhiyun #define ASC_LUN_NOT_READY 0x04
3887*4882a593Smuzhiyun #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
3888*4882a593Smuzhiyun #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
3889*4882a593Smuzhiyun 
3890*4882a593Smuzhiyun 	c = cmd_alloc(h);
3891*4882a593Smuzhiyun 
3892*4882a593Smuzhiyun 	(void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
3893*4882a593Smuzhiyun 	rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
3894*4882a593Smuzhiyun 					NO_TIMEOUT);
3895*4882a593Smuzhiyun 	if (rc) {
3896*4882a593Smuzhiyun 		cmd_free(h, c);
3897*4882a593Smuzhiyun 		return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3898*4882a593Smuzhiyun 	}
3899*4882a593Smuzhiyun 	sense = c->err_info->SenseInfo;
3900*4882a593Smuzhiyun 	if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
3901*4882a593Smuzhiyun 		sense_len = sizeof(c->err_info->SenseInfo);
3902*4882a593Smuzhiyun 	else
3903*4882a593Smuzhiyun 		sense_len = c->err_info->SenseLen;
3904*4882a593Smuzhiyun 	decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
3905*4882a593Smuzhiyun 	cmd_status = c->err_info->CommandStatus;
3906*4882a593Smuzhiyun 	scsi_status = c->err_info->ScsiStatus;
3907*4882a593Smuzhiyun 	cmd_free(h, c);
3908*4882a593Smuzhiyun 
3909*4882a593Smuzhiyun 	/* Determine the reason for not ready state */
3910*4882a593Smuzhiyun 	ldstat = hpsa_get_volume_status(h, scsi3addr);
3911*4882a593Smuzhiyun 
3912*4882a593Smuzhiyun 	/* Keep volume offline in certain cases: */
3913*4882a593Smuzhiyun 	switch (ldstat) {
3914*4882a593Smuzhiyun 	case HPSA_LV_FAILED:
3915*4882a593Smuzhiyun 	case HPSA_LV_UNDERGOING_ERASE:
3916*4882a593Smuzhiyun 	case HPSA_LV_NOT_AVAILABLE:
3917*4882a593Smuzhiyun 	case HPSA_LV_UNDERGOING_RPI:
3918*4882a593Smuzhiyun 	case HPSA_LV_PENDING_RPI:
3919*4882a593Smuzhiyun 	case HPSA_LV_ENCRYPTED_NO_KEY:
3920*4882a593Smuzhiyun 	case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
3921*4882a593Smuzhiyun 	case HPSA_LV_UNDERGOING_ENCRYPTION:
3922*4882a593Smuzhiyun 	case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
3923*4882a593Smuzhiyun 	case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
3924*4882a593Smuzhiyun 		return ldstat;
3925*4882a593Smuzhiyun 	case HPSA_VPD_LV_STATUS_UNSUPPORTED:
3926*4882a593Smuzhiyun 		/* If VPD status page isn't available,
3927*4882a593Smuzhiyun 		 * use ASC/ASCQ to determine state
3928*4882a593Smuzhiyun 		 */
3929*4882a593Smuzhiyun 		if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
3930*4882a593Smuzhiyun 			(ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
3931*4882a593Smuzhiyun 			return ldstat;
3932*4882a593Smuzhiyun 		break;
3933*4882a593Smuzhiyun 	default:
3934*4882a593Smuzhiyun 		break;
3935*4882a593Smuzhiyun 	}
3936*4882a593Smuzhiyun 	return HPSA_LV_OK;
3937*4882a593Smuzhiyun }
3938*4882a593Smuzhiyun 
hpsa_update_device_info(struct ctlr_info * h,unsigned char scsi3addr[],struct hpsa_scsi_dev_t * this_device,unsigned char * is_OBDR_device)3939*4882a593Smuzhiyun static int hpsa_update_device_info(struct ctlr_info *h,
3940*4882a593Smuzhiyun 	unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
3941*4882a593Smuzhiyun 	unsigned char *is_OBDR_device)
3942*4882a593Smuzhiyun {
3943*4882a593Smuzhiyun 
3944*4882a593Smuzhiyun #define OBDR_SIG_OFFSET 43
3945*4882a593Smuzhiyun #define OBDR_TAPE_SIG "$DR-10"
3946*4882a593Smuzhiyun #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
3947*4882a593Smuzhiyun #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
3948*4882a593Smuzhiyun 
3949*4882a593Smuzhiyun 	unsigned char *inq_buff;
3950*4882a593Smuzhiyun 	unsigned char *obdr_sig;
3951*4882a593Smuzhiyun 	int rc = 0;
3952*4882a593Smuzhiyun 
3953*4882a593Smuzhiyun 	inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
3954*4882a593Smuzhiyun 	if (!inq_buff) {
3955*4882a593Smuzhiyun 		rc = -ENOMEM;
3956*4882a593Smuzhiyun 		goto bail_out;
3957*4882a593Smuzhiyun 	}
3958*4882a593Smuzhiyun 
3959*4882a593Smuzhiyun 	/* Do an inquiry to the device to see what it is. */
3960*4882a593Smuzhiyun 	if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
3961*4882a593Smuzhiyun 		(unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
3962*4882a593Smuzhiyun 		dev_err(&h->pdev->dev,
3963*4882a593Smuzhiyun 			"%s: inquiry failed, device will be skipped.\n",
3964*4882a593Smuzhiyun 			__func__);
3965*4882a593Smuzhiyun 		rc = HPSA_INQUIRY_FAILED;
3966*4882a593Smuzhiyun 		goto bail_out;
3967*4882a593Smuzhiyun 	}
3968*4882a593Smuzhiyun 
3969*4882a593Smuzhiyun 	scsi_sanitize_inquiry_string(&inq_buff[8], 8);
3970*4882a593Smuzhiyun 	scsi_sanitize_inquiry_string(&inq_buff[16], 16);
3971*4882a593Smuzhiyun 
3972*4882a593Smuzhiyun 	this_device->devtype = (inq_buff[0] & 0x1f);
3973*4882a593Smuzhiyun 	memcpy(this_device->scsi3addr, scsi3addr, 8);
3974*4882a593Smuzhiyun 	memcpy(this_device->vendor, &inq_buff[8],
3975*4882a593Smuzhiyun 		sizeof(this_device->vendor));
3976*4882a593Smuzhiyun 	memcpy(this_device->model, &inq_buff[16],
3977*4882a593Smuzhiyun 		sizeof(this_device->model));
3978*4882a593Smuzhiyun 	this_device->rev = inq_buff[2];
3979*4882a593Smuzhiyun 	memset(this_device->device_id, 0,
3980*4882a593Smuzhiyun 		sizeof(this_device->device_id));
3981*4882a593Smuzhiyun 	if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8,
3982*4882a593Smuzhiyun 		sizeof(this_device->device_id)) < 0) {
3983*4882a593Smuzhiyun 		dev_err(&h->pdev->dev,
3984*4882a593Smuzhiyun 			"hpsa%d: %s: can't get device id for [%d:%d:%d:%d]\t%s\t%.16s\n",
3985*4882a593Smuzhiyun 			h->ctlr, __func__,
3986*4882a593Smuzhiyun 			h->scsi_host->host_no,
3987*4882a593Smuzhiyun 			this_device->bus, this_device->target,
3988*4882a593Smuzhiyun 			this_device->lun,
3989*4882a593Smuzhiyun 			scsi_device_type(this_device->devtype),
3990*4882a593Smuzhiyun 			this_device->model);
3991*4882a593Smuzhiyun 		rc = HPSA_LV_FAILED;
3992*4882a593Smuzhiyun 		goto bail_out;
3993*4882a593Smuzhiyun 	}
3994*4882a593Smuzhiyun 
3995*4882a593Smuzhiyun 	if ((this_device->devtype == TYPE_DISK ||
3996*4882a593Smuzhiyun 		this_device->devtype == TYPE_ZBC) &&
3997*4882a593Smuzhiyun 		is_logical_dev_addr_mode(scsi3addr)) {
3998*4882a593Smuzhiyun 		unsigned char volume_offline;
3999*4882a593Smuzhiyun 
4000*4882a593Smuzhiyun 		hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
4001*4882a593Smuzhiyun 		if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
4002*4882a593Smuzhiyun 			hpsa_get_ioaccel_status(h, scsi3addr, this_device);
4003*4882a593Smuzhiyun 		volume_offline = hpsa_volume_offline(h, scsi3addr);
4004*4882a593Smuzhiyun 		if (volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED &&
4005*4882a593Smuzhiyun 		    h->legacy_board) {
4006*4882a593Smuzhiyun 			/*
4007*4882a593Smuzhiyun 			 * Legacy boards might not support volume status
4008*4882a593Smuzhiyun 			 */
4009*4882a593Smuzhiyun 			dev_info(&h->pdev->dev,
4010*4882a593Smuzhiyun 				 "C0:T%d:L%d Volume status not available, assuming online.\n",
4011*4882a593Smuzhiyun 				 this_device->target, this_device->lun);
4012*4882a593Smuzhiyun 			volume_offline = 0;
4013*4882a593Smuzhiyun 		}
4014*4882a593Smuzhiyun 		this_device->volume_offline = volume_offline;
4015*4882a593Smuzhiyun 		if (volume_offline == HPSA_LV_FAILED) {
4016*4882a593Smuzhiyun 			rc = HPSA_LV_FAILED;
4017*4882a593Smuzhiyun 			dev_err(&h->pdev->dev,
4018*4882a593Smuzhiyun 				"%s: LV failed, device will be skipped.\n",
4019*4882a593Smuzhiyun 				__func__);
4020*4882a593Smuzhiyun 			goto bail_out;
4021*4882a593Smuzhiyun 		}
4022*4882a593Smuzhiyun 	} else {
4023*4882a593Smuzhiyun 		this_device->raid_level = RAID_UNKNOWN;
4024*4882a593Smuzhiyun 		this_device->offload_config = 0;
4025*4882a593Smuzhiyun 		hpsa_turn_off_ioaccel_for_device(this_device);
4026*4882a593Smuzhiyun 		this_device->hba_ioaccel_enabled = 0;
4027*4882a593Smuzhiyun 		this_device->volume_offline = 0;
4028*4882a593Smuzhiyun 		this_device->queue_depth = h->nr_cmds;
4029*4882a593Smuzhiyun 	}
4030*4882a593Smuzhiyun 
4031*4882a593Smuzhiyun 	if (this_device->external)
4032*4882a593Smuzhiyun 		this_device->queue_depth = EXTERNAL_QD;
4033*4882a593Smuzhiyun 
4034*4882a593Smuzhiyun 	if (is_OBDR_device) {
4035*4882a593Smuzhiyun 		/* See if this is a One-Button-Disaster-Recovery device
4036*4882a593Smuzhiyun 		 * by looking for "$DR-10" at offset 43 in inquiry data.
4037*4882a593Smuzhiyun 		 */
4038*4882a593Smuzhiyun 		obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
4039*4882a593Smuzhiyun 		*is_OBDR_device = (this_device->devtype == TYPE_ROM &&
4040*4882a593Smuzhiyun 					strncmp(obdr_sig, OBDR_TAPE_SIG,
4041*4882a593Smuzhiyun 						OBDR_SIG_LEN) == 0);
4042*4882a593Smuzhiyun 	}
4043*4882a593Smuzhiyun 	kfree(inq_buff);
4044*4882a593Smuzhiyun 	return 0;
4045*4882a593Smuzhiyun 
4046*4882a593Smuzhiyun bail_out:
4047*4882a593Smuzhiyun 	kfree(inq_buff);
4048*4882a593Smuzhiyun 	return rc;
4049*4882a593Smuzhiyun }
4050*4882a593Smuzhiyun 
4051*4882a593Smuzhiyun /*
4052*4882a593Smuzhiyun  * Helper function to assign bus, target, lun mapping of devices.
4053*4882a593Smuzhiyun  * Logical drive target and lun are assigned at this time, but
4054*4882a593Smuzhiyun  * physical device lun and target assignment are deferred (assigned
4055*4882a593Smuzhiyun  * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
4056*4882a593Smuzhiyun */
figure_bus_target_lun(struct ctlr_info * h,u8 * lunaddrbytes,struct hpsa_scsi_dev_t * device)4057*4882a593Smuzhiyun static void figure_bus_target_lun(struct ctlr_info *h,
4058*4882a593Smuzhiyun 	u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
4059*4882a593Smuzhiyun {
4060*4882a593Smuzhiyun 	u32 lunid = get_unaligned_le32(lunaddrbytes);
4061*4882a593Smuzhiyun 
4062*4882a593Smuzhiyun 	if (!is_logical_dev_addr_mode(lunaddrbytes)) {
4063*4882a593Smuzhiyun 		/* physical device, target and lun filled in later */
4064*4882a593Smuzhiyun 		if (is_hba_lunid(lunaddrbytes)) {
4065*4882a593Smuzhiyun 			int bus = HPSA_HBA_BUS;
4066*4882a593Smuzhiyun 
4067*4882a593Smuzhiyun 			if (!device->rev)
4068*4882a593Smuzhiyun 				bus = HPSA_LEGACY_HBA_BUS;
4069*4882a593Smuzhiyun 			hpsa_set_bus_target_lun(device,
4070*4882a593Smuzhiyun 					bus, 0, lunid & 0x3fff);
4071*4882a593Smuzhiyun 		} else
4072*4882a593Smuzhiyun 			/* defer target, lun assignment for physical devices */
4073*4882a593Smuzhiyun 			hpsa_set_bus_target_lun(device,
4074*4882a593Smuzhiyun 					HPSA_PHYSICAL_DEVICE_BUS, -1, -1);
4075*4882a593Smuzhiyun 		return;
4076*4882a593Smuzhiyun 	}
4077*4882a593Smuzhiyun 	/* It's a logical device */
4078*4882a593Smuzhiyun 	if (device->external) {
4079*4882a593Smuzhiyun 		hpsa_set_bus_target_lun(device,
4080*4882a593Smuzhiyun 			HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff,
4081*4882a593Smuzhiyun 			lunid & 0x00ff);
4082*4882a593Smuzhiyun 		return;
4083*4882a593Smuzhiyun 	}
4084*4882a593Smuzhiyun 	hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS,
4085*4882a593Smuzhiyun 				0, lunid & 0x3fff);
4086*4882a593Smuzhiyun }
4087*4882a593Smuzhiyun 
figure_external_status(struct ctlr_info * h,int raid_ctlr_position,int i,int nphysicals,int nlocal_logicals)4088*4882a593Smuzhiyun static int  figure_external_status(struct ctlr_info *h, int raid_ctlr_position,
4089*4882a593Smuzhiyun 	int i, int nphysicals, int nlocal_logicals)
4090*4882a593Smuzhiyun {
4091*4882a593Smuzhiyun 	/* In report logicals, local logicals are listed first,
4092*4882a593Smuzhiyun 	* then any externals.
4093*4882a593Smuzhiyun 	*/
4094*4882a593Smuzhiyun 	int logicals_start = nphysicals + (raid_ctlr_position == 0);
4095*4882a593Smuzhiyun 
4096*4882a593Smuzhiyun 	if (i == raid_ctlr_position)
4097*4882a593Smuzhiyun 		return 0;
4098*4882a593Smuzhiyun 
4099*4882a593Smuzhiyun 	if (i < logicals_start)
4100*4882a593Smuzhiyun 		return 0;
4101*4882a593Smuzhiyun 
4102*4882a593Smuzhiyun 	/* i is in logicals range, but still within local logicals */
4103*4882a593Smuzhiyun 	if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals)
4104*4882a593Smuzhiyun 		return 0;
4105*4882a593Smuzhiyun 
4106*4882a593Smuzhiyun 	return 1; /* it's an external lun */
4107*4882a593Smuzhiyun }
4108*4882a593Smuzhiyun 
4109*4882a593Smuzhiyun /*
4110*4882a593Smuzhiyun  * Do CISS_REPORT_PHYS and CISS_REPORT_LOG.  Data is returned in physdev,
4111*4882a593Smuzhiyun  * logdev.  The number of luns in physdev and logdev are returned in
4112*4882a593Smuzhiyun  * *nphysicals and *nlogicals, respectively.
4113*4882a593Smuzhiyun  * Returns 0 on success, -1 otherwise.
4114*4882a593Smuzhiyun  */
hpsa_gather_lun_info(struct ctlr_info * h,struct ReportExtendedLUNdata * physdev,u32 * nphysicals,struct ReportLUNdata * logdev,u32 * nlogicals)4115*4882a593Smuzhiyun static int hpsa_gather_lun_info(struct ctlr_info *h,
4116*4882a593Smuzhiyun 	struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
4117*4882a593Smuzhiyun 	struct ReportLUNdata *logdev, u32 *nlogicals)
4118*4882a593Smuzhiyun {
4119*4882a593Smuzhiyun 	if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
4120*4882a593Smuzhiyun 		dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
4121*4882a593Smuzhiyun 		return -1;
4122*4882a593Smuzhiyun 	}
4123*4882a593Smuzhiyun 	*nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
4124*4882a593Smuzhiyun 	if (*nphysicals > HPSA_MAX_PHYS_LUN) {
4125*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
4126*4882a593Smuzhiyun 			HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
4127*4882a593Smuzhiyun 		*nphysicals = HPSA_MAX_PHYS_LUN;
4128*4882a593Smuzhiyun 	}
4129*4882a593Smuzhiyun 	if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
4130*4882a593Smuzhiyun 		dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
4131*4882a593Smuzhiyun 		return -1;
4132*4882a593Smuzhiyun 	}
4133*4882a593Smuzhiyun 	*nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
4134*4882a593Smuzhiyun 	/* Reject Logicals in excess of our max capability. */
4135*4882a593Smuzhiyun 	if (*nlogicals > HPSA_MAX_LUN) {
4136*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev,
4137*4882a593Smuzhiyun 			"maximum logical LUNs (%d) exceeded.  "
4138*4882a593Smuzhiyun 			"%d LUNs ignored.\n", HPSA_MAX_LUN,
4139*4882a593Smuzhiyun 			*nlogicals - HPSA_MAX_LUN);
4140*4882a593Smuzhiyun 		*nlogicals = HPSA_MAX_LUN;
4141*4882a593Smuzhiyun 	}
4142*4882a593Smuzhiyun 	if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
4143*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev,
4144*4882a593Smuzhiyun 			"maximum logical + physical LUNs (%d) exceeded. "
4145*4882a593Smuzhiyun 			"%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
4146*4882a593Smuzhiyun 			*nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
4147*4882a593Smuzhiyun 		*nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
4148*4882a593Smuzhiyun 	}
4149*4882a593Smuzhiyun 	return 0;
4150*4882a593Smuzhiyun }
4151*4882a593Smuzhiyun 
figure_lunaddrbytes(struct ctlr_info * h,int raid_ctlr_position,int i,int nphysicals,int nlogicals,struct ReportExtendedLUNdata * physdev_list,struct ReportLUNdata * logdev_list)4152*4882a593Smuzhiyun static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
4153*4882a593Smuzhiyun 	int i, int nphysicals, int nlogicals,
4154*4882a593Smuzhiyun 	struct ReportExtendedLUNdata *physdev_list,
4155*4882a593Smuzhiyun 	struct ReportLUNdata *logdev_list)
4156*4882a593Smuzhiyun {
4157*4882a593Smuzhiyun 	/* Helper function, figure out where the LUN ID info is coming from
4158*4882a593Smuzhiyun 	 * given index i, lists of physical and logical devices, where in
4159*4882a593Smuzhiyun 	 * the list the raid controller is supposed to appear (first or last)
4160*4882a593Smuzhiyun 	 */
4161*4882a593Smuzhiyun 
4162*4882a593Smuzhiyun 	int logicals_start = nphysicals + (raid_ctlr_position == 0);
4163*4882a593Smuzhiyun 	int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
4164*4882a593Smuzhiyun 
4165*4882a593Smuzhiyun 	if (i == raid_ctlr_position)
4166*4882a593Smuzhiyun 		return RAID_CTLR_LUNID;
4167*4882a593Smuzhiyun 
4168*4882a593Smuzhiyun 	if (i < logicals_start)
4169*4882a593Smuzhiyun 		return &physdev_list->LUN[i -
4170*4882a593Smuzhiyun 				(raid_ctlr_position == 0)].lunid[0];
4171*4882a593Smuzhiyun 
4172*4882a593Smuzhiyun 	if (i < last_device)
4173*4882a593Smuzhiyun 		return &logdev_list->LUN[i - nphysicals -
4174*4882a593Smuzhiyun 			(raid_ctlr_position == 0)][0];
4175*4882a593Smuzhiyun 	BUG();
4176*4882a593Smuzhiyun 	return NULL;
4177*4882a593Smuzhiyun }
4178*4882a593Smuzhiyun 
4179*4882a593Smuzhiyun /* get physical drive ioaccel handle and queue depth */
hpsa_get_ioaccel_drive_info(struct ctlr_info * h,struct hpsa_scsi_dev_t * dev,struct ReportExtendedLUNdata * rlep,int rle_index,struct bmic_identify_physical_device * id_phys)4180*4882a593Smuzhiyun static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
4181*4882a593Smuzhiyun 		struct hpsa_scsi_dev_t *dev,
4182*4882a593Smuzhiyun 		struct ReportExtendedLUNdata *rlep, int rle_index,
4183*4882a593Smuzhiyun 		struct bmic_identify_physical_device *id_phys)
4184*4882a593Smuzhiyun {
4185*4882a593Smuzhiyun 	int rc;
4186*4882a593Smuzhiyun 	struct ext_report_lun_entry *rle;
4187*4882a593Smuzhiyun 
4188*4882a593Smuzhiyun 	if (rle_index < 0 || rle_index >= HPSA_MAX_PHYS_LUN)
4189*4882a593Smuzhiyun 		return;
4190*4882a593Smuzhiyun 
4191*4882a593Smuzhiyun 	rle = &rlep->LUN[rle_index];
4192*4882a593Smuzhiyun 
4193*4882a593Smuzhiyun 	dev->ioaccel_handle = rle->ioaccel_handle;
4194*4882a593Smuzhiyun 	if ((rle->device_flags & 0x08) && dev->ioaccel_handle)
4195*4882a593Smuzhiyun 		dev->hba_ioaccel_enabled = 1;
4196*4882a593Smuzhiyun 	memset(id_phys, 0, sizeof(*id_phys));
4197*4882a593Smuzhiyun 	rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0],
4198*4882a593Smuzhiyun 			GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys,
4199*4882a593Smuzhiyun 			sizeof(*id_phys));
4200*4882a593Smuzhiyun 	if (!rc)
4201*4882a593Smuzhiyun 		/* Reserve space for FW operations */
4202*4882a593Smuzhiyun #define DRIVE_CMDS_RESERVED_FOR_FW 2
4203*4882a593Smuzhiyun #define DRIVE_QUEUE_DEPTH 7
4204*4882a593Smuzhiyun 		dev->queue_depth =
4205*4882a593Smuzhiyun 			le16_to_cpu(id_phys->current_queue_depth_limit) -
4206*4882a593Smuzhiyun 				DRIVE_CMDS_RESERVED_FOR_FW;
4207*4882a593Smuzhiyun 	else
4208*4882a593Smuzhiyun 		dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
4209*4882a593Smuzhiyun }
4210*4882a593Smuzhiyun 
hpsa_get_path_info(struct hpsa_scsi_dev_t * this_device,struct ReportExtendedLUNdata * rlep,int rle_index,struct bmic_identify_physical_device * id_phys)4211*4882a593Smuzhiyun static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device,
4212*4882a593Smuzhiyun 	struct ReportExtendedLUNdata *rlep, int rle_index,
4213*4882a593Smuzhiyun 	struct bmic_identify_physical_device *id_phys)
4214*4882a593Smuzhiyun {
4215*4882a593Smuzhiyun 	struct ext_report_lun_entry *rle;
4216*4882a593Smuzhiyun 
4217*4882a593Smuzhiyun 	if (rle_index < 0 || rle_index >= HPSA_MAX_PHYS_LUN)
4218*4882a593Smuzhiyun 		return;
4219*4882a593Smuzhiyun 
4220*4882a593Smuzhiyun 	rle = &rlep->LUN[rle_index];
4221*4882a593Smuzhiyun 
4222*4882a593Smuzhiyun 	if ((rle->device_flags & 0x08) && this_device->ioaccel_handle)
4223*4882a593Smuzhiyun 		this_device->hba_ioaccel_enabled = 1;
4224*4882a593Smuzhiyun 
4225*4882a593Smuzhiyun 	memcpy(&this_device->active_path_index,
4226*4882a593Smuzhiyun 		&id_phys->active_path_number,
4227*4882a593Smuzhiyun 		sizeof(this_device->active_path_index));
4228*4882a593Smuzhiyun 	memcpy(&this_device->path_map,
4229*4882a593Smuzhiyun 		&id_phys->redundant_path_present_map,
4230*4882a593Smuzhiyun 		sizeof(this_device->path_map));
4231*4882a593Smuzhiyun 	memcpy(&this_device->box,
4232*4882a593Smuzhiyun 		&id_phys->alternate_paths_phys_box_on_port,
4233*4882a593Smuzhiyun 		sizeof(this_device->box));
4234*4882a593Smuzhiyun 	memcpy(&this_device->phys_connector,
4235*4882a593Smuzhiyun 		&id_phys->alternate_paths_phys_connector,
4236*4882a593Smuzhiyun 		sizeof(this_device->phys_connector));
4237*4882a593Smuzhiyun 	memcpy(&this_device->bay,
4238*4882a593Smuzhiyun 		&id_phys->phys_bay_in_box,
4239*4882a593Smuzhiyun 		sizeof(this_device->bay));
4240*4882a593Smuzhiyun }
4241*4882a593Smuzhiyun 
4242*4882a593Smuzhiyun /* get number of local logical disks. */
hpsa_set_local_logical_count(struct ctlr_info * h,struct bmic_identify_controller * id_ctlr,u32 * nlocals)4243*4882a593Smuzhiyun static int hpsa_set_local_logical_count(struct ctlr_info *h,
4244*4882a593Smuzhiyun 	struct bmic_identify_controller *id_ctlr,
4245*4882a593Smuzhiyun 	u32 *nlocals)
4246*4882a593Smuzhiyun {
4247*4882a593Smuzhiyun 	int rc;
4248*4882a593Smuzhiyun 
4249*4882a593Smuzhiyun 	if (!id_ctlr) {
4250*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n",
4251*4882a593Smuzhiyun 			__func__);
4252*4882a593Smuzhiyun 		return -ENOMEM;
4253*4882a593Smuzhiyun 	}
4254*4882a593Smuzhiyun 	memset(id_ctlr, 0, sizeof(*id_ctlr));
4255*4882a593Smuzhiyun 	rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr));
4256*4882a593Smuzhiyun 	if (!rc)
4257*4882a593Smuzhiyun 		if (id_ctlr->configured_logical_drive_count < 255)
4258*4882a593Smuzhiyun 			*nlocals = id_ctlr->configured_logical_drive_count;
4259*4882a593Smuzhiyun 		else
4260*4882a593Smuzhiyun 			*nlocals = le16_to_cpu(
4261*4882a593Smuzhiyun 					id_ctlr->extended_logical_unit_count);
4262*4882a593Smuzhiyun 	else
4263*4882a593Smuzhiyun 		*nlocals = -1;
4264*4882a593Smuzhiyun 	return rc;
4265*4882a593Smuzhiyun }
4266*4882a593Smuzhiyun 
hpsa_is_disk_spare(struct ctlr_info * h,u8 * lunaddrbytes)4267*4882a593Smuzhiyun static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes)
4268*4882a593Smuzhiyun {
4269*4882a593Smuzhiyun 	struct bmic_identify_physical_device *id_phys;
4270*4882a593Smuzhiyun 	bool is_spare = false;
4271*4882a593Smuzhiyun 	int rc;
4272*4882a593Smuzhiyun 
4273*4882a593Smuzhiyun 	id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4274*4882a593Smuzhiyun 	if (!id_phys)
4275*4882a593Smuzhiyun 		return false;
4276*4882a593Smuzhiyun 
4277*4882a593Smuzhiyun 	rc = hpsa_bmic_id_physical_device(h,
4278*4882a593Smuzhiyun 					lunaddrbytes,
4279*4882a593Smuzhiyun 					GET_BMIC_DRIVE_NUMBER(lunaddrbytes),
4280*4882a593Smuzhiyun 					id_phys, sizeof(*id_phys));
4281*4882a593Smuzhiyun 	if (rc == 0)
4282*4882a593Smuzhiyun 		is_spare = (id_phys->more_flags >> 6) & 0x01;
4283*4882a593Smuzhiyun 
4284*4882a593Smuzhiyun 	kfree(id_phys);
4285*4882a593Smuzhiyun 	return is_spare;
4286*4882a593Smuzhiyun }
4287*4882a593Smuzhiyun 
4288*4882a593Smuzhiyun #define RPL_DEV_FLAG_NON_DISK                           0x1
4289*4882a593Smuzhiyun #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED  0x2
4290*4882a593Smuzhiyun #define RPL_DEV_FLAG_UNCONFIG_DISK                      0x4
4291*4882a593Smuzhiyun 
4292*4882a593Smuzhiyun #define BMIC_DEVICE_TYPE_ENCLOSURE  6
4293*4882a593Smuzhiyun 
hpsa_skip_device(struct ctlr_info * h,u8 * lunaddrbytes,struct ext_report_lun_entry * rle)4294*4882a593Smuzhiyun static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes,
4295*4882a593Smuzhiyun 				struct ext_report_lun_entry *rle)
4296*4882a593Smuzhiyun {
4297*4882a593Smuzhiyun 	u8 device_flags;
4298*4882a593Smuzhiyun 	u8 device_type;
4299*4882a593Smuzhiyun 
4300*4882a593Smuzhiyun 	if (!MASKED_DEVICE(lunaddrbytes))
4301*4882a593Smuzhiyun 		return false;
4302*4882a593Smuzhiyun 
4303*4882a593Smuzhiyun 	device_flags = rle->device_flags;
4304*4882a593Smuzhiyun 	device_type = rle->device_type;
4305*4882a593Smuzhiyun 
4306*4882a593Smuzhiyun 	if (device_flags & RPL_DEV_FLAG_NON_DISK) {
4307*4882a593Smuzhiyun 		if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE)
4308*4882a593Smuzhiyun 			return false;
4309*4882a593Smuzhiyun 		return true;
4310*4882a593Smuzhiyun 	}
4311*4882a593Smuzhiyun 
4312*4882a593Smuzhiyun 	if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED))
4313*4882a593Smuzhiyun 		return false;
4314*4882a593Smuzhiyun 
4315*4882a593Smuzhiyun 	if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK)
4316*4882a593Smuzhiyun 		return false;
4317*4882a593Smuzhiyun 
4318*4882a593Smuzhiyun 	/*
4319*4882a593Smuzhiyun 	 * Spares may be spun down, we do not want to
4320*4882a593Smuzhiyun 	 * do an Inquiry to a RAID set spare drive as
4321*4882a593Smuzhiyun 	 * that would have them spun up, that is a
4322*4882a593Smuzhiyun 	 * performance hit because I/O to the RAID device
4323*4882a593Smuzhiyun 	 * stops while the spin up occurs which can take
4324*4882a593Smuzhiyun 	 * over 50 seconds.
4325*4882a593Smuzhiyun 	 */
4326*4882a593Smuzhiyun 	if (hpsa_is_disk_spare(h, lunaddrbytes))
4327*4882a593Smuzhiyun 		return true;
4328*4882a593Smuzhiyun 
4329*4882a593Smuzhiyun 	return false;
4330*4882a593Smuzhiyun }
4331*4882a593Smuzhiyun 
hpsa_update_scsi_devices(struct ctlr_info * h)4332*4882a593Smuzhiyun static void hpsa_update_scsi_devices(struct ctlr_info *h)
4333*4882a593Smuzhiyun {
4334*4882a593Smuzhiyun 	/* the idea here is we could get notified
4335*4882a593Smuzhiyun 	 * that some devices have changed, so we do a report
4336*4882a593Smuzhiyun 	 * physical luns and report logical luns cmd, and adjust
4337*4882a593Smuzhiyun 	 * our list of devices accordingly.
4338*4882a593Smuzhiyun 	 *
4339*4882a593Smuzhiyun 	 * The scsi3addr's of devices won't change so long as the
4340*4882a593Smuzhiyun 	 * adapter is not reset.  That means we can rescan and
4341*4882a593Smuzhiyun 	 * tell which devices we already know about, vs. new
4342*4882a593Smuzhiyun 	 * devices, vs.  disappearing devices.
4343*4882a593Smuzhiyun 	 */
4344*4882a593Smuzhiyun 	struct ReportExtendedLUNdata *physdev_list = NULL;
4345*4882a593Smuzhiyun 	struct ReportLUNdata *logdev_list = NULL;
4346*4882a593Smuzhiyun 	struct bmic_identify_physical_device *id_phys = NULL;
4347*4882a593Smuzhiyun 	struct bmic_identify_controller *id_ctlr = NULL;
4348*4882a593Smuzhiyun 	u32 nphysicals = 0;
4349*4882a593Smuzhiyun 	u32 nlogicals = 0;
4350*4882a593Smuzhiyun 	u32 nlocal_logicals = 0;
4351*4882a593Smuzhiyun 	u32 ndev_allocated = 0;
4352*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
4353*4882a593Smuzhiyun 	int ncurrent = 0;
4354*4882a593Smuzhiyun 	int i, n_ext_target_devs, ndevs_to_allocate;
4355*4882a593Smuzhiyun 	int raid_ctlr_position;
4356*4882a593Smuzhiyun 	bool physical_device;
4357*4882a593Smuzhiyun 	DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
4358*4882a593Smuzhiyun 
4359*4882a593Smuzhiyun 	currentsd = kcalloc(HPSA_MAX_DEVICES, sizeof(*currentsd), GFP_KERNEL);
4360*4882a593Smuzhiyun 	physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
4361*4882a593Smuzhiyun 	logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
4362*4882a593Smuzhiyun 	tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
4363*4882a593Smuzhiyun 	id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4364*4882a593Smuzhiyun 	id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL);
4365*4882a593Smuzhiyun 
4366*4882a593Smuzhiyun 	if (!currentsd || !physdev_list || !logdev_list ||
4367*4882a593Smuzhiyun 		!tmpdevice || !id_phys || !id_ctlr) {
4368*4882a593Smuzhiyun 		dev_err(&h->pdev->dev, "out of memory\n");
4369*4882a593Smuzhiyun 		goto out;
4370*4882a593Smuzhiyun 	}
4371*4882a593Smuzhiyun 	memset(lunzerobits, 0, sizeof(lunzerobits));
4372*4882a593Smuzhiyun 
4373*4882a593Smuzhiyun 	h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */
4374*4882a593Smuzhiyun 
4375*4882a593Smuzhiyun 	if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
4376*4882a593Smuzhiyun 			logdev_list, &nlogicals)) {
4377*4882a593Smuzhiyun 		h->drv_req_rescan = 1;
4378*4882a593Smuzhiyun 		goto out;
4379*4882a593Smuzhiyun 	}
4380*4882a593Smuzhiyun 
4381*4882a593Smuzhiyun 	/* Set number of local logicals (non PTRAID) */
4382*4882a593Smuzhiyun 	if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) {
4383*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev,
4384*4882a593Smuzhiyun 			"%s: Can't determine number of local logical devices.\n",
4385*4882a593Smuzhiyun 			__func__);
4386*4882a593Smuzhiyun 	}
4387*4882a593Smuzhiyun 
4388*4882a593Smuzhiyun 	/* We might see up to the maximum number of logical and physical disks
4389*4882a593Smuzhiyun 	 * plus external target devices, and a device for the local RAID
4390*4882a593Smuzhiyun 	 * controller.
4391*4882a593Smuzhiyun 	 */
4392*4882a593Smuzhiyun 	ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
4393*4882a593Smuzhiyun 
4394*4882a593Smuzhiyun 	hpsa_ext_ctrl_present(h, physdev_list);
4395*4882a593Smuzhiyun 
4396*4882a593Smuzhiyun 	/* Allocate the per device structures */
4397*4882a593Smuzhiyun 	for (i = 0; i < ndevs_to_allocate; i++) {
4398*4882a593Smuzhiyun 		if (i >= HPSA_MAX_DEVICES) {
4399*4882a593Smuzhiyun 			dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
4400*4882a593Smuzhiyun 				"  %d devices ignored.\n", HPSA_MAX_DEVICES,
4401*4882a593Smuzhiyun 				ndevs_to_allocate - HPSA_MAX_DEVICES);
4402*4882a593Smuzhiyun 			break;
4403*4882a593Smuzhiyun 		}
4404*4882a593Smuzhiyun 
4405*4882a593Smuzhiyun 		currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
4406*4882a593Smuzhiyun 		if (!currentsd[i]) {
4407*4882a593Smuzhiyun 			h->drv_req_rescan = 1;
4408*4882a593Smuzhiyun 			goto out;
4409*4882a593Smuzhiyun 		}
4410*4882a593Smuzhiyun 		ndev_allocated++;
4411*4882a593Smuzhiyun 	}
4412*4882a593Smuzhiyun 
4413*4882a593Smuzhiyun 	if (is_scsi_rev_5(h))
4414*4882a593Smuzhiyun 		raid_ctlr_position = 0;
4415*4882a593Smuzhiyun 	else
4416*4882a593Smuzhiyun 		raid_ctlr_position = nphysicals + nlogicals;
4417*4882a593Smuzhiyun 
4418*4882a593Smuzhiyun 	/* adjust our table of devices */
4419*4882a593Smuzhiyun 	n_ext_target_devs = 0;
4420*4882a593Smuzhiyun 	for (i = 0; i < nphysicals + nlogicals + 1; i++) {
4421*4882a593Smuzhiyun 		u8 *lunaddrbytes, is_OBDR = 0;
4422*4882a593Smuzhiyun 		int rc = 0;
4423*4882a593Smuzhiyun 		int phys_dev_index = i - (raid_ctlr_position == 0);
4424*4882a593Smuzhiyun 		bool skip_device = false;
4425*4882a593Smuzhiyun 
4426*4882a593Smuzhiyun 		memset(tmpdevice, 0, sizeof(*tmpdevice));
4427*4882a593Smuzhiyun 
4428*4882a593Smuzhiyun 		physical_device = i < nphysicals + (raid_ctlr_position == 0);
4429*4882a593Smuzhiyun 
4430*4882a593Smuzhiyun 		/* Figure out where the LUN ID info is coming from */
4431*4882a593Smuzhiyun 		lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
4432*4882a593Smuzhiyun 			i, nphysicals, nlogicals, physdev_list, logdev_list);
4433*4882a593Smuzhiyun 
4434*4882a593Smuzhiyun 		/* Determine if this is a lun from an external target array */
4435*4882a593Smuzhiyun 		tmpdevice->external =
4436*4882a593Smuzhiyun 			figure_external_status(h, raid_ctlr_position, i,
4437*4882a593Smuzhiyun 						nphysicals, nlocal_logicals);
4438*4882a593Smuzhiyun 
4439*4882a593Smuzhiyun 		/*
4440*4882a593Smuzhiyun 		 * Skip over some devices such as a spare.
4441*4882a593Smuzhiyun 		 */
4442*4882a593Smuzhiyun 		if (phys_dev_index >= 0 && !tmpdevice->external &&
4443*4882a593Smuzhiyun 			physical_device) {
4444*4882a593Smuzhiyun 			skip_device = hpsa_skip_device(h, lunaddrbytes,
4445*4882a593Smuzhiyun 					&physdev_list->LUN[phys_dev_index]);
4446*4882a593Smuzhiyun 			if (skip_device)
4447*4882a593Smuzhiyun 				continue;
4448*4882a593Smuzhiyun 		}
4449*4882a593Smuzhiyun 
4450*4882a593Smuzhiyun 		/* Get device type, vendor, model, device id, raid_map */
4451*4882a593Smuzhiyun 		rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
4452*4882a593Smuzhiyun 							&is_OBDR);
4453*4882a593Smuzhiyun 		if (rc == -ENOMEM) {
4454*4882a593Smuzhiyun 			dev_warn(&h->pdev->dev,
4455*4882a593Smuzhiyun 				"Out of memory, rescan deferred.\n");
4456*4882a593Smuzhiyun 			h->drv_req_rescan = 1;
4457*4882a593Smuzhiyun 			goto out;
4458*4882a593Smuzhiyun 		}
4459*4882a593Smuzhiyun 		if (rc) {
4460*4882a593Smuzhiyun 			h->drv_req_rescan = 1;
4461*4882a593Smuzhiyun 			continue;
4462*4882a593Smuzhiyun 		}
4463*4882a593Smuzhiyun 
4464*4882a593Smuzhiyun 		figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
4465*4882a593Smuzhiyun 		this_device = currentsd[ncurrent];
4466*4882a593Smuzhiyun 
4467*4882a593Smuzhiyun 		*this_device = *tmpdevice;
4468*4882a593Smuzhiyun 		this_device->physical_device = physical_device;
4469*4882a593Smuzhiyun 
4470*4882a593Smuzhiyun 		/*
4471*4882a593Smuzhiyun 		 * Expose all devices except for physical devices that
4472*4882a593Smuzhiyun 		 * are masked.
4473*4882a593Smuzhiyun 		 */
4474*4882a593Smuzhiyun 		if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device)
4475*4882a593Smuzhiyun 			this_device->expose_device = 0;
4476*4882a593Smuzhiyun 		else
4477*4882a593Smuzhiyun 			this_device->expose_device = 1;
4478*4882a593Smuzhiyun 
4479*4882a593Smuzhiyun 
4480*4882a593Smuzhiyun 		/*
4481*4882a593Smuzhiyun 		 * Get the SAS address for physical devices that are exposed.
4482*4882a593Smuzhiyun 		 */
4483*4882a593Smuzhiyun 		if (this_device->physical_device && this_device->expose_device)
4484*4882a593Smuzhiyun 			hpsa_get_sas_address(h, lunaddrbytes, this_device);
4485*4882a593Smuzhiyun 
4486*4882a593Smuzhiyun 		switch (this_device->devtype) {
4487*4882a593Smuzhiyun 		case TYPE_ROM:
4488*4882a593Smuzhiyun 			/* We don't *really* support actual CD-ROM devices,
4489*4882a593Smuzhiyun 			 * just "One Button Disaster Recovery" tape drive
4490*4882a593Smuzhiyun 			 * which temporarily pretends to be a CD-ROM drive.
4491*4882a593Smuzhiyun 			 * So we check that the device is really an OBDR tape
4492*4882a593Smuzhiyun 			 * device by checking for "$DR-10" in bytes 43-48 of
4493*4882a593Smuzhiyun 			 * the inquiry data.
4494*4882a593Smuzhiyun 			 */
4495*4882a593Smuzhiyun 			if (is_OBDR)
4496*4882a593Smuzhiyun 				ncurrent++;
4497*4882a593Smuzhiyun 			break;
4498*4882a593Smuzhiyun 		case TYPE_DISK:
4499*4882a593Smuzhiyun 		case TYPE_ZBC:
4500*4882a593Smuzhiyun 			if (this_device->physical_device) {
4501*4882a593Smuzhiyun 				/* The disk is in HBA mode. */
4502*4882a593Smuzhiyun 				/* Never use RAID mapper in HBA mode. */
4503*4882a593Smuzhiyun 				this_device->offload_enabled = 0;
4504*4882a593Smuzhiyun 				hpsa_get_ioaccel_drive_info(h, this_device,
4505*4882a593Smuzhiyun 					physdev_list, phys_dev_index, id_phys);
4506*4882a593Smuzhiyun 				hpsa_get_path_info(this_device,
4507*4882a593Smuzhiyun 					physdev_list, phys_dev_index, id_phys);
4508*4882a593Smuzhiyun 			}
4509*4882a593Smuzhiyun 			ncurrent++;
4510*4882a593Smuzhiyun 			break;
4511*4882a593Smuzhiyun 		case TYPE_TAPE:
4512*4882a593Smuzhiyun 		case TYPE_MEDIUM_CHANGER:
4513*4882a593Smuzhiyun 			ncurrent++;
4514*4882a593Smuzhiyun 			break;
4515*4882a593Smuzhiyun 		case TYPE_ENCLOSURE:
4516*4882a593Smuzhiyun 			if (!this_device->external)
4517*4882a593Smuzhiyun 				hpsa_get_enclosure_info(h, lunaddrbytes,
4518*4882a593Smuzhiyun 						physdev_list, phys_dev_index,
4519*4882a593Smuzhiyun 						this_device);
4520*4882a593Smuzhiyun 			ncurrent++;
4521*4882a593Smuzhiyun 			break;
4522*4882a593Smuzhiyun 		case TYPE_RAID:
4523*4882a593Smuzhiyun 			/* Only present the Smartarray HBA as a RAID controller.
4524*4882a593Smuzhiyun 			 * If it's a RAID controller other than the HBA itself
4525*4882a593Smuzhiyun 			 * (an external RAID controller, MSA500 or similar)
4526*4882a593Smuzhiyun 			 * don't present it.
4527*4882a593Smuzhiyun 			 */
4528*4882a593Smuzhiyun 			if (!is_hba_lunid(lunaddrbytes))
4529*4882a593Smuzhiyun 				break;
4530*4882a593Smuzhiyun 			ncurrent++;
4531*4882a593Smuzhiyun 			break;
4532*4882a593Smuzhiyun 		default:
4533*4882a593Smuzhiyun 			break;
4534*4882a593Smuzhiyun 		}
4535*4882a593Smuzhiyun 		if (ncurrent >= HPSA_MAX_DEVICES)
4536*4882a593Smuzhiyun 			break;
4537*4882a593Smuzhiyun 	}
4538*4882a593Smuzhiyun 
4539*4882a593Smuzhiyun 	if (h->sas_host == NULL) {
4540*4882a593Smuzhiyun 		int rc = 0;
4541*4882a593Smuzhiyun 
4542*4882a593Smuzhiyun 		rc = hpsa_add_sas_host(h);
4543*4882a593Smuzhiyun 		if (rc) {
4544*4882a593Smuzhiyun 			dev_warn(&h->pdev->dev,
4545*4882a593Smuzhiyun 				"Could not add sas host %d\n", rc);
4546*4882a593Smuzhiyun 			goto out;
4547*4882a593Smuzhiyun 		}
4548*4882a593Smuzhiyun 	}
4549*4882a593Smuzhiyun 
4550*4882a593Smuzhiyun 	adjust_hpsa_scsi_table(h, currentsd, ncurrent);
4551*4882a593Smuzhiyun out:
4552*4882a593Smuzhiyun 	kfree(tmpdevice);
4553*4882a593Smuzhiyun 	for (i = 0; i < ndev_allocated; i++)
4554*4882a593Smuzhiyun 		kfree(currentsd[i]);
4555*4882a593Smuzhiyun 	kfree(currentsd);
4556*4882a593Smuzhiyun 	kfree(physdev_list);
4557*4882a593Smuzhiyun 	kfree(logdev_list);
4558*4882a593Smuzhiyun 	kfree(id_ctlr);
4559*4882a593Smuzhiyun 	kfree(id_phys);
4560*4882a593Smuzhiyun }
4561*4882a593Smuzhiyun 
hpsa_set_sg_descriptor(struct SGDescriptor * desc,struct scatterlist * sg)4562*4882a593Smuzhiyun static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
4563*4882a593Smuzhiyun 				   struct scatterlist *sg)
4564*4882a593Smuzhiyun {
4565*4882a593Smuzhiyun 	u64 addr64 = (u64) sg_dma_address(sg);
4566*4882a593Smuzhiyun 	unsigned int len = sg_dma_len(sg);
4567*4882a593Smuzhiyun 
4568*4882a593Smuzhiyun 	desc->Addr = cpu_to_le64(addr64);
4569*4882a593Smuzhiyun 	desc->Len = cpu_to_le32(len);
4570*4882a593Smuzhiyun 	desc->Ext = 0;
4571*4882a593Smuzhiyun }
4572*4882a593Smuzhiyun 
4573*4882a593Smuzhiyun /*
4574*4882a593Smuzhiyun  * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
4575*4882a593Smuzhiyun  * dma mapping  and fills in the scatter gather entries of the
4576*4882a593Smuzhiyun  * hpsa command, cp.
4577*4882a593Smuzhiyun  */
hpsa_scatter_gather(struct ctlr_info * h,struct CommandList * cp,struct scsi_cmnd * cmd)4578*4882a593Smuzhiyun static int hpsa_scatter_gather(struct ctlr_info *h,
4579*4882a593Smuzhiyun 		struct CommandList *cp,
4580*4882a593Smuzhiyun 		struct scsi_cmnd *cmd)
4581*4882a593Smuzhiyun {
4582*4882a593Smuzhiyun 	struct scatterlist *sg;
4583*4882a593Smuzhiyun 	int use_sg, i, sg_limit, chained, last_sg;
4584*4882a593Smuzhiyun 	struct SGDescriptor *curr_sg;
4585*4882a593Smuzhiyun 
4586*4882a593Smuzhiyun 	BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4587*4882a593Smuzhiyun 
4588*4882a593Smuzhiyun 	use_sg = scsi_dma_map(cmd);
4589*4882a593Smuzhiyun 	if (use_sg < 0)
4590*4882a593Smuzhiyun 		return use_sg;
4591*4882a593Smuzhiyun 
4592*4882a593Smuzhiyun 	if (!use_sg)
4593*4882a593Smuzhiyun 		goto sglist_finished;
4594*4882a593Smuzhiyun 
4595*4882a593Smuzhiyun 	/*
4596*4882a593Smuzhiyun 	 * If the number of entries is greater than the max for a single list,
4597*4882a593Smuzhiyun 	 * then we have a chained list; we will set up all but one entry in the
4598*4882a593Smuzhiyun 	 * first list (the last entry is saved for link information);
4599*4882a593Smuzhiyun 	 * otherwise, we don't have a chained list and we'll set up at each of
4600*4882a593Smuzhiyun 	 * the entries in the one list.
4601*4882a593Smuzhiyun 	 */
4602*4882a593Smuzhiyun 	curr_sg = cp->SG;
4603*4882a593Smuzhiyun 	chained = use_sg > h->max_cmd_sg_entries;
4604*4882a593Smuzhiyun 	sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg;
4605*4882a593Smuzhiyun 	last_sg = scsi_sg_count(cmd) - 1;
4606*4882a593Smuzhiyun 	scsi_for_each_sg(cmd, sg, sg_limit, i) {
4607*4882a593Smuzhiyun 		hpsa_set_sg_descriptor(curr_sg, sg);
4608*4882a593Smuzhiyun 		curr_sg++;
4609*4882a593Smuzhiyun 	}
4610*4882a593Smuzhiyun 
4611*4882a593Smuzhiyun 	if (chained) {
4612*4882a593Smuzhiyun 		/*
4613*4882a593Smuzhiyun 		 * Continue with the chained list.  Set curr_sg to the chained
4614*4882a593Smuzhiyun 		 * list.  Modify the limit to the total count less the entries
4615*4882a593Smuzhiyun 		 * we've already set up.  Resume the scan at the list entry
4616*4882a593Smuzhiyun 		 * where the previous loop left off.
4617*4882a593Smuzhiyun 		 */
4618*4882a593Smuzhiyun 		curr_sg = h->cmd_sg_list[cp->cmdindex];
4619*4882a593Smuzhiyun 		sg_limit = use_sg - sg_limit;
4620*4882a593Smuzhiyun 		for_each_sg(sg, sg, sg_limit, i) {
4621*4882a593Smuzhiyun 			hpsa_set_sg_descriptor(curr_sg, sg);
4622*4882a593Smuzhiyun 			curr_sg++;
4623*4882a593Smuzhiyun 		}
4624*4882a593Smuzhiyun 	}
4625*4882a593Smuzhiyun 
4626*4882a593Smuzhiyun 	/* Back the pointer up to the last entry and mark it as "last". */
4627*4882a593Smuzhiyun 	(curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST);
4628*4882a593Smuzhiyun 
4629*4882a593Smuzhiyun 	if (use_sg + chained > h->maxSG)
4630*4882a593Smuzhiyun 		h->maxSG = use_sg + chained;
4631*4882a593Smuzhiyun 
4632*4882a593Smuzhiyun 	if (chained) {
4633*4882a593Smuzhiyun 		cp->Header.SGList = h->max_cmd_sg_entries;
4634*4882a593Smuzhiyun 		cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
4635*4882a593Smuzhiyun 		if (hpsa_map_sg_chain_block(h, cp)) {
4636*4882a593Smuzhiyun 			scsi_dma_unmap(cmd);
4637*4882a593Smuzhiyun 			return -1;
4638*4882a593Smuzhiyun 		}
4639*4882a593Smuzhiyun 		return 0;
4640*4882a593Smuzhiyun 	}
4641*4882a593Smuzhiyun 
4642*4882a593Smuzhiyun sglist_finished:
4643*4882a593Smuzhiyun 
4644*4882a593Smuzhiyun 	cp->Header.SGList = (u8) use_sg;   /* no. SGs contig in this cmd */
4645*4882a593Smuzhiyun 	cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
4646*4882a593Smuzhiyun 	return 0;
4647*4882a593Smuzhiyun }
4648*4882a593Smuzhiyun 
warn_zero_length_transfer(struct ctlr_info * h,u8 * cdb,int cdb_len,const char * func)4649*4882a593Smuzhiyun static inline void warn_zero_length_transfer(struct ctlr_info *h,
4650*4882a593Smuzhiyun 						u8 *cdb, int cdb_len,
4651*4882a593Smuzhiyun 						const char *func)
4652*4882a593Smuzhiyun {
4653*4882a593Smuzhiyun 	dev_warn(&h->pdev->dev,
4654*4882a593Smuzhiyun 		 "%s: Blocking zero-length request: CDB:%*phN\n",
4655*4882a593Smuzhiyun 		 func, cdb_len, cdb);
4656*4882a593Smuzhiyun }
4657*4882a593Smuzhiyun 
4658*4882a593Smuzhiyun #define IO_ACCEL_INELIGIBLE 1
4659*4882a593Smuzhiyun /* zero-length transfers trigger hardware errors. */
is_zero_length_transfer(u8 * cdb)4660*4882a593Smuzhiyun static bool is_zero_length_transfer(u8 *cdb)
4661*4882a593Smuzhiyun {
4662*4882a593Smuzhiyun 	u32 block_cnt;
4663*4882a593Smuzhiyun 
4664*4882a593Smuzhiyun 	/* Block zero-length transfer sizes on certain commands. */
4665*4882a593Smuzhiyun 	switch (cdb[0]) {
4666*4882a593Smuzhiyun 	case READ_10:
4667*4882a593Smuzhiyun 	case WRITE_10:
4668*4882a593Smuzhiyun 	case VERIFY:		/* 0x2F */
4669*4882a593Smuzhiyun 	case WRITE_VERIFY:	/* 0x2E */
4670*4882a593Smuzhiyun 		block_cnt = get_unaligned_be16(&cdb[7]);
4671*4882a593Smuzhiyun 		break;
4672*4882a593Smuzhiyun 	case READ_12:
4673*4882a593Smuzhiyun 	case WRITE_12:
4674*4882a593Smuzhiyun 	case VERIFY_12: /* 0xAF */
4675*4882a593Smuzhiyun 	case WRITE_VERIFY_12:	/* 0xAE */
4676*4882a593Smuzhiyun 		block_cnt = get_unaligned_be32(&cdb[6]);
4677*4882a593Smuzhiyun 		break;
4678*4882a593Smuzhiyun 	case READ_16:
4679*4882a593Smuzhiyun 	case WRITE_16:
4680*4882a593Smuzhiyun 	case VERIFY_16:		/* 0x8F */
4681*4882a593Smuzhiyun 		block_cnt = get_unaligned_be32(&cdb[10]);
4682*4882a593Smuzhiyun 		break;
4683*4882a593Smuzhiyun 	default:
4684*4882a593Smuzhiyun 		return false;
4685*4882a593Smuzhiyun 	}
4686*4882a593Smuzhiyun 
4687*4882a593Smuzhiyun 	return block_cnt == 0;
4688*4882a593Smuzhiyun }
4689*4882a593Smuzhiyun 
fixup_ioaccel_cdb(u8 * cdb,int * cdb_len)4690*4882a593Smuzhiyun static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
4691*4882a593Smuzhiyun {
4692*4882a593Smuzhiyun 	int is_write = 0;
4693*4882a593Smuzhiyun 	u32 block;
4694*4882a593Smuzhiyun 	u32 block_cnt;
4695*4882a593Smuzhiyun 
4696*4882a593Smuzhiyun 	/* Perform some CDB fixups if needed using 10 byte reads/writes only */
4697*4882a593Smuzhiyun 	switch (cdb[0]) {
4698*4882a593Smuzhiyun 	case WRITE_6:
4699*4882a593Smuzhiyun 	case WRITE_12:
4700*4882a593Smuzhiyun 		is_write = 1;
4701*4882a593Smuzhiyun 		fallthrough;
4702*4882a593Smuzhiyun 	case READ_6:
4703*4882a593Smuzhiyun 	case READ_12:
4704*4882a593Smuzhiyun 		if (*cdb_len == 6) {
4705*4882a593Smuzhiyun 			block = (((cdb[1] & 0x1F) << 16) |
4706*4882a593Smuzhiyun 				(cdb[2] << 8) |
4707*4882a593Smuzhiyun 				cdb[3]);
4708*4882a593Smuzhiyun 			block_cnt = cdb[4];
4709*4882a593Smuzhiyun 			if (block_cnt == 0)
4710*4882a593Smuzhiyun 				block_cnt = 256;
4711*4882a593Smuzhiyun 		} else {
4712*4882a593Smuzhiyun 			BUG_ON(*cdb_len != 12);
4713*4882a593Smuzhiyun 			block = get_unaligned_be32(&cdb[2]);
4714*4882a593Smuzhiyun 			block_cnt = get_unaligned_be32(&cdb[6]);
4715*4882a593Smuzhiyun 		}
4716*4882a593Smuzhiyun 		if (block_cnt > 0xffff)
4717*4882a593Smuzhiyun 			return IO_ACCEL_INELIGIBLE;
4718*4882a593Smuzhiyun 
4719*4882a593Smuzhiyun 		cdb[0] = is_write ? WRITE_10 : READ_10;
4720*4882a593Smuzhiyun 		cdb[1] = 0;
4721*4882a593Smuzhiyun 		cdb[2] = (u8) (block >> 24);
4722*4882a593Smuzhiyun 		cdb[3] = (u8) (block >> 16);
4723*4882a593Smuzhiyun 		cdb[4] = (u8) (block >> 8);
4724*4882a593Smuzhiyun 		cdb[5] = (u8) (block);
4725*4882a593Smuzhiyun 		cdb[6] = 0;
4726*4882a593Smuzhiyun 		cdb[7] = (u8) (block_cnt >> 8);
4727*4882a593Smuzhiyun 		cdb[8] = (u8) (block_cnt);
4728*4882a593Smuzhiyun 		cdb[9] = 0;
4729*4882a593Smuzhiyun 		*cdb_len = 10;
4730*4882a593Smuzhiyun 		break;
4731*4882a593Smuzhiyun 	}
4732*4882a593Smuzhiyun 	return 0;
4733*4882a593Smuzhiyun }
4734*4882a593Smuzhiyun 
hpsa_scsi_ioaccel1_queue_command(struct ctlr_info * h,struct CommandList * c,u32 ioaccel_handle,u8 * cdb,int cdb_len,u8 * scsi3addr,struct hpsa_scsi_dev_t * phys_disk)4735*4882a593Smuzhiyun static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
4736*4882a593Smuzhiyun 	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4737*4882a593Smuzhiyun 	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4738*4882a593Smuzhiyun {
4739*4882a593Smuzhiyun 	struct scsi_cmnd *cmd = c->scsi_cmd;
4740*4882a593Smuzhiyun 	struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
4741*4882a593Smuzhiyun 	unsigned int len;
4742*4882a593Smuzhiyun 	unsigned int total_len = 0;
4743*4882a593Smuzhiyun 	struct scatterlist *sg;
4744*4882a593Smuzhiyun 	u64 addr64;
4745*4882a593Smuzhiyun 	int use_sg, i;
4746*4882a593Smuzhiyun 	struct SGDescriptor *curr_sg;
4747*4882a593Smuzhiyun 	u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
4748*4882a593Smuzhiyun 
4749*4882a593Smuzhiyun 	/* TODO: implement chaining support */
4750*4882a593Smuzhiyun 	if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
4751*4882a593Smuzhiyun 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4752*4882a593Smuzhiyun 		return IO_ACCEL_INELIGIBLE;
4753*4882a593Smuzhiyun 	}
4754*4882a593Smuzhiyun 
4755*4882a593Smuzhiyun 	BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
4756*4882a593Smuzhiyun 
4757*4882a593Smuzhiyun 	if (is_zero_length_transfer(cdb)) {
4758*4882a593Smuzhiyun 		warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4759*4882a593Smuzhiyun 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4760*4882a593Smuzhiyun 		return IO_ACCEL_INELIGIBLE;
4761*4882a593Smuzhiyun 	}
4762*4882a593Smuzhiyun 
4763*4882a593Smuzhiyun 	if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4764*4882a593Smuzhiyun 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4765*4882a593Smuzhiyun 		return IO_ACCEL_INELIGIBLE;
4766*4882a593Smuzhiyun 	}
4767*4882a593Smuzhiyun 
4768*4882a593Smuzhiyun 	c->cmd_type = CMD_IOACCEL1;
4769*4882a593Smuzhiyun 
4770*4882a593Smuzhiyun 	/* Adjust the DMA address to point to the accelerated command buffer */
4771*4882a593Smuzhiyun 	c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
4772*4882a593Smuzhiyun 				(c->cmdindex * sizeof(*cp));
4773*4882a593Smuzhiyun 	BUG_ON(c->busaddr & 0x0000007F);
4774*4882a593Smuzhiyun 
4775*4882a593Smuzhiyun 	use_sg = scsi_dma_map(cmd);
4776*4882a593Smuzhiyun 	if (use_sg < 0) {
4777*4882a593Smuzhiyun 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4778*4882a593Smuzhiyun 		return use_sg;
4779*4882a593Smuzhiyun 	}
4780*4882a593Smuzhiyun 
4781*4882a593Smuzhiyun 	if (use_sg) {
4782*4882a593Smuzhiyun 		curr_sg = cp->SG;
4783*4882a593Smuzhiyun 		scsi_for_each_sg(cmd, sg, use_sg, i) {
4784*4882a593Smuzhiyun 			addr64 = (u64) sg_dma_address(sg);
4785*4882a593Smuzhiyun 			len  = sg_dma_len(sg);
4786*4882a593Smuzhiyun 			total_len += len;
4787*4882a593Smuzhiyun 			curr_sg->Addr = cpu_to_le64(addr64);
4788*4882a593Smuzhiyun 			curr_sg->Len = cpu_to_le32(len);
4789*4882a593Smuzhiyun 			curr_sg->Ext = cpu_to_le32(0);
4790*4882a593Smuzhiyun 			curr_sg++;
4791*4882a593Smuzhiyun 		}
4792*4882a593Smuzhiyun 		(--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
4793*4882a593Smuzhiyun 
4794*4882a593Smuzhiyun 		switch (cmd->sc_data_direction) {
4795*4882a593Smuzhiyun 		case DMA_TO_DEVICE:
4796*4882a593Smuzhiyun 			control |= IOACCEL1_CONTROL_DATA_OUT;
4797*4882a593Smuzhiyun 			break;
4798*4882a593Smuzhiyun 		case DMA_FROM_DEVICE:
4799*4882a593Smuzhiyun 			control |= IOACCEL1_CONTROL_DATA_IN;
4800*4882a593Smuzhiyun 			break;
4801*4882a593Smuzhiyun 		case DMA_NONE:
4802*4882a593Smuzhiyun 			control |= IOACCEL1_CONTROL_NODATAXFER;
4803*4882a593Smuzhiyun 			break;
4804*4882a593Smuzhiyun 		default:
4805*4882a593Smuzhiyun 			dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4806*4882a593Smuzhiyun 			cmd->sc_data_direction);
4807*4882a593Smuzhiyun 			BUG();
4808*4882a593Smuzhiyun 			break;
4809*4882a593Smuzhiyun 		}
4810*4882a593Smuzhiyun 	} else {
4811*4882a593Smuzhiyun 		control |= IOACCEL1_CONTROL_NODATAXFER;
4812*4882a593Smuzhiyun 	}
4813*4882a593Smuzhiyun 
4814*4882a593Smuzhiyun 	c->Header.SGList = use_sg;
4815*4882a593Smuzhiyun 	/* Fill out the command structure to submit */
4816*4882a593Smuzhiyun 	cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
4817*4882a593Smuzhiyun 	cp->transfer_len = cpu_to_le32(total_len);
4818*4882a593Smuzhiyun 	cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
4819*4882a593Smuzhiyun 			(cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
4820*4882a593Smuzhiyun 	cp->control = cpu_to_le32(control);
4821*4882a593Smuzhiyun 	memcpy(cp->CDB, cdb, cdb_len);
4822*4882a593Smuzhiyun 	memcpy(cp->CISS_LUN, scsi3addr, 8);
4823*4882a593Smuzhiyun 	/* Tag was already set at init time. */
4824*4882a593Smuzhiyun 	enqueue_cmd_and_start_io(h, c);
4825*4882a593Smuzhiyun 	return 0;
4826*4882a593Smuzhiyun }
4827*4882a593Smuzhiyun 
4828*4882a593Smuzhiyun /*
4829*4882a593Smuzhiyun  * Queue a command directly to a device behind the controller using the
4830*4882a593Smuzhiyun  * I/O accelerator path.
4831*4882a593Smuzhiyun  */
hpsa_scsi_ioaccel_direct_map(struct ctlr_info * h,struct CommandList * c)4832*4882a593Smuzhiyun static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
4833*4882a593Smuzhiyun 	struct CommandList *c)
4834*4882a593Smuzhiyun {
4835*4882a593Smuzhiyun 	struct scsi_cmnd *cmd = c->scsi_cmd;
4836*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4837*4882a593Smuzhiyun 
4838*4882a593Smuzhiyun 	if (!dev)
4839*4882a593Smuzhiyun 		return -1;
4840*4882a593Smuzhiyun 
4841*4882a593Smuzhiyun 	c->phys_disk = dev;
4842*4882a593Smuzhiyun 
4843*4882a593Smuzhiyun 	if (dev->in_reset)
4844*4882a593Smuzhiyun 		return -1;
4845*4882a593Smuzhiyun 
4846*4882a593Smuzhiyun 	return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
4847*4882a593Smuzhiyun 		cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
4848*4882a593Smuzhiyun }
4849*4882a593Smuzhiyun 
4850*4882a593Smuzhiyun /*
4851*4882a593Smuzhiyun  * Set encryption parameters for the ioaccel2 request
4852*4882a593Smuzhiyun  */
set_encrypt_ioaccel2(struct ctlr_info * h,struct CommandList * c,struct io_accel2_cmd * cp)4853*4882a593Smuzhiyun static void set_encrypt_ioaccel2(struct ctlr_info *h,
4854*4882a593Smuzhiyun 	struct CommandList *c, struct io_accel2_cmd *cp)
4855*4882a593Smuzhiyun {
4856*4882a593Smuzhiyun 	struct scsi_cmnd *cmd = c->scsi_cmd;
4857*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4858*4882a593Smuzhiyun 	struct raid_map_data *map = &dev->raid_map;
4859*4882a593Smuzhiyun 	u64 first_block;
4860*4882a593Smuzhiyun 
4861*4882a593Smuzhiyun 	/* Are we doing encryption on this device */
4862*4882a593Smuzhiyun 	if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
4863*4882a593Smuzhiyun 		return;
4864*4882a593Smuzhiyun 	/* Set the data encryption key index. */
4865*4882a593Smuzhiyun 	cp->dekindex = map->dekindex;
4866*4882a593Smuzhiyun 
4867*4882a593Smuzhiyun 	/* Set the encryption enable flag, encoded into direction field. */
4868*4882a593Smuzhiyun 	cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
4869*4882a593Smuzhiyun 
4870*4882a593Smuzhiyun 	/* Set encryption tweak values based on logical block address
4871*4882a593Smuzhiyun 	 * If block size is 512, tweak value is LBA.
4872*4882a593Smuzhiyun 	 * For other block sizes, tweak is (LBA * block size)/ 512)
4873*4882a593Smuzhiyun 	 */
4874*4882a593Smuzhiyun 	switch (cmd->cmnd[0]) {
4875*4882a593Smuzhiyun 	/* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
4876*4882a593Smuzhiyun 	case READ_6:
4877*4882a593Smuzhiyun 	case WRITE_6:
4878*4882a593Smuzhiyun 		first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
4879*4882a593Smuzhiyun 				(cmd->cmnd[2] << 8) |
4880*4882a593Smuzhiyun 				cmd->cmnd[3]);
4881*4882a593Smuzhiyun 		break;
4882*4882a593Smuzhiyun 	case WRITE_10:
4883*4882a593Smuzhiyun 	case READ_10:
4884*4882a593Smuzhiyun 	/* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
4885*4882a593Smuzhiyun 	case WRITE_12:
4886*4882a593Smuzhiyun 	case READ_12:
4887*4882a593Smuzhiyun 		first_block = get_unaligned_be32(&cmd->cmnd[2]);
4888*4882a593Smuzhiyun 		break;
4889*4882a593Smuzhiyun 	case WRITE_16:
4890*4882a593Smuzhiyun 	case READ_16:
4891*4882a593Smuzhiyun 		first_block = get_unaligned_be64(&cmd->cmnd[2]);
4892*4882a593Smuzhiyun 		break;
4893*4882a593Smuzhiyun 	default:
4894*4882a593Smuzhiyun 		dev_err(&h->pdev->dev,
4895*4882a593Smuzhiyun 			"ERROR: %s: size (0x%x) not supported for encryption\n",
4896*4882a593Smuzhiyun 			__func__, cmd->cmnd[0]);
4897*4882a593Smuzhiyun 		BUG();
4898*4882a593Smuzhiyun 		break;
4899*4882a593Smuzhiyun 	}
4900*4882a593Smuzhiyun 
4901*4882a593Smuzhiyun 	if (le32_to_cpu(map->volume_blk_size) != 512)
4902*4882a593Smuzhiyun 		first_block = first_block *
4903*4882a593Smuzhiyun 				le32_to_cpu(map->volume_blk_size)/512;
4904*4882a593Smuzhiyun 
4905*4882a593Smuzhiyun 	cp->tweak_lower = cpu_to_le32(first_block);
4906*4882a593Smuzhiyun 	cp->tweak_upper = cpu_to_le32(first_block >> 32);
4907*4882a593Smuzhiyun }
4908*4882a593Smuzhiyun 
hpsa_scsi_ioaccel2_queue_command(struct ctlr_info * h,struct CommandList * c,u32 ioaccel_handle,u8 * cdb,int cdb_len,u8 * scsi3addr,struct hpsa_scsi_dev_t * phys_disk)4909*4882a593Smuzhiyun static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
4910*4882a593Smuzhiyun 	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4911*4882a593Smuzhiyun 	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4912*4882a593Smuzhiyun {
4913*4882a593Smuzhiyun 	struct scsi_cmnd *cmd = c->scsi_cmd;
4914*4882a593Smuzhiyun 	struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
4915*4882a593Smuzhiyun 	struct ioaccel2_sg_element *curr_sg;
4916*4882a593Smuzhiyun 	int use_sg, i;
4917*4882a593Smuzhiyun 	struct scatterlist *sg;
4918*4882a593Smuzhiyun 	u64 addr64;
4919*4882a593Smuzhiyun 	u32 len;
4920*4882a593Smuzhiyun 	u32 total_len = 0;
4921*4882a593Smuzhiyun 
4922*4882a593Smuzhiyun 	if (!cmd->device)
4923*4882a593Smuzhiyun 		return -1;
4924*4882a593Smuzhiyun 
4925*4882a593Smuzhiyun 	if (!cmd->device->hostdata)
4926*4882a593Smuzhiyun 		return -1;
4927*4882a593Smuzhiyun 
4928*4882a593Smuzhiyun 	BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4929*4882a593Smuzhiyun 
4930*4882a593Smuzhiyun 	if (is_zero_length_transfer(cdb)) {
4931*4882a593Smuzhiyun 		warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4932*4882a593Smuzhiyun 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4933*4882a593Smuzhiyun 		return IO_ACCEL_INELIGIBLE;
4934*4882a593Smuzhiyun 	}
4935*4882a593Smuzhiyun 
4936*4882a593Smuzhiyun 	if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4937*4882a593Smuzhiyun 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4938*4882a593Smuzhiyun 		return IO_ACCEL_INELIGIBLE;
4939*4882a593Smuzhiyun 	}
4940*4882a593Smuzhiyun 
4941*4882a593Smuzhiyun 	c->cmd_type = CMD_IOACCEL2;
4942*4882a593Smuzhiyun 	/* Adjust the DMA address to point to the accelerated command buffer */
4943*4882a593Smuzhiyun 	c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
4944*4882a593Smuzhiyun 				(c->cmdindex * sizeof(*cp));
4945*4882a593Smuzhiyun 	BUG_ON(c->busaddr & 0x0000007F);
4946*4882a593Smuzhiyun 
4947*4882a593Smuzhiyun 	memset(cp, 0, sizeof(*cp));
4948*4882a593Smuzhiyun 	cp->IU_type = IOACCEL2_IU_TYPE;
4949*4882a593Smuzhiyun 
4950*4882a593Smuzhiyun 	use_sg = scsi_dma_map(cmd);
4951*4882a593Smuzhiyun 	if (use_sg < 0) {
4952*4882a593Smuzhiyun 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4953*4882a593Smuzhiyun 		return use_sg;
4954*4882a593Smuzhiyun 	}
4955*4882a593Smuzhiyun 
4956*4882a593Smuzhiyun 	if (use_sg) {
4957*4882a593Smuzhiyun 		curr_sg = cp->sg;
4958*4882a593Smuzhiyun 		if (use_sg > h->ioaccel_maxsg) {
4959*4882a593Smuzhiyun 			addr64 = le64_to_cpu(
4960*4882a593Smuzhiyun 				h->ioaccel2_cmd_sg_list[c->cmdindex]->address);
4961*4882a593Smuzhiyun 			curr_sg->address = cpu_to_le64(addr64);
4962*4882a593Smuzhiyun 			curr_sg->length = 0;
4963*4882a593Smuzhiyun 			curr_sg->reserved[0] = 0;
4964*4882a593Smuzhiyun 			curr_sg->reserved[1] = 0;
4965*4882a593Smuzhiyun 			curr_sg->reserved[2] = 0;
4966*4882a593Smuzhiyun 			curr_sg->chain_indicator = IOACCEL2_CHAIN;
4967*4882a593Smuzhiyun 
4968*4882a593Smuzhiyun 			curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex];
4969*4882a593Smuzhiyun 		}
4970*4882a593Smuzhiyun 		scsi_for_each_sg(cmd, sg, use_sg, i) {
4971*4882a593Smuzhiyun 			addr64 = (u64) sg_dma_address(sg);
4972*4882a593Smuzhiyun 			len  = sg_dma_len(sg);
4973*4882a593Smuzhiyun 			total_len += len;
4974*4882a593Smuzhiyun 			curr_sg->address = cpu_to_le64(addr64);
4975*4882a593Smuzhiyun 			curr_sg->length = cpu_to_le32(len);
4976*4882a593Smuzhiyun 			curr_sg->reserved[0] = 0;
4977*4882a593Smuzhiyun 			curr_sg->reserved[1] = 0;
4978*4882a593Smuzhiyun 			curr_sg->reserved[2] = 0;
4979*4882a593Smuzhiyun 			curr_sg->chain_indicator = 0;
4980*4882a593Smuzhiyun 			curr_sg++;
4981*4882a593Smuzhiyun 		}
4982*4882a593Smuzhiyun 
4983*4882a593Smuzhiyun 		/*
4984*4882a593Smuzhiyun 		 * Set the last s/g element bit
4985*4882a593Smuzhiyun 		 */
4986*4882a593Smuzhiyun 		(curr_sg - 1)->chain_indicator = IOACCEL2_LAST_SG;
4987*4882a593Smuzhiyun 
4988*4882a593Smuzhiyun 		switch (cmd->sc_data_direction) {
4989*4882a593Smuzhiyun 		case DMA_TO_DEVICE:
4990*4882a593Smuzhiyun 			cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4991*4882a593Smuzhiyun 			cp->direction |= IOACCEL2_DIR_DATA_OUT;
4992*4882a593Smuzhiyun 			break;
4993*4882a593Smuzhiyun 		case DMA_FROM_DEVICE:
4994*4882a593Smuzhiyun 			cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4995*4882a593Smuzhiyun 			cp->direction |= IOACCEL2_DIR_DATA_IN;
4996*4882a593Smuzhiyun 			break;
4997*4882a593Smuzhiyun 		case DMA_NONE:
4998*4882a593Smuzhiyun 			cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4999*4882a593Smuzhiyun 			cp->direction |= IOACCEL2_DIR_NO_DATA;
5000*4882a593Smuzhiyun 			break;
5001*4882a593Smuzhiyun 		default:
5002*4882a593Smuzhiyun 			dev_err(&h->pdev->dev, "unknown data direction: %d\n",
5003*4882a593Smuzhiyun 				cmd->sc_data_direction);
5004*4882a593Smuzhiyun 			BUG();
5005*4882a593Smuzhiyun 			break;
5006*4882a593Smuzhiyun 		}
5007*4882a593Smuzhiyun 	} else {
5008*4882a593Smuzhiyun 		cp->direction &= ~IOACCEL2_DIRECTION_MASK;
5009*4882a593Smuzhiyun 		cp->direction |= IOACCEL2_DIR_NO_DATA;
5010*4882a593Smuzhiyun 	}
5011*4882a593Smuzhiyun 
5012*4882a593Smuzhiyun 	/* Set encryption parameters, if necessary */
5013*4882a593Smuzhiyun 	set_encrypt_ioaccel2(h, c, cp);
5014*4882a593Smuzhiyun 
5015*4882a593Smuzhiyun 	cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
5016*4882a593Smuzhiyun 	cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
5017*4882a593Smuzhiyun 	memcpy(cp->cdb, cdb, sizeof(cp->cdb));
5018*4882a593Smuzhiyun 
5019*4882a593Smuzhiyun 	cp->data_len = cpu_to_le32(total_len);
5020*4882a593Smuzhiyun 	cp->err_ptr = cpu_to_le64(c->busaddr +
5021*4882a593Smuzhiyun 			offsetof(struct io_accel2_cmd, error_data));
5022*4882a593Smuzhiyun 	cp->err_len = cpu_to_le32(sizeof(cp->error_data));
5023*4882a593Smuzhiyun 
5024*4882a593Smuzhiyun 	/* fill in sg elements */
5025*4882a593Smuzhiyun 	if (use_sg > h->ioaccel_maxsg) {
5026*4882a593Smuzhiyun 		cp->sg_count = 1;
5027*4882a593Smuzhiyun 		cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0]));
5028*4882a593Smuzhiyun 		if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) {
5029*4882a593Smuzhiyun 			atomic_dec(&phys_disk->ioaccel_cmds_out);
5030*4882a593Smuzhiyun 			scsi_dma_unmap(cmd);
5031*4882a593Smuzhiyun 			return -1;
5032*4882a593Smuzhiyun 		}
5033*4882a593Smuzhiyun 	} else
5034*4882a593Smuzhiyun 		cp->sg_count = (u8) use_sg;
5035*4882a593Smuzhiyun 
5036*4882a593Smuzhiyun 	if (phys_disk->in_reset) {
5037*4882a593Smuzhiyun 		cmd->result = DID_RESET << 16;
5038*4882a593Smuzhiyun 		return -1;
5039*4882a593Smuzhiyun 	}
5040*4882a593Smuzhiyun 
5041*4882a593Smuzhiyun 	enqueue_cmd_and_start_io(h, c);
5042*4882a593Smuzhiyun 	return 0;
5043*4882a593Smuzhiyun }
5044*4882a593Smuzhiyun 
5045*4882a593Smuzhiyun /*
5046*4882a593Smuzhiyun  * Queue a command to the correct I/O accelerator path.
5047*4882a593Smuzhiyun  */
hpsa_scsi_ioaccel_queue_command(struct ctlr_info * h,struct CommandList * c,u32 ioaccel_handle,u8 * cdb,int cdb_len,u8 * scsi3addr,struct hpsa_scsi_dev_t * phys_disk)5048*4882a593Smuzhiyun static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
5049*4882a593Smuzhiyun 	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
5050*4882a593Smuzhiyun 	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
5051*4882a593Smuzhiyun {
5052*4882a593Smuzhiyun 	if (!c->scsi_cmd->device)
5053*4882a593Smuzhiyun 		return -1;
5054*4882a593Smuzhiyun 
5055*4882a593Smuzhiyun 	if (!c->scsi_cmd->device->hostdata)
5056*4882a593Smuzhiyun 		return -1;
5057*4882a593Smuzhiyun 
5058*4882a593Smuzhiyun 	if (phys_disk->in_reset)
5059*4882a593Smuzhiyun 		return -1;
5060*4882a593Smuzhiyun 
5061*4882a593Smuzhiyun 	/* Try to honor the device's queue depth */
5062*4882a593Smuzhiyun 	if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
5063*4882a593Smuzhiyun 					phys_disk->queue_depth) {
5064*4882a593Smuzhiyun 		atomic_dec(&phys_disk->ioaccel_cmds_out);
5065*4882a593Smuzhiyun 		return IO_ACCEL_INELIGIBLE;
5066*4882a593Smuzhiyun 	}
5067*4882a593Smuzhiyun 	if (h->transMethod & CFGTBL_Trans_io_accel1)
5068*4882a593Smuzhiyun 		return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
5069*4882a593Smuzhiyun 						cdb, cdb_len, scsi3addr,
5070*4882a593Smuzhiyun 						phys_disk);
5071*4882a593Smuzhiyun 	else
5072*4882a593Smuzhiyun 		return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
5073*4882a593Smuzhiyun 						cdb, cdb_len, scsi3addr,
5074*4882a593Smuzhiyun 						phys_disk);
5075*4882a593Smuzhiyun }
5076*4882a593Smuzhiyun 
raid_map_helper(struct raid_map_data * map,int offload_to_mirror,u32 * map_index,u32 * current_group)5077*4882a593Smuzhiyun static void raid_map_helper(struct raid_map_data *map,
5078*4882a593Smuzhiyun 		int offload_to_mirror, u32 *map_index, u32 *current_group)
5079*4882a593Smuzhiyun {
5080*4882a593Smuzhiyun 	if (offload_to_mirror == 0)  {
5081*4882a593Smuzhiyun 		/* use physical disk in the first mirrored group. */
5082*4882a593Smuzhiyun 		*map_index %= le16_to_cpu(map->data_disks_per_row);
5083*4882a593Smuzhiyun 		return;
5084*4882a593Smuzhiyun 	}
5085*4882a593Smuzhiyun 	do {
5086*4882a593Smuzhiyun 		/* determine mirror group that *map_index indicates */
5087*4882a593Smuzhiyun 		*current_group = *map_index /
5088*4882a593Smuzhiyun 			le16_to_cpu(map->data_disks_per_row);
5089*4882a593Smuzhiyun 		if (offload_to_mirror == *current_group)
5090*4882a593Smuzhiyun 			continue;
5091*4882a593Smuzhiyun 		if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
5092*4882a593Smuzhiyun 			/* select map index from next group */
5093*4882a593Smuzhiyun 			*map_index += le16_to_cpu(map->data_disks_per_row);
5094*4882a593Smuzhiyun 			(*current_group)++;
5095*4882a593Smuzhiyun 		} else {
5096*4882a593Smuzhiyun 			/* select map index from first group */
5097*4882a593Smuzhiyun 			*map_index %= le16_to_cpu(map->data_disks_per_row);
5098*4882a593Smuzhiyun 			*current_group = 0;
5099*4882a593Smuzhiyun 		}
5100*4882a593Smuzhiyun 	} while (offload_to_mirror != *current_group);
5101*4882a593Smuzhiyun }
5102*4882a593Smuzhiyun 
5103*4882a593Smuzhiyun /*
5104*4882a593Smuzhiyun  * Attempt to perform offload RAID mapping for a logical volume I/O.
5105*4882a593Smuzhiyun  */
hpsa_scsi_ioaccel_raid_map(struct ctlr_info * h,struct CommandList * c)5106*4882a593Smuzhiyun static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
5107*4882a593Smuzhiyun 	struct CommandList *c)
5108*4882a593Smuzhiyun {
5109*4882a593Smuzhiyun 	struct scsi_cmnd *cmd = c->scsi_cmd;
5110*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5111*4882a593Smuzhiyun 	struct raid_map_data *map = &dev->raid_map;
5112*4882a593Smuzhiyun 	struct raid_map_disk_data *dd = &map->data[0];
5113*4882a593Smuzhiyun 	int is_write = 0;
5114*4882a593Smuzhiyun 	u32 map_index;
5115*4882a593Smuzhiyun 	u64 first_block, last_block;
5116*4882a593Smuzhiyun 	u32 block_cnt;
5117*4882a593Smuzhiyun 	u32 blocks_per_row;
5118*4882a593Smuzhiyun 	u64 first_row, last_row;
5119*4882a593Smuzhiyun 	u32 first_row_offset, last_row_offset;
5120*4882a593Smuzhiyun 	u32 first_column, last_column;
5121*4882a593Smuzhiyun 	u64 r0_first_row, r0_last_row;
5122*4882a593Smuzhiyun 	u32 r5or6_blocks_per_row;
5123*4882a593Smuzhiyun 	u64 r5or6_first_row, r5or6_last_row;
5124*4882a593Smuzhiyun 	u32 r5or6_first_row_offset, r5or6_last_row_offset;
5125*4882a593Smuzhiyun 	u32 r5or6_first_column, r5or6_last_column;
5126*4882a593Smuzhiyun 	u32 total_disks_per_row;
5127*4882a593Smuzhiyun 	u32 stripesize;
5128*4882a593Smuzhiyun 	u32 first_group, last_group, current_group;
5129*4882a593Smuzhiyun 	u32 map_row;
5130*4882a593Smuzhiyun 	u32 disk_handle;
5131*4882a593Smuzhiyun 	u64 disk_block;
5132*4882a593Smuzhiyun 	u32 disk_block_cnt;
5133*4882a593Smuzhiyun 	u8 cdb[16];
5134*4882a593Smuzhiyun 	u8 cdb_len;
5135*4882a593Smuzhiyun 	u16 strip_size;
5136*4882a593Smuzhiyun #if BITS_PER_LONG == 32
5137*4882a593Smuzhiyun 	u64 tmpdiv;
5138*4882a593Smuzhiyun #endif
5139*4882a593Smuzhiyun 	int offload_to_mirror;
5140*4882a593Smuzhiyun 
5141*4882a593Smuzhiyun 	if (!dev)
5142*4882a593Smuzhiyun 		return -1;
5143*4882a593Smuzhiyun 
5144*4882a593Smuzhiyun 	if (dev->in_reset)
5145*4882a593Smuzhiyun 		return -1;
5146*4882a593Smuzhiyun 
5147*4882a593Smuzhiyun 	/* check for valid opcode, get LBA and block count */
5148*4882a593Smuzhiyun 	switch (cmd->cmnd[0]) {
5149*4882a593Smuzhiyun 	case WRITE_6:
5150*4882a593Smuzhiyun 		is_write = 1;
5151*4882a593Smuzhiyun 		fallthrough;
5152*4882a593Smuzhiyun 	case READ_6:
5153*4882a593Smuzhiyun 		first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
5154*4882a593Smuzhiyun 				(cmd->cmnd[2] << 8) |
5155*4882a593Smuzhiyun 				cmd->cmnd[3]);
5156*4882a593Smuzhiyun 		block_cnt = cmd->cmnd[4];
5157*4882a593Smuzhiyun 		if (block_cnt == 0)
5158*4882a593Smuzhiyun 			block_cnt = 256;
5159*4882a593Smuzhiyun 		break;
5160*4882a593Smuzhiyun 	case WRITE_10:
5161*4882a593Smuzhiyun 		is_write = 1;
5162*4882a593Smuzhiyun 		fallthrough;
5163*4882a593Smuzhiyun 	case READ_10:
5164*4882a593Smuzhiyun 		first_block =
5165*4882a593Smuzhiyun 			(((u64) cmd->cmnd[2]) << 24) |
5166*4882a593Smuzhiyun 			(((u64) cmd->cmnd[3]) << 16) |
5167*4882a593Smuzhiyun 			(((u64) cmd->cmnd[4]) << 8) |
5168*4882a593Smuzhiyun 			cmd->cmnd[5];
5169*4882a593Smuzhiyun 		block_cnt =
5170*4882a593Smuzhiyun 			(((u32) cmd->cmnd[7]) << 8) |
5171*4882a593Smuzhiyun 			cmd->cmnd[8];
5172*4882a593Smuzhiyun 		break;
5173*4882a593Smuzhiyun 	case WRITE_12:
5174*4882a593Smuzhiyun 		is_write = 1;
5175*4882a593Smuzhiyun 		fallthrough;
5176*4882a593Smuzhiyun 	case READ_12:
5177*4882a593Smuzhiyun 		first_block =
5178*4882a593Smuzhiyun 			(((u64) cmd->cmnd[2]) << 24) |
5179*4882a593Smuzhiyun 			(((u64) cmd->cmnd[3]) << 16) |
5180*4882a593Smuzhiyun 			(((u64) cmd->cmnd[4]) << 8) |
5181*4882a593Smuzhiyun 			cmd->cmnd[5];
5182*4882a593Smuzhiyun 		block_cnt =
5183*4882a593Smuzhiyun 			(((u32) cmd->cmnd[6]) << 24) |
5184*4882a593Smuzhiyun 			(((u32) cmd->cmnd[7]) << 16) |
5185*4882a593Smuzhiyun 			(((u32) cmd->cmnd[8]) << 8) |
5186*4882a593Smuzhiyun 		cmd->cmnd[9];
5187*4882a593Smuzhiyun 		break;
5188*4882a593Smuzhiyun 	case WRITE_16:
5189*4882a593Smuzhiyun 		is_write = 1;
5190*4882a593Smuzhiyun 		fallthrough;
5191*4882a593Smuzhiyun 	case READ_16:
5192*4882a593Smuzhiyun 		first_block =
5193*4882a593Smuzhiyun 			(((u64) cmd->cmnd[2]) << 56) |
5194*4882a593Smuzhiyun 			(((u64) cmd->cmnd[3]) << 48) |
5195*4882a593Smuzhiyun 			(((u64) cmd->cmnd[4]) << 40) |
5196*4882a593Smuzhiyun 			(((u64) cmd->cmnd[5]) << 32) |
5197*4882a593Smuzhiyun 			(((u64) cmd->cmnd[6]) << 24) |
5198*4882a593Smuzhiyun 			(((u64) cmd->cmnd[7]) << 16) |
5199*4882a593Smuzhiyun 			(((u64) cmd->cmnd[8]) << 8) |
5200*4882a593Smuzhiyun 			cmd->cmnd[9];
5201*4882a593Smuzhiyun 		block_cnt =
5202*4882a593Smuzhiyun 			(((u32) cmd->cmnd[10]) << 24) |
5203*4882a593Smuzhiyun 			(((u32) cmd->cmnd[11]) << 16) |
5204*4882a593Smuzhiyun 			(((u32) cmd->cmnd[12]) << 8) |
5205*4882a593Smuzhiyun 			cmd->cmnd[13];
5206*4882a593Smuzhiyun 		break;
5207*4882a593Smuzhiyun 	default:
5208*4882a593Smuzhiyun 		return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
5209*4882a593Smuzhiyun 	}
5210*4882a593Smuzhiyun 	last_block = first_block + block_cnt - 1;
5211*4882a593Smuzhiyun 
5212*4882a593Smuzhiyun 	/* check for write to non-RAID-0 */
5213*4882a593Smuzhiyun 	if (is_write && dev->raid_level != 0)
5214*4882a593Smuzhiyun 		return IO_ACCEL_INELIGIBLE;
5215*4882a593Smuzhiyun 
5216*4882a593Smuzhiyun 	/* check for invalid block or wraparound */
5217*4882a593Smuzhiyun 	if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
5218*4882a593Smuzhiyun 		last_block < first_block)
5219*4882a593Smuzhiyun 		return IO_ACCEL_INELIGIBLE;
5220*4882a593Smuzhiyun 
5221*4882a593Smuzhiyun 	/* calculate stripe information for the request */
5222*4882a593Smuzhiyun 	blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
5223*4882a593Smuzhiyun 				le16_to_cpu(map->strip_size);
5224*4882a593Smuzhiyun 	strip_size = le16_to_cpu(map->strip_size);
5225*4882a593Smuzhiyun #if BITS_PER_LONG == 32
5226*4882a593Smuzhiyun 	tmpdiv = first_block;
5227*4882a593Smuzhiyun 	(void) do_div(tmpdiv, blocks_per_row);
5228*4882a593Smuzhiyun 	first_row = tmpdiv;
5229*4882a593Smuzhiyun 	tmpdiv = last_block;
5230*4882a593Smuzhiyun 	(void) do_div(tmpdiv, blocks_per_row);
5231*4882a593Smuzhiyun 	last_row = tmpdiv;
5232*4882a593Smuzhiyun 	first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5233*4882a593Smuzhiyun 	last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5234*4882a593Smuzhiyun 	tmpdiv = first_row_offset;
5235*4882a593Smuzhiyun 	(void) do_div(tmpdiv, strip_size);
5236*4882a593Smuzhiyun 	first_column = tmpdiv;
5237*4882a593Smuzhiyun 	tmpdiv = last_row_offset;
5238*4882a593Smuzhiyun 	(void) do_div(tmpdiv, strip_size);
5239*4882a593Smuzhiyun 	last_column = tmpdiv;
5240*4882a593Smuzhiyun #else
5241*4882a593Smuzhiyun 	first_row = first_block / blocks_per_row;
5242*4882a593Smuzhiyun 	last_row = last_block / blocks_per_row;
5243*4882a593Smuzhiyun 	first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5244*4882a593Smuzhiyun 	last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5245*4882a593Smuzhiyun 	first_column = first_row_offset / strip_size;
5246*4882a593Smuzhiyun 	last_column = last_row_offset / strip_size;
5247*4882a593Smuzhiyun #endif
5248*4882a593Smuzhiyun 
5249*4882a593Smuzhiyun 	/* if this isn't a single row/column then give to the controller */
5250*4882a593Smuzhiyun 	if ((first_row != last_row) || (first_column != last_column))
5251*4882a593Smuzhiyun 		return IO_ACCEL_INELIGIBLE;
5252*4882a593Smuzhiyun 
5253*4882a593Smuzhiyun 	/* proceeding with driver mapping */
5254*4882a593Smuzhiyun 	total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
5255*4882a593Smuzhiyun 				le16_to_cpu(map->metadata_disks_per_row);
5256*4882a593Smuzhiyun 	map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5257*4882a593Smuzhiyun 				le16_to_cpu(map->row_cnt);
5258*4882a593Smuzhiyun 	map_index = (map_row * total_disks_per_row) + first_column;
5259*4882a593Smuzhiyun 
5260*4882a593Smuzhiyun 	switch (dev->raid_level) {
5261*4882a593Smuzhiyun 	case HPSA_RAID_0:
5262*4882a593Smuzhiyun 		break; /* nothing special to do */
5263*4882a593Smuzhiyun 	case HPSA_RAID_1:
5264*4882a593Smuzhiyun 		/* Handles load balance across RAID 1 members.
5265*4882a593Smuzhiyun 		 * (2-drive R1 and R10 with even # of drives.)
5266*4882a593Smuzhiyun 		 * Appropriate for SSDs, not optimal for HDDs
5267*4882a593Smuzhiyun 		 * Ensure we have the correct raid_map.
5268*4882a593Smuzhiyun 		 */
5269*4882a593Smuzhiyun 		if (le16_to_cpu(map->layout_map_count) != 2) {
5270*4882a593Smuzhiyun 			hpsa_turn_off_ioaccel_for_device(dev);
5271*4882a593Smuzhiyun 			return IO_ACCEL_INELIGIBLE;
5272*4882a593Smuzhiyun 		}
5273*4882a593Smuzhiyun 		if (dev->offload_to_mirror)
5274*4882a593Smuzhiyun 			map_index += le16_to_cpu(map->data_disks_per_row);
5275*4882a593Smuzhiyun 		dev->offload_to_mirror = !dev->offload_to_mirror;
5276*4882a593Smuzhiyun 		break;
5277*4882a593Smuzhiyun 	case HPSA_RAID_ADM:
5278*4882a593Smuzhiyun 		/* Handles N-way mirrors  (R1-ADM)
5279*4882a593Smuzhiyun 		 * and R10 with # of drives divisible by 3.)
5280*4882a593Smuzhiyun 		 * Ensure we have the correct raid_map.
5281*4882a593Smuzhiyun 		 */
5282*4882a593Smuzhiyun 		if (le16_to_cpu(map->layout_map_count) != 3) {
5283*4882a593Smuzhiyun 			hpsa_turn_off_ioaccel_for_device(dev);
5284*4882a593Smuzhiyun 			return IO_ACCEL_INELIGIBLE;
5285*4882a593Smuzhiyun 		}
5286*4882a593Smuzhiyun 
5287*4882a593Smuzhiyun 		offload_to_mirror = dev->offload_to_mirror;
5288*4882a593Smuzhiyun 		raid_map_helper(map, offload_to_mirror,
5289*4882a593Smuzhiyun 				&map_index, &current_group);
5290*4882a593Smuzhiyun 		/* set mirror group to use next time */
5291*4882a593Smuzhiyun 		offload_to_mirror =
5292*4882a593Smuzhiyun 			(offload_to_mirror >=
5293*4882a593Smuzhiyun 			le16_to_cpu(map->layout_map_count) - 1)
5294*4882a593Smuzhiyun 			? 0 : offload_to_mirror + 1;
5295*4882a593Smuzhiyun 		dev->offload_to_mirror = offload_to_mirror;
5296*4882a593Smuzhiyun 		/* Avoid direct use of dev->offload_to_mirror within this
5297*4882a593Smuzhiyun 		 * function since multiple threads might simultaneously
5298*4882a593Smuzhiyun 		 * increment it beyond the range of dev->layout_map_count -1.
5299*4882a593Smuzhiyun 		 */
5300*4882a593Smuzhiyun 		break;
5301*4882a593Smuzhiyun 	case HPSA_RAID_5:
5302*4882a593Smuzhiyun 	case HPSA_RAID_6:
5303*4882a593Smuzhiyun 		if (le16_to_cpu(map->layout_map_count) <= 1)
5304*4882a593Smuzhiyun 			break;
5305*4882a593Smuzhiyun 
5306*4882a593Smuzhiyun 		/* Verify first and last block are in same RAID group */
5307*4882a593Smuzhiyun 		r5or6_blocks_per_row =
5308*4882a593Smuzhiyun 			le16_to_cpu(map->strip_size) *
5309*4882a593Smuzhiyun 			le16_to_cpu(map->data_disks_per_row);
5310*4882a593Smuzhiyun 		if (r5or6_blocks_per_row == 0) {
5311*4882a593Smuzhiyun 			hpsa_turn_off_ioaccel_for_device(dev);
5312*4882a593Smuzhiyun 			return IO_ACCEL_INELIGIBLE;
5313*4882a593Smuzhiyun 		}
5314*4882a593Smuzhiyun 		stripesize = r5or6_blocks_per_row *
5315*4882a593Smuzhiyun 			le16_to_cpu(map->layout_map_count);
5316*4882a593Smuzhiyun #if BITS_PER_LONG == 32
5317*4882a593Smuzhiyun 		tmpdiv = first_block;
5318*4882a593Smuzhiyun 		first_group = do_div(tmpdiv, stripesize);
5319*4882a593Smuzhiyun 		tmpdiv = first_group;
5320*4882a593Smuzhiyun 		(void) do_div(tmpdiv, r5or6_blocks_per_row);
5321*4882a593Smuzhiyun 		first_group = tmpdiv;
5322*4882a593Smuzhiyun 		tmpdiv = last_block;
5323*4882a593Smuzhiyun 		last_group = do_div(tmpdiv, stripesize);
5324*4882a593Smuzhiyun 		tmpdiv = last_group;
5325*4882a593Smuzhiyun 		(void) do_div(tmpdiv, r5or6_blocks_per_row);
5326*4882a593Smuzhiyun 		last_group = tmpdiv;
5327*4882a593Smuzhiyun #else
5328*4882a593Smuzhiyun 		first_group = (first_block % stripesize) / r5or6_blocks_per_row;
5329*4882a593Smuzhiyun 		last_group = (last_block % stripesize) / r5or6_blocks_per_row;
5330*4882a593Smuzhiyun #endif
5331*4882a593Smuzhiyun 		if (first_group != last_group)
5332*4882a593Smuzhiyun 			return IO_ACCEL_INELIGIBLE;
5333*4882a593Smuzhiyun 
5334*4882a593Smuzhiyun 		/* Verify request is in a single row of RAID 5/6 */
5335*4882a593Smuzhiyun #if BITS_PER_LONG == 32
5336*4882a593Smuzhiyun 		tmpdiv = first_block;
5337*4882a593Smuzhiyun 		(void) do_div(tmpdiv, stripesize);
5338*4882a593Smuzhiyun 		first_row = r5or6_first_row = r0_first_row = tmpdiv;
5339*4882a593Smuzhiyun 		tmpdiv = last_block;
5340*4882a593Smuzhiyun 		(void) do_div(tmpdiv, stripesize);
5341*4882a593Smuzhiyun 		r5or6_last_row = r0_last_row = tmpdiv;
5342*4882a593Smuzhiyun #else
5343*4882a593Smuzhiyun 		first_row = r5or6_first_row = r0_first_row =
5344*4882a593Smuzhiyun 						first_block / stripesize;
5345*4882a593Smuzhiyun 		r5or6_last_row = r0_last_row = last_block / stripesize;
5346*4882a593Smuzhiyun #endif
5347*4882a593Smuzhiyun 		if (r5or6_first_row != r5or6_last_row)
5348*4882a593Smuzhiyun 			return IO_ACCEL_INELIGIBLE;
5349*4882a593Smuzhiyun 
5350*4882a593Smuzhiyun 
5351*4882a593Smuzhiyun 		/* Verify request is in a single column */
5352*4882a593Smuzhiyun #if BITS_PER_LONG == 32
5353*4882a593Smuzhiyun 		tmpdiv = first_block;
5354*4882a593Smuzhiyun 		first_row_offset = do_div(tmpdiv, stripesize);
5355*4882a593Smuzhiyun 		tmpdiv = first_row_offset;
5356*4882a593Smuzhiyun 		first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
5357*4882a593Smuzhiyun 		r5or6_first_row_offset = first_row_offset;
5358*4882a593Smuzhiyun 		tmpdiv = last_block;
5359*4882a593Smuzhiyun 		r5or6_last_row_offset = do_div(tmpdiv, stripesize);
5360*4882a593Smuzhiyun 		tmpdiv = r5or6_last_row_offset;
5361*4882a593Smuzhiyun 		r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
5362*4882a593Smuzhiyun 		tmpdiv = r5or6_first_row_offset;
5363*4882a593Smuzhiyun 		(void) do_div(tmpdiv, map->strip_size);
5364*4882a593Smuzhiyun 		first_column = r5or6_first_column = tmpdiv;
5365*4882a593Smuzhiyun 		tmpdiv = r5or6_last_row_offset;
5366*4882a593Smuzhiyun 		(void) do_div(tmpdiv, map->strip_size);
5367*4882a593Smuzhiyun 		r5or6_last_column = tmpdiv;
5368*4882a593Smuzhiyun #else
5369*4882a593Smuzhiyun 		first_row_offset = r5or6_first_row_offset =
5370*4882a593Smuzhiyun 			(u32)((first_block % stripesize) %
5371*4882a593Smuzhiyun 						r5or6_blocks_per_row);
5372*4882a593Smuzhiyun 
5373*4882a593Smuzhiyun 		r5or6_last_row_offset =
5374*4882a593Smuzhiyun 			(u32)((last_block % stripesize) %
5375*4882a593Smuzhiyun 						r5or6_blocks_per_row);
5376*4882a593Smuzhiyun 
5377*4882a593Smuzhiyun 		first_column = r5or6_first_column =
5378*4882a593Smuzhiyun 			r5or6_first_row_offset / le16_to_cpu(map->strip_size);
5379*4882a593Smuzhiyun 		r5or6_last_column =
5380*4882a593Smuzhiyun 			r5or6_last_row_offset / le16_to_cpu(map->strip_size);
5381*4882a593Smuzhiyun #endif
5382*4882a593Smuzhiyun 		if (r5or6_first_column != r5or6_last_column)
5383*4882a593Smuzhiyun 			return IO_ACCEL_INELIGIBLE;
5384*4882a593Smuzhiyun 
5385*4882a593Smuzhiyun 		/* Request is eligible */
5386*4882a593Smuzhiyun 		map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5387*4882a593Smuzhiyun 			le16_to_cpu(map->row_cnt);
5388*4882a593Smuzhiyun 
5389*4882a593Smuzhiyun 		map_index = (first_group *
5390*4882a593Smuzhiyun 			(le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
5391*4882a593Smuzhiyun 			(map_row * total_disks_per_row) + first_column;
5392*4882a593Smuzhiyun 		break;
5393*4882a593Smuzhiyun 	default:
5394*4882a593Smuzhiyun 		return IO_ACCEL_INELIGIBLE;
5395*4882a593Smuzhiyun 	}
5396*4882a593Smuzhiyun 
5397*4882a593Smuzhiyun 	if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
5398*4882a593Smuzhiyun 		return IO_ACCEL_INELIGIBLE;
5399*4882a593Smuzhiyun 
5400*4882a593Smuzhiyun 	c->phys_disk = dev->phys_disk[map_index];
5401*4882a593Smuzhiyun 	if (!c->phys_disk)
5402*4882a593Smuzhiyun 		return IO_ACCEL_INELIGIBLE;
5403*4882a593Smuzhiyun 
5404*4882a593Smuzhiyun 	disk_handle = dd[map_index].ioaccel_handle;
5405*4882a593Smuzhiyun 	disk_block = le64_to_cpu(map->disk_starting_blk) +
5406*4882a593Smuzhiyun 			first_row * le16_to_cpu(map->strip_size) +
5407*4882a593Smuzhiyun 			(first_row_offset - first_column *
5408*4882a593Smuzhiyun 			le16_to_cpu(map->strip_size));
5409*4882a593Smuzhiyun 	disk_block_cnt = block_cnt;
5410*4882a593Smuzhiyun 
5411*4882a593Smuzhiyun 	/* handle differing logical/physical block sizes */
5412*4882a593Smuzhiyun 	if (map->phys_blk_shift) {
5413*4882a593Smuzhiyun 		disk_block <<= map->phys_blk_shift;
5414*4882a593Smuzhiyun 		disk_block_cnt <<= map->phys_blk_shift;
5415*4882a593Smuzhiyun 	}
5416*4882a593Smuzhiyun 	BUG_ON(disk_block_cnt > 0xffff);
5417*4882a593Smuzhiyun 
5418*4882a593Smuzhiyun 	/* build the new CDB for the physical disk I/O */
5419*4882a593Smuzhiyun 	if (disk_block > 0xffffffff) {
5420*4882a593Smuzhiyun 		cdb[0] = is_write ? WRITE_16 : READ_16;
5421*4882a593Smuzhiyun 		cdb[1] = 0;
5422*4882a593Smuzhiyun 		cdb[2] = (u8) (disk_block >> 56);
5423*4882a593Smuzhiyun 		cdb[3] = (u8) (disk_block >> 48);
5424*4882a593Smuzhiyun 		cdb[4] = (u8) (disk_block >> 40);
5425*4882a593Smuzhiyun 		cdb[5] = (u8) (disk_block >> 32);
5426*4882a593Smuzhiyun 		cdb[6] = (u8) (disk_block >> 24);
5427*4882a593Smuzhiyun 		cdb[7] = (u8) (disk_block >> 16);
5428*4882a593Smuzhiyun 		cdb[8] = (u8) (disk_block >> 8);
5429*4882a593Smuzhiyun 		cdb[9] = (u8) (disk_block);
5430*4882a593Smuzhiyun 		cdb[10] = (u8) (disk_block_cnt >> 24);
5431*4882a593Smuzhiyun 		cdb[11] = (u8) (disk_block_cnt >> 16);
5432*4882a593Smuzhiyun 		cdb[12] = (u8) (disk_block_cnt >> 8);
5433*4882a593Smuzhiyun 		cdb[13] = (u8) (disk_block_cnt);
5434*4882a593Smuzhiyun 		cdb[14] = 0;
5435*4882a593Smuzhiyun 		cdb[15] = 0;
5436*4882a593Smuzhiyun 		cdb_len = 16;
5437*4882a593Smuzhiyun 	} else {
5438*4882a593Smuzhiyun 		cdb[0] = is_write ? WRITE_10 : READ_10;
5439*4882a593Smuzhiyun 		cdb[1] = 0;
5440*4882a593Smuzhiyun 		cdb[2] = (u8) (disk_block >> 24);
5441*4882a593Smuzhiyun 		cdb[3] = (u8) (disk_block >> 16);
5442*4882a593Smuzhiyun 		cdb[4] = (u8) (disk_block >> 8);
5443*4882a593Smuzhiyun 		cdb[5] = (u8) (disk_block);
5444*4882a593Smuzhiyun 		cdb[6] = 0;
5445*4882a593Smuzhiyun 		cdb[7] = (u8) (disk_block_cnt >> 8);
5446*4882a593Smuzhiyun 		cdb[8] = (u8) (disk_block_cnt);
5447*4882a593Smuzhiyun 		cdb[9] = 0;
5448*4882a593Smuzhiyun 		cdb_len = 10;
5449*4882a593Smuzhiyun 	}
5450*4882a593Smuzhiyun 	return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
5451*4882a593Smuzhiyun 						dev->scsi3addr,
5452*4882a593Smuzhiyun 						dev->phys_disk[map_index]);
5453*4882a593Smuzhiyun }
5454*4882a593Smuzhiyun 
5455*4882a593Smuzhiyun /*
5456*4882a593Smuzhiyun  * Submit commands down the "normal" RAID stack path
5457*4882a593Smuzhiyun  * All callers to hpsa_ciss_submit must check lockup_detected
5458*4882a593Smuzhiyun  * beforehand, before (opt.) and after calling cmd_alloc
5459*4882a593Smuzhiyun  */
hpsa_ciss_submit(struct ctlr_info * h,struct CommandList * c,struct scsi_cmnd * cmd,struct hpsa_scsi_dev_t * dev)5460*4882a593Smuzhiyun static int hpsa_ciss_submit(struct ctlr_info *h,
5461*4882a593Smuzhiyun 	struct CommandList *c, struct scsi_cmnd *cmd,
5462*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *dev)
5463*4882a593Smuzhiyun {
5464*4882a593Smuzhiyun 	cmd->host_scribble = (unsigned char *) c;
5465*4882a593Smuzhiyun 	c->cmd_type = CMD_SCSI;
5466*4882a593Smuzhiyun 	c->scsi_cmd = cmd;
5467*4882a593Smuzhiyun 	c->Header.ReplyQueue = 0;  /* unused in simple mode */
5468*4882a593Smuzhiyun 	memcpy(&c->Header.LUN.LunAddrBytes[0], &dev->scsi3addr[0], 8);
5469*4882a593Smuzhiyun 	c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
5470*4882a593Smuzhiyun 
5471*4882a593Smuzhiyun 	/* Fill in the request block... */
5472*4882a593Smuzhiyun 
5473*4882a593Smuzhiyun 	c->Request.Timeout = 0;
5474*4882a593Smuzhiyun 	BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
5475*4882a593Smuzhiyun 	c->Request.CDBLen = cmd->cmd_len;
5476*4882a593Smuzhiyun 	memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
5477*4882a593Smuzhiyun 	switch (cmd->sc_data_direction) {
5478*4882a593Smuzhiyun 	case DMA_TO_DEVICE:
5479*4882a593Smuzhiyun 		c->Request.type_attr_dir =
5480*4882a593Smuzhiyun 			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
5481*4882a593Smuzhiyun 		break;
5482*4882a593Smuzhiyun 	case DMA_FROM_DEVICE:
5483*4882a593Smuzhiyun 		c->Request.type_attr_dir =
5484*4882a593Smuzhiyun 			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
5485*4882a593Smuzhiyun 		break;
5486*4882a593Smuzhiyun 	case DMA_NONE:
5487*4882a593Smuzhiyun 		c->Request.type_attr_dir =
5488*4882a593Smuzhiyun 			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
5489*4882a593Smuzhiyun 		break;
5490*4882a593Smuzhiyun 	case DMA_BIDIRECTIONAL:
5491*4882a593Smuzhiyun 		/* This can happen if a buggy application does a scsi passthru
5492*4882a593Smuzhiyun 		 * and sets both inlen and outlen to non-zero. ( see
5493*4882a593Smuzhiyun 		 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
5494*4882a593Smuzhiyun 		 */
5495*4882a593Smuzhiyun 
5496*4882a593Smuzhiyun 		c->Request.type_attr_dir =
5497*4882a593Smuzhiyun 			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
5498*4882a593Smuzhiyun 		/* This is technically wrong, and hpsa controllers should
5499*4882a593Smuzhiyun 		 * reject it with CMD_INVALID, which is the most correct
5500*4882a593Smuzhiyun 		 * response, but non-fibre backends appear to let it
5501*4882a593Smuzhiyun 		 * slide by, and give the same results as if this field
5502*4882a593Smuzhiyun 		 * were set correctly.  Either way is acceptable for
5503*4882a593Smuzhiyun 		 * our purposes here.
5504*4882a593Smuzhiyun 		 */
5505*4882a593Smuzhiyun 
5506*4882a593Smuzhiyun 		break;
5507*4882a593Smuzhiyun 
5508*4882a593Smuzhiyun 	default:
5509*4882a593Smuzhiyun 		dev_err(&h->pdev->dev, "unknown data direction: %d\n",
5510*4882a593Smuzhiyun 			cmd->sc_data_direction);
5511*4882a593Smuzhiyun 		BUG();
5512*4882a593Smuzhiyun 		break;
5513*4882a593Smuzhiyun 	}
5514*4882a593Smuzhiyun 
5515*4882a593Smuzhiyun 	if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
5516*4882a593Smuzhiyun 		hpsa_cmd_resolve_and_free(h, c);
5517*4882a593Smuzhiyun 		return SCSI_MLQUEUE_HOST_BUSY;
5518*4882a593Smuzhiyun 	}
5519*4882a593Smuzhiyun 
5520*4882a593Smuzhiyun 	if (dev->in_reset) {
5521*4882a593Smuzhiyun 		hpsa_cmd_resolve_and_free(h, c);
5522*4882a593Smuzhiyun 		return SCSI_MLQUEUE_HOST_BUSY;
5523*4882a593Smuzhiyun 	}
5524*4882a593Smuzhiyun 
5525*4882a593Smuzhiyun 	c->device = dev;
5526*4882a593Smuzhiyun 
5527*4882a593Smuzhiyun 	enqueue_cmd_and_start_io(h, c);
5528*4882a593Smuzhiyun 	/* the cmd'll come back via intr handler in complete_scsi_command()  */
5529*4882a593Smuzhiyun 	return 0;
5530*4882a593Smuzhiyun }
5531*4882a593Smuzhiyun 
hpsa_cmd_init(struct ctlr_info * h,int index,struct CommandList * c)5532*4882a593Smuzhiyun static void hpsa_cmd_init(struct ctlr_info *h, int index,
5533*4882a593Smuzhiyun 				struct CommandList *c)
5534*4882a593Smuzhiyun {
5535*4882a593Smuzhiyun 	dma_addr_t cmd_dma_handle, err_dma_handle;
5536*4882a593Smuzhiyun 
5537*4882a593Smuzhiyun 	/* Zero out all of commandlist except the last field, refcount */
5538*4882a593Smuzhiyun 	memset(c, 0, offsetof(struct CommandList, refcount));
5539*4882a593Smuzhiyun 	c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
5540*4882a593Smuzhiyun 	cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5541*4882a593Smuzhiyun 	c->err_info = h->errinfo_pool + index;
5542*4882a593Smuzhiyun 	memset(c->err_info, 0, sizeof(*c->err_info));
5543*4882a593Smuzhiyun 	err_dma_handle = h->errinfo_pool_dhandle
5544*4882a593Smuzhiyun 	    + index * sizeof(*c->err_info);
5545*4882a593Smuzhiyun 	c->cmdindex = index;
5546*4882a593Smuzhiyun 	c->busaddr = (u32) cmd_dma_handle;
5547*4882a593Smuzhiyun 	c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
5548*4882a593Smuzhiyun 	c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
5549*4882a593Smuzhiyun 	c->h = h;
5550*4882a593Smuzhiyun 	c->scsi_cmd = SCSI_CMD_IDLE;
5551*4882a593Smuzhiyun }
5552*4882a593Smuzhiyun 
hpsa_preinitialize_commands(struct ctlr_info * h)5553*4882a593Smuzhiyun static void hpsa_preinitialize_commands(struct ctlr_info *h)
5554*4882a593Smuzhiyun {
5555*4882a593Smuzhiyun 	int i;
5556*4882a593Smuzhiyun 
5557*4882a593Smuzhiyun 	for (i = 0; i < h->nr_cmds; i++) {
5558*4882a593Smuzhiyun 		struct CommandList *c = h->cmd_pool + i;
5559*4882a593Smuzhiyun 
5560*4882a593Smuzhiyun 		hpsa_cmd_init(h, i, c);
5561*4882a593Smuzhiyun 		atomic_set(&c->refcount, 0);
5562*4882a593Smuzhiyun 	}
5563*4882a593Smuzhiyun }
5564*4882a593Smuzhiyun 
hpsa_cmd_partial_init(struct ctlr_info * h,int index,struct CommandList * c)5565*4882a593Smuzhiyun static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
5566*4882a593Smuzhiyun 				struct CommandList *c)
5567*4882a593Smuzhiyun {
5568*4882a593Smuzhiyun 	dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5569*4882a593Smuzhiyun 
5570*4882a593Smuzhiyun 	BUG_ON(c->cmdindex != index);
5571*4882a593Smuzhiyun 
5572*4882a593Smuzhiyun 	memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
5573*4882a593Smuzhiyun 	memset(c->err_info, 0, sizeof(*c->err_info));
5574*4882a593Smuzhiyun 	c->busaddr = (u32) cmd_dma_handle;
5575*4882a593Smuzhiyun }
5576*4882a593Smuzhiyun 
hpsa_ioaccel_submit(struct ctlr_info * h,struct CommandList * c,struct scsi_cmnd * cmd)5577*4882a593Smuzhiyun static int hpsa_ioaccel_submit(struct ctlr_info *h,
5578*4882a593Smuzhiyun 		struct CommandList *c, struct scsi_cmnd *cmd)
5579*4882a593Smuzhiyun {
5580*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5581*4882a593Smuzhiyun 	int rc = IO_ACCEL_INELIGIBLE;
5582*4882a593Smuzhiyun 
5583*4882a593Smuzhiyun 	if (!dev)
5584*4882a593Smuzhiyun 		return SCSI_MLQUEUE_HOST_BUSY;
5585*4882a593Smuzhiyun 
5586*4882a593Smuzhiyun 	if (dev->in_reset)
5587*4882a593Smuzhiyun 		return SCSI_MLQUEUE_HOST_BUSY;
5588*4882a593Smuzhiyun 
5589*4882a593Smuzhiyun 	if (hpsa_simple_mode)
5590*4882a593Smuzhiyun 		return IO_ACCEL_INELIGIBLE;
5591*4882a593Smuzhiyun 
5592*4882a593Smuzhiyun 	cmd->host_scribble = (unsigned char *) c;
5593*4882a593Smuzhiyun 
5594*4882a593Smuzhiyun 	if (dev->offload_enabled) {
5595*4882a593Smuzhiyun 		hpsa_cmd_init(h, c->cmdindex, c);
5596*4882a593Smuzhiyun 		c->cmd_type = CMD_SCSI;
5597*4882a593Smuzhiyun 		c->scsi_cmd = cmd;
5598*4882a593Smuzhiyun 		c->device = dev;
5599*4882a593Smuzhiyun 		rc = hpsa_scsi_ioaccel_raid_map(h, c);
5600*4882a593Smuzhiyun 		if (rc < 0)     /* scsi_dma_map failed. */
5601*4882a593Smuzhiyun 			rc = SCSI_MLQUEUE_HOST_BUSY;
5602*4882a593Smuzhiyun 	} else if (dev->hba_ioaccel_enabled) {
5603*4882a593Smuzhiyun 		hpsa_cmd_init(h, c->cmdindex, c);
5604*4882a593Smuzhiyun 		c->cmd_type = CMD_SCSI;
5605*4882a593Smuzhiyun 		c->scsi_cmd = cmd;
5606*4882a593Smuzhiyun 		c->device = dev;
5607*4882a593Smuzhiyun 		rc = hpsa_scsi_ioaccel_direct_map(h, c);
5608*4882a593Smuzhiyun 		if (rc < 0)     /* scsi_dma_map failed. */
5609*4882a593Smuzhiyun 			rc = SCSI_MLQUEUE_HOST_BUSY;
5610*4882a593Smuzhiyun 	}
5611*4882a593Smuzhiyun 	return rc;
5612*4882a593Smuzhiyun }
5613*4882a593Smuzhiyun 
hpsa_command_resubmit_worker(struct work_struct * work)5614*4882a593Smuzhiyun static void hpsa_command_resubmit_worker(struct work_struct *work)
5615*4882a593Smuzhiyun {
5616*4882a593Smuzhiyun 	struct scsi_cmnd *cmd;
5617*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *dev;
5618*4882a593Smuzhiyun 	struct CommandList *c = container_of(work, struct CommandList, work);
5619*4882a593Smuzhiyun 
5620*4882a593Smuzhiyun 	cmd = c->scsi_cmd;
5621*4882a593Smuzhiyun 	dev = cmd->device->hostdata;
5622*4882a593Smuzhiyun 	if (!dev) {
5623*4882a593Smuzhiyun 		cmd->result = DID_NO_CONNECT << 16;
5624*4882a593Smuzhiyun 		return hpsa_cmd_free_and_done(c->h, c, cmd);
5625*4882a593Smuzhiyun 	}
5626*4882a593Smuzhiyun 
5627*4882a593Smuzhiyun 	if (dev->in_reset) {
5628*4882a593Smuzhiyun 		cmd->result = DID_RESET << 16;
5629*4882a593Smuzhiyun 		return hpsa_cmd_free_and_done(c->h, c, cmd);
5630*4882a593Smuzhiyun 	}
5631*4882a593Smuzhiyun 
5632*4882a593Smuzhiyun 	if (c->cmd_type == CMD_IOACCEL2) {
5633*4882a593Smuzhiyun 		struct ctlr_info *h = c->h;
5634*4882a593Smuzhiyun 		struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5635*4882a593Smuzhiyun 		int rc;
5636*4882a593Smuzhiyun 
5637*4882a593Smuzhiyun 		if (c2->error_data.serv_response ==
5638*4882a593Smuzhiyun 				IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
5639*4882a593Smuzhiyun 			rc = hpsa_ioaccel_submit(h, c, cmd);
5640*4882a593Smuzhiyun 			if (rc == 0)
5641*4882a593Smuzhiyun 				return;
5642*4882a593Smuzhiyun 			if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5643*4882a593Smuzhiyun 				/*
5644*4882a593Smuzhiyun 				 * If we get here, it means dma mapping failed.
5645*4882a593Smuzhiyun 				 * Try again via scsi mid layer, which will
5646*4882a593Smuzhiyun 				 * then get SCSI_MLQUEUE_HOST_BUSY.
5647*4882a593Smuzhiyun 				 */
5648*4882a593Smuzhiyun 				cmd->result = DID_IMM_RETRY << 16;
5649*4882a593Smuzhiyun 				return hpsa_cmd_free_and_done(h, c, cmd);
5650*4882a593Smuzhiyun 			}
5651*4882a593Smuzhiyun 			/* else, fall thru and resubmit down CISS path */
5652*4882a593Smuzhiyun 		}
5653*4882a593Smuzhiyun 	}
5654*4882a593Smuzhiyun 	hpsa_cmd_partial_init(c->h, c->cmdindex, c);
5655*4882a593Smuzhiyun 	if (hpsa_ciss_submit(c->h, c, cmd, dev)) {
5656*4882a593Smuzhiyun 		/*
5657*4882a593Smuzhiyun 		 * If we get here, it means dma mapping failed. Try
5658*4882a593Smuzhiyun 		 * again via scsi mid layer, which will then get
5659*4882a593Smuzhiyun 		 * SCSI_MLQUEUE_HOST_BUSY.
5660*4882a593Smuzhiyun 		 *
5661*4882a593Smuzhiyun 		 * hpsa_ciss_submit will have already freed c
5662*4882a593Smuzhiyun 		 * if it encountered a dma mapping failure.
5663*4882a593Smuzhiyun 		 */
5664*4882a593Smuzhiyun 		cmd->result = DID_IMM_RETRY << 16;
5665*4882a593Smuzhiyun 		cmd->scsi_done(cmd);
5666*4882a593Smuzhiyun 	}
5667*4882a593Smuzhiyun }
5668*4882a593Smuzhiyun 
5669*4882a593Smuzhiyun /* Running in struct Scsi_Host->host_lock less mode */
hpsa_scsi_queue_command(struct Scsi_Host * sh,struct scsi_cmnd * cmd)5670*4882a593Smuzhiyun static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
5671*4882a593Smuzhiyun {
5672*4882a593Smuzhiyun 	struct ctlr_info *h;
5673*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *dev;
5674*4882a593Smuzhiyun 	struct CommandList *c;
5675*4882a593Smuzhiyun 	int rc = 0;
5676*4882a593Smuzhiyun 
5677*4882a593Smuzhiyun 	/* Get the ptr to our adapter structure out of cmd->host. */
5678*4882a593Smuzhiyun 	h = sdev_to_hba(cmd->device);
5679*4882a593Smuzhiyun 
5680*4882a593Smuzhiyun 	BUG_ON(cmd->request->tag < 0);
5681*4882a593Smuzhiyun 
5682*4882a593Smuzhiyun 	dev = cmd->device->hostdata;
5683*4882a593Smuzhiyun 	if (!dev) {
5684*4882a593Smuzhiyun 		cmd->result = DID_NO_CONNECT << 16;
5685*4882a593Smuzhiyun 		cmd->scsi_done(cmd);
5686*4882a593Smuzhiyun 		return 0;
5687*4882a593Smuzhiyun 	}
5688*4882a593Smuzhiyun 
5689*4882a593Smuzhiyun 	if (dev->removed) {
5690*4882a593Smuzhiyun 		cmd->result = DID_NO_CONNECT << 16;
5691*4882a593Smuzhiyun 		cmd->scsi_done(cmd);
5692*4882a593Smuzhiyun 		return 0;
5693*4882a593Smuzhiyun 	}
5694*4882a593Smuzhiyun 
5695*4882a593Smuzhiyun 	if (unlikely(lockup_detected(h))) {
5696*4882a593Smuzhiyun 		cmd->result = DID_NO_CONNECT << 16;
5697*4882a593Smuzhiyun 		cmd->scsi_done(cmd);
5698*4882a593Smuzhiyun 		return 0;
5699*4882a593Smuzhiyun 	}
5700*4882a593Smuzhiyun 
5701*4882a593Smuzhiyun 	if (dev->in_reset)
5702*4882a593Smuzhiyun 		return SCSI_MLQUEUE_DEVICE_BUSY;
5703*4882a593Smuzhiyun 
5704*4882a593Smuzhiyun 	c = cmd_tagged_alloc(h, cmd);
5705*4882a593Smuzhiyun 	if (c == NULL)
5706*4882a593Smuzhiyun 		return SCSI_MLQUEUE_DEVICE_BUSY;
5707*4882a593Smuzhiyun 
5708*4882a593Smuzhiyun 	/*
5709*4882a593Smuzhiyun 	 * This is necessary because the SML doesn't zero out this field during
5710*4882a593Smuzhiyun 	 * error recovery.
5711*4882a593Smuzhiyun 	 */
5712*4882a593Smuzhiyun 	cmd->result = 0;
5713*4882a593Smuzhiyun 
5714*4882a593Smuzhiyun 	/*
5715*4882a593Smuzhiyun 	 * Call alternate submit routine for I/O accelerated commands.
5716*4882a593Smuzhiyun 	 * Retries always go down the normal I/O path.
5717*4882a593Smuzhiyun 	 */
5718*4882a593Smuzhiyun 	if (likely(cmd->retries == 0 &&
5719*4882a593Smuzhiyun 			!blk_rq_is_passthrough(cmd->request) &&
5720*4882a593Smuzhiyun 			h->acciopath_status)) {
5721*4882a593Smuzhiyun 		rc = hpsa_ioaccel_submit(h, c, cmd);
5722*4882a593Smuzhiyun 		if (rc == 0)
5723*4882a593Smuzhiyun 			return 0;
5724*4882a593Smuzhiyun 		if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5725*4882a593Smuzhiyun 			hpsa_cmd_resolve_and_free(h, c);
5726*4882a593Smuzhiyun 			return SCSI_MLQUEUE_HOST_BUSY;
5727*4882a593Smuzhiyun 		}
5728*4882a593Smuzhiyun 	}
5729*4882a593Smuzhiyun 	return hpsa_ciss_submit(h, c, cmd, dev);
5730*4882a593Smuzhiyun }
5731*4882a593Smuzhiyun 
hpsa_scan_complete(struct ctlr_info * h)5732*4882a593Smuzhiyun static void hpsa_scan_complete(struct ctlr_info *h)
5733*4882a593Smuzhiyun {
5734*4882a593Smuzhiyun 	unsigned long flags;
5735*4882a593Smuzhiyun 
5736*4882a593Smuzhiyun 	spin_lock_irqsave(&h->scan_lock, flags);
5737*4882a593Smuzhiyun 	h->scan_finished = 1;
5738*4882a593Smuzhiyun 	wake_up(&h->scan_wait_queue);
5739*4882a593Smuzhiyun 	spin_unlock_irqrestore(&h->scan_lock, flags);
5740*4882a593Smuzhiyun }
5741*4882a593Smuzhiyun 
hpsa_scan_start(struct Scsi_Host * sh)5742*4882a593Smuzhiyun static void hpsa_scan_start(struct Scsi_Host *sh)
5743*4882a593Smuzhiyun {
5744*4882a593Smuzhiyun 	struct ctlr_info *h = shost_to_hba(sh);
5745*4882a593Smuzhiyun 	unsigned long flags;
5746*4882a593Smuzhiyun 
5747*4882a593Smuzhiyun 	/*
5748*4882a593Smuzhiyun 	 * Don't let rescans be initiated on a controller known to be locked
5749*4882a593Smuzhiyun 	 * up.  If the controller locks up *during* a rescan, that thread is
5750*4882a593Smuzhiyun 	 * probably hosed, but at least we can prevent new rescan threads from
5751*4882a593Smuzhiyun 	 * piling up on a locked up controller.
5752*4882a593Smuzhiyun 	 */
5753*4882a593Smuzhiyun 	if (unlikely(lockup_detected(h)))
5754*4882a593Smuzhiyun 		return hpsa_scan_complete(h);
5755*4882a593Smuzhiyun 
5756*4882a593Smuzhiyun 	/*
5757*4882a593Smuzhiyun 	 * If a scan is already waiting to run, no need to add another
5758*4882a593Smuzhiyun 	 */
5759*4882a593Smuzhiyun 	spin_lock_irqsave(&h->scan_lock, flags);
5760*4882a593Smuzhiyun 	if (h->scan_waiting) {
5761*4882a593Smuzhiyun 		spin_unlock_irqrestore(&h->scan_lock, flags);
5762*4882a593Smuzhiyun 		return;
5763*4882a593Smuzhiyun 	}
5764*4882a593Smuzhiyun 
5765*4882a593Smuzhiyun 	spin_unlock_irqrestore(&h->scan_lock, flags);
5766*4882a593Smuzhiyun 
5767*4882a593Smuzhiyun 	/* wait until any scan already in progress is finished. */
5768*4882a593Smuzhiyun 	while (1) {
5769*4882a593Smuzhiyun 		spin_lock_irqsave(&h->scan_lock, flags);
5770*4882a593Smuzhiyun 		if (h->scan_finished)
5771*4882a593Smuzhiyun 			break;
5772*4882a593Smuzhiyun 		h->scan_waiting = 1;
5773*4882a593Smuzhiyun 		spin_unlock_irqrestore(&h->scan_lock, flags);
5774*4882a593Smuzhiyun 		wait_event(h->scan_wait_queue, h->scan_finished);
5775*4882a593Smuzhiyun 		/* Note: We don't need to worry about a race between this
5776*4882a593Smuzhiyun 		 * thread and driver unload because the midlayer will
5777*4882a593Smuzhiyun 		 * have incremented the reference count, so unload won't
5778*4882a593Smuzhiyun 		 * happen if we're in here.
5779*4882a593Smuzhiyun 		 */
5780*4882a593Smuzhiyun 	}
5781*4882a593Smuzhiyun 	h->scan_finished = 0; /* mark scan as in progress */
5782*4882a593Smuzhiyun 	h->scan_waiting = 0;
5783*4882a593Smuzhiyun 	spin_unlock_irqrestore(&h->scan_lock, flags);
5784*4882a593Smuzhiyun 
5785*4882a593Smuzhiyun 	if (unlikely(lockup_detected(h)))
5786*4882a593Smuzhiyun 		return hpsa_scan_complete(h);
5787*4882a593Smuzhiyun 
5788*4882a593Smuzhiyun 	/*
5789*4882a593Smuzhiyun 	 * Do the scan after a reset completion
5790*4882a593Smuzhiyun 	 */
5791*4882a593Smuzhiyun 	spin_lock_irqsave(&h->reset_lock, flags);
5792*4882a593Smuzhiyun 	if (h->reset_in_progress) {
5793*4882a593Smuzhiyun 		h->drv_req_rescan = 1;
5794*4882a593Smuzhiyun 		spin_unlock_irqrestore(&h->reset_lock, flags);
5795*4882a593Smuzhiyun 		hpsa_scan_complete(h);
5796*4882a593Smuzhiyun 		return;
5797*4882a593Smuzhiyun 	}
5798*4882a593Smuzhiyun 	spin_unlock_irqrestore(&h->reset_lock, flags);
5799*4882a593Smuzhiyun 
5800*4882a593Smuzhiyun 	hpsa_update_scsi_devices(h);
5801*4882a593Smuzhiyun 
5802*4882a593Smuzhiyun 	hpsa_scan_complete(h);
5803*4882a593Smuzhiyun }
5804*4882a593Smuzhiyun 
hpsa_change_queue_depth(struct scsi_device * sdev,int qdepth)5805*4882a593Smuzhiyun static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
5806*4882a593Smuzhiyun {
5807*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
5808*4882a593Smuzhiyun 
5809*4882a593Smuzhiyun 	if (!logical_drive)
5810*4882a593Smuzhiyun 		return -ENODEV;
5811*4882a593Smuzhiyun 
5812*4882a593Smuzhiyun 	if (qdepth < 1)
5813*4882a593Smuzhiyun 		qdepth = 1;
5814*4882a593Smuzhiyun 	else if (qdepth > logical_drive->queue_depth)
5815*4882a593Smuzhiyun 		qdepth = logical_drive->queue_depth;
5816*4882a593Smuzhiyun 
5817*4882a593Smuzhiyun 	return scsi_change_queue_depth(sdev, qdepth);
5818*4882a593Smuzhiyun }
5819*4882a593Smuzhiyun 
hpsa_scan_finished(struct Scsi_Host * sh,unsigned long elapsed_time)5820*4882a593Smuzhiyun static int hpsa_scan_finished(struct Scsi_Host *sh,
5821*4882a593Smuzhiyun 	unsigned long elapsed_time)
5822*4882a593Smuzhiyun {
5823*4882a593Smuzhiyun 	struct ctlr_info *h = shost_to_hba(sh);
5824*4882a593Smuzhiyun 	unsigned long flags;
5825*4882a593Smuzhiyun 	int finished;
5826*4882a593Smuzhiyun 
5827*4882a593Smuzhiyun 	spin_lock_irqsave(&h->scan_lock, flags);
5828*4882a593Smuzhiyun 	finished = h->scan_finished;
5829*4882a593Smuzhiyun 	spin_unlock_irqrestore(&h->scan_lock, flags);
5830*4882a593Smuzhiyun 	return finished;
5831*4882a593Smuzhiyun }
5832*4882a593Smuzhiyun 
hpsa_scsi_host_alloc(struct ctlr_info * h)5833*4882a593Smuzhiyun static int hpsa_scsi_host_alloc(struct ctlr_info *h)
5834*4882a593Smuzhiyun {
5835*4882a593Smuzhiyun 	struct Scsi_Host *sh;
5836*4882a593Smuzhiyun 
5837*4882a593Smuzhiyun 	sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
5838*4882a593Smuzhiyun 	if (sh == NULL) {
5839*4882a593Smuzhiyun 		dev_err(&h->pdev->dev, "scsi_host_alloc failed\n");
5840*4882a593Smuzhiyun 		return -ENOMEM;
5841*4882a593Smuzhiyun 	}
5842*4882a593Smuzhiyun 
5843*4882a593Smuzhiyun 	sh->io_port = 0;
5844*4882a593Smuzhiyun 	sh->n_io_port = 0;
5845*4882a593Smuzhiyun 	sh->this_id = -1;
5846*4882a593Smuzhiyun 	sh->max_channel = 3;
5847*4882a593Smuzhiyun 	sh->max_cmd_len = MAX_COMMAND_SIZE;
5848*4882a593Smuzhiyun 	sh->max_lun = HPSA_MAX_LUN;
5849*4882a593Smuzhiyun 	sh->max_id = HPSA_MAX_LUN;
5850*4882a593Smuzhiyun 	sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
5851*4882a593Smuzhiyun 	sh->cmd_per_lun = sh->can_queue;
5852*4882a593Smuzhiyun 	sh->sg_tablesize = h->maxsgentries;
5853*4882a593Smuzhiyun 	sh->transportt = hpsa_sas_transport_template;
5854*4882a593Smuzhiyun 	sh->hostdata[0] = (unsigned long) h;
5855*4882a593Smuzhiyun 	sh->irq = pci_irq_vector(h->pdev, 0);
5856*4882a593Smuzhiyun 	sh->unique_id = sh->irq;
5857*4882a593Smuzhiyun 
5858*4882a593Smuzhiyun 	h->scsi_host = sh;
5859*4882a593Smuzhiyun 	return 0;
5860*4882a593Smuzhiyun }
5861*4882a593Smuzhiyun 
hpsa_scsi_add_host(struct ctlr_info * h)5862*4882a593Smuzhiyun static int hpsa_scsi_add_host(struct ctlr_info *h)
5863*4882a593Smuzhiyun {
5864*4882a593Smuzhiyun 	int rv;
5865*4882a593Smuzhiyun 
5866*4882a593Smuzhiyun 	rv = scsi_add_host(h->scsi_host, &h->pdev->dev);
5867*4882a593Smuzhiyun 	if (rv) {
5868*4882a593Smuzhiyun 		dev_err(&h->pdev->dev, "scsi_add_host failed\n");
5869*4882a593Smuzhiyun 		return rv;
5870*4882a593Smuzhiyun 	}
5871*4882a593Smuzhiyun 	scsi_scan_host(h->scsi_host);
5872*4882a593Smuzhiyun 	return 0;
5873*4882a593Smuzhiyun }
5874*4882a593Smuzhiyun 
5875*4882a593Smuzhiyun /*
5876*4882a593Smuzhiyun  * The block layer has already gone to the trouble of picking out a unique,
5877*4882a593Smuzhiyun  * small-integer tag for this request.  We use an offset from that value as
5878*4882a593Smuzhiyun  * an index to select our command block.  (The offset allows us to reserve the
5879*4882a593Smuzhiyun  * low-numbered entries for our own uses.)
5880*4882a593Smuzhiyun  */
hpsa_get_cmd_index(struct scsi_cmnd * scmd)5881*4882a593Smuzhiyun static int hpsa_get_cmd_index(struct scsi_cmnd *scmd)
5882*4882a593Smuzhiyun {
5883*4882a593Smuzhiyun 	int idx = scmd->request->tag;
5884*4882a593Smuzhiyun 
5885*4882a593Smuzhiyun 	if (idx < 0)
5886*4882a593Smuzhiyun 		return idx;
5887*4882a593Smuzhiyun 
5888*4882a593Smuzhiyun 	/* Offset to leave space for internal cmds. */
5889*4882a593Smuzhiyun 	return idx += HPSA_NRESERVED_CMDS;
5890*4882a593Smuzhiyun }
5891*4882a593Smuzhiyun 
5892*4882a593Smuzhiyun /*
5893*4882a593Smuzhiyun  * Send a TEST_UNIT_READY command to the specified LUN using the specified
5894*4882a593Smuzhiyun  * reply queue; returns zero if the unit is ready, and non-zero otherwise.
5895*4882a593Smuzhiyun  */
hpsa_send_test_unit_ready(struct ctlr_info * h,struct CommandList * c,unsigned char lunaddr[],int reply_queue)5896*4882a593Smuzhiyun static int hpsa_send_test_unit_ready(struct ctlr_info *h,
5897*4882a593Smuzhiyun 				struct CommandList *c, unsigned char lunaddr[],
5898*4882a593Smuzhiyun 				int reply_queue)
5899*4882a593Smuzhiyun {
5900*4882a593Smuzhiyun 	int rc;
5901*4882a593Smuzhiyun 
5902*4882a593Smuzhiyun 	/* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
5903*4882a593Smuzhiyun 	(void) fill_cmd(c, TEST_UNIT_READY, h,
5904*4882a593Smuzhiyun 			NULL, 0, 0, lunaddr, TYPE_CMD);
5905*4882a593Smuzhiyun 	rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
5906*4882a593Smuzhiyun 	if (rc)
5907*4882a593Smuzhiyun 		return rc;
5908*4882a593Smuzhiyun 	/* no unmap needed here because no data xfer. */
5909*4882a593Smuzhiyun 
5910*4882a593Smuzhiyun 	/* Check if the unit is already ready. */
5911*4882a593Smuzhiyun 	if (c->err_info->CommandStatus == CMD_SUCCESS)
5912*4882a593Smuzhiyun 		return 0;
5913*4882a593Smuzhiyun 
5914*4882a593Smuzhiyun 	/*
5915*4882a593Smuzhiyun 	 * The first command sent after reset will receive "unit attention" to
5916*4882a593Smuzhiyun 	 * indicate that the LUN has been reset...this is actually what we're
5917*4882a593Smuzhiyun 	 * looking for (but, success is good too).
5918*4882a593Smuzhiyun 	 */
5919*4882a593Smuzhiyun 	if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5920*4882a593Smuzhiyun 		c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
5921*4882a593Smuzhiyun 			(c->err_info->SenseInfo[2] == NO_SENSE ||
5922*4882a593Smuzhiyun 			 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
5923*4882a593Smuzhiyun 		return 0;
5924*4882a593Smuzhiyun 
5925*4882a593Smuzhiyun 	return 1;
5926*4882a593Smuzhiyun }
5927*4882a593Smuzhiyun 
5928*4882a593Smuzhiyun /*
5929*4882a593Smuzhiyun  * Wait for a TEST_UNIT_READY command to complete, retrying as necessary;
5930*4882a593Smuzhiyun  * returns zero when the unit is ready, and non-zero when giving up.
5931*4882a593Smuzhiyun  */
hpsa_wait_for_test_unit_ready(struct ctlr_info * h,struct CommandList * c,unsigned char lunaddr[],int reply_queue)5932*4882a593Smuzhiyun static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h,
5933*4882a593Smuzhiyun 				struct CommandList *c,
5934*4882a593Smuzhiyun 				unsigned char lunaddr[], int reply_queue)
5935*4882a593Smuzhiyun {
5936*4882a593Smuzhiyun 	int rc;
5937*4882a593Smuzhiyun 	int count = 0;
5938*4882a593Smuzhiyun 	int waittime = 1; /* seconds */
5939*4882a593Smuzhiyun 
5940*4882a593Smuzhiyun 	/* Send test unit ready until device ready, or give up. */
5941*4882a593Smuzhiyun 	for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) {
5942*4882a593Smuzhiyun 
5943*4882a593Smuzhiyun 		/*
5944*4882a593Smuzhiyun 		 * Wait for a bit.  do this first, because if we send
5945*4882a593Smuzhiyun 		 * the TUR right away, the reset will just abort it.
5946*4882a593Smuzhiyun 		 */
5947*4882a593Smuzhiyun 		msleep(1000 * waittime);
5948*4882a593Smuzhiyun 
5949*4882a593Smuzhiyun 		rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue);
5950*4882a593Smuzhiyun 		if (!rc)
5951*4882a593Smuzhiyun 			break;
5952*4882a593Smuzhiyun 
5953*4882a593Smuzhiyun 		/* Increase wait time with each try, up to a point. */
5954*4882a593Smuzhiyun 		if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
5955*4882a593Smuzhiyun 			waittime *= 2;
5956*4882a593Smuzhiyun 
5957*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev,
5958*4882a593Smuzhiyun 			 "waiting %d secs for device to become ready.\n",
5959*4882a593Smuzhiyun 			 waittime);
5960*4882a593Smuzhiyun 	}
5961*4882a593Smuzhiyun 
5962*4882a593Smuzhiyun 	return rc;
5963*4882a593Smuzhiyun }
5964*4882a593Smuzhiyun 
wait_for_device_to_become_ready(struct ctlr_info * h,unsigned char lunaddr[],int reply_queue)5965*4882a593Smuzhiyun static int wait_for_device_to_become_ready(struct ctlr_info *h,
5966*4882a593Smuzhiyun 					   unsigned char lunaddr[],
5967*4882a593Smuzhiyun 					   int reply_queue)
5968*4882a593Smuzhiyun {
5969*4882a593Smuzhiyun 	int first_queue;
5970*4882a593Smuzhiyun 	int last_queue;
5971*4882a593Smuzhiyun 	int rq;
5972*4882a593Smuzhiyun 	int rc = 0;
5973*4882a593Smuzhiyun 	struct CommandList *c;
5974*4882a593Smuzhiyun 
5975*4882a593Smuzhiyun 	c = cmd_alloc(h);
5976*4882a593Smuzhiyun 
5977*4882a593Smuzhiyun 	/*
5978*4882a593Smuzhiyun 	 * If no specific reply queue was requested, then send the TUR
5979*4882a593Smuzhiyun 	 * repeatedly, requesting a reply on each reply queue; otherwise execute
5980*4882a593Smuzhiyun 	 * the loop exactly once using only the specified queue.
5981*4882a593Smuzhiyun 	 */
5982*4882a593Smuzhiyun 	if (reply_queue == DEFAULT_REPLY_QUEUE) {
5983*4882a593Smuzhiyun 		first_queue = 0;
5984*4882a593Smuzhiyun 		last_queue = h->nreply_queues - 1;
5985*4882a593Smuzhiyun 	} else {
5986*4882a593Smuzhiyun 		first_queue = reply_queue;
5987*4882a593Smuzhiyun 		last_queue = reply_queue;
5988*4882a593Smuzhiyun 	}
5989*4882a593Smuzhiyun 
5990*4882a593Smuzhiyun 	for (rq = first_queue; rq <= last_queue; rq++) {
5991*4882a593Smuzhiyun 		rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq);
5992*4882a593Smuzhiyun 		if (rc)
5993*4882a593Smuzhiyun 			break;
5994*4882a593Smuzhiyun 	}
5995*4882a593Smuzhiyun 
5996*4882a593Smuzhiyun 	if (rc)
5997*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev, "giving up on device.\n");
5998*4882a593Smuzhiyun 	else
5999*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev, "device is ready.\n");
6000*4882a593Smuzhiyun 
6001*4882a593Smuzhiyun 	cmd_free(h, c);
6002*4882a593Smuzhiyun 	return rc;
6003*4882a593Smuzhiyun }
6004*4882a593Smuzhiyun 
6005*4882a593Smuzhiyun /* Need at least one of these error handlers to keep ../scsi/hosts.c from
6006*4882a593Smuzhiyun  * complaining.  Doing a host- or bus-reset can't do anything good here.
6007*4882a593Smuzhiyun  */
hpsa_eh_device_reset_handler(struct scsi_cmnd * scsicmd)6008*4882a593Smuzhiyun static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
6009*4882a593Smuzhiyun {
6010*4882a593Smuzhiyun 	int rc = SUCCESS;
6011*4882a593Smuzhiyun 	int i;
6012*4882a593Smuzhiyun 	struct ctlr_info *h;
6013*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *dev = NULL;
6014*4882a593Smuzhiyun 	u8 reset_type;
6015*4882a593Smuzhiyun 	char msg[48];
6016*4882a593Smuzhiyun 	unsigned long flags;
6017*4882a593Smuzhiyun 
6018*4882a593Smuzhiyun 	/* find the controller to which the command to be aborted was sent */
6019*4882a593Smuzhiyun 	h = sdev_to_hba(scsicmd->device);
6020*4882a593Smuzhiyun 	if (h == NULL) /* paranoia */
6021*4882a593Smuzhiyun 		return FAILED;
6022*4882a593Smuzhiyun 
6023*4882a593Smuzhiyun 	spin_lock_irqsave(&h->reset_lock, flags);
6024*4882a593Smuzhiyun 	h->reset_in_progress = 1;
6025*4882a593Smuzhiyun 	spin_unlock_irqrestore(&h->reset_lock, flags);
6026*4882a593Smuzhiyun 
6027*4882a593Smuzhiyun 	if (lockup_detected(h)) {
6028*4882a593Smuzhiyun 		rc = FAILED;
6029*4882a593Smuzhiyun 		goto return_reset_status;
6030*4882a593Smuzhiyun 	}
6031*4882a593Smuzhiyun 
6032*4882a593Smuzhiyun 	dev = scsicmd->device->hostdata;
6033*4882a593Smuzhiyun 	if (!dev) {
6034*4882a593Smuzhiyun 		dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__);
6035*4882a593Smuzhiyun 		rc = FAILED;
6036*4882a593Smuzhiyun 		goto return_reset_status;
6037*4882a593Smuzhiyun 	}
6038*4882a593Smuzhiyun 
6039*4882a593Smuzhiyun 	if (dev->devtype == TYPE_ENCLOSURE) {
6040*4882a593Smuzhiyun 		rc = SUCCESS;
6041*4882a593Smuzhiyun 		goto return_reset_status;
6042*4882a593Smuzhiyun 	}
6043*4882a593Smuzhiyun 
6044*4882a593Smuzhiyun 	/* if controller locked up, we can guarantee command won't complete */
6045*4882a593Smuzhiyun 	if (lockup_detected(h)) {
6046*4882a593Smuzhiyun 		snprintf(msg, sizeof(msg),
6047*4882a593Smuzhiyun 			 "cmd %d RESET FAILED, lockup detected",
6048*4882a593Smuzhiyun 			 hpsa_get_cmd_index(scsicmd));
6049*4882a593Smuzhiyun 		hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6050*4882a593Smuzhiyun 		rc = FAILED;
6051*4882a593Smuzhiyun 		goto return_reset_status;
6052*4882a593Smuzhiyun 	}
6053*4882a593Smuzhiyun 
6054*4882a593Smuzhiyun 	/* this reset request might be the result of a lockup; check */
6055*4882a593Smuzhiyun 	if (detect_controller_lockup(h)) {
6056*4882a593Smuzhiyun 		snprintf(msg, sizeof(msg),
6057*4882a593Smuzhiyun 			 "cmd %d RESET FAILED, new lockup detected",
6058*4882a593Smuzhiyun 			 hpsa_get_cmd_index(scsicmd));
6059*4882a593Smuzhiyun 		hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6060*4882a593Smuzhiyun 		rc = FAILED;
6061*4882a593Smuzhiyun 		goto return_reset_status;
6062*4882a593Smuzhiyun 	}
6063*4882a593Smuzhiyun 
6064*4882a593Smuzhiyun 	/* Do not attempt on controller */
6065*4882a593Smuzhiyun 	if (is_hba_lunid(dev->scsi3addr)) {
6066*4882a593Smuzhiyun 		rc = SUCCESS;
6067*4882a593Smuzhiyun 		goto return_reset_status;
6068*4882a593Smuzhiyun 	}
6069*4882a593Smuzhiyun 
6070*4882a593Smuzhiyun 	if (is_logical_dev_addr_mode(dev->scsi3addr))
6071*4882a593Smuzhiyun 		reset_type = HPSA_DEVICE_RESET_MSG;
6072*4882a593Smuzhiyun 	else
6073*4882a593Smuzhiyun 		reset_type = HPSA_PHYS_TARGET_RESET;
6074*4882a593Smuzhiyun 
6075*4882a593Smuzhiyun 	sprintf(msg, "resetting %s",
6076*4882a593Smuzhiyun 		reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ");
6077*4882a593Smuzhiyun 	hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6078*4882a593Smuzhiyun 
6079*4882a593Smuzhiyun 	/*
6080*4882a593Smuzhiyun 	 * wait to see if any commands will complete before sending reset
6081*4882a593Smuzhiyun 	 */
6082*4882a593Smuzhiyun 	dev->in_reset = true; /* block any new cmds from OS for this device */
6083*4882a593Smuzhiyun 	for (i = 0; i < 10; i++) {
6084*4882a593Smuzhiyun 		if (atomic_read(&dev->commands_outstanding) > 0)
6085*4882a593Smuzhiyun 			msleep(1000);
6086*4882a593Smuzhiyun 		else
6087*4882a593Smuzhiyun 			break;
6088*4882a593Smuzhiyun 	}
6089*4882a593Smuzhiyun 
6090*4882a593Smuzhiyun 	/* send a reset to the SCSI LUN which the command was sent to */
6091*4882a593Smuzhiyun 	rc = hpsa_do_reset(h, dev, reset_type, DEFAULT_REPLY_QUEUE);
6092*4882a593Smuzhiyun 	if (rc == 0)
6093*4882a593Smuzhiyun 		rc = SUCCESS;
6094*4882a593Smuzhiyun 	else
6095*4882a593Smuzhiyun 		rc = FAILED;
6096*4882a593Smuzhiyun 
6097*4882a593Smuzhiyun 	sprintf(msg, "reset %s %s",
6098*4882a593Smuzhiyun 		reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ",
6099*4882a593Smuzhiyun 		rc == SUCCESS ? "completed successfully" : "failed");
6100*4882a593Smuzhiyun 	hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6101*4882a593Smuzhiyun 
6102*4882a593Smuzhiyun return_reset_status:
6103*4882a593Smuzhiyun 	spin_lock_irqsave(&h->reset_lock, flags);
6104*4882a593Smuzhiyun 	h->reset_in_progress = 0;
6105*4882a593Smuzhiyun 	if (dev)
6106*4882a593Smuzhiyun 		dev->in_reset = false;
6107*4882a593Smuzhiyun 	spin_unlock_irqrestore(&h->reset_lock, flags);
6108*4882a593Smuzhiyun 	return rc;
6109*4882a593Smuzhiyun }
6110*4882a593Smuzhiyun 
6111*4882a593Smuzhiyun /*
6112*4882a593Smuzhiyun  * For operations with an associated SCSI command, a command block is allocated
6113*4882a593Smuzhiyun  * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the
6114*4882a593Smuzhiyun  * block request tag as an index into a table of entries.  cmd_tagged_free() is
6115*4882a593Smuzhiyun  * the complement, although cmd_free() may be called instead.
6116*4882a593Smuzhiyun  */
cmd_tagged_alloc(struct ctlr_info * h,struct scsi_cmnd * scmd)6117*4882a593Smuzhiyun static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
6118*4882a593Smuzhiyun 					    struct scsi_cmnd *scmd)
6119*4882a593Smuzhiyun {
6120*4882a593Smuzhiyun 	int idx = hpsa_get_cmd_index(scmd);
6121*4882a593Smuzhiyun 	struct CommandList *c = h->cmd_pool + idx;
6122*4882a593Smuzhiyun 
6123*4882a593Smuzhiyun 	if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) {
6124*4882a593Smuzhiyun 		dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n",
6125*4882a593Smuzhiyun 			idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1);
6126*4882a593Smuzhiyun 		/* The index value comes from the block layer, so if it's out of
6127*4882a593Smuzhiyun 		 * bounds, it's probably not our bug.
6128*4882a593Smuzhiyun 		 */
6129*4882a593Smuzhiyun 		BUG();
6130*4882a593Smuzhiyun 	}
6131*4882a593Smuzhiyun 
6132*4882a593Smuzhiyun 	if (unlikely(!hpsa_is_cmd_idle(c))) {
6133*4882a593Smuzhiyun 		/*
6134*4882a593Smuzhiyun 		 * We expect that the SCSI layer will hand us a unique tag
6135*4882a593Smuzhiyun 		 * value.  Thus, there should never be a collision here between
6136*4882a593Smuzhiyun 		 * two requests...because if the selected command isn't idle
6137*4882a593Smuzhiyun 		 * then someone is going to be very disappointed.
6138*4882a593Smuzhiyun 		 */
6139*4882a593Smuzhiyun 		if (idx != h->last_collision_tag) { /* Print once per tag */
6140*4882a593Smuzhiyun 			dev_warn(&h->pdev->dev,
6141*4882a593Smuzhiyun 				"%s: tag collision (tag=%d)\n", __func__, idx);
6142*4882a593Smuzhiyun 			if (scmd)
6143*4882a593Smuzhiyun 				scsi_print_command(scmd);
6144*4882a593Smuzhiyun 			h->last_collision_tag = idx;
6145*4882a593Smuzhiyun 		}
6146*4882a593Smuzhiyun 		return NULL;
6147*4882a593Smuzhiyun 	}
6148*4882a593Smuzhiyun 
6149*4882a593Smuzhiyun 	atomic_inc(&c->refcount);
6150*4882a593Smuzhiyun 
6151*4882a593Smuzhiyun 	hpsa_cmd_partial_init(h, idx, c);
6152*4882a593Smuzhiyun 	return c;
6153*4882a593Smuzhiyun }
6154*4882a593Smuzhiyun 
cmd_tagged_free(struct ctlr_info * h,struct CommandList * c)6155*4882a593Smuzhiyun static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c)
6156*4882a593Smuzhiyun {
6157*4882a593Smuzhiyun 	/*
6158*4882a593Smuzhiyun 	 * Release our reference to the block.  We don't need to do anything
6159*4882a593Smuzhiyun 	 * else to free it, because it is accessed by index.
6160*4882a593Smuzhiyun 	 */
6161*4882a593Smuzhiyun 	(void)atomic_dec(&c->refcount);
6162*4882a593Smuzhiyun }
6163*4882a593Smuzhiyun 
6164*4882a593Smuzhiyun /*
6165*4882a593Smuzhiyun  * For operations that cannot sleep, a command block is allocated at init,
6166*4882a593Smuzhiyun  * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6167*4882a593Smuzhiyun  * which ones are free or in use.  Lock must be held when calling this.
6168*4882a593Smuzhiyun  * cmd_free() is the complement.
6169*4882a593Smuzhiyun  * This function never gives up and returns NULL.  If it hangs,
6170*4882a593Smuzhiyun  * another thread must call cmd_free() to free some tags.
6171*4882a593Smuzhiyun  */
6172*4882a593Smuzhiyun 
cmd_alloc(struct ctlr_info * h)6173*4882a593Smuzhiyun static struct CommandList *cmd_alloc(struct ctlr_info *h)
6174*4882a593Smuzhiyun {
6175*4882a593Smuzhiyun 	struct CommandList *c;
6176*4882a593Smuzhiyun 	int refcount, i;
6177*4882a593Smuzhiyun 	int offset = 0;
6178*4882a593Smuzhiyun 
6179*4882a593Smuzhiyun 	/*
6180*4882a593Smuzhiyun 	 * There is some *extremely* small but non-zero chance that that
6181*4882a593Smuzhiyun 	 * multiple threads could get in here, and one thread could
6182*4882a593Smuzhiyun 	 * be scanning through the list of bits looking for a free
6183*4882a593Smuzhiyun 	 * one, but the free ones are always behind him, and other
6184*4882a593Smuzhiyun 	 * threads sneak in behind him and eat them before he can
6185*4882a593Smuzhiyun 	 * get to them, so that while there is always a free one, a
6186*4882a593Smuzhiyun 	 * very unlucky thread might be starved anyway, never able to
6187*4882a593Smuzhiyun 	 * beat the other threads.  In reality, this happens so
6188*4882a593Smuzhiyun 	 * infrequently as to be indistinguishable from never.
6189*4882a593Smuzhiyun 	 *
6190*4882a593Smuzhiyun 	 * Note that we start allocating commands before the SCSI host structure
6191*4882a593Smuzhiyun 	 * is initialized.  Since the search starts at bit zero, this
6192*4882a593Smuzhiyun 	 * all works, since we have at least one command structure available;
6193*4882a593Smuzhiyun 	 * however, it means that the structures with the low indexes have to be
6194*4882a593Smuzhiyun 	 * reserved for driver-initiated requests, while requests from the block
6195*4882a593Smuzhiyun 	 * layer will use the higher indexes.
6196*4882a593Smuzhiyun 	 */
6197*4882a593Smuzhiyun 
6198*4882a593Smuzhiyun 	for (;;) {
6199*4882a593Smuzhiyun 		i = find_next_zero_bit(h->cmd_pool_bits,
6200*4882a593Smuzhiyun 					HPSA_NRESERVED_CMDS,
6201*4882a593Smuzhiyun 					offset);
6202*4882a593Smuzhiyun 		if (unlikely(i >= HPSA_NRESERVED_CMDS)) {
6203*4882a593Smuzhiyun 			offset = 0;
6204*4882a593Smuzhiyun 			continue;
6205*4882a593Smuzhiyun 		}
6206*4882a593Smuzhiyun 		c = h->cmd_pool + i;
6207*4882a593Smuzhiyun 		refcount = atomic_inc_return(&c->refcount);
6208*4882a593Smuzhiyun 		if (unlikely(refcount > 1)) {
6209*4882a593Smuzhiyun 			cmd_free(h, c); /* already in use */
6210*4882a593Smuzhiyun 			offset = (i + 1) % HPSA_NRESERVED_CMDS;
6211*4882a593Smuzhiyun 			continue;
6212*4882a593Smuzhiyun 		}
6213*4882a593Smuzhiyun 		set_bit(i & (BITS_PER_LONG - 1),
6214*4882a593Smuzhiyun 			h->cmd_pool_bits + (i / BITS_PER_LONG));
6215*4882a593Smuzhiyun 		break; /* it's ours now. */
6216*4882a593Smuzhiyun 	}
6217*4882a593Smuzhiyun 	hpsa_cmd_partial_init(h, i, c);
6218*4882a593Smuzhiyun 	c->device = NULL;
6219*4882a593Smuzhiyun 	return c;
6220*4882a593Smuzhiyun }
6221*4882a593Smuzhiyun 
6222*4882a593Smuzhiyun /*
6223*4882a593Smuzhiyun  * This is the complementary operation to cmd_alloc().  Note, however, in some
6224*4882a593Smuzhiyun  * corner cases it may also be used to free blocks allocated by
6225*4882a593Smuzhiyun  * cmd_tagged_alloc() in which case the ref-count decrement does the trick and
6226*4882a593Smuzhiyun  * the clear-bit is harmless.
6227*4882a593Smuzhiyun  */
cmd_free(struct ctlr_info * h,struct CommandList * c)6228*4882a593Smuzhiyun static void cmd_free(struct ctlr_info *h, struct CommandList *c)
6229*4882a593Smuzhiyun {
6230*4882a593Smuzhiyun 	if (atomic_dec_and_test(&c->refcount)) {
6231*4882a593Smuzhiyun 		int i;
6232*4882a593Smuzhiyun 
6233*4882a593Smuzhiyun 		i = c - h->cmd_pool;
6234*4882a593Smuzhiyun 		clear_bit(i & (BITS_PER_LONG - 1),
6235*4882a593Smuzhiyun 			  h->cmd_pool_bits + (i / BITS_PER_LONG));
6236*4882a593Smuzhiyun 	}
6237*4882a593Smuzhiyun }
6238*4882a593Smuzhiyun 
6239*4882a593Smuzhiyun #ifdef CONFIG_COMPAT
6240*4882a593Smuzhiyun 
hpsa_ioctl32_passthru(struct scsi_device * dev,unsigned int cmd,void __user * arg)6241*4882a593Smuzhiyun static int hpsa_ioctl32_passthru(struct scsi_device *dev, unsigned int cmd,
6242*4882a593Smuzhiyun 	void __user *arg)
6243*4882a593Smuzhiyun {
6244*4882a593Smuzhiyun 	struct ctlr_info *h = sdev_to_hba(dev);
6245*4882a593Smuzhiyun 	IOCTL32_Command_struct __user *arg32 = arg;
6246*4882a593Smuzhiyun 	IOCTL_Command_struct arg64;
6247*4882a593Smuzhiyun 	int err;
6248*4882a593Smuzhiyun 	u32 cp;
6249*4882a593Smuzhiyun 
6250*4882a593Smuzhiyun 	if (!arg)
6251*4882a593Smuzhiyun 		return -EINVAL;
6252*4882a593Smuzhiyun 
6253*4882a593Smuzhiyun 	memset(&arg64, 0, sizeof(arg64));
6254*4882a593Smuzhiyun 	if (copy_from_user(&arg64, arg32, offsetof(IOCTL_Command_struct, buf)))
6255*4882a593Smuzhiyun 		return -EFAULT;
6256*4882a593Smuzhiyun 	if (get_user(cp, &arg32->buf))
6257*4882a593Smuzhiyun 		return -EFAULT;
6258*4882a593Smuzhiyun 	arg64.buf = compat_ptr(cp);
6259*4882a593Smuzhiyun 
6260*4882a593Smuzhiyun 	if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6261*4882a593Smuzhiyun 		return -EAGAIN;
6262*4882a593Smuzhiyun 	err = hpsa_passthru_ioctl(h, &arg64);
6263*4882a593Smuzhiyun 	atomic_inc(&h->passthru_cmds_avail);
6264*4882a593Smuzhiyun 	if (err)
6265*4882a593Smuzhiyun 		return err;
6266*4882a593Smuzhiyun 	if (copy_to_user(&arg32->error_info, &arg64.error_info,
6267*4882a593Smuzhiyun 			 sizeof(arg32->error_info)))
6268*4882a593Smuzhiyun 		return -EFAULT;
6269*4882a593Smuzhiyun 	return 0;
6270*4882a593Smuzhiyun }
6271*4882a593Smuzhiyun 
hpsa_ioctl32_big_passthru(struct scsi_device * dev,unsigned int cmd,void __user * arg)6272*4882a593Smuzhiyun static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
6273*4882a593Smuzhiyun 	unsigned int cmd, void __user *arg)
6274*4882a593Smuzhiyun {
6275*4882a593Smuzhiyun 	struct ctlr_info *h = sdev_to_hba(dev);
6276*4882a593Smuzhiyun 	BIG_IOCTL32_Command_struct __user *arg32 = arg;
6277*4882a593Smuzhiyun 	BIG_IOCTL_Command_struct arg64;
6278*4882a593Smuzhiyun 	int err;
6279*4882a593Smuzhiyun 	u32 cp;
6280*4882a593Smuzhiyun 
6281*4882a593Smuzhiyun 	if (!arg)
6282*4882a593Smuzhiyun 		return -EINVAL;
6283*4882a593Smuzhiyun 	memset(&arg64, 0, sizeof(arg64));
6284*4882a593Smuzhiyun 	if (copy_from_user(&arg64, arg32,
6285*4882a593Smuzhiyun 			   offsetof(BIG_IOCTL32_Command_struct, buf)))
6286*4882a593Smuzhiyun 		return -EFAULT;
6287*4882a593Smuzhiyun 	if (get_user(cp, &arg32->buf))
6288*4882a593Smuzhiyun 		return -EFAULT;
6289*4882a593Smuzhiyun 	arg64.buf = compat_ptr(cp);
6290*4882a593Smuzhiyun 
6291*4882a593Smuzhiyun 	if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6292*4882a593Smuzhiyun 		return -EAGAIN;
6293*4882a593Smuzhiyun 	err = hpsa_big_passthru_ioctl(h, &arg64);
6294*4882a593Smuzhiyun 	atomic_inc(&h->passthru_cmds_avail);
6295*4882a593Smuzhiyun 	if (err)
6296*4882a593Smuzhiyun 		return err;
6297*4882a593Smuzhiyun 	if (copy_to_user(&arg32->error_info, &arg64.error_info,
6298*4882a593Smuzhiyun 			 sizeof(arg32->error_info)))
6299*4882a593Smuzhiyun 		return -EFAULT;
6300*4882a593Smuzhiyun 	return 0;
6301*4882a593Smuzhiyun }
6302*4882a593Smuzhiyun 
hpsa_compat_ioctl(struct scsi_device * dev,unsigned int cmd,void __user * arg)6303*4882a593Smuzhiyun static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd,
6304*4882a593Smuzhiyun 			     void __user *arg)
6305*4882a593Smuzhiyun {
6306*4882a593Smuzhiyun 	switch (cmd) {
6307*4882a593Smuzhiyun 	case CCISS_GETPCIINFO:
6308*4882a593Smuzhiyun 	case CCISS_GETINTINFO:
6309*4882a593Smuzhiyun 	case CCISS_SETINTINFO:
6310*4882a593Smuzhiyun 	case CCISS_GETNODENAME:
6311*4882a593Smuzhiyun 	case CCISS_SETNODENAME:
6312*4882a593Smuzhiyun 	case CCISS_GETHEARTBEAT:
6313*4882a593Smuzhiyun 	case CCISS_GETBUSTYPES:
6314*4882a593Smuzhiyun 	case CCISS_GETFIRMVER:
6315*4882a593Smuzhiyun 	case CCISS_GETDRIVVER:
6316*4882a593Smuzhiyun 	case CCISS_REVALIDVOLS:
6317*4882a593Smuzhiyun 	case CCISS_DEREGDISK:
6318*4882a593Smuzhiyun 	case CCISS_REGNEWDISK:
6319*4882a593Smuzhiyun 	case CCISS_REGNEWD:
6320*4882a593Smuzhiyun 	case CCISS_RESCANDISK:
6321*4882a593Smuzhiyun 	case CCISS_GETLUNINFO:
6322*4882a593Smuzhiyun 		return hpsa_ioctl(dev, cmd, arg);
6323*4882a593Smuzhiyun 
6324*4882a593Smuzhiyun 	case CCISS_PASSTHRU32:
6325*4882a593Smuzhiyun 		return hpsa_ioctl32_passthru(dev, cmd, arg);
6326*4882a593Smuzhiyun 	case CCISS_BIG_PASSTHRU32:
6327*4882a593Smuzhiyun 		return hpsa_ioctl32_big_passthru(dev, cmd, arg);
6328*4882a593Smuzhiyun 
6329*4882a593Smuzhiyun 	default:
6330*4882a593Smuzhiyun 		return -ENOIOCTLCMD;
6331*4882a593Smuzhiyun 	}
6332*4882a593Smuzhiyun }
6333*4882a593Smuzhiyun #endif
6334*4882a593Smuzhiyun 
hpsa_getpciinfo_ioctl(struct ctlr_info * h,void __user * argp)6335*4882a593Smuzhiyun static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
6336*4882a593Smuzhiyun {
6337*4882a593Smuzhiyun 	struct hpsa_pci_info pciinfo;
6338*4882a593Smuzhiyun 
6339*4882a593Smuzhiyun 	if (!argp)
6340*4882a593Smuzhiyun 		return -EINVAL;
6341*4882a593Smuzhiyun 	pciinfo.domain = pci_domain_nr(h->pdev->bus);
6342*4882a593Smuzhiyun 	pciinfo.bus = h->pdev->bus->number;
6343*4882a593Smuzhiyun 	pciinfo.dev_fn = h->pdev->devfn;
6344*4882a593Smuzhiyun 	pciinfo.board_id = h->board_id;
6345*4882a593Smuzhiyun 	if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
6346*4882a593Smuzhiyun 		return -EFAULT;
6347*4882a593Smuzhiyun 	return 0;
6348*4882a593Smuzhiyun }
6349*4882a593Smuzhiyun 
hpsa_getdrivver_ioctl(struct ctlr_info * h,void __user * argp)6350*4882a593Smuzhiyun static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
6351*4882a593Smuzhiyun {
6352*4882a593Smuzhiyun 	DriverVer_type DriverVer;
6353*4882a593Smuzhiyun 	unsigned char vmaj, vmin, vsubmin;
6354*4882a593Smuzhiyun 	int rc;
6355*4882a593Smuzhiyun 
6356*4882a593Smuzhiyun 	rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
6357*4882a593Smuzhiyun 		&vmaj, &vmin, &vsubmin);
6358*4882a593Smuzhiyun 	if (rc != 3) {
6359*4882a593Smuzhiyun 		dev_info(&h->pdev->dev, "driver version string '%s' "
6360*4882a593Smuzhiyun 			"unrecognized.", HPSA_DRIVER_VERSION);
6361*4882a593Smuzhiyun 		vmaj = 0;
6362*4882a593Smuzhiyun 		vmin = 0;
6363*4882a593Smuzhiyun 		vsubmin = 0;
6364*4882a593Smuzhiyun 	}
6365*4882a593Smuzhiyun 	DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
6366*4882a593Smuzhiyun 	if (!argp)
6367*4882a593Smuzhiyun 		return -EINVAL;
6368*4882a593Smuzhiyun 	if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
6369*4882a593Smuzhiyun 		return -EFAULT;
6370*4882a593Smuzhiyun 	return 0;
6371*4882a593Smuzhiyun }
6372*4882a593Smuzhiyun 
hpsa_passthru_ioctl(struct ctlr_info * h,IOCTL_Command_struct * iocommand)6373*4882a593Smuzhiyun static int hpsa_passthru_ioctl(struct ctlr_info *h,
6374*4882a593Smuzhiyun 			       IOCTL_Command_struct *iocommand)
6375*4882a593Smuzhiyun {
6376*4882a593Smuzhiyun 	struct CommandList *c;
6377*4882a593Smuzhiyun 	char *buff = NULL;
6378*4882a593Smuzhiyun 	u64 temp64;
6379*4882a593Smuzhiyun 	int rc = 0;
6380*4882a593Smuzhiyun 
6381*4882a593Smuzhiyun 	if (!capable(CAP_SYS_RAWIO))
6382*4882a593Smuzhiyun 		return -EPERM;
6383*4882a593Smuzhiyun 	if ((iocommand->buf_size < 1) &&
6384*4882a593Smuzhiyun 	    (iocommand->Request.Type.Direction != XFER_NONE)) {
6385*4882a593Smuzhiyun 		return -EINVAL;
6386*4882a593Smuzhiyun 	}
6387*4882a593Smuzhiyun 	if (iocommand->buf_size > 0) {
6388*4882a593Smuzhiyun 		buff = kmalloc(iocommand->buf_size, GFP_KERNEL);
6389*4882a593Smuzhiyun 		if (buff == NULL)
6390*4882a593Smuzhiyun 			return -ENOMEM;
6391*4882a593Smuzhiyun 		if (iocommand->Request.Type.Direction & XFER_WRITE) {
6392*4882a593Smuzhiyun 			/* Copy the data into the buffer we created */
6393*4882a593Smuzhiyun 			if (copy_from_user(buff, iocommand->buf,
6394*4882a593Smuzhiyun 				iocommand->buf_size)) {
6395*4882a593Smuzhiyun 				rc = -EFAULT;
6396*4882a593Smuzhiyun 				goto out_kfree;
6397*4882a593Smuzhiyun 			}
6398*4882a593Smuzhiyun 		} else {
6399*4882a593Smuzhiyun 			memset(buff, 0, iocommand->buf_size);
6400*4882a593Smuzhiyun 		}
6401*4882a593Smuzhiyun 	}
6402*4882a593Smuzhiyun 	c = cmd_alloc(h);
6403*4882a593Smuzhiyun 
6404*4882a593Smuzhiyun 	/* Fill in the command type */
6405*4882a593Smuzhiyun 	c->cmd_type = CMD_IOCTL_PEND;
6406*4882a593Smuzhiyun 	c->scsi_cmd = SCSI_CMD_BUSY;
6407*4882a593Smuzhiyun 	/* Fill in Command Header */
6408*4882a593Smuzhiyun 	c->Header.ReplyQueue = 0; /* unused in simple mode */
6409*4882a593Smuzhiyun 	if (iocommand->buf_size > 0) {	/* buffer to fill */
6410*4882a593Smuzhiyun 		c->Header.SGList = 1;
6411*4882a593Smuzhiyun 		c->Header.SGTotal = cpu_to_le16(1);
6412*4882a593Smuzhiyun 	} else	{ /* no buffers to fill */
6413*4882a593Smuzhiyun 		c->Header.SGList = 0;
6414*4882a593Smuzhiyun 		c->Header.SGTotal = cpu_to_le16(0);
6415*4882a593Smuzhiyun 	}
6416*4882a593Smuzhiyun 	memcpy(&c->Header.LUN, &iocommand->LUN_info, sizeof(c->Header.LUN));
6417*4882a593Smuzhiyun 
6418*4882a593Smuzhiyun 	/* Fill in Request block */
6419*4882a593Smuzhiyun 	memcpy(&c->Request, &iocommand->Request,
6420*4882a593Smuzhiyun 		sizeof(c->Request));
6421*4882a593Smuzhiyun 
6422*4882a593Smuzhiyun 	/* Fill in the scatter gather information */
6423*4882a593Smuzhiyun 	if (iocommand->buf_size > 0) {
6424*4882a593Smuzhiyun 		temp64 = dma_map_single(&h->pdev->dev, buff,
6425*4882a593Smuzhiyun 			iocommand->buf_size, DMA_BIDIRECTIONAL);
6426*4882a593Smuzhiyun 		if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
6427*4882a593Smuzhiyun 			c->SG[0].Addr = cpu_to_le64(0);
6428*4882a593Smuzhiyun 			c->SG[0].Len = cpu_to_le32(0);
6429*4882a593Smuzhiyun 			rc = -ENOMEM;
6430*4882a593Smuzhiyun 			goto out;
6431*4882a593Smuzhiyun 		}
6432*4882a593Smuzhiyun 		c->SG[0].Addr = cpu_to_le64(temp64);
6433*4882a593Smuzhiyun 		c->SG[0].Len = cpu_to_le32(iocommand->buf_size);
6434*4882a593Smuzhiyun 		c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
6435*4882a593Smuzhiyun 	}
6436*4882a593Smuzhiyun 	rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6437*4882a593Smuzhiyun 					NO_TIMEOUT);
6438*4882a593Smuzhiyun 	if (iocommand->buf_size > 0)
6439*4882a593Smuzhiyun 		hpsa_pci_unmap(h->pdev, c, 1, DMA_BIDIRECTIONAL);
6440*4882a593Smuzhiyun 	check_ioctl_unit_attention(h, c);
6441*4882a593Smuzhiyun 	if (rc) {
6442*4882a593Smuzhiyun 		rc = -EIO;
6443*4882a593Smuzhiyun 		goto out;
6444*4882a593Smuzhiyun 	}
6445*4882a593Smuzhiyun 
6446*4882a593Smuzhiyun 	/* Copy the error information out */
6447*4882a593Smuzhiyun 	memcpy(&iocommand->error_info, c->err_info,
6448*4882a593Smuzhiyun 		sizeof(iocommand->error_info));
6449*4882a593Smuzhiyun 	if ((iocommand->Request.Type.Direction & XFER_READ) &&
6450*4882a593Smuzhiyun 		iocommand->buf_size > 0) {
6451*4882a593Smuzhiyun 		/* Copy the data out of the buffer we created */
6452*4882a593Smuzhiyun 		if (copy_to_user(iocommand->buf, buff, iocommand->buf_size)) {
6453*4882a593Smuzhiyun 			rc = -EFAULT;
6454*4882a593Smuzhiyun 			goto out;
6455*4882a593Smuzhiyun 		}
6456*4882a593Smuzhiyun 	}
6457*4882a593Smuzhiyun out:
6458*4882a593Smuzhiyun 	cmd_free(h, c);
6459*4882a593Smuzhiyun out_kfree:
6460*4882a593Smuzhiyun 	kfree(buff);
6461*4882a593Smuzhiyun 	return rc;
6462*4882a593Smuzhiyun }
6463*4882a593Smuzhiyun 
hpsa_big_passthru_ioctl(struct ctlr_info * h,BIG_IOCTL_Command_struct * ioc)6464*4882a593Smuzhiyun static int hpsa_big_passthru_ioctl(struct ctlr_info *h,
6465*4882a593Smuzhiyun 				   BIG_IOCTL_Command_struct *ioc)
6466*4882a593Smuzhiyun {
6467*4882a593Smuzhiyun 	struct CommandList *c;
6468*4882a593Smuzhiyun 	unsigned char **buff = NULL;
6469*4882a593Smuzhiyun 	int *buff_size = NULL;
6470*4882a593Smuzhiyun 	u64 temp64;
6471*4882a593Smuzhiyun 	BYTE sg_used = 0;
6472*4882a593Smuzhiyun 	int status = 0;
6473*4882a593Smuzhiyun 	u32 left;
6474*4882a593Smuzhiyun 	u32 sz;
6475*4882a593Smuzhiyun 	BYTE __user *data_ptr;
6476*4882a593Smuzhiyun 
6477*4882a593Smuzhiyun 	if (!capable(CAP_SYS_RAWIO))
6478*4882a593Smuzhiyun 		return -EPERM;
6479*4882a593Smuzhiyun 
6480*4882a593Smuzhiyun 	if ((ioc->buf_size < 1) &&
6481*4882a593Smuzhiyun 	    (ioc->Request.Type.Direction != XFER_NONE))
6482*4882a593Smuzhiyun 		return -EINVAL;
6483*4882a593Smuzhiyun 	/* Check kmalloc limits  using all SGs */
6484*4882a593Smuzhiyun 	if (ioc->malloc_size > MAX_KMALLOC_SIZE)
6485*4882a593Smuzhiyun 		return -EINVAL;
6486*4882a593Smuzhiyun 	if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD)
6487*4882a593Smuzhiyun 		return -EINVAL;
6488*4882a593Smuzhiyun 	buff = kcalloc(SG_ENTRIES_IN_CMD, sizeof(char *), GFP_KERNEL);
6489*4882a593Smuzhiyun 	if (!buff) {
6490*4882a593Smuzhiyun 		status = -ENOMEM;
6491*4882a593Smuzhiyun 		goto cleanup1;
6492*4882a593Smuzhiyun 	}
6493*4882a593Smuzhiyun 	buff_size = kmalloc_array(SG_ENTRIES_IN_CMD, sizeof(int), GFP_KERNEL);
6494*4882a593Smuzhiyun 	if (!buff_size) {
6495*4882a593Smuzhiyun 		status = -ENOMEM;
6496*4882a593Smuzhiyun 		goto cleanup1;
6497*4882a593Smuzhiyun 	}
6498*4882a593Smuzhiyun 	left = ioc->buf_size;
6499*4882a593Smuzhiyun 	data_ptr = ioc->buf;
6500*4882a593Smuzhiyun 	while (left) {
6501*4882a593Smuzhiyun 		sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
6502*4882a593Smuzhiyun 		buff_size[sg_used] = sz;
6503*4882a593Smuzhiyun 		buff[sg_used] = kmalloc(sz, GFP_KERNEL);
6504*4882a593Smuzhiyun 		if (buff[sg_used] == NULL) {
6505*4882a593Smuzhiyun 			status = -ENOMEM;
6506*4882a593Smuzhiyun 			goto cleanup1;
6507*4882a593Smuzhiyun 		}
6508*4882a593Smuzhiyun 		if (ioc->Request.Type.Direction & XFER_WRITE) {
6509*4882a593Smuzhiyun 			if (copy_from_user(buff[sg_used], data_ptr, sz)) {
6510*4882a593Smuzhiyun 				status = -EFAULT;
6511*4882a593Smuzhiyun 				goto cleanup1;
6512*4882a593Smuzhiyun 			}
6513*4882a593Smuzhiyun 		} else
6514*4882a593Smuzhiyun 			memset(buff[sg_used], 0, sz);
6515*4882a593Smuzhiyun 		left -= sz;
6516*4882a593Smuzhiyun 		data_ptr += sz;
6517*4882a593Smuzhiyun 		sg_used++;
6518*4882a593Smuzhiyun 	}
6519*4882a593Smuzhiyun 	c = cmd_alloc(h);
6520*4882a593Smuzhiyun 
6521*4882a593Smuzhiyun 	c->cmd_type = CMD_IOCTL_PEND;
6522*4882a593Smuzhiyun 	c->scsi_cmd = SCSI_CMD_BUSY;
6523*4882a593Smuzhiyun 	c->Header.ReplyQueue = 0;
6524*4882a593Smuzhiyun 	c->Header.SGList = (u8) sg_used;
6525*4882a593Smuzhiyun 	c->Header.SGTotal = cpu_to_le16(sg_used);
6526*4882a593Smuzhiyun 	memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
6527*4882a593Smuzhiyun 	memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
6528*4882a593Smuzhiyun 	if (ioc->buf_size > 0) {
6529*4882a593Smuzhiyun 		int i;
6530*4882a593Smuzhiyun 		for (i = 0; i < sg_used; i++) {
6531*4882a593Smuzhiyun 			temp64 = dma_map_single(&h->pdev->dev, buff[i],
6532*4882a593Smuzhiyun 				    buff_size[i], DMA_BIDIRECTIONAL);
6533*4882a593Smuzhiyun 			if (dma_mapping_error(&h->pdev->dev,
6534*4882a593Smuzhiyun 							(dma_addr_t) temp64)) {
6535*4882a593Smuzhiyun 				c->SG[i].Addr = cpu_to_le64(0);
6536*4882a593Smuzhiyun 				c->SG[i].Len = cpu_to_le32(0);
6537*4882a593Smuzhiyun 				hpsa_pci_unmap(h->pdev, c, i,
6538*4882a593Smuzhiyun 					DMA_BIDIRECTIONAL);
6539*4882a593Smuzhiyun 				status = -ENOMEM;
6540*4882a593Smuzhiyun 				goto cleanup0;
6541*4882a593Smuzhiyun 			}
6542*4882a593Smuzhiyun 			c->SG[i].Addr = cpu_to_le64(temp64);
6543*4882a593Smuzhiyun 			c->SG[i].Len = cpu_to_le32(buff_size[i]);
6544*4882a593Smuzhiyun 			c->SG[i].Ext = cpu_to_le32(0);
6545*4882a593Smuzhiyun 		}
6546*4882a593Smuzhiyun 		c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
6547*4882a593Smuzhiyun 	}
6548*4882a593Smuzhiyun 	status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6549*4882a593Smuzhiyun 						NO_TIMEOUT);
6550*4882a593Smuzhiyun 	if (sg_used)
6551*4882a593Smuzhiyun 		hpsa_pci_unmap(h->pdev, c, sg_used, DMA_BIDIRECTIONAL);
6552*4882a593Smuzhiyun 	check_ioctl_unit_attention(h, c);
6553*4882a593Smuzhiyun 	if (status) {
6554*4882a593Smuzhiyun 		status = -EIO;
6555*4882a593Smuzhiyun 		goto cleanup0;
6556*4882a593Smuzhiyun 	}
6557*4882a593Smuzhiyun 
6558*4882a593Smuzhiyun 	/* Copy the error information out */
6559*4882a593Smuzhiyun 	memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
6560*4882a593Smuzhiyun 	if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
6561*4882a593Smuzhiyun 		int i;
6562*4882a593Smuzhiyun 
6563*4882a593Smuzhiyun 		/* Copy the data out of the buffer we created */
6564*4882a593Smuzhiyun 		BYTE __user *ptr = ioc->buf;
6565*4882a593Smuzhiyun 		for (i = 0; i < sg_used; i++) {
6566*4882a593Smuzhiyun 			if (copy_to_user(ptr, buff[i], buff_size[i])) {
6567*4882a593Smuzhiyun 				status = -EFAULT;
6568*4882a593Smuzhiyun 				goto cleanup0;
6569*4882a593Smuzhiyun 			}
6570*4882a593Smuzhiyun 			ptr += buff_size[i];
6571*4882a593Smuzhiyun 		}
6572*4882a593Smuzhiyun 	}
6573*4882a593Smuzhiyun 	status = 0;
6574*4882a593Smuzhiyun cleanup0:
6575*4882a593Smuzhiyun 	cmd_free(h, c);
6576*4882a593Smuzhiyun cleanup1:
6577*4882a593Smuzhiyun 	if (buff) {
6578*4882a593Smuzhiyun 		int i;
6579*4882a593Smuzhiyun 
6580*4882a593Smuzhiyun 		for (i = 0; i < sg_used; i++)
6581*4882a593Smuzhiyun 			kfree(buff[i]);
6582*4882a593Smuzhiyun 		kfree(buff);
6583*4882a593Smuzhiyun 	}
6584*4882a593Smuzhiyun 	kfree(buff_size);
6585*4882a593Smuzhiyun 	return status;
6586*4882a593Smuzhiyun }
6587*4882a593Smuzhiyun 
check_ioctl_unit_attention(struct ctlr_info * h,struct CommandList * c)6588*4882a593Smuzhiyun static void check_ioctl_unit_attention(struct ctlr_info *h,
6589*4882a593Smuzhiyun 	struct CommandList *c)
6590*4882a593Smuzhiyun {
6591*4882a593Smuzhiyun 	if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
6592*4882a593Smuzhiyun 			c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
6593*4882a593Smuzhiyun 		(void) check_for_unit_attention(h, c);
6594*4882a593Smuzhiyun }
6595*4882a593Smuzhiyun 
6596*4882a593Smuzhiyun /*
6597*4882a593Smuzhiyun  * ioctl
6598*4882a593Smuzhiyun  */
hpsa_ioctl(struct scsi_device * dev,unsigned int cmd,void __user * argp)6599*4882a593Smuzhiyun static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd,
6600*4882a593Smuzhiyun 		      void __user *argp)
6601*4882a593Smuzhiyun {
6602*4882a593Smuzhiyun 	struct ctlr_info *h = sdev_to_hba(dev);
6603*4882a593Smuzhiyun 	int rc;
6604*4882a593Smuzhiyun 
6605*4882a593Smuzhiyun 	switch (cmd) {
6606*4882a593Smuzhiyun 	case CCISS_DEREGDISK:
6607*4882a593Smuzhiyun 	case CCISS_REGNEWDISK:
6608*4882a593Smuzhiyun 	case CCISS_REGNEWD:
6609*4882a593Smuzhiyun 		hpsa_scan_start(h->scsi_host);
6610*4882a593Smuzhiyun 		return 0;
6611*4882a593Smuzhiyun 	case CCISS_GETPCIINFO:
6612*4882a593Smuzhiyun 		return hpsa_getpciinfo_ioctl(h, argp);
6613*4882a593Smuzhiyun 	case CCISS_GETDRIVVER:
6614*4882a593Smuzhiyun 		return hpsa_getdrivver_ioctl(h, argp);
6615*4882a593Smuzhiyun 	case CCISS_PASSTHRU: {
6616*4882a593Smuzhiyun 		IOCTL_Command_struct iocommand;
6617*4882a593Smuzhiyun 
6618*4882a593Smuzhiyun 		if (!argp)
6619*4882a593Smuzhiyun 			return -EINVAL;
6620*4882a593Smuzhiyun 		if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
6621*4882a593Smuzhiyun 			return -EFAULT;
6622*4882a593Smuzhiyun 		if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6623*4882a593Smuzhiyun 			return -EAGAIN;
6624*4882a593Smuzhiyun 		rc = hpsa_passthru_ioctl(h, &iocommand);
6625*4882a593Smuzhiyun 		atomic_inc(&h->passthru_cmds_avail);
6626*4882a593Smuzhiyun 		if (!rc && copy_to_user(argp, &iocommand, sizeof(iocommand)))
6627*4882a593Smuzhiyun 			rc = -EFAULT;
6628*4882a593Smuzhiyun 		return rc;
6629*4882a593Smuzhiyun 	}
6630*4882a593Smuzhiyun 	case CCISS_BIG_PASSTHRU: {
6631*4882a593Smuzhiyun 		BIG_IOCTL_Command_struct ioc;
6632*4882a593Smuzhiyun 		if (!argp)
6633*4882a593Smuzhiyun 			return -EINVAL;
6634*4882a593Smuzhiyun 		if (copy_from_user(&ioc, argp, sizeof(ioc)))
6635*4882a593Smuzhiyun 			return -EFAULT;
6636*4882a593Smuzhiyun 		if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6637*4882a593Smuzhiyun 			return -EAGAIN;
6638*4882a593Smuzhiyun 		rc = hpsa_big_passthru_ioctl(h, &ioc);
6639*4882a593Smuzhiyun 		atomic_inc(&h->passthru_cmds_avail);
6640*4882a593Smuzhiyun 		if (!rc && copy_to_user(argp, &ioc, sizeof(ioc)))
6641*4882a593Smuzhiyun 			rc = -EFAULT;
6642*4882a593Smuzhiyun 		return rc;
6643*4882a593Smuzhiyun 	}
6644*4882a593Smuzhiyun 	default:
6645*4882a593Smuzhiyun 		return -ENOTTY;
6646*4882a593Smuzhiyun 	}
6647*4882a593Smuzhiyun }
6648*4882a593Smuzhiyun 
hpsa_send_host_reset(struct ctlr_info * h,u8 reset_type)6649*4882a593Smuzhiyun static void hpsa_send_host_reset(struct ctlr_info *h, u8 reset_type)
6650*4882a593Smuzhiyun {
6651*4882a593Smuzhiyun 	struct CommandList *c;
6652*4882a593Smuzhiyun 
6653*4882a593Smuzhiyun 	c = cmd_alloc(h);
6654*4882a593Smuzhiyun 
6655*4882a593Smuzhiyun 	/* fill_cmd can't fail here, no data buffer to map */
6656*4882a593Smuzhiyun 	(void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
6657*4882a593Smuzhiyun 		RAID_CTLR_LUNID, TYPE_MSG);
6658*4882a593Smuzhiyun 	c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
6659*4882a593Smuzhiyun 	c->waiting = NULL;
6660*4882a593Smuzhiyun 	enqueue_cmd_and_start_io(h, c);
6661*4882a593Smuzhiyun 	/* Don't wait for completion, the reset won't complete.  Don't free
6662*4882a593Smuzhiyun 	 * the command either.  This is the last command we will send before
6663*4882a593Smuzhiyun 	 * re-initializing everything, so it doesn't matter and won't leak.
6664*4882a593Smuzhiyun 	 */
6665*4882a593Smuzhiyun 	return;
6666*4882a593Smuzhiyun }
6667*4882a593Smuzhiyun 
fill_cmd(struct CommandList * c,u8 cmd,struct ctlr_info * h,void * buff,size_t size,u16 page_code,unsigned char * scsi3addr,int cmd_type)6668*4882a593Smuzhiyun static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
6669*4882a593Smuzhiyun 	void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
6670*4882a593Smuzhiyun 	int cmd_type)
6671*4882a593Smuzhiyun {
6672*4882a593Smuzhiyun 	enum dma_data_direction dir = DMA_NONE;
6673*4882a593Smuzhiyun 
6674*4882a593Smuzhiyun 	c->cmd_type = CMD_IOCTL_PEND;
6675*4882a593Smuzhiyun 	c->scsi_cmd = SCSI_CMD_BUSY;
6676*4882a593Smuzhiyun 	c->Header.ReplyQueue = 0;
6677*4882a593Smuzhiyun 	if (buff != NULL && size > 0) {
6678*4882a593Smuzhiyun 		c->Header.SGList = 1;
6679*4882a593Smuzhiyun 		c->Header.SGTotal = cpu_to_le16(1);
6680*4882a593Smuzhiyun 	} else {
6681*4882a593Smuzhiyun 		c->Header.SGList = 0;
6682*4882a593Smuzhiyun 		c->Header.SGTotal = cpu_to_le16(0);
6683*4882a593Smuzhiyun 	}
6684*4882a593Smuzhiyun 	memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
6685*4882a593Smuzhiyun 
6686*4882a593Smuzhiyun 	if (cmd_type == TYPE_CMD) {
6687*4882a593Smuzhiyun 		switch (cmd) {
6688*4882a593Smuzhiyun 		case HPSA_INQUIRY:
6689*4882a593Smuzhiyun 			/* are we trying to read a vital product page */
6690*4882a593Smuzhiyun 			if (page_code & VPD_PAGE) {
6691*4882a593Smuzhiyun 				c->Request.CDB[1] = 0x01;
6692*4882a593Smuzhiyun 				c->Request.CDB[2] = (page_code & 0xff);
6693*4882a593Smuzhiyun 			}
6694*4882a593Smuzhiyun 			c->Request.CDBLen = 6;
6695*4882a593Smuzhiyun 			c->Request.type_attr_dir =
6696*4882a593Smuzhiyun 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6697*4882a593Smuzhiyun 			c->Request.Timeout = 0;
6698*4882a593Smuzhiyun 			c->Request.CDB[0] = HPSA_INQUIRY;
6699*4882a593Smuzhiyun 			c->Request.CDB[4] = size & 0xFF;
6700*4882a593Smuzhiyun 			break;
6701*4882a593Smuzhiyun 		case RECEIVE_DIAGNOSTIC:
6702*4882a593Smuzhiyun 			c->Request.CDBLen = 6;
6703*4882a593Smuzhiyun 			c->Request.type_attr_dir =
6704*4882a593Smuzhiyun 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6705*4882a593Smuzhiyun 			c->Request.Timeout = 0;
6706*4882a593Smuzhiyun 			c->Request.CDB[0] = cmd;
6707*4882a593Smuzhiyun 			c->Request.CDB[1] = 1;
6708*4882a593Smuzhiyun 			c->Request.CDB[2] = 1;
6709*4882a593Smuzhiyun 			c->Request.CDB[3] = (size >> 8) & 0xFF;
6710*4882a593Smuzhiyun 			c->Request.CDB[4] = size & 0xFF;
6711*4882a593Smuzhiyun 			break;
6712*4882a593Smuzhiyun 		case HPSA_REPORT_LOG:
6713*4882a593Smuzhiyun 		case HPSA_REPORT_PHYS:
6714*4882a593Smuzhiyun 			/* Talking to controller so It's a physical command
6715*4882a593Smuzhiyun 			   mode = 00 target = 0.  Nothing to write.
6716*4882a593Smuzhiyun 			 */
6717*4882a593Smuzhiyun 			c->Request.CDBLen = 12;
6718*4882a593Smuzhiyun 			c->Request.type_attr_dir =
6719*4882a593Smuzhiyun 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6720*4882a593Smuzhiyun 			c->Request.Timeout = 0;
6721*4882a593Smuzhiyun 			c->Request.CDB[0] = cmd;
6722*4882a593Smuzhiyun 			c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6723*4882a593Smuzhiyun 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6724*4882a593Smuzhiyun 			c->Request.CDB[8] = (size >> 8) & 0xFF;
6725*4882a593Smuzhiyun 			c->Request.CDB[9] = size & 0xFF;
6726*4882a593Smuzhiyun 			break;
6727*4882a593Smuzhiyun 		case BMIC_SENSE_DIAG_OPTIONS:
6728*4882a593Smuzhiyun 			c->Request.CDBLen = 16;
6729*4882a593Smuzhiyun 			c->Request.type_attr_dir =
6730*4882a593Smuzhiyun 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6731*4882a593Smuzhiyun 			c->Request.Timeout = 0;
6732*4882a593Smuzhiyun 			/* Spec says this should be BMIC_WRITE */
6733*4882a593Smuzhiyun 			c->Request.CDB[0] = BMIC_READ;
6734*4882a593Smuzhiyun 			c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS;
6735*4882a593Smuzhiyun 			break;
6736*4882a593Smuzhiyun 		case BMIC_SET_DIAG_OPTIONS:
6737*4882a593Smuzhiyun 			c->Request.CDBLen = 16;
6738*4882a593Smuzhiyun 			c->Request.type_attr_dir =
6739*4882a593Smuzhiyun 					TYPE_ATTR_DIR(cmd_type,
6740*4882a593Smuzhiyun 						ATTR_SIMPLE, XFER_WRITE);
6741*4882a593Smuzhiyun 			c->Request.Timeout = 0;
6742*4882a593Smuzhiyun 			c->Request.CDB[0] = BMIC_WRITE;
6743*4882a593Smuzhiyun 			c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS;
6744*4882a593Smuzhiyun 			break;
6745*4882a593Smuzhiyun 		case HPSA_CACHE_FLUSH:
6746*4882a593Smuzhiyun 			c->Request.CDBLen = 12;
6747*4882a593Smuzhiyun 			c->Request.type_attr_dir =
6748*4882a593Smuzhiyun 					TYPE_ATTR_DIR(cmd_type,
6749*4882a593Smuzhiyun 						ATTR_SIMPLE, XFER_WRITE);
6750*4882a593Smuzhiyun 			c->Request.Timeout = 0;
6751*4882a593Smuzhiyun 			c->Request.CDB[0] = BMIC_WRITE;
6752*4882a593Smuzhiyun 			c->Request.CDB[6] = BMIC_CACHE_FLUSH;
6753*4882a593Smuzhiyun 			c->Request.CDB[7] = (size >> 8) & 0xFF;
6754*4882a593Smuzhiyun 			c->Request.CDB[8] = size & 0xFF;
6755*4882a593Smuzhiyun 			break;
6756*4882a593Smuzhiyun 		case TEST_UNIT_READY:
6757*4882a593Smuzhiyun 			c->Request.CDBLen = 6;
6758*4882a593Smuzhiyun 			c->Request.type_attr_dir =
6759*4882a593Smuzhiyun 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6760*4882a593Smuzhiyun 			c->Request.Timeout = 0;
6761*4882a593Smuzhiyun 			break;
6762*4882a593Smuzhiyun 		case HPSA_GET_RAID_MAP:
6763*4882a593Smuzhiyun 			c->Request.CDBLen = 12;
6764*4882a593Smuzhiyun 			c->Request.type_attr_dir =
6765*4882a593Smuzhiyun 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6766*4882a593Smuzhiyun 			c->Request.Timeout = 0;
6767*4882a593Smuzhiyun 			c->Request.CDB[0] = HPSA_CISS_READ;
6768*4882a593Smuzhiyun 			c->Request.CDB[1] = cmd;
6769*4882a593Smuzhiyun 			c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6770*4882a593Smuzhiyun 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6771*4882a593Smuzhiyun 			c->Request.CDB[8] = (size >> 8) & 0xFF;
6772*4882a593Smuzhiyun 			c->Request.CDB[9] = size & 0xFF;
6773*4882a593Smuzhiyun 			break;
6774*4882a593Smuzhiyun 		case BMIC_SENSE_CONTROLLER_PARAMETERS:
6775*4882a593Smuzhiyun 			c->Request.CDBLen = 10;
6776*4882a593Smuzhiyun 			c->Request.type_attr_dir =
6777*4882a593Smuzhiyun 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6778*4882a593Smuzhiyun 			c->Request.Timeout = 0;
6779*4882a593Smuzhiyun 			c->Request.CDB[0] = BMIC_READ;
6780*4882a593Smuzhiyun 			c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
6781*4882a593Smuzhiyun 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6782*4882a593Smuzhiyun 			c->Request.CDB[8] = (size >> 8) & 0xFF;
6783*4882a593Smuzhiyun 			break;
6784*4882a593Smuzhiyun 		case BMIC_IDENTIFY_PHYSICAL_DEVICE:
6785*4882a593Smuzhiyun 			c->Request.CDBLen = 10;
6786*4882a593Smuzhiyun 			c->Request.type_attr_dir =
6787*4882a593Smuzhiyun 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6788*4882a593Smuzhiyun 			c->Request.Timeout = 0;
6789*4882a593Smuzhiyun 			c->Request.CDB[0] = BMIC_READ;
6790*4882a593Smuzhiyun 			c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
6791*4882a593Smuzhiyun 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6792*4882a593Smuzhiyun 			c->Request.CDB[8] = (size >> 8) & 0XFF;
6793*4882a593Smuzhiyun 			break;
6794*4882a593Smuzhiyun 		case BMIC_SENSE_SUBSYSTEM_INFORMATION:
6795*4882a593Smuzhiyun 			c->Request.CDBLen = 10;
6796*4882a593Smuzhiyun 			c->Request.type_attr_dir =
6797*4882a593Smuzhiyun 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6798*4882a593Smuzhiyun 			c->Request.Timeout = 0;
6799*4882a593Smuzhiyun 			c->Request.CDB[0] = BMIC_READ;
6800*4882a593Smuzhiyun 			c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION;
6801*4882a593Smuzhiyun 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6802*4882a593Smuzhiyun 			c->Request.CDB[8] = (size >> 8) & 0XFF;
6803*4882a593Smuzhiyun 			break;
6804*4882a593Smuzhiyun 		case BMIC_SENSE_STORAGE_BOX_PARAMS:
6805*4882a593Smuzhiyun 			c->Request.CDBLen = 10;
6806*4882a593Smuzhiyun 			c->Request.type_attr_dir =
6807*4882a593Smuzhiyun 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6808*4882a593Smuzhiyun 			c->Request.Timeout = 0;
6809*4882a593Smuzhiyun 			c->Request.CDB[0] = BMIC_READ;
6810*4882a593Smuzhiyun 			c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS;
6811*4882a593Smuzhiyun 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6812*4882a593Smuzhiyun 			c->Request.CDB[8] = (size >> 8) & 0XFF;
6813*4882a593Smuzhiyun 			break;
6814*4882a593Smuzhiyun 		case BMIC_IDENTIFY_CONTROLLER:
6815*4882a593Smuzhiyun 			c->Request.CDBLen = 10;
6816*4882a593Smuzhiyun 			c->Request.type_attr_dir =
6817*4882a593Smuzhiyun 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6818*4882a593Smuzhiyun 			c->Request.Timeout = 0;
6819*4882a593Smuzhiyun 			c->Request.CDB[0] = BMIC_READ;
6820*4882a593Smuzhiyun 			c->Request.CDB[1] = 0;
6821*4882a593Smuzhiyun 			c->Request.CDB[2] = 0;
6822*4882a593Smuzhiyun 			c->Request.CDB[3] = 0;
6823*4882a593Smuzhiyun 			c->Request.CDB[4] = 0;
6824*4882a593Smuzhiyun 			c->Request.CDB[5] = 0;
6825*4882a593Smuzhiyun 			c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER;
6826*4882a593Smuzhiyun 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6827*4882a593Smuzhiyun 			c->Request.CDB[8] = (size >> 8) & 0XFF;
6828*4882a593Smuzhiyun 			c->Request.CDB[9] = 0;
6829*4882a593Smuzhiyun 			break;
6830*4882a593Smuzhiyun 		default:
6831*4882a593Smuzhiyun 			dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
6832*4882a593Smuzhiyun 			BUG();
6833*4882a593Smuzhiyun 		}
6834*4882a593Smuzhiyun 	} else if (cmd_type == TYPE_MSG) {
6835*4882a593Smuzhiyun 		switch (cmd) {
6836*4882a593Smuzhiyun 
6837*4882a593Smuzhiyun 		case  HPSA_PHYS_TARGET_RESET:
6838*4882a593Smuzhiyun 			c->Request.CDBLen = 16;
6839*4882a593Smuzhiyun 			c->Request.type_attr_dir =
6840*4882a593Smuzhiyun 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6841*4882a593Smuzhiyun 			c->Request.Timeout = 0; /* Don't time out */
6842*4882a593Smuzhiyun 			memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6843*4882a593Smuzhiyun 			c->Request.CDB[0] = HPSA_RESET;
6844*4882a593Smuzhiyun 			c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE;
6845*4882a593Smuzhiyun 			/* Physical target reset needs no control bytes 4-7*/
6846*4882a593Smuzhiyun 			c->Request.CDB[4] = 0x00;
6847*4882a593Smuzhiyun 			c->Request.CDB[5] = 0x00;
6848*4882a593Smuzhiyun 			c->Request.CDB[6] = 0x00;
6849*4882a593Smuzhiyun 			c->Request.CDB[7] = 0x00;
6850*4882a593Smuzhiyun 			break;
6851*4882a593Smuzhiyun 		case  HPSA_DEVICE_RESET_MSG:
6852*4882a593Smuzhiyun 			c->Request.CDBLen = 16;
6853*4882a593Smuzhiyun 			c->Request.type_attr_dir =
6854*4882a593Smuzhiyun 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6855*4882a593Smuzhiyun 			c->Request.Timeout = 0; /* Don't time out */
6856*4882a593Smuzhiyun 			memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6857*4882a593Smuzhiyun 			c->Request.CDB[0] =  cmd;
6858*4882a593Smuzhiyun 			c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
6859*4882a593Smuzhiyun 			/* If bytes 4-7 are zero, it means reset the */
6860*4882a593Smuzhiyun 			/* LunID device */
6861*4882a593Smuzhiyun 			c->Request.CDB[4] = 0x00;
6862*4882a593Smuzhiyun 			c->Request.CDB[5] = 0x00;
6863*4882a593Smuzhiyun 			c->Request.CDB[6] = 0x00;
6864*4882a593Smuzhiyun 			c->Request.CDB[7] = 0x00;
6865*4882a593Smuzhiyun 			break;
6866*4882a593Smuzhiyun 		default:
6867*4882a593Smuzhiyun 			dev_warn(&h->pdev->dev, "unknown message type %d\n",
6868*4882a593Smuzhiyun 				cmd);
6869*4882a593Smuzhiyun 			BUG();
6870*4882a593Smuzhiyun 		}
6871*4882a593Smuzhiyun 	} else {
6872*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
6873*4882a593Smuzhiyun 		BUG();
6874*4882a593Smuzhiyun 	}
6875*4882a593Smuzhiyun 
6876*4882a593Smuzhiyun 	switch (GET_DIR(c->Request.type_attr_dir)) {
6877*4882a593Smuzhiyun 	case XFER_READ:
6878*4882a593Smuzhiyun 		dir = DMA_FROM_DEVICE;
6879*4882a593Smuzhiyun 		break;
6880*4882a593Smuzhiyun 	case XFER_WRITE:
6881*4882a593Smuzhiyun 		dir = DMA_TO_DEVICE;
6882*4882a593Smuzhiyun 		break;
6883*4882a593Smuzhiyun 	case XFER_NONE:
6884*4882a593Smuzhiyun 		dir = DMA_NONE;
6885*4882a593Smuzhiyun 		break;
6886*4882a593Smuzhiyun 	default:
6887*4882a593Smuzhiyun 		dir = DMA_BIDIRECTIONAL;
6888*4882a593Smuzhiyun 	}
6889*4882a593Smuzhiyun 	if (hpsa_map_one(h->pdev, c, buff, size, dir))
6890*4882a593Smuzhiyun 		return -1;
6891*4882a593Smuzhiyun 	return 0;
6892*4882a593Smuzhiyun }
6893*4882a593Smuzhiyun 
6894*4882a593Smuzhiyun /*
6895*4882a593Smuzhiyun  * Map (physical) PCI mem into (virtual) kernel space
6896*4882a593Smuzhiyun  */
remap_pci_mem(ulong base,ulong size)6897*4882a593Smuzhiyun static void __iomem *remap_pci_mem(ulong base, ulong size)
6898*4882a593Smuzhiyun {
6899*4882a593Smuzhiyun 	ulong page_base = ((ulong) base) & PAGE_MASK;
6900*4882a593Smuzhiyun 	ulong page_offs = ((ulong) base) - page_base;
6901*4882a593Smuzhiyun 	void __iomem *page_remapped = ioremap(page_base,
6902*4882a593Smuzhiyun 		page_offs + size);
6903*4882a593Smuzhiyun 
6904*4882a593Smuzhiyun 	return page_remapped ? (page_remapped + page_offs) : NULL;
6905*4882a593Smuzhiyun }
6906*4882a593Smuzhiyun 
get_next_completion(struct ctlr_info * h,u8 q)6907*4882a593Smuzhiyun static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
6908*4882a593Smuzhiyun {
6909*4882a593Smuzhiyun 	return h->access.command_completed(h, q);
6910*4882a593Smuzhiyun }
6911*4882a593Smuzhiyun 
interrupt_pending(struct ctlr_info * h)6912*4882a593Smuzhiyun static inline bool interrupt_pending(struct ctlr_info *h)
6913*4882a593Smuzhiyun {
6914*4882a593Smuzhiyun 	return h->access.intr_pending(h);
6915*4882a593Smuzhiyun }
6916*4882a593Smuzhiyun 
interrupt_not_for_us(struct ctlr_info * h)6917*4882a593Smuzhiyun static inline long interrupt_not_for_us(struct ctlr_info *h)
6918*4882a593Smuzhiyun {
6919*4882a593Smuzhiyun 	return (h->access.intr_pending(h) == 0) ||
6920*4882a593Smuzhiyun 		(h->interrupts_enabled == 0);
6921*4882a593Smuzhiyun }
6922*4882a593Smuzhiyun 
bad_tag(struct ctlr_info * h,u32 tag_index,u32 raw_tag)6923*4882a593Smuzhiyun static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
6924*4882a593Smuzhiyun 	u32 raw_tag)
6925*4882a593Smuzhiyun {
6926*4882a593Smuzhiyun 	if (unlikely(tag_index >= h->nr_cmds)) {
6927*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
6928*4882a593Smuzhiyun 		return 1;
6929*4882a593Smuzhiyun 	}
6930*4882a593Smuzhiyun 	return 0;
6931*4882a593Smuzhiyun }
6932*4882a593Smuzhiyun 
finish_cmd(struct CommandList * c)6933*4882a593Smuzhiyun static inline void finish_cmd(struct CommandList *c)
6934*4882a593Smuzhiyun {
6935*4882a593Smuzhiyun 	dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
6936*4882a593Smuzhiyun 	if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
6937*4882a593Smuzhiyun 			|| c->cmd_type == CMD_IOACCEL2))
6938*4882a593Smuzhiyun 		complete_scsi_command(c);
6939*4882a593Smuzhiyun 	else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF)
6940*4882a593Smuzhiyun 		complete(c->waiting);
6941*4882a593Smuzhiyun }
6942*4882a593Smuzhiyun 
6943*4882a593Smuzhiyun /* process completion of an indexed ("direct lookup") command */
process_indexed_cmd(struct ctlr_info * h,u32 raw_tag)6944*4882a593Smuzhiyun static inline void process_indexed_cmd(struct ctlr_info *h,
6945*4882a593Smuzhiyun 	u32 raw_tag)
6946*4882a593Smuzhiyun {
6947*4882a593Smuzhiyun 	u32 tag_index;
6948*4882a593Smuzhiyun 	struct CommandList *c;
6949*4882a593Smuzhiyun 
6950*4882a593Smuzhiyun 	tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
6951*4882a593Smuzhiyun 	if (!bad_tag(h, tag_index, raw_tag)) {
6952*4882a593Smuzhiyun 		c = h->cmd_pool + tag_index;
6953*4882a593Smuzhiyun 		finish_cmd(c);
6954*4882a593Smuzhiyun 	}
6955*4882a593Smuzhiyun }
6956*4882a593Smuzhiyun 
6957*4882a593Smuzhiyun /* Some controllers, like p400, will give us one interrupt
6958*4882a593Smuzhiyun  * after a soft reset, even if we turned interrupts off.
6959*4882a593Smuzhiyun  * Only need to check for this in the hpsa_xxx_discard_completions
6960*4882a593Smuzhiyun  * functions.
6961*4882a593Smuzhiyun  */
ignore_bogus_interrupt(struct ctlr_info * h)6962*4882a593Smuzhiyun static int ignore_bogus_interrupt(struct ctlr_info *h)
6963*4882a593Smuzhiyun {
6964*4882a593Smuzhiyun 	if (likely(!reset_devices))
6965*4882a593Smuzhiyun 		return 0;
6966*4882a593Smuzhiyun 
6967*4882a593Smuzhiyun 	if (likely(h->interrupts_enabled))
6968*4882a593Smuzhiyun 		return 0;
6969*4882a593Smuzhiyun 
6970*4882a593Smuzhiyun 	dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
6971*4882a593Smuzhiyun 		"(known firmware bug.)  Ignoring.\n");
6972*4882a593Smuzhiyun 
6973*4882a593Smuzhiyun 	return 1;
6974*4882a593Smuzhiyun }
6975*4882a593Smuzhiyun 
6976*4882a593Smuzhiyun /*
6977*4882a593Smuzhiyun  * Convert &h->q[x] (passed to interrupt handlers) back to h.
6978*4882a593Smuzhiyun  * Relies on (h-q[x] == x) being true for x such that
6979*4882a593Smuzhiyun  * 0 <= x < MAX_REPLY_QUEUES.
6980*4882a593Smuzhiyun  */
queue_to_hba(u8 * queue)6981*4882a593Smuzhiyun static struct ctlr_info *queue_to_hba(u8 *queue)
6982*4882a593Smuzhiyun {
6983*4882a593Smuzhiyun 	return container_of((queue - *queue), struct ctlr_info, q[0]);
6984*4882a593Smuzhiyun }
6985*4882a593Smuzhiyun 
hpsa_intx_discard_completions(int irq,void * queue)6986*4882a593Smuzhiyun static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
6987*4882a593Smuzhiyun {
6988*4882a593Smuzhiyun 	struct ctlr_info *h = queue_to_hba(queue);
6989*4882a593Smuzhiyun 	u8 q = *(u8 *) queue;
6990*4882a593Smuzhiyun 	u32 raw_tag;
6991*4882a593Smuzhiyun 
6992*4882a593Smuzhiyun 	if (ignore_bogus_interrupt(h))
6993*4882a593Smuzhiyun 		return IRQ_NONE;
6994*4882a593Smuzhiyun 
6995*4882a593Smuzhiyun 	if (interrupt_not_for_us(h))
6996*4882a593Smuzhiyun 		return IRQ_NONE;
6997*4882a593Smuzhiyun 	h->last_intr_timestamp = get_jiffies_64();
6998*4882a593Smuzhiyun 	while (interrupt_pending(h)) {
6999*4882a593Smuzhiyun 		raw_tag = get_next_completion(h, q);
7000*4882a593Smuzhiyun 		while (raw_tag != FIFO_EMPTY)
7001*4882a593Smuzhiyun 			raw_tag = next_command(h, q);
7002*4882a593Smuzhiyun 	}
7003*4882a593Smuzhiyun 	return IRQ_HANDLED;
7004*4882a593Smuzhiyun }
7005*4882a593Smuzhiyun 
hpsa_msix_discard_completions(int irq,void * queue)7006*4882a593Smuzhiyun static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
7007*4882a593Smuzhiyun {
7008*4882a593Smuzhiyun 	struct ctlr_info *h = queue_to_hba(queue);
7009*4882a593Smuzhiyun 	u32 raw_tag;
7010*4882a593Smuzhiyun 	u8 q = *(u8 *) queue;
7011*4882a593Smuzhiyun 
7012*4882a593Smuzhiyun 	if (ignore_bogus_interrupt(h))
7013*4882a593Smuzhiyun 		return IRQ_NONE;
7014*4882a593Smuzhiyun 
7015*4882a593Smuzhiyun 	h->last_intr_timestamp = get_jiffies_64();
7016*4882a593Smuzhiyun 	raw_tag = get_next_completion(h, q);
7017*4882a593Smuzhiyun 	while (raw_tag != FIFO_EMPTY)
7018*4882a593Smuzhiyun 		raw_tag = next_command(h, q);
7019*4882a593Smuzhiyun 	return IRQ_HANDLED;
7020*4882a593Smuzhiyun }
7021*4882a593Smuzhiyun 
do_hpsa_intr_intx(int irq,void * queue)7022*4882a593Smuzhiyun static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
7023*4882a593Smuzhiyun {
7024*4882a593Smuzhiyun 	struct ctlr_info *h = queue_to_hba((u8 *) queue);
7025*4882a593Smuzhiyun 	u32 raw_tag;
7026*4882a593Smuzhiyun 	u8 q = *(u8 *) queue;
7027*4882a593Smuzhiyun 
7028*4882a593Smuzhiyun 	if (interrupt_not_for_us(h))
7029*4882a593Smuzhiyun 		return IRQ_NONE;
7030*4882a593Smuzhiyun 	h->last_intr_timestamp = get_jiffies_64();
7031*4882a593Smuzhiyun 	while (interrupt_pending(h)) {
7032*4882a593Smuzhiyun 		raw_tag = get_next_completion(h, q);
7033*4882a593Smuzhiyun 		while (raw_tag != FIFO_EMPTY) {
7034*4882a593Smuzhiyun 			process_indexed_cmd(h, raw_tag);
7035*4882a593Smuzhiyun 			raw_tag = next_command(h, q);
7036*4882a593Smuzhiyun 		}
7037*4882a593Smuzhiyun 	}
7038*4882a593Smuzhiyun 	return IRQ_HANDLED;
7039*4882a593Smuzhiyun }
7040*4882a593Smuzhiyun 
do_hpsa_intr_msi(int irq,void * queue)7041*4882a593Smuzhiyun static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
7042*4882a593Smuzhiyun {
7043*4882a593Smuzhiyun 	struct ctlr_info *h = queue_to_hba(queue);
7044*4882a593Smuzhiyun 	u32 raw_tag;
7045*4882a593Smuzhiyun 	u8 q = *(u8 *) queue;
7046*4882a593Smuzhiyun 
7047*4882a593Smuzhiyun 	h->last_intr_timestamp = get_jiffies_64();
7048*4882a593Smuzhiyun 	raw_tag = get_next_completion(h, q);
7049*4882a593Smuzhiyun 	while (raw_tag != FIFO_EMPTY) {
7050*4882a593Smuzhiyun 		process_indexed_cmd(h, raw_tag);
7051*4882a593Smuzhiyun 		raw_tag = next_command(h, q);
7052*4882a593Smuzhiyun 	}
7053*4882a593Smuzhiyun 	return IRQ_HANDLED;
7054*4882a593Smuzhiyun }
7055*4882a593Smuzhiyun 
7056*4882a593Smuzhiyun /* Send a message CDB to the firmware. Careful, this only works
7057*4882a593Smuzhiyun  * in simple mode, not performant mode due to the tag lookup.
7058*4882a593Smuzhiyun  * We only ever use this immediately after a controller reset.
7059*4882a593Smuzhiyun  */
hpsa_message(struct pci_dev * pdev,unsigned char opcode,unsigned char type)7060*4882a593Smuzhiyun static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
7061*4882a593Smuzhiyun 			unsigned char type)
7062*4882a593Smuzhiyun {
7063*4882a593Smuzhiyun 	struct Command {
7064*4882a593Smuzhiyun 		struct CommandListHeader CommandHeader;
7065*4882a593Smuzhiyun 		struct RequestBlock Request;
7066*4882a593Smuzhiyun 		struct ErrDescriptor ErrorDescriptor;
7067*4882a593Smuzhiyun 	};
7068*4882a593Smuzhiyun 	struct Command *cmd;
7069*4882a593Smuzhiyun 	static const size_t cmd_sz = sizeof(*cmd) +
7070*4882a593Smuzhiyun 					sizeof(cmd->ErrorDescriptor);
7071*4882a593Smuzhiyun 	dma_addr_t paddr64;
7072*4882a593Smuzhiyun 	__le32 paddr32;
7073*4882a593Smuzhiyun 	u32 tag;
7074*4882a593Smuzhiyun 	void __iomem *vaddr;
7075*4882a593Smuzhiyun 	int i, err;
7076*4882a593Smuzhiyun 
7077*4882a593Smuzhiyun 	vaddr = pci_ioremap_bar(pdev, 0);
7078*4882a593Smuzhiyun 	if (vaddr == NULL)
7079*4882a593Smuzhiyun 		return -ENOMEM;
7080*4882a593Smuzhiyun 
7081*4882a593Smuzhiyun 	/* The Inbound Post Queue only accepts 32-bit physical addresses for the
7082*4882a593Smuzhiyun 	 * CCISS commands, so they must be allocated from the lower 4GiB of
7083*4882a593Smuzhiyun 	 * memory.
7084*4882a593Smuzhiyun 	 */
7085*4882a593Smuzhiyun 	err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
7086*4882a593Smuzhiyun 	if (err) {
7087*4882a593Smuzhiyun 		iounmap(vaddr);
7088*4882a593Smuzhiyun 		return err;
7089*4882a593Smuzhiyun 	}
7090*4882a593Smuzhiyun 
7091*4882a593Smuzhiyun 	cmd = dma_alloc_coherent(&pdev->dev, cmd_sz, &paddr64, GFP_KERNEL);
7092*4882a593Smuzhiyun 	if (cmd == NULL) {
7093*4882a593Smuzhiyun 		iounmap(vaddr);
7094*4882a593Smuzhiyun 		return -ENOMEM;
7095*4882a593Smuzhiyun 	}
7096*4882a593Smuzhiyun 
7097*4882a593Smuzhiyun 	/* This must fit, because of the 32-bit consistent DMA mask.  Also,
7098*4882a593Smuzhiyun 	 * although there's no guarantee, we assume that the address is at
7099*4882a593Smuzhiyun 	 * least 4-byte aligned (most likely, it's page-aligned).
7100*4882a593Smuzhiyun 	 */
7101*4882a593Smuzhiyun 	paddr32 = cpu_to_le32(paddr64);
7102*4882a593Smuzhiyun 
7103*4882a593Smuzhiyun 	cmd->CommandHeader.ReplyQueue = 0;
7104*4882a593Smuzhiyun 	cmd->CommandHeader.SGList = 0;
7105*4882a593Smuzhiyun 	cmd->CommandHeader.SGTotal = cpu_to_le16(0);
7106*4882a593Smuzhiyun 	cmd->CommandHeader.tag = cpu_to_le64(paddr64);
7107*4882a593Smuzhiyun 	memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
7108*4882a593Smuzhiyun 
7109*4882a593Smuzhiyun 	cmd->Request.CDBLen = 16;
7110*4882a593Smuzhiyun 	cmd->Request.type_attr_dir =
7111*4882a593Smuzhiyun 			TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
7112*4882a593Smuzhiyun 	cmd->Request.Timeout = 0; /* Don't time out */
7113*4882a593Smuzhiyun 	cmd->Request.CDB[0] = opcode;
7114*4882a593Smuzhiyun 	cmd->Request.CDB[1] = type;
7115*4882a593Smuzhiyun 	memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
7116*4882a593Smuzhiyun 	cmd->ErrorDescriptor.Addr =
7117*4882a593Smuzhiyun 			cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
7118*4882a593Smuzhiyun 	cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
7119*4882a593Smuzhiyun 
7120*4882a593Smuzhiyun 	writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
7121*4882a593Smuzhiyun 
7122*4882a593Smuzhiyun 	for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
7123*4882a593Smuzhiyun 		tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
7124*4882a593Smuzhiyun 		if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
7125*4882a593Smuzhiyun 			break;
7126*4882a593Smuzhiyun 		msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
7127*4882a593Smuzhiyun 	}
7128*4882a593Smuzhiyun 
7129*4882a593Smuzhiyun 	iounmap(vaddr);
7130*4882a593Smuzhiyun 
7131*4882a593Smuzhiyun 	/* we leak the DMA buffer here ... no choice since the controller could
7132*4882a593Smuzhiyun 	 *  still complete the command.
7133*4882a593Smuzhiyun 	 */
7134*4882a593Smuzhiyun 	if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
7135*4882a593Smuzhiyun 		dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
7136*4882a593Smuzhiyun 			opcode, type);
7137*4882a593Smuzhiyun 		return -ETIMEDOUT;
7138*4882a593Smuzhiyun 	}
7139*4882a593Smuzhiyun 
7140*4882a593Smuzhiyun 	dma_free_coherent(&pdev->dev, cmd_sz, cmd, paddr64);
7141*4882a593Smuzhiyun 
7142*4882a593Smuzhiyun 	if (tag & HPSA_ERROR_BIT) {
7143*4882a593Smuzhiyun 		dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
7144*4882a593Smuzhiyun 			opcode, type);
7145*4882a593Smuzhiyun 		return -EIO;
7146*4882a593Smuzhiyun 	}
7147*4882a593Smuzhiyun 
7148*4882a593Smuzhiyun 	dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
7149*4882a593Smuzhiyun 		opcode, type);
7150*4882a593Smuzhiyun 	return 0;
7151*4882a593Smuzhiyun }
7152*4882a593Smuzhiyun 
7153*4882a593Smuzhiyun #define hpsa_noop(p) hpsa_message(p, 3, 0)
7154*4882a593Smuzhiyun 
hpsa_controller_hard_reset(struct pci_dev * pdev,void __iomem * vaddr,u32 use_doorbell)7155*4882a593Smuzhiyun static int hpsa_controller_hard_reset(struct pci_dev *pdev,
7156*4882a593Smuzhiyun 	void __iomem *vaddr, u32 use_doorbell)
7157*4882a593Smuzhiyun {
7158*4882a593Smuzhiyun 
7159*4882a593Smuzhiyun 	if (use_doorbell) {
7160*4882a593Smuzhiyun 		/* For everything after the P600, the PCI power state method
7161*4882a593Smuzhiyun 		 * of resetting the controller doesn't work, so we have this
7162*4882a593Smuzhiyun 		 * other way using the doorbell register.
7163*4882a593Smuzhiyun 		 */
7164*4882a593Smuzhiyun 		dev_info(&pdev->dev, "using doorbell to reset controller\n");
7165*4882a593Smuzhiyun 		writel(use_doorbell, vaddr + SA5_DOORBELL);
7166*4882a593Smuzhiyun 
7167*4882a593Smuzhiyun 		/* PMC hardware guys tell us we need a 10 second delay after
7168*4882a593Smuzhiyun 		 * doorbell reset and before any attempt to talk to the board
7169*4882a593Smuzhiyun 		 * at all to ensure that this actually works and doesn't fall
7170*4882a593Smuzhiyun 		 * over in some weird corner cases.
7171*4882a593Smuzhiyun 		 */
7172*4882a593Smuzhiyun 		msleep(10000);
7173*4882a593Smuzhiyun 	} else { /* Try to do it the PCI power state way */
7174*4882a593Smuzhiyun 
7175*4882a593Smuzhiyun 		/* Quoting from the Open CISS Specification: "The Power
7176*4882a593Smuzhiyun 		 * Management Control/Status Register (CSR) controls the power
7177*4882a593Smuzhiyun 		 * state of the device.  The normal operating state is D0,
7178*4882a593Smuzhiyun 		 * CSR=00h.  The software off state is D3, CSR=03h.  To reset
7179*4882a593Smuzhiyun 		 * the controller, place the interface device in D3 then to D0,
7180*4882a593Smuzhiyun 		 * this causes a secondary PCI reset which will reset the
7181*4882a593Smuzhiyun 		 * controller." */
7182*4882a593Smuzhiyun 
7183*4882a593Smuzhiyun 		int rc = 0;
7184*4882a593Smuzhiyun 
7185*4882a593Smuzhiyun 		dev_info(&pdev->dev, "using PCI PM to reset controller\n");
7186*4882a593Smuzhiyun 
7187*4882a593Smuzhiyun 		/* enter the D3hot power management state */
7188*4882a593Smuzhiyun 		rc = pci_set_power_state(pdev, PCI_D3hot);
7189*4882a593Smuzhiyun 		if (rc)
7190*4882a593Smuzhiyun 			return rc;
7191*4882a593Smuzhiyun 
7192*4882a593Smuzhiyun 		msleep(500);
7193*4882a593Smuzhiyun 
7194*4882a593Smuzhiyun 		/* enter the D0 power management state */
7195*4882a593Smuzhiyun 		rc = pci_set_power_state(pdev, PCI_D0);
7196*4882a593Smuzhiyun 		if (rc)
7197*4882a593Smuzhiyun 			return rc;
7198*4882a593Smuzhiyun 
7199*4882a593Smuzhiyun 		/*
7200*4882a593Smuzhiyun 		 * The P600 requires a small delay when changing states.
7201*4882a593Smuzhiyun 		 * Otherwise we may think the board did not reset and we bail.
7202*4882a593Smuzhiyun 		 * This for kdump only and is particular to the P600.
7203*4882a593Smuzhiyun 		 */
7204*4882a593Smuzhiyun 		msleep(500);
7205*4882a593Smuzhiyun 	}
7206*4882a593Smuzhiyun 	return 0;
7207*4882a593Smuzhiyun }
7208*4882a593Smuzhiyun 
init_driver_version(char * driver_version,int len)7209*4882a593Smuzhiyun static void init_driver_version(char *driver_version, int len)
7210*4882a593Smuzhiyun {
7211*4882a593Smuzhiyun 	memset(driver_version, 0, len);
7212*4882a593Smuzhiyun 	strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
7213*4882a593Smuzhiyun }
7214*4882a593Smuzhiyun 
write_driver_ver_to_cfgtable(struct CfgTable __iomem * cfgtable)7215*4882a593Smuzhiyun static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
7216*4882a593Smuzhiyun {
7217*4882a593Smuzhiyun 	char *driver_version;
7218*4882a593Smuzhiyun 	int i, size = sizeof(cfgtable->driver_version);
7219*4882a593Smuzhiyun 
7220*4882a593Smuzhiyun 	driver_version = kmalloc(size, GFP_KERNEL);
7221*4882a593Smuzhiyun 	if (!driver_version)
7222*4882a593Smuzhiyun 		return -ENOMEM;
7223*4882a593Smuzhiyun 
7224*4882a593Smuzhiyun 	init_driver_version(driver_version, size);
7225*4882a593Smuzhiyun 	for (i = 0; i < size; i++)
7226*4882a593Smuzhiyun 		writeb(driver_version[i], &cfgtable->driver_version[i]);
7227*4882a593Smuzhiyun 	kfree(driver_version);
7228*4882a593Smuzhiyun 	return 0;
7229*4882a593Smuzhiyun }
7230*4882a593Smuzhiyun 
read_driver_ver_from_cfgtable(struct CfgTable __iomem * cfgtable,unsigned char * driver_ver)7231*4882a593Smuzhiyun static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
7232*4882a593Smuzhiyun 					  unsigned char *driver_ver)
7233*4882a593Smuzhiyun {
7234*4882a593Smuzhiyun 	int i;
7235*4882a593Smuzhiyun 
7236*4882a593Smuzhiyun 	for (i = 0; i < sizeof(cfgtable->driver_version); i++)
7237*4882a593Smuzhiyun 		driver_ver[i] = readb(&cfgtable->driver_version[i]);
7238*4882a593Smuzhiyun }
7239*4882a593Smuzhiyun 
controller_reset_failed(struct CfgTable __iomem * cfgtable)7240*4882a593Smuzhiyun static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
7241*4882a593Smuzhiyun {
7242*4882a593Smuzhiyun 
7243*4882a593Smuzhiyun 	char *driver_ver, *old_driver_ver;
7244*4882a593Smuzhiyun 	int rc, size = sizeof(cfgtable->driver_version);
7245*4882a593Smuzhiyun 
7246*4882a593Smuzhiyun 	old_driver_ver = kmalloc_array(2, size, GFP_KERNEL);
7247*4882a593Smuzhiyun 	if (!old_driver_ver)
7248*4882a593Smuzhiyun 		return -ENOMEM;
7249*4882a593Smuzhiyun 	driver_ver = old_driver_ver + size;
7250*4882a593Smuzhiyun 
7251*4882a593Smuzhiyun 	/* After a reset, the 32 bytes of "driver version" in the cfgtable
7252*4882a593Smuzhiyun 	 * should have been changed, otherwise we know the reset failed.
7253*4882a593Smuzhiyun 	 */
7254*4882a593Smuzhiyun 	init_driver_version(old_driver_ver, size);
7255*4882a593Smuzhiyun 	read_driver_ver_from_cfgtable(cfgtable, driver_ver);
7256*4882a593Smuzhiyun 	rc = !memcmp(driver_ver, old_driver_ver, size);
7257*4882a593Smuzhiyun 	kfree(old_driver_ver);
7258*4882a593Smuzhiyun 	return rc;
7259*4882a593Smuzhiyun }
7260*4882a593Smuzhiyun /* This does a hard reset of the controller using PCI power management
7261*4882a593Smuzhiyun  * states or the using the doorbell register.
7262*4882a593Smuzhiyun  */
hpsa_kdump_hard_reset_controller(struct pci_dev * pdev,u32 board_id)7263*4882a593Smuzhiyun static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
7264*4882a593Smuzhiyun {
7265*4882a593Smuzhiyun 	u64 cfg_offset;
7266*4882a593Smuzhiyun 	u32 cfg_base_addr;
7267*4882a593Smuzhiyun 	u64 cfg_base_addr_index;
7268*4882a593Smuzhiyun 	void __iomem *vaddr;
7269*4882a593Smuzhiyun 	unsigned long paddr;
7270*4882a593Smuzhiyun 	u32 misc_fw_support;
7271*4882a593Smuzhiyun 	int rc;
7272*4882a593Smuzhiyun 	struct CfgTable __iomem *cfgtable;
7273*4882a593Smuzhiyun 	u32 use_doorbell;
7274*4882a593Smuzhiyun 	u16 command_register;
7275*4882a593Smuzhiyun 
7276*4882a593Smuzhiyun 	/* For controllers as old as the P600, this is very nearly
7277*4882a593Smuzhiyun 	 * the same thing as
7278*4882a593Smuzhiyun 	 *
7279*4882a593Smuzhiyun 	 * pci_save_state(pci_dev);
7280*4882a593Smuzhiyun 	 * pci_set_power_state(pci_dev, PCI_D3hot);
7281*4882a593Smuzhiyun 	 * pci_set_power_state(pci_dev, PCI_D0);
7282*4882a593Smuzhiyun 	 * pci_restore_state(pci_dev);
7283*4882a593Smuzhiyun 	 *
7284*4882a593Smuzhiyun 	 * For controllers newer than the P600, the pci power state
7285*4882a593Smuzhiyun 	 * method of resetting doesn't work so we have another way
7286*4882a593Smuzhiyun 	 * using the doorbell register.
7287*4882a593Smuzhiyun 	 */
7288*4882a593Smuzhiyun 
7289*4882a593Smuzhiyun 	if (!ctlr_is_resettable(board_id)) {
7290*4882a593Smuzhiyun 		dev_warn(&pdev->dev, "Controller not resettable\n");
7291*4882a593Smuzhiyun 		return -ENODEV;
7292*4882a593Smuzhiyun 	}
7293*4882a593Smuzhiyun 
7294*4882a593Smuzhiyun 	/* if controller is soft- but not hard resettable... */
7295*4882a593Smuzhiyun 	if (!ctlr_is_hard_resettable(board_id))
7296*4882a593Smuzhiyun 		return -ENOTSUPP; /* try soft reset later. */
7297*4882a593Smuzhiyun 
7298*4882a593Smuzhiyun 	/* Save the PCI command register */
7299*4882a593Smuzhiyun 	pci_read_config_word(pdev, 4, &command_register);
7300*4882a593Smuzhiyun 	pci_save_state(pdev);
7301*4882a593Smuzhiyun 
7302*4882a593Smuzhiyun 	/* find the first memory BAR, so we can find the cfg table */
7303*4882a593Smuzhiyun 	rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
7304*4882a593Smuzhiyun 	if (rc)
7305*4882a593Smuzhiyun 		return rc;
7306*4882a593Smuzhiyun 	vaddr = remap_pci_mem(paddr, 0x250);
7307*4882a593Smuzhiyun 	if (!vaddr)
7308*4882a593Smuzhiyun 		return -ENOMEM;
7309*4882a593Smuzhiyun 
7310*4882a593Smuzhiyun 	/* find cfgtable in order to check if reset via doorbell is supported */
7311*4882a593Smuzhiyun 	rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
7312*4882a593Smuzhiyun 					&cfg_base_addr_index, &cfg_offset);
7313*4882a593Smuzhiyun 	if (rc)
7314*4882a593Smuzhiyun 		goto unmap_vaddr;
7315*4882a593Smuzhiyun 	cfgtable = remap_pci_mem(pci_resource_start(pdev,
7316*4882a593Smuzhiyun 		       cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
7317*4882a593Smuzhiyun 	if (!cfgtable) {
7318*4882a593Smuzhiyun 		rc = -ENOMEM;
7319*4882a593Smuzhiyun 		goto unmap_vaddr;
7320*4882a593Smuzhiyun 	}
7321*4882a593Smuzhiyun 	rc = write_driver_ver_to_cfgtable(cfgtable);
7322*4882a593Smuzhiyun 	if (rc)
7323*4882a593Smuzhiyun 		goto unmap_cfgtable;
7324*4882a593Smuzhiyun 
7325*4882a593Smuzhiyun 	/* If reset via doorbell register is supported, use that.
7326*4882a593Smuzhiyun 	 * There are two such methods.  Favor the newest method.
7327*4882a593Smuzhiyun 	 */
7328*4882a593Smuzhiyun 	misc_fw_support = readl(&cfgtable->misc_fw_support);
7329*4882a593Smuzhiyun 	use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
7330*4882a593Smuzhiyun 	if (use_doorbell) {
7331*4882a593Smuzhiyun 		use_doorbell = DOORBELL_CTLR_RESET2;
7332*4882a593Smuzhiyun 	} else {
7333*4882a593Smuzhiyun 		use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
7334*4882a593Smuzhiyun 		if (use_doorbell) {
7335*4882a593Smuzhiyun 			dev_warn(&pdev->dev,
7336*4882a593Smuzhiyun 				"Soft reset not supported. Firmware update is required.\n");
7337*4882a593Smuzhiyun 			rc = -ENOTSUPP; /* try soft reset */
7338*4882a593Smuzhiyun 			goto unmap_cfgtable;
7339*4882a593Smuzhiyun 		}
7340*4882a593Smuzhiyun 	}
7341*4882a593Smuzhiyun 
7342*4882a593Smuzhiyun 	rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
7343*4882a593Smuzhiyun 	if (rc)
7344*4882a593Smuzhiyun 		goto unmap_cfgtable;
7345*4882a593Smuzhiyun 
7346*4882a593Smuzhiyun 	pci_restore_state(pdev);
7347*4882a593Smuzhiyun 	pci_write_config_word(pdev, 4, command_register);
7348*4882a593Smuzhiyun 
7349*4882a593Smuzhiyun 	/* Some devices (notably the HP Smart Array 5i Controller)
7350*4882a593Smuzhiyun 	   need a little pause here */
7351*4882a593Smuzhiyun 	msleep(HPSA_POST_RESET_PAUSE_MSECS);
7352*4882a593Smuzhiyun 
7353*4882a593Smuzhiyun 	rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
7354*4882a593Smuzhiyun 	if (rc) {
7355*4882a593Smuzhiyun 		dev_warn(&pdev->dev,
7356*4882a593Smuzhiyun 			"Failed waiting for board to become ready after hard reset\n");
7357*4882a593Smuzhiyun 		goto unmap_cfgtable;
7358*4882a593Smuzhiyun 	}
7359*4882a593Smuzhiyun 
7360*4882a593Smuzhiyun 	rc = controller_reset_failed(vaddr);
7361*4882a593Smuzhiyun 	if (rc < 0)
7362*4882a593Smuzhiyun 		goto unmap_cfgtable;
7363*4882a593Smuzhiyun 	if (rc) {
7364*4882a593Smuzhiyun 		dev_warn(&pdev->dev, "Unable to successfully reset "
7365*4882a593Smuzhiyun 			"controller. Will try soft reset.\n");
7366*4882a593Smuzhiyun 		rc = -ENOTSUPP;
7367*4882a593Smuzhiyun 	} else {
7368*4882a593Smuzhiyun 		dev_info(&pdev->dev, "board ready after hard reset.\n");
7369*4882a593Smuzhiyun 	}
7370*4882a593Smuzhiyun 
7371*4882a593Smuzhiyun unmap_cfgtable:
7372*4882a593Smuzhiyun 	iounmap(cfgtable);
7373*4882a593Smuzhiyun 
7374*4882a593Smuzhiyun unmap_vaddr:
7375*4882a593Smuzhiyun 	iounmap(vaddr);
7376*4882a593Smuzhiyun 	return rc;
7377*4882a593Smuzhiyun }
7378*4882a593Smuzhiyun 
7379*4882a593Smuzhiyun /*
7380*4882a593Smuzhiyun  *  We cannot read the structure directly, for portability we must use
7381*4882a593Smuzhiyun  *   the io functions.
7382*4882a593Smuzhiyun  *   This is for debug only.
7383*4882a593Smuzhiyun  */
print_cfg_table(struct device * dev,struct CfgTable __iomem * tb)7384*4882a593Smuzhiyun static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
7385*4882a593Smuzhiyun {
7386*4882a593Smuzhiyun #ifdef HPSA_DEBUG
7387*4882a593Smuzhiyun 	int i;
7388*4882a593Smuzhiyun 	char temp_name[17];
7389*4882a593Smuzhiyun 
7390*4882a593Smuzhiyun 	dev_info(dev, "Controller Configuration information\n");
7391*4882a593Smuzhiyun 	dev_info(dev, "------------------------------------\n");
7392*4882a593Smuzhiyun 	for (i = 0; i < 4; i++)
7393*4882a593Smuzhiyun 		temp_name[i] = readb(&(tb->Signature[i]));
7394*4882a593Smuzhiyun 	temp_name[4] = '\0';
7395*4882a593Smuzhiyun 	dev_info(dev, "   Signature = %s\n", temp_name);
7396*4882a593Smuzhiyun 	dev_info(dev, "   Spec Number = %d\n", readl(&(tb->SpecValence)));
7397*4882a593Smuzhiyun 	dev_info(dev, "   Transport methods supported = 0x%x\n",
7398*4882a593Smuzhiyun 	       readl(&(tb->TransportSupport)));
7399*4882a593Smuzhiyun 	dev_info(dev, "   Transport methods active = 0x%x\n",
7400*4882a593Smuzhiyun 	       readl(&(tb->TransportActive)));
7401*4882a593Smuzhiyun 	dev_info(dev, "   Requested transport Method = 0x%x\n",
7402*4882a593Smuzhiyun 	       readl(&(tb->HostWrite.TransportRequest)));
7403*4882a593Smuzhiyun 	dev_info(dev, "   Coalesce Interrupt Delay = 0x%x\n",
7404*4882a593Smuzhiyun 	       readl(&(tb->HostWrite.CoalIntDelay)));
7405*4882a593Smuzhiyun 	dev_info(dev, "   Coalesce Interrupt Count = 0x%x\n",
7406*4882a593Smuzhiyun 	       readl(&(tb->HostWrite.CoalIntCount)));
7407*4882a593Smuzhiyun 	dev_info(dev, "   Max outstanding commands = %d\n",
7408*4882a593Smuzhiyun 	       readl(&(tb->CmdsOutMax)));
7409*4882a593Smuzhiyun 	dev_info(dev, "   Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
7410*4882a593Smuzhiyun 	for (i = 0; i < 16; i++)
7411*4882a593Smuzhiyun 		temp_name[i] = readb(&(tb->ServerName[i]));
7412*4882a593Smuzhiyun 	temp_name[16] = '\0';
7413*4882a593Smuzhiyun 	dev_info(dev, "   Server Name = %s\n", temp_name);
7414*4882a593Smuzhiyun 	dev_info(dev, "   Heartbeat Counter = 0x%x\n\n\n",
7415*4882a593Smuzhiyun 		readl(&(tb->HeartBeat)));
7416*4882a593Smuzhiyun #endif				/* HPSA_DEBUG */
7417*4882a593Smuzhiyun }
7418*4882a593Smuzhiyun 
find_PCI_BAR_index(struct pci_dev * pdev,unsigned long pci_bar_addr)7419*4882a593Smuzhiyun static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
7420*4882a593Smuzhiyun {
7421*4882a593Smuzhiyun 	int i, offset, mem_type, bar_type;
7422*4882a593Smuzhiyun 
7423*4882a593Smuzhiyun 	if (pci_bar_addr == PCI_BASE_ADDRESS_0)	/* looking for BAR zero? */
7424*4882a593Smuzhiyun 		return 0;
7425*4882a593Smuzhiyun 	offset = 0;
7426*4882a593Smuzhiyun 	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
7427*4882a593Smuzhiyun 		bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
7428*4882a593Smuzhiyun 		if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
7429*4882a593Smuzhiyun 			offset += 4;
7430*4882a593Smuzhiyun 		else {
7431*4882a593Smuzhiyun 			mem_type = pci_resource_flags(pdev, i) &
7432*4882a593Smuzhiyun 			    PCI_BASE_ADDRESS_MEM_TYPE_MASK;
7433*4882a593Smuzhiyun 			switch (mem_type) {
7434*4882a593Smuzhiyun 			case PCI_BASE_ADDRESS_MEM_TYPE_32:
7435*4882a593Smuzhiyun 			case PCI_BASE_ADDRESS_MEM_TYPE_1M:
7436*4882a593Smuzhiyun 				offset += 4;	/* 32 bit */
7437*4882a593Smuzhiyun 				break;
7438*4882a593Smuzhiyun 			case PCI_BASE_ADDRESS_MEM_TYPE_64:
7439*4882a593Smuzhiyun 				offset += 8;
7440*4882a593Smuzhiyun 				break;
7441*4882a593Smuzhiyun 			default:	/* reserved in PCI 2.2 */
7442*4882a593Smuzhiyun 				dev_warn(&pdev->dev,
7443*4882a593Smuzhiyun 				       "base address is invalid\n");
7444*4882a593Smuzhiyun 				return -1;
7445*4882a593Smuzhiyun 				break;
7446*4882a593Smuzhiyun 			}
7447*4882a593Smuzhiyun 		}
7448*4882a593Smuzhiyun 		if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
7449*4882a593Smuzhiyun 			return i + 1;
7450*4882a593Smuzhiyun 	}
7451*4882a593Smuzhiyun 	return -1;
7452*4882a593Smuzhiyun }
7453*4882a593Smuzhiyun 
hpsa_disable_interrupt_mode(struct ctlr_info * h)7454*4882a593Smuzhiyun static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
7455*4882a593Smuzhiyun {
7456*4882a593Smuzhiyun 	pci_free_irq_vectors(h->pdev);
7457*4882a593Smuzhiyun 	h->msix_vectors = 0;
7458*4882a593Smuzhiyun }
7459*4882a593Smuzhiyun 
hpsa_setup_reply_map(struct ctlr_info * h)7460*4882a593Smuzhiyun static void hpsa_setup_reply_map(struct ctlr_info *h)
7461*4882a593Smuzhiyun {
7462*4882a593Smuzhiyun 	const struct cpumask *mask;
7463*4882a593Smuzhiyun 	unsigned int queue, cpu;
7464*4882a593Smuzhiyun 
7465*4882a593Smuzhiyun 	for (queue = 0; queue < h->msix_vectors; queue++) {
7466*4882a593Smuzhiyun 		mask = pci_irq_get_affinity(h->pdev, queue);
7467*4882a593Smuzhiyun 		if (!mask)
7468*4882a593Smuzhiyun 			goto fallback;
7469*4882a593Smuzhiyun 
7470*4882a593Smuzhiyun 		for_each_cpu(cpu, mask)
7471*4882a593Smuzhiyun 			h->reply_map[cpu] = queue;
7472*4882a593Smuzhiyun 	}
7473*4882a593Smuzhiyun 	return;
7474*4882a593Smuzhiyun 
7475*4882a593Smuzhiyun fallback:
7476*4882a593Smuzhiyun 	for_each_possible_cpu(cpu)
7477*4882a593Smuzhiyun 		h->reply_map[cpu] = 0;
7478*4882a593Smuzhiyun }
7479*4882a593Smuzhiyun 
7480*4882a593Smuzhiyun /* If MSI/MSI-X is supported by the kernel we will try to enable it on
7481*4882a593Smuzhiyun  * controllers that are capable. If not, we use legacy INTx mode.
7482*4882a593Smuzhiyun  */
hpsa_interrupt_mode(struct ctlr_info * h)7483*4882a593Smuzhiyun static int hpsa_interrupt_mode(struct ctlr_info *h)
7484*4882a593Smuzhiyun {
7485*4882a593Smuzhiyun 	unsigned int flags = PCI_IRQ_LEGACY;
7486*4882a593Smuzhiyun 	int ret;
7487*4882a593Smuzhiyun 
7488*4882a593Smuzhiyun 	/* Some boards advertise MSI but don't really support it */
7489*4882a593Smuzhiyun 	switch (h->board_id) {
7490*4882a593Smuzhiyun 	case 0x40700E11:
7491*4882a593Smuzhiyun 	case 0x40800E11:
7492*4882a593Smuzhiyun 	case 0x40820E11:
7493*4882a593Smuzhiyun 	case 0x40830E11:
7494*4882a593Smuzhiyun 		break;
7495*4882a593Smuzhiyun 	default:
7496*4882a593Smuzhiyun 		ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES,
7497*4882a593Smuzhiyun 				PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
7498*4882a593Smuzhiyun 		if (ret > 0) {
7499*4882a593Smuzhiyun 			h->msix_vectors = ret;
7500*4882a593Smuzhiyun 			return 0;
7501*4882a593Smuzhiyun 		}
7502*4882a593Smuzhiyun 
7503*4882a593Smuzhiyun 		flags |= PCI_IRQ_MSI;
7504*4882a593Smuzhiyun 		break;
7505*4882a593Smuzhiyun 	}
7506*4882a593Smuzhiyun 
7507*4882a593Smuzhiyun 	ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags);
7508*4882a593Smuzhiyun 	if (ret < 0)
7509*4882a593Smuzhiyun 		return ret;
7510*4882a593Smuzhiyun 	return 0;
7511*4882a593Smuzhiyun }
7512*4882a593Smuzhiyun 
hpsa_lookup_board_id(struct pci_dev * pdev,u32 * board_id,bool * legacy_board)7513*4882a593Smuzhiyun static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
7514*4882a593Smuzhiyun 				bool *legacy_board)
7515*4882a593Smuzhiyun {
7516*4882a593Smuzhiyun 	int i;
7517*4882a593Smuzhiyun 	u32 subsystem_vendor_id, subsystem_device_id;
7518*4882a593Smuzhiyun 
7519*4882a593Smuzhiyun 	subsystem_vendor_id = pdev->subsystem_vendor;
7520*4882a593Smuzhiyun 	subsystem_device_id = pdev->subsystem_device;
7521*4882a593Smuzhiyun 	*board_id = ((subsystem_device_id << 16) & 0xffff0000) |
7522*4882a593Smuzhiyun 		    subsystem_vendor_id;
7523*4882a593Smuzhiyun 
7524*4882a593Smuzhiyun 	if (legacy_board)
7525*4882a593Smuzhiyun 		*legacy_board = false;
7526*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(products); i++)
7527*4882a593Smuzhiyun 		if (*board_id == products[i].board_id) {
7528*4882a593Smuzhiyun 			if (products[i].access != &SA5A_access &&
7529*4882a593Smuzhiyun 			    products[i].access != &SA5B_access)
7530*4882a593Smuzhiyun 				return i;
7531*4882a593Smuzhiyun 			dev_warn(&pdev->dev,
7532*4882a593Smuzhiyun 				 "legacy board ID: 0x%08x\n",
7533*4882a593Smuzhiyun 				 *board_id);
7534*4882a593Smuzhiyun 			if (legacy_board)
7535*4882a593Smuzhiyun 			    *legacy_board = true;
7536*4882a593Smuzhiyun 			return i;
7537*4882a593Smuzhiyun 		}
7538*4882a593Smuzhiyun 
7539*4882a593Smuzhiyun 	dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x\n", *board_id);
7540*4882a593Smuzhiyun 	if (legacy_board)
7541*4882a593Smuzhiyun 		*legacy_board = true;
7542*4882a593Smuzhiyun 	return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
7543*4882a593Smuzhiyun }
7544*4882a593Smuzhiyun 
hpsa_pci_find_memory_BAR(struct pci_dev * pdev,unsigned long * memory_bar)7545*4882a593Smuzhiyun static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
7546*4882a593Smuzhiyun 				    unsigned long *memory_bar)
7547*4882a593Smuzhiyun {
7548*4882a593Smuzhiyun 	int i;
7549*4882a593Smuzhiyun 
7550*4882a593Smuzhiyun 	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
7551*4882a593Smuzhiyun 		if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
7552*4882a593Smuzhiyun 			/* addressing mode bits already removed */
7553*4882a593Smuzhiyun 			*memory_bar = pci_resource_start(pdev, i);
7554*4882a593Smuzhiyun 			dev_dbg(&pdev->dev, "memory BAR = %lx\n",
7555*4882a593Smuzhiyun 				*memory_bar);
7556*4882a593Smuzhiyun 			return 0;
7557*4882a593Smuzhiyun 		}
7558*4882a593Smuzhiyun 	dev_warn(&pdev->dev, "no memory BAR found\n");
7559*4882a593Smuzhiyun 	return -ENODEV;
7560*4882a593Smuzhiyun }
7561*4882a593Smuzhiyun 
hpsa_wait_for_board_state(struct pci_dev * pdev,void __iomem * vaddr,int wait_for_ready)7562*4882a593Smuzhiyun static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
7563*4882a593Smuzhiyun 				     int wait_for_ready)
7564*4882a593Smuzhiyun {
7565*4882a593Smuzhiyun 	int i, iterations;
7566*4882a593Smuzhiyun 	u32 scratchpad;
7567*4882a593Smuzhiyun 	if (wait_for_ready)
7568*4882a593Smuzhiyun 		iterations = HPSA_BOARD_READY_ITERATIONS;
7569*4882a593Smuzhiyun 	else
7570*4882a593Smuzhiyun 		iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
7571*4882a593Smuzhiyun 
7572*4882a593Smuzhiyun 	for (i = 0; i < iterations; i++) {
7573*4882a593Smuzhiyun 		scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
7574*4882a593Smuzhiyun 		if (wait_for_ready) {
7575*4882a593Smuzhiyun 			if (scratchpad == HPSA_FIRMWARE_READY)
7576*4882a593Smuzhiyun 				return 0;
7577*4882a593Smuzhiyun 		} else {
7578*4882a593Smuzhiyun 			if (scratchpad != HPSA_FIRMWARE_READY)
7579*4882a593Smuzhiyun 				return 0;
7580*4882a593Smuzhiyun 		}
7581*4882a593Smuzhiyun 		msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
7582*4882a593Smuzhiyun 	}
7583*4882a593Smuzhiyun 	dev_warn(&pdev->dev, "board not ready, timed out.\n");
7584*4882a593Smuzhiyun 	return -ENODEV;
7585*4882a593Smuzhiyun }
7586*4882a593Smuzhiyun 
hpsa_find_cfg_addrs(struct pci_dev * pdev,void __iomem * vaddr,u32 * cfg_base_addr,u64 * cfg_base_addr_index,u64 * cfg_offset)7587*4882a593Smuzhiyun static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
7588*4882a593Smuzhiyun 			       u32 *cfg_base_addr, u64 *cfg_base_addr_index,
7589*4882a593Smuzhiyun 			       u64 *cfg_offset)
7590*4882a593Smuzhiyun {
7591*4882a593Smuzhiyun 	*cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
7592*4882a593Smuzhiyun 	*cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
7593*4882a593Smuzhiyun 	*cfg_base_addr &= (u32) 0x0000ffff;
7594*4882a593Smuzhiyun 	*cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
7595*4882a593Smuzhiyun 	if (*cfg_base_addr_index == -1) {
7596*4882a593Smuzhiyun 		dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
7597*4882a593Smuzhiyun 		return -ENODEV;
7598*4882a593Smuzhiyun 	}
7599*4882a593Smuzhiyun 	return 0;
7600*4882a593Smuzhiyun }
7601*4882a593Smuzhiyun 
hpsa_free_cfgtables(struct ctlr_info * h)7602*4882a593Smuzhiyun static void hpsa_free_cfgtables(struct ctlr_info *h)
7603*4882a593Smuzhiyun {
7604*4882a593Smuzhiyun 	if (h->transtable) {
7605*4882a593Smuzhiyun 		iounmap(h->transtable);
7606*4882a593Smuzhiyun 		h->transtable = NULL;
7607*4882a593Smuzhiyun 	}
7608*4882a593Smuzhiyun 	if (h->cfgtable) {
7609*4882a593Smuzhiyun 		iounmap(h->cfgtable);
7610*4882a593Smuzhiyun 		h->cfgtable = NULL;
7611*4882a593Smuzhiyun 	}
7612*4882a593Smuzhiyun }
7613*4882a593Smuzhiyun 
7614*4882a593Smuzhiyun /* Find and map CISS config table and transfer table
7615*4882a593Smuzhiyun + * several items must be unmapped (freed) later
7616*4882a593Smuzhiyun + * */
hpsa_find_cfgtables(struct ctlr_info * h)7617*4882a593Smuzhiyun static int hpsa_find_cfgtables(struct ctlr_info *h)
7618*4882a593Smuzhiyun {
7619*4882a593Smuzhiyun 	u64 cfg_offset;
7620*4882a593Smuzhiyun 	u32 cfg_base_addr;
7621*4882a593Smuzhiyun 	u64 cfg_base_addr_index;
7622*4882a593Smuzhiyun 	u32 trans_offset;
7623*4882a593Smuzhiyun 	int rc;
7624*4882a593Smuzhiyun 
7625*4882a593Smuzhiyun 	rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7626*4882a593Smuzhiyun 		&cfg_base_addr_index, &cfg_offset);
7627*4882a593Smuzhiyun 	if (rc)
7628*4882a593Smuzhiyun 		return rc;
7629*4882a593Smuzhiyun 	h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
7630*4882a593Smuzhiyun 		       cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
7631*4882a593Smuzhiyun 	if (!h->cfgtable) {
7632*4882a593Smuzhiyun 		dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
7633*4882a593Smuzhiyun 		return -ENOMEM;
7634*4882a593Smuzhiyun 	}
7635*4882a593Smuzhiyun 	rc = write_driver_ver_to_cfgtable(h->cfgtable);
7636*4882a593Smuzhiyun 	if (rc)
7637*4882a593Smuzhiyun 		return rc;
7638*4882a593Smuzhiyun 	/* Find performant mode table. */
7639*4882a593Smuzhiyun 	trans_offset = readl(&h->cfgtable->TransMethodOffset);
7640*4882a593Smuzhiyun 	h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
7641*4882a593Smuzhiyun 				cfg_base_addr_index)+cfg_offset+trans_offset,
7642*4882a593Smuzhiyun 				sizeof(*h->transtable));
7643*4882a593Smuzhiyun 	if (!h->transtable) {
7644*4882a593Smuzhiyun 		dev_err(&h->pdev->dev, "Failed mapping transfer table\n");
7645*4882a593Smuzhiyun 		hpsa_free_cfgtables(h);
7646*4882a593Smuzhiyun 		return -ENOMEM;
7647*4882a593Smuzhiyun 	}
7648*4882a593Smuzhiyun 	return 0;
7649*4882a593Smuzhiyun }
7650*4882a593Smuzhiyun 
hpsa_get_max_perf_mode_cmds(struct ctlr_info * h)7651*4882a593Smuzhiyun static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
7652*4882a593Smuzhiyun {
7653*4882a593Smuzhiyun #define MIN_MAX_COMMANDS 16
7654*4882a593Smuzhiyun 	BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
7655*4882a593Smuzhiyun 
7656*4882a593Smuzhiyun 	h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
7657*4882a593Smuzhiyun 
7658*4882a593Smuzhiyun 	/* Limit commands in memory limited kdump scenario. */
7659*4882a593Smuzhiyun 	if (reset_devices && h->max_commands > 32)
7660*4882a593Smuzhiyun 		h->max_commands = 32;
7661*4882a593Smuzhiyun 
7662*4882a593Smuzhiyun 	if (h->max_commands < MIN_MAX_COMMANDS) {
7663*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev,
7664*4882a593Smuzhiyun 			"Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
7665*4882a593Smuzhiyun 			h->max_commands,
7666*4882a593Smuzhiyun 			MIN_MAX_COMMANDS);
7667*4882a593Smuzhiyun 		h->max_commands = MIN_MAX_COMMANDS;
7668*4882a593Smuzhiyun 	}
7669*4882a593Smuzhiyun }
7670*4882a593Smuzhiyun 
7671*4882a593Smuzhiyun /* If the controller reports that the total max sg entries is greater than 512,
7672*4882a593Smuzhiyun  * then we know that chained SG blocks work.  (Original smart arrays did not
7673*4882a593Smuzhiyun  * support chained SG blocks and would return zero for max sg entries.)
7674*4882a593Smuzhiyun  */
hpsa_supports_chained_sg_blocks(struct ctlr_info * h)7675*4882a593Smuzhiyun static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
7676*4882a593Smuzhiyun {
7677*4882a593Smuzhiyun 	return h->maxsgentries > 512;
7678*4882a593Smuzhiyun }
7679*4882a593Smuzhiyun 
7680*4882a593Smuzhiyun /* Interrogate the hardware for some limits:
7681*4882a593Smuzhiyun  * max commands, max SG elements without chaining, and with chaining,
7682*4882a593Smuzhiyun  * SG chain block size, etc.
7683*4882a593Smuzhiyun  */
hpsa_find_board_params(struct ctlr_info * h)7684*4882a593Smuzhiyun static void hpsa_find_board_params(struct ctlr_info *h)
7685*4882a593Smuzhiyun {
7686*4882a593Smuzhiyun 	hpsa_get_max_perf_mode_cmds(h);
7687*4882a593Smuzhiyun 	h->nr_cmds = h->max_commands;
7688*4882a593Smuzhiyun 	h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
7689*4882a593Smuzhiyun 	h->fw_support = readl(&(h->cfgtable->misc_fw_support));
7690*4882a593Smuzhiyun 	if (hpsa_supports_chained_sg_blocks(h)) {
7691*4882a593Smuzhiyun 		/* Limit in-command s/g elements to 32 save dma'able memory. */
7692*4882a593Smuzhiyun 		h->max_cmd_sg_entries = 32;
7693*4882a593Smuzhiyun 		h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
7694*4882a593Smuzhiyun 		h->maxsgentries--; /* save one for chain pointer */
7695*4882a593Smuzhiyun 	} else {
7696*4882a593Smuzhiyun 		/*
7697*4882a593Smuzhiyun 		 * Original smart arrays supported at most 31 s/g entries
7698*4882a593Smuzhiyun 		 * embedded inline in the command (trying to use more
7699*4882a593Smuzhiyun 		 * would lock up the controller)
7700*4882a593Smuzhiyun 		 */
7701*4882a593Smuzhiyun 		h->max_cmd_sg_entries = 31;
7702*4882a593Smuzhiyun 		h->maxsgentries = 31; /* default to traditional values */
7703*4882a593Smuzhiyun 		h->chainsize = 0;
7704*4882a593Smuzhiyun 	}
7705*4882a593Smuzhiyun 
7706*4882a593Smuzhiyun 	/* Find out what task management functions are supported and cache */
7707*4882a593Smuzhiyun 	h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
7708*4882a593Smuzhiyun 	if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
7709*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
7710*4882a593Smuzhiyun 	if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
7711*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
7712*4882a593Smuzhiyun 	if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags))
7713*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n");
7714*4882a593Smuzhiyun }
7715*4882a593Smuzhiyun 
hpsa_CISS_signature_present(struct ctlr_info * h)7716*4882a593Smuzhiyun static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
7717*4882a593Smuzhiyun {
7718*4882a593Smuzhiyun 	if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
7719*4882a593Smuzhiyun 		dev_err(&h->pdev->dev, "not a valid CISS config table\n");
7720*4882a593Smuzhiyun 		return false;
7721*4882a593Smuzhiyun 	}
7722*4882a593Smuzhiyun 	return true;
7723*4882a593Smuzhiyun }
7724*4882a593Smuzhiyun 
hpsa_set_driver_support_bits(struct ctlr_info * h)7725*4882a593Smuzhiyun static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
7726*4882a593Smuzhiyun {
7727*4882a593Smuzhiyun 	u32 driver_support;
7728*4882a593Smuzhiyun 
7729*4882a593Smuzhiyun 	driver_support = readl(&(h->cfgtable->driver_support));
7730*4882a593Smuzhiyun 	/* Need to enable prefetch in the SCSI core for 6400 in x86 */
7731*4882a593Smuzhiyun #ifdef CONFIG_X86
7732*4882a593Smuzhiyun 	driver_support |= ENABLE_SCSI_PREFETCH;
7733*4882a593Smuzhiyun #endif
7734*4882a593Smuzhiyun 	driver_support |= ENABLE_UNIT_ATTN;
7735*4882a593Smuzhiyun 	writel(driver_support, &(h->cfgtable->driver_support));
7736*4882a593Smuzhiyun }
7737*4882a593Smuzhiyun 
7738*4882a593Smuzhiyun /* Disable DMA prefetch for the P600.  Otherwise an ASIC bug may result
7739*4882a593Smuzhiyun  * in a prefetch beyond physical memory.
7740*4882a593Smuzhiyun  */
hpsa_p600_dma_prefetch_quirk(struct ctlr_info * h)7741*4882a593Smuzhiyun static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
7742*4882a593Smuzhiyun {
7743*4882a593Smuzhiyun 	u32 dma_prefetch;
7744*4882a593Smuzhiyun 
7745*4882a593Smuzhiyun 	if (h->board_id != 0x3225103C)
7746*4882a593Smuzhiyun 		return;
7747*4882a593Smuzhiyun 	dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
7748*4882a593Smuzhiyun 	dma_prefetch |= 0x8000;
7749*4882a593Smuzhiyun 	writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
7750*4882a593Smuzhiyun }
7751*4882a593Smuzhiyun 
hpsa_wait_for_clear_event_notify_ack(struct ctlr_info * h)7752*4882a593Smuzhiyun static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
7753*4882a593Smuzhiyun {
7754*4882a593Smuzhiyun 	int i;
7755*4882a593Smuzhiyun 	u32 doorbell_value;
7756*4882a593Smuzhiyun 	unsigned long flags;
7757*4882a593Smuzhiyun 	/* wait until the clear_event_notify bit 6 is cleared by controller. */
7758*4882a593Smuzhiyun 	for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
7759*4882a593Smuzhiyun 		spin_lock_irqsave(&h->lock, flags);
7760*4882a593Smuzhiyun 		doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7761*4882a593Smuzhiyun 		spin_unlock_irqrestore(&h->lock, flags);
7762*4882a593Smuzhiyun 		if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
7763*4882a593Smuzhiyun 			goto done;
7764*4882a593Smuzhiyun 		/* delay and try again */
7765*4882a593Smuzhiyun 		msleep(CLEAR_EVENT_WAIT_INTERVAL);
7766*4882a593Smuzhiyun 	}
7767*4882a593Smuzhiyun 	return -ENODEV;
7768*4882a593Smuzhiyun done:
7769*4882a593Smuzhiyun 	return 0;
7770*4882a593Smuzhiyun }
7771*4882a593Smuzhiyun 
hpsa_wait_for_mode_change_ack(struct ctlr_info * h)7772*4882a593Smuzhiyun static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
7773*4882a593Smuzhiyun {
7774*4882a593Smuzhiyun 	int i;
7775*4882a593Smuzhiyun 	u32 doorbell_value;
7776*4882a593Smuzhiyun 	unsigned long flags;
7777*4882a593Smuzhiyun 
7778*4882a593Smuzhiyun 	/* under certain very rare conditions, this can take awhile.
7779*4882a593Smuzhiyun 	 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
7780*4882a593Smuzhiyun 	 * as we enter this code.)
7781*4882a593Smuzhiyun 	 */
7782*4882a593Smuzhiyun 	for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
7783*4882a593Smuzhiyun 		if (h->remove_in_progress)
7784*4882a593Smuzhiyun 			goto done;
7785*4882a593Smuzhiyun 		spin_lock_irqsave(&h->lock, flags);
7786*4882a593Smuzhiyun 		doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7787*4882a593Smuzhiyun 		spin_unlock_irqrestore(&h->lock, flags);
7788*4882a593Smuzhiyun 		if (!(doorbell_value & CFGTBL_ChangeReq))
7789*4882a593Smuzhiyun 			goto done;
7790*4882a593Smuzhiyun 		/* delay and try again */
7791*4882a593Smuzhiyun 		msleep(MODE_CHANGE_WAIT_INTERVAL);
7792*4882a593Smuzhiyun 	}
7793*4882a593Smuzhiyun 	return -ENODEV;
7794*4882a593Smuzhiyun done:
7795*4882a593Smuzhiyun 	return 0;
7796*4882a593Smuzhiyun }
7797*4882a593Smuzhiyun 
7798*4882a593Smuzhiyun /* return -ENODEV or other reason on error, 0 on success */
hpsa_enter_simple_mode(struct ctlr_info * h)7799*4882a593Smuzhiyun static int hpsa_enter_simple_mode(struct ctlr_info *h)
7800*4882a593Smuzhiyun {
7801*4882a593Smuzhiyun 	u32 trans_support;
7802*4882a593Smuzhiyun 
7803*4882a593Smuzhiyun 	trans_support = readl(&(h->cfgtable->TransportSupport));
7804*4882a593Smuzhiyun 	if (!(trans_support & SIMPLE_MODE))
7805*4882a593Smuzhiyun 		return -ENOTSUPP;
7806*4882a593Smuzhiyun 
7807*4882a593Smuzhiyun 	h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
7808*4882a593Smuzhiyun 
7809*4882a593Smuzhiyun 	/* Update the field, and then ring the doorbell */
7810*4882a593Smuzhiyun 	writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
7811*4882a593Smuzhiyun 	writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7812*4882a593Smuzhiyun 	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7813*4882a593Smuzhiyun 	if (hpsa_wait_for_mode_change_ack(h))
7814*4882a593Smuzhiyun 		goto error;
7815*4882a593Smuzhiyun 	print_cfg_table(&h->pdev->dev, h->cfgtable);
7816*4882a593Smuzhiyun 	if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
7817*4882a593Smuzhiyun 		goto error;
7818*4882a593Smuzhiyun 	h->transMethod = CFGTBL_Trans_Simple;
7819*4882a593Smuzhiyun 	return 0;
7820*4882a593Smuzhiyun error:
7821*4882a593Smuzhiyun 	dev_err(&h->pdev->dev, "failed to enter simple mode\n");
7822*4882a593Smuzhiyun 	return -ENODEV;
7823*4882a593Smuzhiyun }
7824*4882a593Smuzhiyun 
7825*4882a593Smuzhiyun /* free items allocated or mapped by hpsa_pci_init */
hpsa_free_pci_init(struct ctlr_info * h)7826*4882a593Smuzhiyun static void hpsa_free_pci_init(struct ctlr_info *h)
7827*4882a593Smuzhiyun {
7828*4882a593Smuzhiyun 	hpsa_free_cfgtables(h);			/* pci_init 4 */
7829*4882a593Smuzhiyun 	iounmap(h->vaddr);			/* pci_init 3 */
7830*4882a593Smuzhiyun 	h->vaddr = NULL;
7831*4882a593Smuzhiyun 	hpsa_disable_interrupt_mode(h);		/* pci_init 2 */
7832*4882a593Smuzhiyun 	/*
7833*4882a593Smuzhiyun 	 * call pci_disable_device before pci_release_regions per
7834*4882a593Smuzhiyun 	 * Documentation/driver-api/pci/pci.rst
7835*4882a593Smuzhiyun 	 */
7836*4882a593Smuzhiyun 	pci_disable_device(h->pdev);		/* pci_init 1 */
7837*4882a593Smuzhiyun 	pci_release_regions(h->pdev);		/* pci_init 2 */
7838*4882a593Smuzhiyun }
7839*4882a593Smuzhiyun 
7840*4882a593Smuzhiyun /* several items must be freed later */
hpsa_pci_init(struct ctlr_info * h)7841*4882a593Smuzhiyun static int hpsa_pci_init(struct ctlr_info *h)
7842*4882a593Smuzhiyun {
7843*4882a593Smuzhiyun 	int prod_index, err;
7844*4882a593Smuzhiyun 	bool legacy_board;
7845*4882a593Smuzhiyun 
7846*4882a593Smuzhiyun 	prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id, &legacy_board);
7847*4882a593Smuzhiyun 	if (prod_index < 0)
7848*4882a593Smuzhiyun 		return prod_index;
7849*4882a593Smuzhiyun 	h->product_name = products[prod_index].product_name;
7850*4882a593Smuzhiyun 	h->access = *(products[prod_index].access);
7851*4882a593Smuzhiyun 	h->legacy_board = legacy_board;
7852*4882a593Smuzhiyun 	pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
7853*4882a593Smuzhiyun 			       PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
7854*4882a593Smuzhiyun 
7855*4882a593Smuzhiyun 	err = pci_enable_device(h->pdev);
7856*4882a593Smuzhiyun 	if (err) {
7857*4882a593Smuzhiyun 		dev_err(&h->pdev->dev, "failed to enable PCI device\n");
7858*4882a593Smuzhiyun 		pci_disable_device(h->pdev);
7859*4882a593Smuzhiyun 		return err;
7860*4882a593Smuzhiyun 	}
7861*4882a593Smuzhiyun 
7862*4882a593Smuzhiyun 	err = pci_request_regions(h->pdev, HPSA);
7863*4882a593Smuzhiyun 	if (err) {
7864*4882a593Smuzhiyun 		dev_err(&h->pdev->dev,
7865*4882a593Smuzhiyun 			"failed to obtain PCI resources\n");
7866*4882a593Smuzhiyun 		pci_disable_device(h->pdev);
7867*4882a593Smuzhiyun 		return err;
7868*4882a593Smuzhiyun 	}
7869*4882a593Smuzhiyun 
7870*4882a593Smuzhiyun 	pci_set_master(h->pdev);
7871*4882a593Smuzhiyun 
7872*4882a593Smuzhiyun 	err = hpsa_interrupt_mode(h);
7873*4882a593Smuzhiyun 	if (err)
7874*4882a593Smuzhiyun 		goto clean1;
7875*4882a593Smuzhiyun 
7876*4882a593Smuzhiyun 	/* setup mapping between CPU and reply queue */
7877*4882a593Smuzhiyun 	hpsa_setup_reply_map(h);
7878*4882a593Smuzhiyun 
7879*4882a593Smuzhiyun 	err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
7880*4882a593Smuzhiyun 	if (err)
7881*4882a593Smuzhiyun 		goto clean2;	/* intmode+region, pci */
7882*4882a593Smuzhiyun 	h->vaddr = remap_pci_mem(h->paddr, 0x250);
7883*4882a593Smuzhiyun 	if (!h->vaddr) {
7884*4882a593Smuzhiyun 		dev_err(&h->pdev->dev, "failed to remap PCI mem\n");
7885*4882a593Smuzhiyun 		err = -ENOMEM;
7886*4882a593Smuzhiyun 		goto clean2;	/* intmode+region, pci */
7887*4882a593Smuzhiyun 	}
7888*4882a593Smuzhiyun 	err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
7889*4882a593Smuzhiyun 	if (err)
7890*4882a593Smuzhiyun 		goto clean3;	/* vaddr, intmode+region, pci */
7891*4882a593Smuzhiyun 	err = hpsa_find_cfgtables(h);
7892*4882a593Smuzhiyun 	if (err)
7893*4882a593Smuzhiyun 		goto clean3;	/* vaddr, intmode+region, pci */
7894*4882a593Smuzhiyun 	hpsa_find_board_params(h);
7895*4882a593Smuzhiyun 
7896*4882a593Smuzhiyun 	if (!hpsa_CISS_signature_present(h)) {
7897*4882a593Smuzhiyun 		err = -ENODEV;
7898*4882a593Smuzhiyun 		goto clean4;	/* cfgtables, vaddr, intmode+region, pci */
7899*4882a593Smuzhiyun 	}
7900*4882a593Smuzhiyun 	hpsa_set_driver_support_bits(h);
7901*4882a593Smuzhiyun 	hpsa_p600_dma_prefetch_quirk(h);
7902*4882a593Smuzhiyun 	err = hpsa_enter_simple_mode(h);
7903*4882a593Smuzhiyun 	if (err)
7904*4882a593Smuzhiyun 		goto clean4;	/* cfgtables, vaddr, intmode+region, pci */
7905*4882a593Smuzhiyun 	return 0;
7906*4882a593Smuzhiyun 
7907*4882a593Smuzhiyun clean4:	/* cfgtables, vaddr, intmode+region, pci */
7908*4882a593Smuzhiyun 	hpsa_free_cfgtables(h);
7909*4882a593Smuzhiyun clean3:	/* vaddr, intmode+region, pci */
7910*4882a593Smuzhiyun 	iounmap(h->vaddr);
7911*4882a593Smuzhiyun 	h->vaddr = NULL;
7912*4882a593Smuzhiyun clean2:	/* intmode+region, pci */
7913*4882a593Smuzhiyun 	hpsa_disable_interrupt_mode(h);
7914*4882a593Smuzhiyun clean1:
7915*4882a593Smuzhiyun 	/*
7916*4882a593Smuzhiyun 	 * call pci_disable_device before pci_release_regions per
7917*4882a593Smuzhiyun 	 * Documentation/driver-api/pci/pci.rst
7918*4882a593Smuzhiyun 	 */
7919*4882a593Smuzhiyun 	pci_disable_device(h->pdev);
7920*4882a593Smuzhiyun 	pci_release_regions(h->pdev);
7921*4882a593Smuzhiyun 	return err;
7922*4882a593Smuzhiyun }
7923*4882a593Smuzhiyun 
hpsa_hba_inquiry(struct ctlr_info * h)7924*4882a593Smuzhiyun static void hpsa_hba_inquiry(struct ctlr_info *h)
7925*4882a593Smuzhiyun {
7926*4882a593Smuzhiyun 	int rc;
7927*4882a593Smuzhiyun 
7928*4882a593Smuzhiyun #define HBA_INQUIRY_BYTE_COUNT 64
7929*4882a593Smuzhiyun 	h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
7930*4882a593Smuzhiyun 	if (!h->hba_inquiry_data)
7931*4882a593Smuzhiyun 		return;
7932*4882a593Smuzhiyun 	rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
7933*4882a593Smuzhiyun 		h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
7934*4882a593Smuzhiyun 	if (rc != 0) {
7935*4882a593Smuzhiyun 		kfree(h->hba_inquiry_data);
7936*4882a593Smuzhiyun 		h->hba_inquiry_data = NULL;
7937*4882a593Smuzhiyun 	}
7938*4882a593Smuzhiyun }
7939*4882a593Smuzhiyun 
hpsa_init_reset_devices(struct pci_dev * pdev,u32 board_id)7940*4882a593Smuzhiyun static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
7941*4882a593Smuzhiyun {
7942*4882a593Smuzhiyun 	int rc, i;
7943*4882a593Smuzhiyun 	void __iomem *vaddr;
7944*4882a593Smuzhiyun 
7945*4882a593Smuzhiyun 	if (!reset_devices)
7946*4882a593Smuzhiyun 		return 0;
7947*4882a593Smuzhiyun 
7948*4882a593Smuzhiyun 	/* kdump kernel is loading, we don't know in which state is
7949*4882a593Smuzhiyun 	 * the pci interface. The dev->enable_cnt is equal zero
7950*4882a593Smuzhiyun 	 * so we call enable+disable, wait a while and switch it on.
7951*4882a593Smuzhiyun 	 */
7952*4882a593Smuzhiyun 	rc = pci_enable_device(pdev);
7953*4882a593Smuzhiyun 	if (rc) {
7954*4882a593Smuzhiyun 		dev_warn(&pdev->dev, "Failed to enable PCI device\n");
7955*4882a593Smuzhiyun 		return -ENODEV;
7956*4882a593Smuzhiyun 	}
7957*4882a593Smuzhiyun 	pci_disable_device(pdev);
7958*4882a593Smuzhiyun 	msleep(260);			/* a randomly chosen number */
7959*4882a593Smuzhiyun 	rc = pci_enable_device(pdev);
7960*4882a593Smuzhiyun 	if (rc) {
7961*4882a593Smuzhiyun 		dev_warn(&pdev->dev, "failed to enable device.\n");
7962*4882a593Smuzhiyun 		return -ENODEV;
7963*4882a593Smuzhiyun 	}
7964*4882a593Smuzhiyun 
7965*4882a593Smuzhiyun 	pci_set_master(pdev);
7966*4882a593Smuzhiyun 
7967*4882a593Smuzhiyun 	vaddr = pci_ioremap_bar(pdev, 0);
7968*4882a593Smuzhiyun 	if (vaddr == NULL) {
7969*4882a593Smuzhiyun 		rc = -ENOMEM;
7970*4882a593Smuzhiyun 		goto out_disable;
7971*4882a593Smuzhiyun 	}
7972*4882a593Smuzhiyun 	writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
7973*4882a593Smuzhiyun 	iounmap(vaddr);
7974*4882a593Smuzhiyun 
7975*4882a593Smuzhiyun 	/* Reset the controller with a PCI power-cycle or via doorbell */
7976*4882a593Smuzhiyun 	rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
7977*4882a593Smuzhiyun 
7978*4882a593Smuzhiyun 	/* -ENOTSUPP here means we cannot reset the controller
7979*4882a593Smuzhiyun 	 * but it's already (and still) up and running in
7980*4882a593Smuzhiyun 	 * "performant mode".  Or, it might be 640x, which can't reset
7981*4882a593Smuzhiyun 	 * due to concerns about shared bbwc between 6402/6404 pair.
7982*4882a593Smuzhiyun 	 */
7983*4882a593Smuzhiyun 	if (rc)
7984*4882a593Smuzhiyun 		goto out_disable;
7985*4882a593Smuzhiyun 
7986*4882a593Smuzhiyun 	/* Now try to get the controller to respond to a no-op */
7987*4882a593Smuzhiyun 	dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
7988*4882a593Smuzhiyun 	for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
7989*4882a593Smuzhiyun 		if (hpsa_noop(pdev) == 0)
7990*4882a593Smuzhiyun 			break;
7991*4882a593Smuzhiyun 		else
7992*4882a593Smuzhiyun 			dev_warn(&pdev->dev, "no-op failed%s\n",
7993*4882a593Smuzhiyun 					(i < 11 ? "; re-trying" : ""));
7994*4882a593Smuzhiyun 	}
7995*4882a593Smuzhiyun 
7996*4882a593Smuzhiyun out_disable:
7997*4882a593Smuzhiyun 
7998*4882a593Smuzhiyun 	pci_disable_device(pdev);
7999*4882a593Smuzhiyun 	return rc;
8000*4882a593Smuzhiyun }
8001*4882a593Smuzhiyun 
hpsa_free_cmd_pool(struct ctlr_info * h)8002*4882a593Smuzhiyun static void hpsa_free_cmd_pool(struct ctlr_info *h)
8003*4882a593Smuzhiyun {
8004*4882a593Smuzhiyun 	kfree(h->cmd_pool_bits);
8005*4882a593Smuzhiyun 	h->cmd_pool_bits = NULL;
8006*4882a593Smuzhiyun 	if (h->cmd_pool) {
8007*4882a593Smuzhiyun 		dma_free_coherent(&h->pdev->dev,
8008*4882a593Smuzhiyun 				h->nr_cmds * sizeof(struct CommandList),
8009*4882a593Smuzhiyun 				h->cmd_pool,
8010*4882a593Smuzhiyun 				h->cmd_pool_dhandle);
8011*4882a593Smuzhiyun 		h->cmd_pool = NULL;
8012*4882a593Smuzhiyun 		h->cmd_pool_dhandle = 0;
8013*4882a593Smuzhiyun 	}
8014*4882a593Smuzhiyun 	if (h->errinfo_pool) {
8015*4882a593Smuzhiyun 		dma_free_coherent(&h->pdev->dev,
8016*4882a593Smuzhiyun 				h->nr_cmds * sizeof(struct ErrorInfo),
8017*4882a593Smuzhiyun 				h->errinfo_pool,
8018*4882a593Smuzhiyun 				h->errinfo_pool_dhandle);
8019*4882a593Smuzhiyun 		h->errinfo_pool = NULL;
8020*4882a593Smuzhiyun 		h->errinfo_pool_dhandle = 0;
8021*4882a593Smuzhiyun 	}
8022*4882a593Smuzhiyun }
8023*4882a593Smuzhiyun 
hpsa_alloc_cmd_pool(struct ctlr_info * h)8024*4882a593Smuzhiyun static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
8025*4882a593Smuzhiyun {
8026*4882a593Smuzhiyun 	h->cmd_pool_bits = kcalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG),
8027*4882a593Smuzhiyun 				   sizeof(unsigned long),
8028*4882a593Smuzhiyun 				   GFP_KERNEL);
8029*4882a593Smuzhiyun 	h->cmd_pool = dma_alloc_coherent(&h->pdev->dev,
8030*4882a593Smuzhiyun 		    h->nr_cmds * sizeof(*h->cmd_pool),
8031*4882a593Smuzhiyun 		    &h->cmd_pool_dhandle, GFP_KERNEL);
8032*4882a593Smuzhiyun 	h->errinfo_pool = dma_alloc_coherent(&h->pdev->dev,
8033*4882a593Smuzhiyun 		    h->nr_cmds * sizeof(*h->errinfo_pool),
8034*4882a593Smuzhiyun 		    &h->errinfo_pool_dhandle, GFP_KERNEL);
8035*4882a593Smuzhiyun 	if ((h->cmd_pool_bits == NULL)
8036*4882a593Smuzhiyun 	    || (h->cmd_pool == NULL)
8037*4882a593Smuzhiyun 	    || (h->errinfo_pool == NULL)) {
8038*4882a593Smuzhiyun 		dev_err(&h->pdev->dev, "out of memory in %s", __func__);
8039*4882a593Smuzhiyun 		goto clean_up;
8040*4882a593Smuzhiyun 	}
8041*4882a593Smuzhiyun 	hpsa_preinitialize_commands(h);
8042*4882a593Smuzhiyun 	return 0;
8043*4882a593Smuzhiyun clean_up:
8044*4882a593Smuzhiyun 	hpsa_free_cmd_pool(h);
8045*4882a593Smuzhiyun 	return -ENOMEM;
8046*4882a593Smuzhiyun }
8047*4882a593Smuzhiyun 
8048*4882a593Smuzhiyun /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
hpsa_free_irqs(struct ctlr_info * h)8049*4882a593Smuzhiyun static void hpsa_free_irqs(struct ctlr_info *h)
8050*4882a593Smuzhiyun {
8051*4882a593Smuzhiyun 	int i;
8052*4882a593Smuzhiyun 	int irq_vector = 0;
8053*4882a593Smuzhiyun 
8054*4882a593Smuzhiyun 	if (hpsa_simple_mode)
8055*4882a593Smuzhiyun 		irq_vector = h->intr_mode;
8056*4882a593Smuzhiyun 
8057*4882a593Smuzhiyun 	if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) {
8058*4882a593Smuzhiyun 		/* Single reply queue, only one irq to free */
8059*4882a593Smuzhiyun 		free_irq(pci_irq_vector(h->pdev, irq_vector),
8060*4882a593Smuzhiyun 				&h->q[h->intr_mode]);
8061*4882a593Smuzhiyun 		h->q[h->intr_mode] = 0;
8062*4882a593Smuzhiyun 		return;
8063*4882a593Smuzhiyun 	}
8064*4882a593Smuzhiyun 
8065*4882a593Smuzhiyun 	for (i = 0; i < h->msix_vectors; i++) {
8066*4882a593Smuzhiyun 		free_irq(pci_irq_vector(h->pdev, i), &h->q[i]);
8067*4882a593Smuzhiyun 		h->q[i] = 0;
8068*4882a593Smuzhiyun 	}
8069*4882a593Smuzhiyun 	for (; i < MAX_REPLY_QUEUES; i++)
8070*4882a593Smuzhiyun 		h->q[i] = 0;
8071*4882a593Smuzhiyun }
8072*4882a593Smuzhiyun 
8073*4882a593Smuzhiyun /* returns 0 on success; cleans up and returns -Enn on error */
hpsa_request_irqs(struct ctlr_info * h,irqreturn_t (* msixhandler)(int,void *),irqreturn_t (* intxhandler)(int,void *))8074*4882a593Smuzhiyun static int hpsa_request_irqs(struct ctlr_info *h,
8075*4882a593Smuzhiyun 	irqreturn_t (*msixhandler)(int, void *),
8076*4882a593Smuzhiyun 	irqreturn_t (*intxhandler)(int, void *))
8077*4882a593Smuzhiyun {
8078*4882a593Smuzhiyun 	int rc, i;
8079*4882a593Smuzhiyun 	int irq_vector = 0;
8080*4882a593Smuzhiyun 
8081*4882a593Smuzhiyun 	if (hpsa_simple_mode)
8082*4882a593Smuzhiyun 		irq_vector = h->intr_mode;
8083*4882a593Smuzhiyun 
8084*4882a593Smuzhiyun 	/*
8085*4882a593Smuzhiyun 	 * initialize h->q[x] = x so that interrupt handlers know which
8086*4882a593Smuzhiyun 	 * queue to process.
8087*4882a593Smuzhiyun 	 */
8088*4882a593Smuzhiyun 	for (i = 0; i < MAX_REPLY_QUEUES; i++)
8089*4882a593Smuzhiyun 		h->q[i] = (u8) i;
8090*4882a593Smuzhiyun 
8091*4882a593Smuzhiyun 	if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) {
8092*4882a593Smuzhiyun 		/* If performant mode and MSI-X, use multiple reply queues */
8093*4882a593Smuzhiyun 		for (i = 0; i < h->msix_vectors; i++) {
8094*4882a593Smuzhiyun 			sprintf(h->intrname[i], "%s-msix%d", h->devname, i);
8095*4882a593Smuzhiyun 			rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler,
8096*4882a593Smuzhiyun 					0, h->intrname[i],
8097*4882a593Smuzhiyun 					&h->q[i]);
8098*4882a593Smuzhiyun 			if (rc) {
8099*4882a593Smuzhiyun 				int j;
8100*4882a593Smuzhiyun 
8101*4882a593Smuzhiyun 				dev_err(&h->pdev->dev,
8102*4882a593Smuzhiyun 					"failed to get irq %d for %s\n",
8103*4882a593Smuzhiyun 				       pci_irq_vector(h->pdev, i), h->devname);
8104*4882a593Smuzhiyun 				for (j = 0; j < i; j++) {
8105*4882a593Smuzhiyun 					free_irq(pci_irq_vector(h->pdev, j), &h->q[j]);
8106*4882a593Smuzhiyun 					h->q[j] = 0;
8107*4882a593Smuzhiyun 				}
8108*4882a593Smuzhiyun 				for (; j < MAX_REPLY_QUEUES; j++)
8109*4882a593Smuzhiyun 					h->q[j] = 0;
8110*4882a593Smuzhiyun 				return rc;
8111*4882a593Smuzhiyun 			}
8112*4882a593Smuzhiyun 		}
8113*4882a593Smuzhiyun 	} else {
8114*4882a593Smuzhiyun 		/* Use single reply pool */
8115*4882a593Smuzhiyun 		if (h->msix_vectors > 0 || h->pdev->msi_enabled) {
8116*4882a593Smuzhiyun 			sprintf(h->intrname[0], "%s-msi%s", h->devname,
8117*4882a593Smuzhiyun 				h->msix_vectors ? "x" : "");
8118*4882a593Smuzhiyun 			rc = request_irq(pci_irq_vector(h->pdev, irq_vector),
8119*4882a593Smuzhiyun 				msixhandler, 0,
8120*4882a593Smuzhiyun 				h->intrname[0],
8121*4882a593Smuzhiyun 				&h->q[h->intr_mode]);
8122*4882a593Smuzhiyun 		} else {
8123*4882a593Smuzhiyun 			sprintf(h->intrname[h->intr_mode],
8124*4882a593Smuzhiyun 				"%s-intx", h->devname);
8125*4882a593Smuzhiyun 			rc = request_irq(pci_irq_vector(h->pdev, irq_vector),
8126*4882a593Smuzhiyun 				intxhandler, IRQF_SHARED,
8127*4882a593Smuzhiyun 				h->intrname[0],
8128*4882a593Smuzhiyun 				&h->q[h->intr_mode]);
8129*4882a593Smuzhiyun 		}
8130*4882a593Smuzhiyun 	}
8131*4882a593Smuzhiyun 	if (rc) {
8132*4882a593Smuzhiyun 		dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
8133*4882a593Smuzhiyun 		       pci_irq_vector(h->pdev, irq_vector), h->devname);
8134*4882a593Smuzhiyun 		hpsa_free_irqs(h);
8135*4882a593Smuzhiyun 		return -ENODEV;
8136*4882a593Smuzhiyun 	}
8137*4882a593Smuzhiyun 	return 0;
8138*4882a593Smuzhiyun }
8139*4882a593Smuzhiyun 
hpsa_kdump_soft_reset(struct ctlr_info * h)8140*4882a593Smuzhiyun static int hpsa_kdump_soft_reset(struct ctlr_info *h)
8141*4882a593Smuzhiyun {
8142*4882a593Smuzhiyun 	int rc;
8143*4882a593Smuzhiyun 	hpsa_send_host_reset(h, HPSA_RESET_TYPE_CONTROLLER);
8144*4882a593Smuzhiyun 
8145*4882a593Smuzhiyun 	dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
8146*4882a593Smuzhiyun 	rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY);
8147*4882a593Smuzhiyun 	if (rc) {
8148*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
8149*4882a593Smuzhiyun 		return rc;
8150*4882a593Smuzhiyun 	}
8151*4882a593Smuzhiyun 
8152*4882a593Smuzhiyun 	dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
8153*4882a593Smuzhiyun 	rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
8154*4882a593Smuzhiyun 	if (rc) {
8155*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev, "Board failed to become ready "
8156*4882a593Smuzhiyun 			"after soft reset.\n");
8157*4882a593Smuzhiyun 		return rc;
8158*4882a593Smuzhiyun 	}
8159*4882a593Smuzhiyun 
8160*4882a593Smuzhiyun 	return 0;
8161*4882a593Smuzhiyun }
8162*4882a593Smuzhiyun 
hpsa_free_reply_queues(struct ctlr_info * h)8163*4882a593Smuzhiyun static void hpsa_free_reply_queues(struct ctlr_info *h)
8164*4882a593Smuzhiyun {
8165*4882a593Smuzhiyun 	int i;
8166*4882a593Smuzhiyun 
8167*4882a593Smuzhiyun 	for (i = 0; i < h->nreply_queues; i++) {
8168*4882a593Smuzhiyun 		if (!h->reply_queue[i].head)
8169*4882a593Smuzhiyun 			continue;
8170*4882a593Smuzhiyun 		dma_free_coherent(&h->pdev->dev,
8171*4882a593Smuzhiyun 					h->reply_queue_size,
8172*4882a593Smuzhiyun 					h->reply_queue[i].head,
8173*4882a593Smuzhiyun 					h->reply_queue[i].busaddr);
8174*4882a593Smuzhiyun 		h->reply_queue[i].head = NULL;
8175*4882a593Smuzhiyun 		h->reply_queue[i].busaddr = 0;
8176*4882a593Smuzhiyun 	}
8177*4882a593Smuzhiyun 	h->reply_queue_size = 0;
8178*4882a593Smuzhiyun }
8179*4882a593Smuzhiyun 
hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info * h)8180*4882a593Smuzhiyun static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
8181*4882a593Smuzhiyun {
8182*4882a593Smuzhiyun 	hpsa_free_performant_mode(h);		/* init_one 7 */
8183*4882a593Smuzhiyun 	hpsa_free_sg_chain_blocks(h);		/* init_one 6 */
8184*4882a593Smuzhiyun 	hpsa_free_cmd_pool(h);			/* init_one 5 */
8185*4882a593Smuzhiyun 	hpsa_free_irqs(h);			/* init_one 4 */
8186*4882a593Smuzhiyun 	scsi_host_put(h->scsi_host);		/* init_one 3 */
8187*4882a593Smuzhiyun 	h->scsi_host = NULL;			/* init_one 3 */
8188*4882a593Smuzhiyun 	hpsa_free_pci_init(h);			/* init_one 2_5 */
8189*4882a593Smuzhiyun 	free_percpu(h->lockup_detected);	/* init_one 2 */
8190*4882a593Smuzhiyun 	h->lockup_detected = NULL;		/* init_one 2 */
8191*4882a593Smuzhiyun 	if (h->resubmit_wq) {
8192*4882a593Smuzhiyun 		destroy_workqueue(h->resubmit_wq);	/* init_one 1 */
8193*4882a593Smuzhiyun 		h->resubmit_wq = NULL;
8194*4882a593Smuzhiyun 	}
8195*4882a593Smuzhiyun 	if (h->rescan_ctlr_wq) {
8196*4882a593Smuzhiyun 		destroy_workqueue(h->rescan_ctlr_wq);
8197*4882a593Smuzhiyun 		h->rescan_ctlr_wq = NULL;
8198*4882a593Smuzhiyun 	}
8199*4882a593Smuzhiyun 	if (h->monitor_ctlr_wq) {
8200*4882a593Smuzhiyun 		destroy_workqueue(h->monitor_ctlr_wq);
8201*4882a593Smuzhiyun 		h->monitor_ctlr_wq = NULL;
8202*4882a593Smuzhiyun 	}
8203*4882a593Smuzhiyun 
8204*4882a593Smuzhiyun 	kfree(h);				/* init_one 1 */
8205*4882a593Smuzhiyun }
8206*4882a593Smuzhiyun 
8207*4882a593Smuzhiyun /* Called when controller lockup detected. */
fail_all_outstanding_cmds(struct ctlr_info * h)8208*4882a593Smuzhiyun static void fail_all_outstanding_cmds(struct ctlr_info *h)
8209*4882a593Smuzhiyun {
8210*4882a593Smuzhiyun 	int i, refcount;
8211*4882a593Smuzhiyun 	struct CommandList *c;
8212*4882a593Smuzhiyun 	int failcount = 0;
8213*4882a593Smuzhiyun 
8214*4882a593Smuzhiyun 	flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
8215*4882a593Smuzhiyun 	for (i = 0; i < h->nr_cmds; i++) {
8216*4882a593Smuzhiyun 		c = h->cmd_pool + i;
8217*4882a593Smuzhiyun 		refcount = atomic_inc_return(&c->refcount);
8218*4882a593Smuzhiyun 		if (refcount > 1) {
8219*4882a593Smuzhiyun 			c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
8220*4882a593Smuzhiyun 			finish_cmd(c);
8221*4882a593Smuzhiyun 			atomic_dec(&h->commands_outstanding);
8222*4882a593Smuzhiyun 			failcount++;
8223*4882a593Smuzhiyun 		}
8224*4882a593Smuzhiyun 		cmd_free(h, c);
8225*4882a593Smuzhiyun 	}
8226*4882a593Smuzhiyun 	dev_warn(&h->pdev->dev,
8227*4882a593Smuzhiyun 		"failed %d commands in fail_all\n", failcount);
8228*4882a593Smuzhiyun }
8229*4882a593Smuzhiyun 
set_lockup_detected_for_all_cpus(struct ctlr_info * h,u32 value)8230*4882a593Smuzhiyun static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
8231*4882a593Smuzhiyun {
8232*4882a593Smuzhiyun 	int cpu;
8233*4882a593Smuzhiyun 
8234*4882a593Smuzhiyun 	for_each_online_cpu(cpu) {
8235*4882a593Smuzhiyun 		u32 *lockup_detected;
8236*4882a593Smuzhiyun 		lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
8237*4882a593Smuzhiyun 		*lockup_detected = value;
8238*4882a593Smuzhiyun 	}
8239*4882a593Smuzhiyun 	wmb(); /* be sure the per-cpu variables are out to memory */
8240*4882a593Smuzhiyun }
8241*4882a593Smuzhiyun 
controller_lockup_detected(struct ctlr_info * h)8242*4882a593Smuzhiyun static void controller_lockup_detected(struct ctlr_info *h)
8243*4882a593Smuzhiyun {
8244*4882a593Smuzhiyun 	unsigned long flags;
8245*4882a593Smuzhiyun 	u32 lockup_detected;
8246*4882a593Smuzhiyun 
8247*4882a593Smuzhiyun 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
8248*4882a593Smuzhiyun 	spin_lock_irqsave(&h->lock, flags);
8249*4882a593Smuzhiyun 	lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
8250*4882a593Smuzhiyun 	if (!lockup_detected) {
8251*4882a593Smuzhiyun 		/* no heartbeat, but controller gave us a zero. */
8252*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev,
8253*4882a593Smuzhiyun 			"lockup detected after %d but scratchpad register is zero\n",
8254*4882a593Smuzhiyun 			h->heartbeat_sample_interval / HZ);
8255*4882a593Smuzhiyun 		lockup_detected = 0xffffffff;
8256*4882a593Smuzhiyun 	}
8257*4882a593Smuzhiyun 	set_lockup_detected_for_all_cpus(h, lockup_detected);
8258*4882a593Smuzhiyun 	spin_unlock_irqrestore(&h->lock, flags);
8259*4882a593Smuzhiyun 	dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
8260*4882a593Smuzhiyun 			lockup_detected, h->heartbeat_sample_interval / HZ);
8261*4882a593Smuzhiyun 	if (lockup_detected == 0xffff0000) {
8262*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev, "Telling controller to do a CHKPT\n");
8263*4882a593Smuzhiyun 		writel(DOORBELL_GENERATE_CHKPT, h->vaddr + SA5_DOORBELL);
8264*4882a593Smuzhiyun 	}
8265*4882a593Smuzhiyun 	pci_disable_device(h->pdev);
8266*4882a593Smuzhiyun 	fail_all_outstanding_cmds(h);
8267*4882a593Smuzhiyun }
8268*4882a593Smuzhiyun 
detect_controller_lockup(struct ctlr_info * h)8269*4882a593Smuzhiyun static int detect_controller_lockup(struct ctlr_info *h)
8270*4882a593Smuzhiyun {
8271*4882a593Smuzhiyun 	u64 now;
8272*4882a593Smuzhiyun 	u32 heartbeat;
8273*4882a593Smuzhiyun 	unsigned long flags;
8274*4882a593Smuzhiyun 
8275*4882a593Smuzhiyun 	now = get_jiffies_64();
8276*4882a593Smuzhiyun 	/* If we've received an interrupt recently, we're ok. */
8277*4882a593Smuzhiyun 	if (time_after64(h->last_intr_timestamp +
8278*4882a593Smuzhiyun 				(h->heartbeat_sample_interval), now))
8279*4882a593Smuzhiyun 		return false;
8280*4882a593Smuzhiyun 
8281*4882a593Smuzhiyun 	/*
8282*4882a593Smuzhiyun 	 * If we've already checked the heartbeat recently, we're ok.
8283*4882a593Smuzhiyun 	 * This could happen if someone sends us a signal. We
8284*4882a593Smuzhiyun 	 * otherwise don't care about signals in this thread.
8285*4882a593Smuzhiyun 	 */
8286*4882a593Smuzhiyun 	if (time_after64(h->last_heartbeat_timestamp +
8287*4882a593Smuzhiyun 				(h->heartbeat_sample_interval), now))
8288*4882a593Smuzhiyun 		return false;
8289*4882a593Smuzhiyun 
8290*4882a593Smuzhiyun 	/* If heartbeat has not changed since we last looked, we're not ok. */
8291*4882a593Smuzhiyun 	spin_lock_irqsave(&h->lock, flags);
8292*4882a593Smuzhiyun 	heartbeat = readl(&h->cfgtable->HeartBeat);
8293*4882a593Smuzhiyun 	spin_unlock_irqrestore(&h->lock, flags);
8294*4882a593Smuzhiyun 	if (h->last_heartbeat == heartbeat) {
8295*4882a593Smuzhiyun 		controller_lockup_detected(h);
8296*4882a593Smuzhiyun 		return true;
8297*4882a593Smuzhiyun 	}
8298*4882a593Smuzhiyun 
8299*4882a593Smuzhiyun 	/* We're ok. */
8300*4882a593Smuzhiyun 	h->last_heartbeat = heartbeat;
8301*4882a593Smuzhiyun 	h->last_heartbeat_timestamp = now;
8302*4882a593Smuzhiyun 	return false;
8303*4882a593Smuzhiyun }
8304*4882a593Smuzhiyun 
8305*4882a593Smuzhiyun /*
8306*4882a593Smuzhiyun  * Set ioaccel status for all ioaccel volumes.
8307*4882a593Smuzhiyun  *
8308*4882a593Smuzhiyun  * Called from monitor controller worker (hpsa_event_monitor_worker)
8309*4882a593Smuzhiyun  *
8310*4882a593Smuzhiyun  * A Volume (or Volumes that comprise an Array set) may be undergoing a
8311*4882a593Smuzhiyun  * transformation, so we will be turning off ioaccel for all volumes that
8312*4882a593Smuzhiyun  * make up the Array.
8313*4882a593Smuzhiyun  */
hpsa_set_ioaccel_status(struct ctlr_info * h)8314*4882a593Smuzhiyun static void hpsa_set_ioaccel_status(struct ctlr_info *h)
8315*4882a593Smuzhiyun {
8316*4882a593Smuzhiyun 	int rc;
8317*4882a593Smuzhiyun 	int i;
8318*4882a593Smuzhiyun 	u8 ioaccel_status;
8319*4882a593Smuzhiyun 	unsigned char *buf;
8320*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *device;
8321*4882a593Smuzhiyun 
8322*4882a593Smuzhiyun 	if (!h)
8323*4882a593Smuzhiyun 		return;
8324*4882a593Smuzhiyun 
8325*4882a593Smuzhiyun 	buf = kmalloc(64, GFP_KERNEL);
8326*4882a593Smuzhiyun 	if (!buf)
8327*4882a593Smuzhiyun 		return;
8328*4882a593Smuzhiyun 
8329*4882a593Smuzhiyun 	/*
8330*4882a593Smuzhiyun 	 * Run through current device list used during I/O requests.
8331*4882a593Smuzhiyun 	 */
8332*4882a593Smuzhiyun 	for (i = 0; i < h->ndevices; i++) {
8333*4882a593Smuzhiyun 		int offload_to_be_enabled = 0;
8334*4882a593Smuzhiyun 		int offload_config = 0;
8335*4882a593Smuzhiyun 
8336*4882a593Smuzhiyun 		device = h->dev[i];
8337*4882a593Smuzhiyun 
8338*4882a593Smuzhiyun 		if (!device)
8339*4882a593Smuzhiyun 			continue;
8340*4882a593Smuzhiyun 		if (!hpsa_vpd_page_supported(h, device->scsi3addr,
8341*4882a593Smuzhiyun 						HPSA_VPD_LV_IOACCEL_STATUS))
8342*4882a593Smuzhiyun 			continue;
8343*4882a593Smuzhiyun 
8344*4882a593Smuzhiyun 		memset(buf, 0, 64);
8345*4882a593Smuzhiyun 
8346*4882a593Smuzhiyun 		rc = hpsa_scsi_do_inquiry(h, device->scsi3addr,
8347*4882a593Smuzhiyun 					VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS,
8348*4882a593Smuzhiyun 					buf, 64);
8349*4882a593Smuzhiyun 		if (rc != 0)
8350*4882a593Smuzhiyun 			continue;
8351*4882a593Smuzhiyun 
8352*4882a593Smuzhiyun 		ioaccel_status = buf[IOACCEL_STATUS_BYTE];
8353*4882a593Smuzhiyun 
8354*4882a593Smuzhiyun 		/*
8355*4882a593Smuzhiyun 		 * Check if offload is still configured on
8356*4882a593Smuzhiyun 		 */
8357*4882a593Smuzhiyun 		offload_config =
8358*4882a593Smuzhiyun 				!!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
8359*4882a593Smuzhiyun 		/*
8360*4882a593Smuzhiyun 		 * If offload is configured on, check to see if ioaccel
8361*4882a593Smuzhiyun 		 * needs to be enabled.
8362*4882a593Smuzhiyun 		 */
8363*4882a593Smuzhiyun 		if (offload_config)
8364*4882a593Smuzhiyun 			offload_to_be_enabled =
8365*4882a593Smuzhiyun 				!!(ioaccel_status & OFFLOAD_ENABLED_BIT);
8366*4882a593Smuzhiyun 
8367*4882a593Smuzhiyun 		/*
8368*4882a593Smuzhiyun 		 * If ioaccel is to be re-enabled, re-enable later during the
8369*4882a593Smuzhiyun 		 * scan operation so the driver can get a fresh raidmap
8370*4882a593Smuzhiyun 		 * before turning ioaccel back on.
8371*4882a593Smuzhiyun 		 */
8372*4882a593Smuzhiyun 		if (offload_to_be_enabled)
8373*4882a593Smuzhiyun 			continue;
8374*4882a593Smuzhiyun 
8375*4882a593Smuzhiyun 		/*
8376*4882a593Smuzhiyun 		 * Immediately turn off ioaccel for any volume the
8377*4882a593Smuzhiyun 		 * controller tells us to. Some of the reasons could be:
8378*4882a593Smuzhiyun 		 *    transformation - change to the LVs of an Array.
8379*4882a593Smuzhiyun 		 *    degraded volume - component failure
8380*4882a593Smuzhiyun 		 */
8381*4882a593Smuzhiyun 		hpsa_turn_off_ioaccel_for_device(device);
8382*4882a593Smuzhiyun 	}
8383*4882a593Smuzhiyun 
8384*4882a593Smuzhiyun 	kfree(buf);
8385*4882a593Smuzhiyun }
8386*4882a593Smuzhiyun 
hpsa_ack_ctlr_events(struct ctlr_info * h)8387*4882a593Smuzhiyun static void hpsa_ack_ctlr_events(struct ctlr_info *h)
8388*4882a593Smuzhiyun {
8389*4882a593Smuzhiyun 	char *event_type;
8390*4882a593Smuzhiyun 
8391*4882a593Smuzhiyun 	if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8392*4882a593Smuzhiyun 		return;
8393*4882a593Smuzhiyun 
8394*4882a593Smuzhiyun 	/* Ask the controller to clear the events we're handling. */
8395*4882a593Smuzhiyun 	if ((h->transMethod & (CFGTBL_Trans_io_accel1
8396*4882a593Smuzhiyun 			| CFGTBL_Trans_io_accel2)) &&
8397*4882a593Smuzhiyun 		(h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
8398*4882a593Smuzhiyun 		 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
8399*4882a593Smuzhiyun 
8400*4882a593Smuzhiyun 		if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
8401*4882a593Smuzhiyun 			event_type = "state change";
8402*4882a593Smuzhiyun 		if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
8403*4882a593Smuzhiyun 			event_type = "configuration change";
8404*4882a593Smuzhiyun 		/* Stop sending new RAID offload reqs via the IO accelerator */
8405*4882a593Smuzhiyun 		scsi_block_requests(h->scsi_host);
8406*4882a593Smuzhiyun 		hpsa_set_ioaccel_status(h);
8407*4882a593Smuzhiyun 		hpsa_drain_accel_commands(h);
8408*4882a593Smuzhiyun 		/* Set 'accelerator path config change' bit */
8409*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev,
8410*4882a593Smuzhiyun 			"Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
8411*4882a593Smuzhiyun 			h->events, event_type);
8412*4882a593Smuzhiyun 		writel(h->events, &(h->cfgtable->clear_event_notify));
8413*4882a593Smuzhiyun 		/* Set the "clear event notify field update" bit 6 */
8414*4882a593Smuzhiyun 		writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8415*4882a593Smuzhiyun 		/* Wait until ctlr clears 'clear event notify field', bit 6 */
8416*4882a593Smuzhiyun 		hpsa_wait_for_clear_event_notify_ack(h);
8417*4882a593Smuzhiyun 		scsi_unblock_requests(h->scsi_host);
8418*4882a593Smuzhiyun 	} else {
8419*4882a593Smuzhiyun 		/* Acknowledge controller notification events. */
8420*4882a593Smuzhiyun 		writel(h->events, &(h->cfgtable->clear_event_notify));
8421*4882a593Smuzhiyun 		writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8422*4882a593Smuzhiyun 		hpsa_wait_for_clear_event_notify_ack(h);
8423*4882a593Smuzhiyun 	}
8424*4882a593Smuzhiyun 	return;
8425*4882a593Smuzhiyun }
8426*4882a593Smuzhiyun 
8427*4882a593Smuzhiyun /* Check a register on the controller to see if there are configuration
8428*4882a593Smuzhiyun  * changes (added/changed/removed logical drives, etc.) which mean that
8429*4882a593Smuzhiyun  * we should rescan the controller for devices.
8430*4882a593Smuzhiyun  * Also check flag for driver-initiated rescan.
8431*4882a593Smuzhiyun  */
hpsa_ctlr_needs_rescan(struct ctlr_info * h)8432*4882a593Smuzhiyun static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
8433*4882a593Smuzhiyun {
8434*4882a593Smuzhiyun 	if (h->drv_req_rescan) {
8435*4882a593Smuzhiyun 		h->drv_req_rescan = 0;
8436*4882a593Smuzhiyun 		return 1;
8437*4882a593Smuzhiyun 	}
8438*4882a593Smuzhiyun 
8439*4882a593Smuzhiyun 	if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8440*4882a593Smuzhiyun 		return 0;
8441*4882a593Smuzhiyun 
8442*4882a593Smuzhiyun 	h->events = readl(&(h->cfgtable->event_notify));
8443*4882a593Smuzhiyun 	return h->events & RESCAN_REQUIRED_EVENT_BITS;
8444*4882a593Smuzhiyun }
8445*4882a593Smuzhiyun 
8446*4882a593Smuzhiyun /*
8447*4882a593Smuzhiyun  * Check if any of the offline devices have become ready
8448*4882a593Smuzhiyun  */
hpsa_offline_devices_ready(struct ctlr_info * h)8449*4882a593Smuzhiyun static int hpsa_offline_devices_ready(struct ctlr_info *h)
8450*4882a593Smuzhiyun {
8451*4882a593Smuzhiyun 	unsigned long flags;
8452*4882a593Smuzhiyun 	struct offline_device_entry *d;
8453*4882a593Smuzhiyun 	struct list_head *this, *tmp;
8454*4882a593Smuzhiyun 
8455*4882a593Smuzhiyun 	spin_lock_irqsave(&h->offline_device_lock, flags);
8456*4882a593Smuzhiyun 	list_for_each_safe(this, tmp, &h->offline_device_list) {
8457*4882a593Smuzhiyun 		d = list_entry(this, struct offline_device_entry,
8458*4882a593Smuzhiyun 				offline_list);
8459*4882a593Smuzhiyun 		spin_unlock_irqrestore(&h->offline_device_lock, flags);
8460*4882a593Smuzhiyun 		if (!hpsa_volume_offline(h, d->scsi3addr)) {
8461*4882a593Smuzhiyun 			spin_lock_irqsave(&h->offline_device_lock, flags);
8462*4882a593Smuzhiyun 			list_del(&d->offline_list);
8463*4882a593Smuzhiyun 			spin_unlock_irqrestore(&h->offline_device_lock, flags);
8464*4882a593Smuzhiyun 			return 1;
8465*4882a593Smuzhiyun 		}
8466*4882a593Smuzhiyun 		spin_lock_irqsave(&h->offline_device_lock, flags);
8467*4882a593Smuzhiyun 	}
8468*4882a593Smuzhiyun 	spin_unlock_irqrestore(&h->offline_device_lock, flags);
8469*4882a593Smuzhiyun 	return 0;
8470*4882a593Smuzhiyun }
8471*4882a593Smuzhiyun 
hpsa_luns_changed(struct ctlr_info * h)8472*4882a593Smuzhiyun static int hpsa_luns_changed(struct ctlr_info *h)
8473*4882a593Smuzhiyun {
8474*4882a593Smuzhiyun 	int rc = 1; /* assume there are changes */
8475*4882a593Smuzhiyun 	struct ReportLUNdata *logdev = NULL;
8476*4882a593Smuzhiyun 
8477*4882a593Smuzhiyun 	/* if we can't find out if lun data has changed,
8478*4882a593Smuzhiyun 	 * assume that it has.
8479*4882a593Smuzhiyun 	 */
8480*4882a593Smuzhiyun 
8481*4882a593Smuzhiyun 	if (!h->lastlogicals)
8482*4882a593Smuzhiyun 		return rc;
8483*4882a593Smuzhiyun 
8484*4882a593Smuzhiyun 	logdev = kzalloc(sizeof(*logdev), GFP_KERNEL);
8485*4882a593Smuzhiyun 	if (!logdev)
8486*4882a593Smuzhiyun 		return rc;
8487*4882a593Smuzhiyun 
8488*4882a593Smuzhiyun 	if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) {
8489*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev,
8490*4882a593Smuzhiyun 			"report luns failed, can't track lun changes.\n");
8491*4882a593Smuzhiyun 		goto out;
8492*4882a593Smuzhiyun 	}
8493*4882a593Smuzhiyun 	if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) {
8494*4882a593Smuzhiyun 		dev_info(&h->pdev->dev,
8495*4882a593Smuzhiyun 			"Lun changes detected.\n");
8496*4882a593Smuzhiyun 		memcpy(h->lastlogicals, logdev, sizeof(*logdev));
8497*4882a593Smuzhiyun 		goto out;
8498*4882a593Smuzhiyun 	} else
8499*4882a593Smuzhiyun 		rc = 0; /* no changes detected. */
8500*4882a593Smuzhiyun out:
8501*4882a593Smuzhiyun 	kfree(logdev);
8502*4882a593Smuzhiyun 	return rc;
8503*4882a593Smuzhiyun }
8504*4882a593Smuzhiyun 
hpsa_perform_rescan(struct ctlr_info * h)8505*4882a593Smuzhiyun static void hpsa_perform_rescan(struct ctlr_info *h)
8506*4882a593Smuzhiyun {
8507*4882a593Smuzhiyun 	struct Scsi_Host *sh = NULL;
8508*4882a593Smuzhiyun 	unsigned long flags;
8509*4882a593Smuzhiyun 
8510*4882a593Smuzhiyun 	/*
8511*4882a593Smuzhiyun 	 * Do the scan after the reset
8512*4882a593Smuzhiyun 	 */
8513*4882a593Smuzhiyun 	spin_lock_irqsave(&h->reset_lock, flags);
8514*4882a593Smuzhiyun 	if (h->reset_in_progress) {
8515*4882a593Smuzhiyun 		h->drv_req_rescan = 1;
8516*4882a593Smuzhiyun 		spin_unlock_irqrestore(&h->reset_lock, flags);
8517*4882a593Smuzhiyun 		return;
8518*4882a593Smuzhiyun 	}
8519*4882a593Smuzhiyun 	spin_unlock_irqrestore(&h->reset_lock, flags);
8520*4882a593Smuzhiyun 
8521*4882a593Smuzhiyun 	sh = scsi_host_get(h->scsi_host);
8522*4882a593Smuzhiyun 	if (sh != NULL) {
8523*4882a593Smuzhiyun 		hpsa_scan_start(sh);
8524*4882a593Smuzhiyun 		scsi_host_put(sh);
8525*4882a593Smuzhiyun 		h->drv_req_rescan = 0;
8526*4882a593Smuzhiyun 	}
8527*4882a593Smuzhiyun }
8528*4882a593Smuzhiyun 
8529*4882a593Smuzhiyun /*
8530*4882a593Smuzhiyun  * watch for controller events
8531*4882a593Smuzhiyun  */
hpsa_event_monitor_worker(struct work_struct * work)8532*4882a593Smuzhiyun static void hpsa_event_monitor_worker(struct work_struct *work)
8533*4882a593Smuzhiyun {
8534*4882a593Smuzhiyun 	struct ctlr_info *h = container_of(to_delayed_work(work),
8535*4882a593Smuzhiyun 					struct ctlr_info, event_monitor_work);
8536*4882a593Smuzhiyun 	unsigned long flags;
8537*4882a593Smuzhiyun 
8538*4882a593Smuzhiyun 	spin_lock_irqsave(&h->lock, flags);
8539*4882a593Smuzhiyun 	if (h->remove_in_progress) {
8540*4882a593Smuzhiyun 		spin_unlock_irqrestore(&h->lock, flags);
8541*4882a593Smuzhiyun 		return;
8542*4882a593Smuzhiyun 	}
8543*4882a593Smuzhiyun 	spin_unlock_irqrestore(&h->lock, flags);
8544*4882a593Smuzhiyun 
8545*4882a593Smuzhiyun 	if (hpsa_ctlr_needs_rescan(h)) {
8546*4882a593Smuzhiyun 		hpsa_ack_ctlr_events(h);
8547*4882a593Smuzhiyun 		hpsa_perform_rescan(h);
8548*4882a593Smuzhiyun 	}
8549*4882a593Smuzhiyun 
8550*4882a593Smuzhiyun 	spin_lock_irqsave(&h->lock, flags);
8551*4882a593Smuzhiyun 	if (!h->remove_in_progress)
8552*4882a593Smuzhiyun 		queue_delayed_work(h->monitor_ctlr_wq, &h->event_monitor_work,
8553*4882a593Smuzhiyun 				HPSA_EVENT_MONITOR_INTERVAL);
8554*4882a593Smuzhiyun 	spin_unlock_irqrestore(&h->lock, flags);
8555*4882a593Smuzhiyun }
8556*4882a593Smuzhiyun 
hpsa_rescan_ctlr_worker(struct work_struct * work)8557*4882a593Smuzhiyun static void hpsa_rescan_ctlr_worker(struct work_struct *work)
8558*4882a593Smuzhiyun {
8559*4882a593Smuzhiyun 	unsigned long flags;
8560*4882a593Smuzhiyun 	struct ctlr_info *h = container_of(to_delayed_work(work),
8561*4882a593Smuzhiyun 					struct ctlr_info, rescan_ctlr_work);
8562*4882a593Smuzhiyun 
8563*4882a593Smuzhiyun 	spin_lock_irqsave(&h->lock, flags);
8564*4882a593Smuzhiyun 	if (h->remove_in_progress) {
8565*4882a593Smuzhiyun 		spin_unlock_irqrestore(&h->lock, flags);
8566*4882a593Smuzhiyun 		return;
8567*4882a593Smuzhiyun 	}
8568*4882a593Smuzhiyun 	spin_unlock_irqrestore(&h->lock, flags);
8569*4882a593Smuzhiyun 
8570*4882a593Smuzhiyun 	if (h->drv_req_rescan || hpsa_offline_devices_ready(h)) {
8571*4882a593Smuzhiyun 		hpsa_perform_rescan(h);
8572*4882a593Smuzhiyun 	} else if (h->discovery_polling) {
8573*4882a593Smuzhiyun 		if (hpsa_luns_changed(h)) {
8574*4882a593Smuzhiyun 			dev_info(&h->pdev->dev,
8575*4882a593Smuzhiyun 				"driver discovery polling rescan.\n");
8576*4882a593Smuzhiyun 			hpsa_perform_rescan(h);
8577*4882a593Smuzhiyun 		}
8578*4882a593Smuzhiyun 	}
8579*4882a593Smuzhiyun 	spin_lock_irqsave(&h->lock, flags);
8580*4882a593Smuzhiyun 	if (!h->remove_in_progress)
8581*4882a593Smuzhiyun 		queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8582*4882a593Smuzhiyun 				h->heartbeat_sample_interval);
8583*4882a593Smuzhiyun 	spin_unlock_irqrestore(&h->lock, flags);
8584*4882a593Smuzhiyun }
8585*4882a593Smuzhiyun 
hpsa_monitor_ctlr_worker(struct work_struct * work)8586*4882a593Smuzhiyun static void hpsa_monitor_ctlr_worker(struct work_struct *work)
8587*4882a593Smuzhiyun {
8588*4882a593Smuzhiyun 	unsigned long flags;
8589*4882a593Smuzhiyun 	struct ctlr_info *h = container_of(to_delayed_work(work),
8590*4882a593Smuzhiyun 					struct ctlr_info, monitor_ctlr_work);
8591*4882a593Smuzhiyun 
8592*4882a593Smuzhiyun 	detect_controller_lockup(h);
8593*4882a593Smuzhiyun 	if (lockup_detected(h))
8594*4882a593Smuzhiyun 		return;
8595*4882a593Smuzhiyun 
8596*4882a593Smuzhiyun 	spin_lock_irqsave(&h->lock, flags);
8597*4882a593Smuzhiyun 	if (!h->remove_in_progress)
8598*4882a593Smuzhiyun 		queue_delayed_work(h->monitor_ctlr_wq, &h->monitor_ctlr_work,
8599*4882a593Smuzhiyun 				h->heartbeat_sample_interval);
8600*4882a593Smuzhiyun 	spin_unlock_irqrestore(&h->lock, flags);
8601*4882a593Smuzhiyun }
8602*4882a593Smuzhiyun 
hpsa_create_controller_wq(struct ctlr_info * h,char * name)8603*4882a593Smuzhiyun static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
8604*4882a593Smuzhiyun 						char *name)
8605*4882a593Smuzhiyun {
8606*4882a593Smuzhiyun 	struct workqueue_struct *wq = NULL;
8607*4882a593Smuzhiyun 
8608*4882a593Smuzhiyun 	wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
8609*4882a593Smuzhiyun 	if (!wq)
8610*4882a593Smuzhiyun 		dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
8611*4882a593Smuzhiyun 
8612*4882a593Smuzhiyun 	return wq;
8613*4882a593Smuzhiyun }
8614*4882a593Smuzhiyun 
hpda_free_ctlr_info(struct ctlr_info * h)8615*4882a593Smuzhiyun static void hpda_free_ctlr_info(struct ctlr_info *h)
8616*4882a593Smuzhiyun {
8617*4882a593Smuzhiyun 	kfree(h->reply_map);
8618*4882a593Smuzhiyun 	kfree(h);
8619*4882a593Smuzhiyun }
8620*4882a593Smuzhiyun 
hpda_alloc_ctlr_info(void)8621*4882a593Smuzhiyun static struct ctlr_info *hpda_alloc_ctlr_info(void)
8622*4882a593Smuzhiyun {
8623*4882a593Smuzhiyun 	struct ctlr_info *h;
8624*4882a593Smuzhiyun 
8625*4882a593Smuzhiyun 	h = kzalloc(sizeof(*h), GFP_KERNEL);
8626*4882a593Smuzhiyun 	if (!h)
8627*4882a593Smuzhiyun 		return NULL;
8628*4882a593Smuzhiyun 
8629*4882a593Smuzhiyun 	h->reply_map = kcalloc(nr_cpu_ids, sizeof(*h->reply_map), GFP_KERNEL);
8630*4882a593Smuzhiyun 	if (!h->reply_map) {
8631*4882a593Smuzhiyun 		kfree(h);
8632*4882a593Smuzhiyun 		return NULL;
8633*4882a593Smuzhiyun 	}
8634*4882a593Smuzhiyun 	return h;
8635*4882a593Smuzhiyun }
8636*4882a593Smuzhiyun 
hpsa_init_one(struct pci_dev * pdev,const struct pci_device_id * ent)8637*4882a593Smuzhiyun static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
8638*4882a593Smuzhiyun {
8639*4882a593Smuzhiyun 	int dac, rc;
8640*4882a593Smuzhiyun 	struct ctlr_info *h;
8641*4882a593Smuzhiyun 	int try_soft_reset = 0;
8642*4882a593Smuzhiyun 	unsigned long flags;
8643*4882a593Smuzhiyun 	u32 board_id;
8644*4882a593Smuzhiyun 
8645*4882a593Smuzhiyun 	if (number_of_controllers == 0)
8646*4882a593Smuzhiyun 		printk(KERN_INFO DRIVER_NAME "\n");
8647*4882a593Smuzhiyun 
8648*4882a593Smuzhiyun 	rc = hpsa_lookup_board_id(pdev, &board_id, NULL);
8649*4882a593Smuzhiyun 	if (rc < 0) {
8650*4882a593Smuzhiyun 		dev_warn(&pdev->dev, "Board ID not found\n");
8651*4882a593Smuzhiyun 		return rc;
8652*4882a593Smuzhiyun 	}
8653*4882a593Smuzhiyun 
8654*4882a593Smuzhiyun 	rc = hpsa_init_reset_devices(pdev, board_id);
8655*4882a593Smuzhiyun 	if (rc) {
8656*4882a593Smuzhiyun 		if (rc != -ENOTSUPP)
8657*4882a593Smuzhiyun 			return rc;
8658*4882a593Smuzhiyun 		/* If the reset fails in a particular way (it has no way to do
8659*4882a593Smuzhiyun 		 * a proper hard reset, so returns -ENOTSUPP) we can try to do
8660*4882a593Smuzhiyun 		 * a soft reset once we get the controller configured up to the
8661*4882a593Smuzhiyun 		 * point that it can accept a command.
8662*4882a593Smuzhiyun 		 */
8663*4882a593Smuzhiyun 		try_soft_reset = 1;
8664*4882a593Smuzhiyun 		rc = 0;
8665*4882a593Smuzhiyun 	}
8666*4882a593Smuzhiyun 
8667*4882a593Smuzhiyun reinit_after_soft_reset:
8668*4882a593Smuzhiyun 
8669*4882a593Smuzhiyun 	/* Command structures must be aligned on a 32-byte boundary because
8670*4882a593Smuzhiyun 	 * the 5 lower bits of the address are used by the hardware. and by
8671*4882a593Smuzhiyun 	 * the driver.  See comments in hpsa.h for more info.
8672*4882a593Smuzhiyun 	 */
8673*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
8674*4882a593Smuzhiyun 	h = hpda_alloc_ctlr_info();
8675*4882a593Smuzhiyun 	if (!h) {
8676*4882a593Smuzhiyun 		dev_err(&pdev->dev, "Failed to allocate controller head\n");
8677*4882a593Smuzhiyun 		return -ENOMEM;
8678*4882a593Smuzhiyun 	}
8679*4882a593Smuzhiyun 
8680*4882a593Smuzhiyun 	h->pdev = pdev;
8681*4882a593Smuzhiyun 
8682*4882a593Smuzhiyun 	h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
8683*4882a593Smuzhiyun 	INIT_LIST_HEAD(&h->offline_device_list);
8684*4882a593Smuzhiyun 	spin_lock_init(&h->lock);
8685*4882a593Smuzhiyun 	spin_lock_init(&h->offline_device_lock);
8686*4882a593Smuzhiyun 	spin_lock_init(&h->scan_lock);
8687*4882a593Smuzhiyun 	spin_lock_init(&h->reset_lock);
8688*4882a593Smuzhiyun 	atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
8689*4882a593Smuzhiyun 
8690*4882a593Smuzhiyun 	/* Allocate and clear per-cpu variable lockup_detected */
8691*4882a593Smuzhiyun 	h->lockup_detected = alloc_percpu(u32);
8692*4882a593Smuzhiyun 	if (!h->lockup_detected) {
8693*4882a593Smuzhiyun 		dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
8694*4882a593Smuzhiyun 		rc = -ENOMEM;
8695*4882a593Smuzhiyun 		goto clean1;	/* aer/h */
8696*4882a593Smuzhiyun 	}
8697*4882a593Smuzhiyun 	set_lockup_detected_for_all_cpus(h, 0);
8698*4882a593Smuzhiyun 
8699*4882a593Smuzhiyun 	rc = hpsa_pci_init(h);
8700*4882a593Smuzhiyun 	if (rc)
8701*4882a593Smuzhiyun 		goto clean2;	/* lu, aer/h */
8702*4882a593Smuzhiyun 
8703*4882a593Smuzhiyun 	/* relies on h-> settings made by hpsa_pci_init, including
8704*4882a593Smuzhiyun 	 * interrupt_mode h->intr */
8705*4882a593Smuzhiyun 	rc = hpsa_scsi_host_alloc(h);
8706*4882a593Smuzhiyun 	if (rc)
8707*4882a593Smuzhiyun 		goto clean2_5;	/* pci, lu, aer/h */
8708*4882a593Smuzhiyun 
8709*4882a593Smuzhiyun 	sprintf(h->devname, HPSA "%d", h->scsi_host->host_no);
8710*4882a593Smuzhiyun 	h->ctlr = number_of_controllers;
8711*4882a593Smuzhiyun 	number_of_controllers++;
8712*4882a593Smuzhiyun 
8713*4882a593Smuzhiyun 	/* configure PCI DMA stuff */
8714*4882a593Smuzhiyun 	rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
8715*4882a593Smuzhiyun 	if (rc == 0) {
8716*4882a593Smuzhiyun 		dac = 1;
8717*4882a593Smuzhiyun 	} else {
8718*4882a593Smuzhiyun 		rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
8719*4882a593Smuzhiyun 		if (rc == 0) {
8720*4882a593Smuzhiyun 			dac = 0;
8721*4882a593Smuzhiyun 		} else {
8722*4882a593Smuzhiyun 			dev_err(&pdev->dev, "no suitable DMA available\n");
8723*4882a593Smuzhiyun 			goto clean3;	/* shost, pci, lu, aer/h */
8724*4882a593Smuzhiyun 		}
8725*4882a593Smuzhiyun 	}
8726*4882a593Smuzhiyun 
8727*4882a593Smuzhiyun 	/* make sure the board interrupts are off */
8728*4882a593Smuzhiyun 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
8729*4882a593Smuzhiyun 
8730*4882a593Smuzhiyun 	rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
8731*4882a593Smuzhiyun 	if (rc)
8732*4882a593Smuzhiyun 		goto clean3;	/* shost, pci, lu, aer/h */
8733*4882a593Smuzhiyun 	rc = hpsa_alloc_cmd_pool(h);
8734*4882a593Smuzhiyun 	if (rc)
8735*4882a593Smuzhiyun 		goto clean4;	/* irq, shost, pci, lu, aer/h */
8736*4882a593Smuzhiyun 	rc = hpsa_alloc_sg_chain_blocks(h);
8737*4882a593Smuzhiyun 	if (rc)
8738*4882a593Smuzhiyun 		goto clean5;	/* cmd, irq, shost, pci, lu, aer/h */
8739*4882a593Smuzhiyun 	init_waitqueue_head(&h->scan_wait_queue);
8740*4882a593Smuzhiyun 	init_waitqueue_head(&h->event_sync_wait_queue);
8741*4882a593Smuzhiyun 	mutex_init(&h->reset_mutex);
8742*4882a593Smuzhiyun 	h->scan_finished = 1; /* no scan currently in progress */
8743*4882a593Smuzhiyun 	h->scan_waiting = 0;
8744*4882a593Smuzhiyun 
8745*4882a593Smuzhiyun 	pci_set_drvdata(pdev, h);
8746*4882a593Smuzhiyun 	h->ndevices = 0;
8747*4882a593Smuzhiyun 
8748*4882a593Smuzhiyun 	spin_lock_init(&h->devlock);
8749*4882a593Smuzhiyun 	rc = hpsa_put_ctlr_into_performant_mode(h);
8750*4882a593Smuzhiyun 	if (rc)
8751*4882a593Smuzhiyun 		goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */
8752*4882a593Smuzhiyun 
8753*4882a593Smuzhiyun 	/* create the resubmit workqueue */
8754*4882a593Smuzhiyun 	h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
8755*4882a593Smuzhiyun 	if (!h->rescan_ctlr_wq) {
8756*4882a593Smuzhiyun 		rc = -ENOMEM;
8757*4882a593Smuzhiyun 		goto clean7;
8758*4882a593Smuzhiyun 	}
8759*4882a593Smuzhiyun 
8760*4882a593Smuzhiyun 	h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
8761*4882a593Smuzhiyun 	if (!h->resubmit_wq) {
8762*4882a593Smuzhiyun 		rc = -ENOMEM;
8763*4882a593Smuzhiyun 		goto clean7;	/* aer/h */
8764*4882a593Smuzhiyun 	}
8765*4882a593Smuzhiyun 
8766*4882a593Smuzhiyun 	h->monitor_ctlr_wq = hpsa_create_controller_wq(h, "monitor");
8767*4882a593Smuzhiyun 	if (!h->monitor_ctlr_wq) {
8768*4882a593Smuzhiyun 		rc = -ENOMEM;
8769*4882a593Smuzhiyun 		goto clean7;
8770*4882a593Smuzhiyun 	}
8771*4882a593Smuzhiyun 
8772*4882a593Smuzhiyun 	/*
8773*4882a593Smuzhiyun 	 * At this point, the controller is ready to take commands.
8774*4882a593Smuzhiyun 	 * Now, if reset_devices and the hard reset didn't work, try
8775*4882a593Smuzhiyun 	 * the soft reset and see if that works.
8776*4882a593Smuzhiyun 	 */
8777*4882a593Smuzhiyun 	if (try_soft_reset) {
8778*4882a593Smuzhiyun 
8779*4882a593Smuzhiyun 		/* This is kind of gross.  We may or may not get a completion
8780*4882a593Smuzhiyun 		 * from the soft reset command, and if we do, then the value
8781*4882a593Smuzhiyun 		 * from the fifo may or may not be valid.  So, we wait 10 secs
8782*4882a593Smuzhiyun 		 * after the reset throwing away any completions we get during
8783*4882a593Smuzhiyun 		 * that time.  Unregister the interrupt handler and register
8784*4882a593Smuzhiyun 		 * fake ones to scoop up any residual completions.
8785*4882a593Smuzhiyun 		 */
8786*4882a593Smuzhiyun 		spin_lock_irqsave(&h->lock, flags);
8787*4882a593Smuzhiyun 		h->access.set_intr_mask(h, HPSA_INTR_OFF);
8788*4882a593Smuzhiyun 		spin_unlock_irqrestore(&h->lock, flags);
8789*4882a593Smuzhiyun 		hpsa_free_irqs(h);
8790*4882a593Smuzhiyun 		rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
8791*4882a593Smuzhiyun 					hpsa_intx_discard_completions);
8792*4882a593Smuzhiyun 		if (rc) {
8793*4882a593Smuzhiyun 			dev_warn(&h->pdev->dev,
8794*4882a593Smuzhiyun 				"Failed to request_irq after soft reset.\n");
8795*4882a593Smuzhiyun 			/*
8796*4882a593Smuzhiyun 			 * cannot goto clean7 or free_irqs will be called
8797*4882a593Smuzhiyun 			 * again. Instead, do its work
8798*4882a593Smuzhiyun 			 */
8799*4882a593Smuzhiyun 			hpsa_free_performant_mode(h);	/* clean7 */
8800*4882a593Smuzhiyun 			hpsa_free_sg_chain_blocks(h);	/* clean6 */
8801*4882a593Smuzhiyun 			hpsa_free_cmd_pool(h);		/* clean5 */
8802*4882a593Smuzhiyun 			/*
8803*4882a593Smuzhiyun 			 * skip hpsa_free_irqs(h) clean4 since that
8804*4882a593Smuzhiyun 			 * was just called before request_irqs failed
8805*4882a593Smuzhiyun 			 */
8806*4882a593Smuzhiyun 			goto clean3;
8807*4882a593Smuzhiyun 		}
8808*4882a593Smuzhiyun 
8809*4882a593Smuzhiyun 		rc = hpsa_kdump_soft_reset(h);
8810*4882a593Smuzhiyun 		if (rc)
8811*4882a593Smuzhiyun 			/* Neither hard nor soft reset worked, we're hosed. */
8812*4882a593Smuzhiyun 			goto clean7;
8813*4882a593Smuzhiyun 
8814*4882a593Smuzhiyun 		dev_info(&h->pdev->dev, "Board READY.\n");
8815*4882a593Smuzhiyun 		dev_info(&h->pdev->dev,
8816*4882a593Smuzhiyun 			"Waiting for stale completions to drain.\n");
8817*4882a593Smuzhiyun 		h->access.set_intr_mask(h, HPSA_INTR_ON);
8818*4882a593Smuzhiyun 		msleep(10000);
8819*4882a593Smuzhiyun 		h->access.set_intr_mask(h, HPSA_INTR_OFF);
8820*4882a593Smuzhiyun 
8821*4882a593Smuzhiyun 		rc = controller_reset_failed(h->cfgtable);
8822*4882a593Smuzhiyun 		if (rc)
8823*4882a593Smuzhiyun 			dev_info(&h->pdev->dev,
8824*4882a593Smuzhiyun 				"Soft reset appears to have failed.\n");
8825*4882a593Smuzhiyun 
8826*4882a593Smuzhiyun 		/* since the controller's reset, we have to go back and re-init
8827*4882a593Smuzhiyun 		 * everything.  Easiest to just forget what we've done and do it
8828*4882a593Smuzhiyun 		 * all over again.
8829*4882a593Smuzhiyun 		 */
8830*4882a593Smuzhiyun 		hpsa_undo_allocations_after_kdump_soft_reset(h);
8831*4882a593Smuzhiyun 		try_soft_reset = 0;
8832*4882a593Smuzhiyun 		if (rc)
8833*4882a593Smuzhiyun 			/* don't goto clean, we already unallocated */
8834*4882a593Smuzhiyun 			return -ENODEV;
8835*4882a593Smuzhiyun 
8836*4882a593Smuzhiyun 		goto reinit_after_soft_reset;
8837*4882a593Smuzhiyun 	}
8838*4882a593Smuzhiyun 
8839*4882a593Smuzhiyun 	/* Enable Accelerated IO path at driver layer */
8840*4882a593Smuzhiyun 	h->acciopath_status = 1;
8841*4882a593Smuzhiyun 	/* Disable discovery polling.*/
8842*4882a593Smuzhiyun 	h->discovery_polling = 0;
8843*4882a593Smuzhiyun 
8844*4882a593Smuzhiyun 
8845*4882a593Smuzhiyun 	/* Turn the interrupts on so we can service requests */
8846*4882a593Smuzhiyun 	h->access.set_intr_mask(h, HPSA_INTR_ON);
8847*4882a593Smuzhiyun 
8848*4882a593Smuzhiyun 	hpsa_hba_inquiry(h);
8849*4882a593Smuzhiyun 
8850*4882a593Smuzhiyun 	h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL);
8851*4882a593Smuzhiyun 	if (!h->lastlogicals)
8852*4882a593Smuzhiyun 		dev_info(&h->pdev->dev,
8853*4882a593Smuzhiyun 			"Can't track change to report lun data\n");
8854*4882a593Smuzhiyun 
8855*4882a593Smuzhiyun 	/* hook into SCSI subsystem */
8856*4882a593Smuzhiyun 	rc = hpsa_scsi_add_host(h);
8857*4882a593Smuzhiyun 	if (rc)
8858*4882a593Smuzhiyun 		goto clean8; /* lastlogicals, perf, sg, cmd, irq, shost, pci, lu, aer/h */
8859*4882a593Smuzhiyun 
8860*4882a593Smuzhiyun 	/* Monitor the controller for firmware lockups */
8861*4882a593Smuzhiyun 	h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
8862*4882a593Smuzhiyun 	INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
8863*4882a593Smuzhiyun 	schedule_delayed_work(&h->monitor_ctlr_work,
8864*4882a593Smuzhiyun 				h->heartbeat_sample_interval);
8865*4882a593Smuzhiyun 	INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
8866*4882a593Smuzhiyun 	queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8867*4882a593Smuzhiyun 				h->heartbeat_sample_interval);
8868*4882a593Smuzhiyun 	INIT_DELAYED_WORK(&h->event_monitor_work, hpsa_event_monitor_worker);
8869*4882a593Smuzhiyun 	schedule_delayed_work(&h->event_monitor_work,
8870*4882a593Smuzhiyun 				HPSA_EVENT_MONITOR_INTERVAL);
8871*4882a593Smuzhiyun 	return 0;
8872*4882a593Smuzhiyun 
8873*4882a593Smuzhiyun clean8: /* lastlogicals, perf, sg, cmd, irq, shost, pci, lu, aer/h */
8874*4882a593Smuzhiyun 	kfree(h->lastlogicals);
8875*4882a593Smuzhiyun clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8876*4882a593Smuzhiyun 	hpsa_free_performant_mode(h);
8877*4882a593Smuzhiyun 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
8878*4882a593Smuzhiyun clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */
8879*4882a593Smuzhiyun 	hpsa_free_sg_chain_blocks(h);
8880*4882a593Smuzhiyun clean5: /* cmd, irq, shost, pci, lu, aer/h */
8881*4882a593Smuzhiyun 	hpsa_free_cmd_pool(h);
8882*4882a593Smuzhiyun clean4: /* irq, shost, pci, lu, aer/h */
8883*4882a593Smuzhiyun 	hpsa_free_irqs(h);
8884*4882a593Smuzhiyun clean3: /* shost, pci, lu, aer/h */
8885*4882a593Smuzhiyun 	scsi_host_put(h->scsi_host);
8886*4882a593Smuzhiyun 	h->scsi_host = NULL;
8887*4882a593Smuzhiyun clean2_5: /* pci, lu, aer/h */
8888*4882a593Smuzhiyun 	hpsa_free_pci_init(h);
8889*4882a593Smuzhiyun clean2: /* lu, aer/h */
8890*4882a593Smuzhiyun 	if (h->lockup_detected) {
8891*4882a593Smuzhiyun 		free_percpu(h->lockup_detected);
8892*4882a593Smuzhiyun 		h->lockup_detected = NULL;
8893*4882a593Smuzhiyun 	}
8894*4882a593Smuzhiyun clean1:	/* wq/aer/h */
8895*4882a593Smuzhiyun 	if (h->resubmit_wq) {
8896*4882a593Smuzhiyun 		destroy_workqueue(h->resubmit_wq);
8897*4882a593Smuzhiyun 		h->resubmit_wq = NULL;
8898*4882a593Smuzhiyun 	}
8899*4882a593Smuzhiyun 	if (h->rescan_ctlr_wq) {
8900*4882a593Smuzhiyun 		destroy_workqueue(h->rescan_ctlr_wq);
8901*4882a593Smuzhiyun 		h->rescan_ctlr_wq = NULL;
8902*4882a593Smuzhiyun 	}
8903*4882a593Smuzhiyun 	if (h->monitor_ctlr_wq) {
8904*4882a593Smuzhiyun 		destroy_workqueue(h->monitor_ctlr_wq);
8905*4882a593Smuzhiyun 		h->monitor_ctlr_wq = NULL;
8906*4882a593Smuzhiyun 	}
8907*4882a593Smuzhiyun 	kfree(h);
8908*4882a593Smuzhiyun 	return rc;
8909*4882a593Smuzhiyun }
8910*4882a593Smuzhiyun 
hpsa_flush_cache(struct ctlr_info * h)8911*4882a593Smuzhiyun static void hpsa_flush_cache(struct ctlr_info *h)
8912*4882a593Smuzhiyun {
8913*4882a593Smuzhiyun 	char *flush_buf;
8914*4882a593Smuzhiyun 	struct CommandList *c;
8915*4882a593Smuzhiyun 	int rc;
8916*4882a593Smuzhiyun 
8917*4882a593Smuzhiyun 	if (unlikely(lockup_detected(h)))
8918*4882a593Smuzhiyun 		return;
8919*4882a593Smuzhiyun 	flush_buf = kzalloc(4, GFP_KERNEL);
8920*4882a593Smuzhiyun 	if (!flush_buf)
8921*4882a593Smuzhiyun 		return;
8922*4882a593Smuzhiyun 
8923*4882a593Smuzhiyun 	c = cmd_alloc(h);
8924*4882a593Smuzhiyun 
8925*4882a593Smuzhiyun 	if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
8926*4882a593Smuzhiyun 		RAID_CTLR_LUNID, TYPE_CMD)) {
8927*4882a593Smuzhiyun 		goto out;
8928*4882a593Smuzhiyun 	}
8929*4882a593Smuzhiyun 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE,
8930*4882a593Smuzhiyun 			DEFAULT_TIMEOUT);
8931*4882a593Smuzhiyun 	if (rc)
8932*4882a593Smuzhiyun 		goto out;
8933*4882a593Smuzhiyun 	if (c->err_info->CommandStatus != 0)
8934*4882a593Smuzhiyun out:
8935*4882a593Smuzhiyun 		dev_warn(&h->pdev->dev,
8936*4882a593Smuzhiyun 			"error flushing cache on controller\n");
8937*4882a593Smuzhiyun 	cmd_free(h, c);
8938*4882a593Smuzhiyun 	kfree(flush_buf);
8939*4882a593Smuzhiyun }
8940*4882a593Smuzhiyun 
8941*4882a593Smuzhiyun /* Make controller gather fresh report lun data each time we
8942*4882a593Smuzhiyun  * send down a report luns request
8943*4882a593Smuzhiyun  */
hpsa_disable_rld_caching(struct ctlr_info * h)8944*4882a593Smuzhiyun static void hpsa_disable_rld_caching(struct ctlr_info *h)
8945*4882a593Smuzhiyun {
8946*4882a593Smuzhiyun 	u32 *options;
8947*4882a593Smuzhiyun 	struct CommandList *c;
8948*4882a593Smuzhiyun 	int rc;
8949*4882a593Smuzhiyun 
8950*4882a593Smuzhiyun 	/* Don't bother trying to set diag options if locked up */
8951*4882a593Smuzhiyun 	if (unlikely(h->lockup_detected))
8952*4882a593Smuzhiyun 		return;
8953*4882a593Smuzhiyun 
8954*4882a593Smuzhiyun 	options = kzalloc(sizeof(*options), GFP_KERNEL);
8955*4882a593Smuzhiyun 	if (!options)
8956*4882a593Smuzhiyun 		return;
8957*4882a593Smuzhiyun 
8958*4882a593Smuzhiyun 	c = cmd_alloc(h);
8959*4882a593Smuzhiyun 
8960*4882a593Smuzhiyun 	/* first, get the current diag options settings */
8961*4882a593Smuzhiyun 	if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8962*4882a593Smuzhiyun 		RAID_CTLR_LUNID, TYPE_CMD))
8963*4882a593Smuzhiyun 		goto errout;
8964*4882a593Smuzhiyun 
8965*4882a593Smuzhiyun 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
8966*4882a593Smuzhiyun 			NO_TIMEOUT);
8967*4882a593Smuzhiyun 	if ((rc != 0) || (c->err_info->CommandStatus != 0))
8968*4882a593Smuzhiyun 		goto errout;
8969*4882a593Smuzhiyun 
8970*4882a593Smuzhiyun 	/* Now, set the bit for disabling the RLD caching */
8971*4882a593Smuzhiyun 	*options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING;
8972*4882a593Smuzhiyun 
8973*4882a593Smuzhiyun 	if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0,
8974*4882a593Smuzhiyun 		RAID_CTLR_LUNID, TYPE_CMD))
8975*4882a593Smuzhiyun 		goto errout;
8976*4882a593Smuzhiyun 
8977*4882a593Smuzhiyun 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE,
8978*4882a593Smuzhiyun 			NO_TIMEOUT);
8979*4882a593Smuzhiyun 	if ((rc != 0)  || (c->err_info->CommandStatus != 0))
8980*4882a593Smuzhiyun 		goto errout;
8981*4882a593Smuzhiyun 
8982*4882a593Smuzhiyun 	/* Now verify that it got set: */
8983*4882a593Smuzhiyun 	if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8984*4882a593Smuzhiyun 		RAID_CTLR_LUNID, TYPE_CMD))
8985*4882a593Smuzhiyun 		goto errout;
8986*4882a593Smuzhiyun 
8987*4882a593Smuzhiyun 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
8988*4882a593Smuzhiyun 			NO_TIMEOUT);
8989*4882a593Smuzhiyun 	if ((rc != 0)  || (c->err_info->CommandStatus != 0))
8990*4882a593Smuzhiyun 		goto errout;
8991*4882a593Smuzhiyun 
8992*4882a593Smuzhiyun 	if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING)
8993*4882a593Smuzhiyun 		goto out;
8994*4882a593Smuzhiyun 
8995*4882a593Smuzhiyun errout:
8996*4882a593Smuzhiyun 	dev_err(&h->pdev->dev,
8997*4882a593Smuzhiyun 			"Error: failed to disable report lun data caching.\n");
8998*4882a593Smuzhiyun out:
8999*4882a593Smuzhiyun 	cmd_free(h, c);
9000*4882a593Smuzhiyun 	kfree(options);
9001*4882a593Smuzhiyun }
9002*4882a593Smuzhiyun 
__hpsa_shutdown(struct pci_dev * pdev)9003*4882a593Smuzhiyun static void __hpsa_shutdown(struct pci_dev *pdev)
9004*4882a593Smuzhiyun {
9005*4882a593Smuzhiyun 	struct ctlr_info *h;
9006*4882a593Smuzhiyun 
9007*4882a593Smuzhiyun 	h = pci_get_drvdata(pdev);
9008*4882a593Smuzhiyun 	/* Turn board interrupts off  and send the flush cache command
9009*4882a593Smuzhiyun 	 * sendcmd will turn off interrupt, and send the flush...
9010*4882a593Smuzhiyun 	 * To write all data in the battery backed cache to disks
9011*4882a593Smuzhiyun 	 */
9012*4882a593Smuzhiyun 	hpsa_flush_cache(h);
9013*4882a593Smuzhiyun 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
9014*4882a593Smuzhiyun 	hpsa_free_irqs(h);			/* init_one 4 */
9015*4882a593Smuzhiyun 	hpsa_disable_interrupt_mode(h);		/* pci_init 2 */
9016*4882a593Smuzhiyun }
9017*4882a593Smuzhiyun 
hpsa_shutdown(struct pci_dev * pdev)9018*4882a593Smuzhiyun static void hpsa_shutdown(struct pci_dev *pdev)
9019*4882a593Smuzhiyun {
9020*4882a593Smuzhiyun 	__hpsa_shutdown(pdev);
9021*4882a593Smuzhiyun 	pci_disable_device(pdev);
9022*4882a593Smuzhiyun }
9023*4882a593Smuzhiyun 
hpsa_free_device_info(struct ctlr_info * h)9024*4882a593Smuzhiyun static void hpsa_free_device_info(struct ctlr_info *h)
9025*4882a593Smuzhiyun {
9026*4882a593Smuzhiyun 	int i;
9027*4882a593Smuzhiyun 
9028*4882a593Smuzhiyun 	for (i = 0; i < h->ndevices; i++) {
9029*4882a593Smuzhiyun 		kfree(h->dev[i]);
9030*4882a593Smuzhiyun 		h->dev[i] = NULL;
9031*4882a593Smuzhiyun 	}
9032*4882a593Smuzhiyun }
9033*4882a593Smuzhiyun 
hpsa_remove_one(struct pci_dev * pdev)9034*4882a593Smuzhiyun static void hpsa_remove_one(struct pci_dev *pdev)
9035*4882a593Smuzhiyun {
9036*4882a593Smuzhiyun 	struct ctlr_info *h;
9037*4882a593Smuzhiyun 	unsigned long flags;
9038*4882a593Smuzhiyun 
9039*4882a593Smuzhiyun 	if (pci_get_drvdata(pdev) == NULL) {
9040*4882a593Smuzhiyun 		dev_err(&pdev->dev, "unable to remove device\n");
9041*4882a593Smuzhiyun 		return;
9042*4882a593Smuzhiyun 	}
9043*4882a593Smuzhiyun 	h = pci_get_drvdata(pdev);
9044*4882a593Smuzhiyun 
9045*4882a593Smuzhiyun 	/* Get rid of any controller monitoring work items */
9046*4882a593Smuzhiyun 	spin_lock_irqsave(&h->lock, flags);
9047*4882a593Smuzhiyun 	h->remove_in_progress = 1;
9048*4882a593Smuzhiyun 	spin_unlock_irqrestore(&h->lock, flags);
9049*4882a593Smuzhiyun 	cancel_delayed_work_sync(&h->monitor_ctlr_work);
9050*4882a593Smuzhiyun 	cancel_delayed_work_sync(&h->rescan_ctlr_work);
9051*4882a593Smuzhiyun 	cancel_delayed_work_sync(&h->event_monitor_work);
9052*4882a593Smuzhiyun 	destroy_workqueue(h->rescan_ctlr_wq);
9053*4882a593Smuzhiyun 	destroy_workqueue(h->resubmit_wq);
9054*4882a593Smuzhiyun 	destroy_workqueue(h->monitor_ctlr_wq);
9055*4882a593Smuzhiyun 
9056*4882a593Smuzhiyun 	hpsa_delete_sas_host(h);
9057*4882a593Smuzhiyun 
9058*4882a593Smuzhiyun 	/*
9059*4882a593Smuzhiyun 	 * Call before disabling interrupts.
9060*4882a593Smuzhiyun 	 * scsi_remove_host can trigger I/O operations especially
9061*4882a593Smuzhiyun 	 * when multipath is enabled. There can be SYNCHRONIZE CACHE
9062*4882a593Smuzhiyun 	 * operations which cannot complete and will hang the system.
9063*4882a593Smuzhiyun 	 */
9064*4882a593Smuzhiyun 	if (h->scsi_host)
9065*4882a593Smuzhiyun 		scsi_remove_host(h->scsi_host);		/* init_one 8 */
9066*4882a593Smuzhiyun 	/* includes hpsa_free_irqs - init_one 4 */
9067*4882a593Smuzhiyun 	/* includes hpsa_disable_interrupt_mode - pci_init 2 */
9068*4882a593Smuzhiyun 	__hpsa_shutdown(pdev);
9069*4882a593Smuzhiyun 
9070*4882a593Smuzhiyun 	hpsa_free_device_info(h);		/* scan */
9071*4882a593Smuzhiyun 
9072*4882a593Smuzhiyun 	kfree(h->hba_inquiry_data);			/* init_one 10 */
9073*4882a593Smuzhiyun 	h->hba_inquiry_data = NULL;			/* init_one 10 */
9074*4882a593Smuzhiyun 	hpsa_free_ioaccel2_sg_chain_blocks(h);
9075*4882a593Smuzhiyun 	hpsa_free_performant_mode(h);			/* init_one 7 */
9076*4882a593Smuzhiyun 	hpsa_free_sg_chain_blocks(h);			/* init_one 6 */
9077*4882a593Smuzhiyun 	hpsa_free_cmd_pool(h);				/* init_one 5 */
9078*4882a593Smuzhiyun 	kfree(h->lastlogicals);
9079*4882a593Smuzhiyun 
9080*4882a593Smuzhiyun 	/* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */
9081*4882a593Smuzhiyun 
9082*4882a593Smuzhiyun 	scsi_host_put(h->scsi_host);			/* init_one 3 */
9083*4882a593Smuzhiyun 	h->scsi_host = NULL;				/* init_one 3 */
9084*4882a593Smuzhiyun 
9085*4882a593Smuzhiyun 	/* includes hpsa_disable_interrupt_mode - pci_init 2 */
9086*4882a593Smuzhiyun 	hpsa_free_pci_init(h);				/* init_one 2.5 */
9087*4882a593Smuzhiyun 
9088*4882a593Smuzhiyun 	free_percpu(h->lockup_detected);		/* init_one 2 */
9089*4882a593Smuzhiyun 	h->lockup_detected = NULL;			/* init_one 2 */
9090*4882a593Smuzhiyun 	/* (void) pci_disable_pcie_error_reporting(pdev); */	/* init_one 1 */
9091*4882a593Smuzhiyun 
9092*4882a593Smuzhiyun 	hpda_free_ctlr_info(h);				/* init_one 1 */
9093*4882a593Smuzhiyun }
9094*4882a593Smuzhiyun 
hpsa_suspend(struct pci_dev * pdev,pm_message_t state)9095*4882a593Smuzhiyun static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
9096*4882a593Smuzhiyun 	__attribute__((unused)) pm_message_t state)
9097*4882a593Smuzhiyun {
9098*4882a593Smuzhiyun 	return -ENOSYS;
9099*4882a593Smuzhiyun }
9100*4882a593Smuzhiyun 
hpsa_resume(struct pci_dev * pdev)9101*4882a593Smuzhiyun static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
9102*4882a593Smuzhiyun {
9103*4882a593Smuzhiyun 	return -ENOSYS;
9104*4882a593Smuzhiyun }
9105*4882a593Smuzhiyun 
9106*4882a593Smuzhiyun static struct pci_driver hpsa_pci_driver = {
9107*4882a593Smuzhiyun 	.name = HPSA,
9108*4882a593Smuzhiyun 	.probe = hpsa_init_one,
9109*4882a593Smuzhiyun 	.remove = hpsa_remove_one,
9110*4882a593Smuzhiyun 	.id_table = hpsa_pci_device_id,	/* id_table */
9111*4882a593Smuzhiyun 	.shutdown = hpsa_shutdown,
9112*4882a593Smuzhiyun 	.suspend = hpsa_suspend,
9113*4882a593Smuzhiyun 	.resume = hpsa_resume,
9114*4882a593Smuzhiyun };
9115*4882a593Smuzhiyun 
9116*4882a593Smuzhiyun /* Fill in bucket_map[], given nsgs (the max number of
9117*4882a593Smuzhiyun  * scatter gather elements supported) and bucket[],
9118*4882a593Smuzhiyun  * which is an array of 8 integers.  The bucket[] array
9119*4882a593Smuzhiyun  * contains 8 different DMA transfer sizes (in 16
9120*4882a593Smuzhiyun  * byte increments) which the controller uses to fetch
9121*4882a593Smuzhiyun  * commands.  This function fills in bucket_map[], which
9122*4882a593Smuzhiyun  * maps a given number of scatter gather elements to one of
9123*4882a593Smuzhiyun  * the 8 DMA transfer sizes.  The point of it is to allow the
9124*4882a593Smuzhiyun  * controller to only do as much DMA as needed to fetch the
9125*4882a593Smuzhiyun  * command, with the DMA transfer size encoded in the lower
9126*4882a593Smuzhiyun  * bits of the command address.
9127*4882a593Smuzhiyun  */
calc_bucket_map(int bucket[],int num_buckets,int nsgs,int min_blocks,u32 * bucket_map)9128*4882a593Smuzhiyun static void  calc_bucket_map(int bucket[], int num_buckets,
9129*4882a593Smuzhiyun 	int nsgs, int min_blocks, u32 *bucket_map)
9130*4882a593Smuzhiyun {
9131*4882a593Smuzhiyun 	int i, j, b, size;
9132*4882a593Smuzhiyun 
9133*4882a593Smuzhiyun 	/* Note, bucket_map must have nsgs+1 entries. */
9134*4882a593Smuzhiyun 	for (i = 0; i <= nsgs; i++) {
9135*4882a593Smuzhiyun 		/* Compute size of a command with i SG entries */
9136*4882a593Smuzhiyun 		size = i + min_blocks;
9137*4882a593Smuzhiyun 		b = num_buckets; /* Assume the biggest bucket */
9138*4882a593Smuzhiyun 		/* Find the bucket that is just big enough */
9139*4882a593Smuzhiyun 		for (j = 0; j < num_buckets; j++) {
9140*4882a593Smuzhiyun 			if (bucket[j] >= size) {
9141*4882a593Smuzhiyun 				b = j;
9142*4882a593Smuzhiyun 				break;
9143*4882a593Smuzhiyun 			}
9144*4882a593Smuzhiyun 		}
9145*4882a593Smuzhiyun 		/* for a command with i SG entries, use bucket b. */
9146*4882a593Smuzhiyun 		bucket_map[i] = b;
9147*4882a593Smuzhiyun 	}
9148*4882a593Smuzhiyun }
9149*4882a593Smuzhiyun 
9150*4882a593Smuzhiyun /*
9151*4882a593Smuzhiyun  * return -ENODEV on err, 0 on success (or no action)
9152*4882a593Smuzhiyun  * allocates numerous items that must be freed later
9153*4882a593Smuzhiyun  */
hpsa_enter_performant_mode(struct ctlr_info * h,u32 trans_support)9154*4882a593Smuzhiyun static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
9155*4882a593Smuzhiyun {
9156*4882a593Smuzhiyun 	int i;
9157*4882a593Smuzhiyun 	unsigned long register_value;
9158*4882a593Smuzhiyun 	unsigned long transMethod = CFGTBL_Trans_Performant |
9159*4882a593Smuzhiyun 			(trans_support & CFGTBL_Trans_use_short_tags) |
9160*4882a593Smuzhiyun 				CFGTBL_Trans_enable_directed_msix |
9161*4882a593Smuzhiyun 			(trans_support & (CFGTBL_Trans_io_accel1 |
9162*4882a593Smuzhiyun 				CFGTBL_Trans_io_accel2));
9163*4882a593Smuzhiyun 	struct access_method access = SA5_performant_access;
9164*4882a593Smuzhiyun 
9165*4882a593Smuzhiyun 	/* This is a bit complicated.  There are 8 registers on
9166*4882a593Smuzhiyun 	 * the controller which we write to to tell it 8 different
9167*4882a593Smuzhiyun 	 * sizes of commands which there may be.  It's a way of
9168*4882a593Smuzhiyun 	 * reducing the DMA done to fetch each command.  Encoded into
9169*4882a593Smuzhiyun 	 * each command's tag are 3 bits which communicate to the controller
9170*4882a593Smuzhiyun 	 * which of the eight sizes that command fits within.  The size of
9171*4882a593Smuzhiyun 	 * each command depends on how many scatter gather entries there are.
9172*4882a593Smuzhiyun 	 * Each SG entry requires 16 bytes.  The eight registers are programmed
9173*4882a593Smuzhiyun 	 * with the number of 16-byte blocks a command of that size requires.
9174*4882a593Smuzhiyun 	 * The smallest command possible requires 5 such 16 byte blocks.
9175*4882a593Smuzhiyun 	 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
9176*4882a593Smuzhiyun 	 * blocks.  Note, this only extends to the SG entries contained
9177*4882a593Smuzhiyun 	 * within the command block, and does not extend to chained blocks
9178*4882a593Smuzhiyun 	 * of SG elements.   bft[] contains the eight values we write to
9179*4882a593Smuzhiyun 	 * the registers.  They are not evenly distributed, but have more
9180*4882a593Smuzhiyun 	 * sizes for small commands, and fewer sizes for larger commands.
9181*4882a593Smuzhiyun 	 */
9182*4882a593Smuzhiyun 	int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
9183*4882a593Smuzhiyun #define MIN_IOACCEL2_BFT_ENTRY 5
9184*4882a593Smuzhiyun #define HPSA_IOACCEL2_HEADER_SZ 4
9185*4882a593Smuzhiyun 	int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
9186*4882a593Smuzhiyun 			13, 14, 15, 16, 17, 18, 19,
9187*4882a593Smuzhiyun 			HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
9188*4882a593Smuzhiyun 	BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
9189*4882a593Smuzhiyun 	BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
9190*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
9191*4882a593Smuzhiyun 				 16 * MIN_IOACCEL2_BFT_ENTRY);
9192*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
9193*4882a593Smuzhiyun 	BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
9194*4882a593Smuzhiyun 	/*  5 = 1 s/g entry or 4k
9195*4882a593Smuzhiyun 	 *  6 = 2 s/g entry or 8k
9196*4882a593Smuzhiyun 	 *  8 = 4 s/g entry or 16k
9197*4882a593Smuzhiyun 	 * 10 = 6 s/g entry or 24k
9198*4882a593Smuzhiyun 	 */
9199*4882a593Smuzhiyun 
9200*4882a593Smuzhiyun 	/* If the controller supports either ioaccel method then
9201*4882a593Smuzhiyun 	 * we can also use the RAID stack submit path that does not
9202*4882a593Smuzhiyun 	 * perform the superfluous readl() after each command submission.
9203*4882a593Smuzhiyun 	 */
9204*4882a593Smuzhiyun 	if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
9205*4882a593Smuzhiyun 		access = SA5_performant_access_no_read;
9206*4882a593Smuzhiyun 
9207*4882a593Smuzhiyun 	/* Controller spec: zero out this buffer. */
9208*4882a593Smuzhiyun 	for (i = 0; i < h->nreply_queues; i++)
9209*4882a593Smuzhiyun 		memset(h->reply_queue[i].head, 0, h->reply_queue_size);
9210*4882a593Smuzhiyun 
9211*4882a593Smuzhiyun 	bft[7] = SG_ENTRIES_IN_CMD + 4;
9212*4882a593Smuzhiyun 	calc_bucket_map(bft, ARRAY_SIZE(bft),
9213*4882a593Smuzhiyun 				SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
9214*4882a593Smuzhiyun 	for (i = 0; i < 8; i++)
9215*4882a593Smuzhiyun 		writel(bft[i], &h->transtable->BlockFetch[i]);
9216*4882a593Smuzhiyun 
9217*4882a593Smuzhiyun 	/* size of controller ring buffer */
9218*4882a593Smuzhiyun 	writel(h->max_commands, &h->transtable->RepQSize);
9219*4882a593Smuzhiyun 	writel(h->nreply_queues, &h->transtable->RepQCount);
9220*4882a593Smuzhiyun 	writel(0, &h->transtable->RepQCtrAddrLow32);
9221*4882a593Smuzhiyun 	writel(0, &h->transtable->RepQCtrAddrHigh32);
9222*4882a593Smuzhiyun 
9223*4882a593Smuzhiyun 	for (i = 0; i < h->nreply_queues; i++) {
9224*4882a593Smuzhiyun 		writel(0, &h->transtable->RepQAddr[i].upper);
9225*4882a593Smuzhiyun 		writel(h->reply_queue[i].busaddr,
9226*4882a593Smuzhiyun 			&h->transtable->RepQAddr[i].lower);
9227*4882a593Smuzhiyun 	}
9228*4882a593Smuzhiyun 
9229*4882a593Smuzhiyun 	writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
9230*4882a593Smuzhiyun 	writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
9231*4882a593Smuzhiyun 	/*
9232*4882a593Smuzhiyun 	 * enable outbound interrupt coalescing in accelerator mode;
9233*4882a593Smuzhiyun 	 */
9234*4882a593Smuzhiyun 	if (trans_support & CFGTBL_Trans_io_accel1) {
9235*4882a593Smuzhiyun 		access = SA5_ioaccel_mode1_access;
9236*4882a593Smuzhiyun 		writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
9237*4882a593Smuzhiyun 		writel(4, &h->cfgtable->HostWrite.CoalIntCount);
9238*4882a593Smuzhiyun 	} else
9239*4882a593Smuzhiyun 		if (trans_support & CFGTBL_Trans_io_accel2)
9240*4882a593Smuzhiyun 			access = SA5_ioaccel_mode2_access;
9241*4882a593Smuzhiyun 	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9242*4882a593Smuzhiyun 	if (hpsa_wait_for_mode_change_ack(h)) {
9243*4882a593Smuzhiyun 		dev_err(&h->pdev->dev,
9244*4882a593Smuzhiyun 			"performant mode problem - doorbell timeout\n");
9245*4882a593Smuzhiyun 		return -ENODEV;
9246*4882a593Smuzhiyun 	}
9247*4882a593Smuzhiyun 	register_value = readl(&(h->cfgtable->TransportActive));
9248*4882a593Smuzhiyun 	if (!(register_value & CFGTBL_Trans_Performant)) {
9249*4882a593Smuzhiyun 		dev_err(&h->pdev->dev,
9250*4882a593Smuzhiyun 			"performant mode problem - transport not active\n");
9251*4882a593Smuzhiyun 		return -ENODEV;
9252*4882a593Smuzhiyun 	}
9253*4882a593Smuzhiyun 	/* Change the access methods to the performant access methods */
9254*4882a593Smuzhiyun 	h->access = access;
9255*4882a593Smuzhiyun 	h->transMethod = transMethod;
9256*4882a593Smuzhiyun 
9257*4882a593Smuzhiyun 	if (!((trans_support & CFGTBL_Trans_io_accel1) ||
9258*4882a593Smuzhiyun 		(trans_support & CFGTBL_Trans_io_accel2)))
9259*4882a593Smuzhiyun 		return 0;
9260*4882a593Smuzhiyun 
9261*4882a593Smuzhiyun 	if (trans_support & CFGTBL_Trans_io_accel1) {
9262*4882a593Smuzhiyun 		/* Set up I/O accelerator mode */
9263*4882a593Smuzhiyun 		for (i = 0; i < h->nreply_queues; i++) {
9264*4882a593Smuzhiyun 			writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
9265*4882a593Smuzhiyun 			h->reply_queue[i].current_entry =
9266*4882a593Smuzhiyun 				readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
9267*4882a593Smuzhiyun 		}
9268*4882a593Smuzhiyun 		bft[7] = h->ioaccel_maxsg + 8;
9269*4882a593Smuzhiyun 		calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
9270*4882a593Smuzhiyun 				h->ioaccel1_blockFetchTable);
9271*4882a593Smuzhiyun 
9272*4882a593Smuzhiyun 		/* initialize all reply queue entries to unused */
9273*4882a593Smuzhiyun 		for (i = 0; i < h->nreply_queues; i++)
9274*4882a593Smuzhiyun 			memset(h->reply_queue[i].head,
9275*4882a593Smuzhiyun 				(u8) IOACCEL_MODE1_REPLY_UNUSED,
9276*4882a593Smuzhiyun 				h->reply_queue_size);
9277*4882a593Smuzhiyun 
9278*4882a593Smuzhiyun 		/* set all the constant fields in the accelerator command
9279*4882a593Smuzhiyun 		 * frames once at init time to save CPU cycles later.
9280*4882a593Smuzhiyun 		 */
9281*4882a593Smuzhiyun 		for (i = 0; i < h->nr_cmds; i++) {
9282*4882a593Smuzhiyun 			struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
9283*4882a593Smuzhiyun 
9284*4882a593Smuzhiyun 			cp->function = IOACCEL1_FUNCTION_SCSIIO;
9285*4882a593Smuzhiyun 			cp->err_info = (u32) (h->errinfo_pool_dhandle +
9286*4882a593Smuzhiyun 					(i * sizeof(struct ErrorInfo)));
9287*4882a593Smuzhiyun 			cp->err_info_len = sizeof(struct ErrorInfo);
9288*4882a593Smuzhiyun 			cp->sgl_offset = IOACCEL1_SGLOFFSET;
9289*4882a593Smuzhiyun 			cp->host_context_flags =
9290*4882a593Smuzhiyun 				cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
9291*4882a593Smuzhiyun 			cp->timeout_sec = 0;
9292*4882a593Smuzhiyun 			cp->ReplyQueue = 0;
9293*4882a593Smuzhiyun 			cp->tag =
9294*4882a593Smuzhiyun 				cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
9295*4882a593Smuzhiyun 			cp->host_addr =
9296*4882a593Smuzhiyun 				cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
9297*4882a593Smuzhiyun 					(i * sizeof(struct io_accel1_cmd)));
9298*4882a593Smuzhiyun 		}
9299*4882a593Smuzhiyun 	} else if (trans_support & CFGTBL_Trans_io_accel2) {
9300*4882a593Smuzhiyun 		u64 cfg_offset, cfg_base_addr_index;
9301*4882a593Smuzhiyun 		u32 bft2_offset, cfg_base_addr;
9302*4882a593Smuzhiyun 		int rc;
9303*4882a593Smuzhiyun 
9304*4882a593Smuzhiyun 		rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
9305*4882a593Smuzhiyun 			&cfg_base_addr_index, &cfg_offset);
9306*4882a593Smuzhiyun 		BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
9307*4882a593Smuzhiyun 		bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
9308*4882a593Smuzhiyun 		calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
9309*4882a593Smuzhiyun 				4, h->ioaccel2_blockFetchTable);
9310*4882a593Smuzhiyun 		bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
9311*4882a593Smuzhiyun 		BUILD_BUG_ON(offsetof(struct CfgTable,
9312*4882a593Smuzhiyun 				io_accel_request_size_offset) != 0xb8);
9313*4882a593Smuzhiyun 		h->ioaccel2_bft2_regs =
9314*4882a593Smuzhiyun 			remap_pci_mem(pci_resource_start(h->pdev,
9315*4882a593Smuzhiyun 					cfg_base_addr_index) +
9316*4882a593Smuzhiyun 					cfg_offset + bft2_offset,
9317*4882a593Smuzhiyun 					ARRAY_SIZE(bft2) *
9318*4882a593Smuzhiyun 					sizeof(*h->ioaccel2_bft2_regs));
9319*4882a593Smuzhiyun 		for (i = 0; i < ARRAY_SIZE(bft2); i++)
9320*4882a593Smuzhiyun 			writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
9321*4882a593Smuzhiyun 	}
9322*4882a593Smuzhiyun 	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9323*4882a593Smuzhiyun 	if (hpsa_wait_for_mode_change_ack(h)) {
9324*4882a593Smuzhiyun 		dev_err(&h->pdev->dev,
9325*4882a593Smuzhiyun 			"performant mode problem - enabling ioaccel mode\n");
9326*4882a593Smuzhiyun 		return -ENODEV;
9327*4882a593Smuzhiyun 	}
9328*4882a593Smuzhiyun 	return 0;
9329*4882a593Smuzhiyun }
9330*4882a593Smuzhiyun 
9331*4882a593Smuzhiyun /* Free ioaccel1 mode command blocks and block fetch table */
hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info * h)9332*4882a593Smuzhiyun static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9333*4882a593Smuzhiyun {
9334*4882a593Smuzhiyun 	if (h->ioaccel_cmd_pool) {
9335*4882a593Smuzhiyun 		dma_free_coherent(&h->pdev->dev,
9336*4882a593Smuzhiyun 				  h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9337*4882a593Smuzhiyun 				  h->ioaccel_cmd_pool,
9338*4882a593Smuzhiyun 				  h->ioaccel_cmd_pool_dhandle);
9339*4882a593Smuzhiyun 		h->ioaccel_cmd_pool = NULL;
9340*4882a593Smuzhiyun 		h->ioaccel_cmd_pool_dhandle = 0;
9341*4882a593Smuzhiyun 	}
9342*4882a593Smuzhiyun 	kfree(h->ioaccel1_blockFetchTable);
9343*4882a593Smuzhiyun 	h->ioaccel1_blockFetchTable = NULL;
9344*4882a593Smuzhiyun }
9345*4882a593Smuzhiyun 
9346*4882a593Smuzhiyun /* Allocate ioaccel1 mode command blocks and block fetch table */
hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info * h)9347*4882a593Smuzhiyun static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9348*4882a593Smuzhiyun {
9349*4882a593Smuzhiyun 	h->ioaccel_maxsg =
9350*4882a593Smuzhiyun 		readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9351*4882a593Smuzhiyun 	if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
9352*4882a593Smuzhiyun 		h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
9353*4882a593Smuzhiyun 
9354*4882a593Smuzhiyun 	/* Command structures must be aligned on a 128-byte boundary
9355*4882a593Smuzhiyun 	 * because the 7 lower bits of the address are used by the
9356*4882a593Smuzhiyun 	 * hardware.
9357*4882a593Smuzhiyun 	 */
9358*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
9359*4882a593Smuzhiyun 			IOACCEL1_COMMANDLIST_ALIGNMENT);
9360*4882a593Smuzhiyun 	h->ioaccel_cmd_pool =
9361*4882a593Smuzhiyun 		dma_alloc_coherent(&h->pdev->dev,
9362*4882a593Smuzhiyun 			h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9363*4882a593Smuzhiyun 			&h->ioaccel_cmd_pool_dhandle, GFP_KERNEL);
9364*4882a593Smuzhiyun 
9365*4882a593Smuzhiyun 	h->ioaccel1_blockFetchTable =
9366*4882a593Smuzhiyun 		kmalloc(((h->ioaccel_maxsg + 1) *
9367*4882a593Smuzhiyun 				sizeof(u32)), GFP_KERNEL);
9368*4882a593Smuzhiyun 
9369*4882a593Smuzhiyun 	if ((h->ioaccel_cmd_pool == NULL) ||
9370*4882a593Smuzhiyun 		(h->ioaccel1_blockFetchTable == NULL))
9371*4882a593Smuzhiyun 		goto clean_up;
9372*4882a593Smuzhiyun 
9373*4882a593Smuzhiyun 	memset(h->ioaccel_cmd_pool, 0,
9374*4882a593Smuzhiyun 		h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
9375*4882a593Smuzhiyun 	return 0;
9376*4882a593Smuzhiyun 
9377*4882a593Smuzhiyun clean_up:
9378*4882a593Smuzhiyun 	hpsa_free_ioaccel1_cmd_and_bft(h);
9379*4882a593Smuzhiyun 	return -ENOMEM;
9380*4882a593Smuzhiyun }
9381*4882a593Smuzhiyun 
9382*4882a593Smuzhiyun /* Free ioaccel2 mode command blocks and block fetch table */
hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info * h)9383*4882a593Smuzhiyun static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9384*4882a593Smuzhiyun {
9385*4882a593Smuzhiyun 	hpsa_free_ioaccel2_sg_chain_blocks(h);
9386*4882a593Smuzhiyun 
9387*4882a593Smuzhiyun 	if (h->ioaccel2_cmd_pool) {
9388*4882a593Smuzhiyun 		dma_free_coherent(&h->pdev->dev,
9389*4882a593Smuzhiyun 				  h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9390*4882a593Smuzhiyun 				  h->ioaccel2_cmd_pool,
9391*4882a593Smuzhiyun 				  h->ioaccel2_cmd_pool_dhandle);
9392*4882a593Smuzhiyun 		h->ioaccel2_cmd_pool = NULL;
9393*4882a593Smuzhiyun 		h->ioaccel2_cmd_pool_dhandle = 0;
9394*4882a593Smuzhiyun 	}
9395*4882a593Smuzhiyun 	kfree(h->ioaccel2_blockFetchTable);
9396*4882a593Smuzhiyun 	h->ioaccel2_blockFetchTable = NULL;
9397*4882a593Smuzhiyun }
9398*4882a593Smuzhiyun 
9399*4882a593Smuzhiyun /* Allocate ioaccel2 mode command blocks and block fetch table */
hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info * h)9400*4882a593Smuzhiyun static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9401*4882a593Smuzhiyun {
9402*4882a593Smuzhiyun 	int rc;
9403*4882a593Smuzhiyun 
9404*4882a593Smuzhiyun 	/* Allocate ioaccel2 mode command blocks and block fetch table */
9405*4882a593Smuzhiyun 
9406*4882a593Smuzhiyun 	h->ioaccel_maxsg =
9407*4882a593Smuzhiyun 		readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9408*4882a593Smuzhiyun 	if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
9409*4882a593Smuzhiyun 		h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
9410*4882a593Smuzhiyun 
9411*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
9412*4882a593Smuzhiyun 			IOACCEL2_COMMANDLIST_ALIGNMENT);
9413*4882a593Smuzhiyun 	h->ioaccel2_cmd_pool =
9414*4882a593Smuzhiyun 		dma_alloc_coherent(&h->pdev->dev,
9415*4882a593Smuzhiyun 			h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9416*4882a593Smuzhiyun 			&h->ioaccel2_cmd_pool_dhandle, GFP_KERNEL);
9417*4882a593Smuzhiyun 
9418*4882a593Smuzhiyun 	h->ioaccel2_blockFetchTable =
9419*4882a593Smuzhiyun 		kmalloc(((h->ioaccel_maxsg + 1) *
9420*4882a593Smuzhiyun 				sizeof(u32)), GFP_KERNEL);
9421*4882a593Smuzhiyun 
9422*4882a593Smuzhiyun 	if ((h->ioaccel2_cmd_pool == NULL) ||
9423*4882a593Smuzhiyun 		(h->ioaccel2_blockFetchTable == NULL)) {
9424*4882a593Smuzhiyun 		rc = -ENOMEM;
9425*4882a593Smuzhiyun 		goto clean_up;
9426*4882a593Smuzhiyun 	}
9427*4882a593Smuzhiyun 
9428*4882a593Smuzhiyun 	rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h);
9429*4882a593Smuzhiyun 	if (rc)
9430*4882a593Smuzhiyun 		goto clean_up;
9431*4882a593Smuzhiyun 
9432*4882a593Smuzhiyun 	memset(h->ioaccel2_cmd_pool, 0,
9433*4882a593Smuzhiyun 		h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
9434*4882a593Smuzhiyun 	return 0;
9435*4882a593Smuzhiyun 
9436*4882a593Smuzhiyun clean_up:
9437*4882a593Smuzhiyun 	hpsa_free_ioaccel2_cmd_and_bft(h);
9438*4882a593Smuzhiyun 	return rc;
9439*4882a593Smuzhiyun }
9440*4882a593Smuzhiyun 
9441*4882a593Smuzhiyun /* Free items allocated by hpsa_put_ctlr_into_performant_mode */
hpsa_free_performant_mode(struct ctlr_info * h)9442*4882a593Smuzhiyun static void hpsa_free_performant_mode(struct ctlr_info *h)
9443*4882a593Smuzhiyun {
9444*4882a593Smuzhiyun 	kfree(h->blockFetchTable);
9445*4882a593Smuzhiyun 	h->blockFetchTable = NULL;
9446*4882a593Smuzhiyun 	hpsa_free_reply_queues(h);
9447*4882a593Smuzhiyun 	hpsa_free_ioaccel1_cmd_and_bft(h);
9448*4882a593Smuzhiyun 	hpsa_free_ioaccel2_cmd_and_bft(h);
9449*4882a593Smuzhiyun }
9450*4882a593Smuzhiyun 
9451*4882a593Smuzhiyun /* return -ENODEV on error, 0 on success (or no action)
9452*4882a593Smuzhiyun  * allocates numerous items that must be freed later
9453*4882a593Smuzhiyun  */
hpsa_put_ctlr_into_performant_mode(struct ctlr_info * h)9454*4882a593Smuzhiyun static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
9455*4882a593Smuzhiyun {
9456*4882a593Smuzhiyun 	u32 trans_support;
9457*4882a593Smuzhiyun 	unsigned long transMethod = CFGTBL_Trans_Performant |
9458*4882a593Smuzhiyun 					CFGTBL_Trans_use_short_tags;
9459*4882a593Smuzhiyun 	int i, rc;
9460*4882a593Smuzhiyun 
9461*4882a593Smuzhiyun 	if (hpsa_simple_mode)
9462*4882a593Smuzhiyun 		return 0;
9463*4882a593Smuzhiyun 
9464*4882a593Smuzhiyun 	trans_support = readl(&(h->cfgtable->TransportSupport));
9465*4882a593Smuzhiyun 	if (!(trans_support & PERFORMANT_MODE))
9466*4882a593Smuzhiyun 		return 0;
9467*4882a593Smuzhiyun 
9468*4882a593Smuzhiyun 	/* Check for I/O accelerator mode support */
9469*4882a593Smuzhiyun 	if (trans_support & CFGTBL_Trans_io_accel1) {
9470*4882a593Smuzhiyun 		transMethod |= CFGTBL_Trans_io_accel1 |
9471*4882a593Smuzhiyun 				CFGTBL_Trans_enable_directed_msix;
9472*4882a593Smuzhiyun 		rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
9473*4882a593Smuzhiyun 		if (rc)
9474*4882a593Smuzhiyun 			return rc;
9475*4882a593Smuzhiyun 	} else if (trans_support & CFGTBL_Trans_io_accel2) {
9476*4882a593Smuzhiyun 		transMethod |= CFGTBL_Trans_io_accel2 |
9477*4882a593Smuzhiyun 				CFGTBL_Trans_enable_directed_msix;
9478*4882a593Smuzhiyun 		rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
9479*4882a593Smuzhiyun 		if (rc)
9480*4882a593Smuzhiyun 			return rc;
9481*4882a593Smuzhiyun 	}
9482*4882a593Smuzhiyun 
9483*4882a593Smuzhiyun 	h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1;
9484*4882a593Smuzhiyun 	hpsa_get_max_perf_mode_cmds(h);
9485*4882a593Smuzhiyun 	/* Performant mode ring buffer and supporting data structures */
9486*4882a593Smuzhiyun 	h->reply_queue_size = h->max_commands * sizeof(u64);
9487*4882a593Smuzhiyun 
9488*4882a593Smuzhiyun 	for (i = 0; i < h->nreply_queues; i++) {
9489*4882a593Smuzhiyun 		h->reply_queue[i].head = dma_alloc_coherent(&h->pdev->dev,
9490*4882a593Smuzhiyun 						h->reply_queue_size,
9491*4882a593Smuzhiyun 						&h->reply_queue[i].busaddr,
9492*4882a593Smuzhiyun 						GFP_KERNEL);
9493*4882a593Smuzhiyun 		if (!h->reply_queue[i].head) {
9494*4882a593Smuzhiyun 			rc = -ENOMEM;
9495*4882a593Smuzhiyun 			goto clean1;	/* rq, ioaccel */
9496*4882a593Smuzhiyun 		}
9497*4882a593Smuzhiyun 		h->reply_queue[i].size = h->max_commands;
9498*4882a593Smuzhiyun 		h->reply_queue[i].wraparound = 1;  /* spec: init to 1 */
9499*4882a593Smuzhiyun 		h->reply_queue[i].current_entry = 0;
9500*4882a593Smuzhiyun 	}
9501*4882a593Smuzhiyun 
9502*4882a593Smuzhiyun 	/* Need a block fetch table for performant mode */
9503*4882a593Smuzhiyun 	h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
9504*4882a593Smuzhiyun 				sizeof(u32)), GFP_KERNEL);
9505*4882a593Smuzhiyun 	if (!h->blockFetchTable) {
9506*4882a593Smuzhiyun 		rc = -ENOMEM;
9507*4882a593Smuzhiyun 		goto clean1;	/* rq, ioaccel */
9508*4882a593Smuzhiyun 	}
9509*4882a593Smuzhiyun 
9510*4882a593Smuzhiyun 	rc = hpsa_enter_performant_mode(h, trans_support);
9511*4882a593Smuzhiyun 	if (rc)
9512*4882a593Smuzhiyun 		goto clean2;	/* bft, rq, ioaccel */
9513*4882a593Smuzhiyun 	return 0;
9514*4882a593Smuzhiyun 
9515*4882a593Smuzhiyun clean2:	/* bft, rq, ioaccel */
9516*4882a593Smuzhiyun 	kfree(h->blockFetchTable);
9517*4882a593Smuzhiyun 	h->blockFetchTable = NULL;
9518*4882a593Smuzhiyun clean1:	/* rq, ioaccel */
9519*4882a593Smuzhiyun 	hpsa_free_reply_queues(h);
9520*4882a593Smuzhiyun 	hpsa_free_ioaccel1_cmd_and_bft(h);
9521*4882a593Smuzhiyun 	hpsa_free_ioaccel2_cmd_and_bft(h);
9522*4882a593Smuzhiyun 	return rc;
9523*4882a593Smuzhiyun }
9524*4882a593Smuzhiyun 
is_accelerated_cmd(struct CommandList * c)9525*4882a593Smuzhiyun static int is_accelerated_cmd(struct CommandList *c)
9526*4882a593Smuzhiyun {
9527*4882a593Smuzhiyun 	return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
9528*4882a593Smuzhiyun }
9529*4882a593Smuzhiyun 
hpsa_drain_accel_commands(struct ctlr_info * h)9530*4882a593Smuzhiyun static void hpsa_drain_accel_commands(struct ctlr_info *h)
9531*4882a593Smuzhiyun {
9532*4882a593Smuzhiyun 	struct CommandList *c = NULL;
9533*4882a593Smuzhiyun 	int i, accel_cmds_out;
9534*4882a593Smuzhiyun 	int refcount;
9535*4882a593Smuzhiyun 
9536*4882a593Smuzhiyun 	do { /* wait for all outstanding ioaccel commands to drain out */
9537*4882a593Smuzhiyun 		accel_cmds_out = 0;
9538*4882a593Smuzhiyun 		for (i = 0; i < h->nr_cmds; i++) {
9539*4882a593Smuzhiyun 			c = h->cmd_pool + i;
9540*4882a593Smuzhiyun 			refcount = atomic_inc_return(&c->refcount);
9541*4882a593Smuzhiyun 			if (refcount > 1) /* Command is allocated */
9542*4882a593Smuzhiyun 				accel_cmds_out += is_accelerated_cmd(c);
9543*4882a593Smuzhiyun 			cmd_free(h, c);
9544*4882a593Smuzhiyun 		}
9545*4882a593Smuzhiyun 		if (accel_cmds_out <= 0)
9546*4882a593Smuzhiyun 			break;
9547*4882a593Smuzhiyun 		msleep(100);
9548*4882a593Smuzhiyun 	} while (1);
9549*4882a593Smuzhiyun }
9550*4882a593Smuzhiyun 
hpsa_alloc_sas_phy(struct hpsa_sas_port * hpsa_sas_port)9551*4882a593Smuzhiyun static struct hpsa_sas_phy *hpsa_alloc_sas_phy(
9552*4882a593Smuzhiyun 				struct hpsa_sas_port *hpsa_sas_port)
9553*4882a593Smuzhiyun {
9554*4882a593Smuzhiyun 	struct hpsa_sas_phy *hpsa_sas_phy;
9555*4882a593Smuzhiyun 	struct sas_phy *phy;
9556*4882a593Smuzhiyun 
9557*4882a593Smuzhiyun 	hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL);
9558*4882a593Smuzhiyun 	if (!hpsa_sas_phy)
9559*4882a593Smuzhiyun 		return NULL;
9560*4882a593Smuzhiyun 
9561*4882a593Smuzhiyun 	phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev,
9562*4882a593Smuzhiyun 		hpsa_sas_port->next_phy_index);
9563*4882a593Smuzhiyun 	if (!phy) {
9564*4882a593Smuzhiyun 		kfree(hpsa_sas_phy);
9565*4882a593Smuzhiyun 		return NULL;
9566*4882a593Smuzhiyun 	}
9567*4882a593Smuzhiyun 
9568*4882a593Smuzhiyun 	hpsa_sas_port->next_phy_index++;
9569*4882a593Smuzhiyun 	hpsa_sas_phy->phy = phy;
9570*4882a593Smuzhiyun 	hpsa_sas_phy->parent_port = hpsa_sas_port;
9571*4882a593Smuzhiyun 
9572*4882a593Smuzhiyun 	return hpsa_sas_phy;
9573*4882a593Smuzhiyun }
9574*4882a593Smuzhiyun 
hpsa_free_sas_phy(struct hpsa_sas_phy * hpsa_sas_phy)9575*4882a593Smuzhiyun static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9576*4882a593Smuzhiyun {
9577*4882a593Smuzhiyun 	struct sas_phy *phy = hpsa_sas_phy->phy;
9578*4882a593Smuzhiyun 
9579*4882a593Smuzhiyun 	sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy);
9580*4882a593Smuzhiyun 	if (hpsa_sas_phy->added_to_port)
9581*4882a593Smuzhiyun 		list_del(&hpsa_sas_phy->phy_list_entry);
9582*4882a593Smuzhiyun 	sas_phy_delete(phy);
9583*4882a593Smuzhiyun 	kfree(hpsa_sas_phy);
9584*4882a593Smuzhiyun }
9585*4882a593Smuzhiyun 
hpsa_sas_port_add_phy(struct hpsa_sas_phy * hpsa_sas_phy)9586*4882a593Smuzhiyun static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9587*4882a593Smuzhiyun {
9588*4882a593Smuzhiyun 	int rc;
9589*4882a593Smuzhiyun 	struct hpsa_sas_port *hpsa_sas_port;
9590*4882a593Smuzhiyun 	struct sas_phy *phy;
9591*4882a593Smuzhiyun 	struct sas_identify *identify;
9592*4882a593Smuzhiyun 
9593*4882a593Smuzhiyun 	hpsa_sas_port = hpsa_sas_phy->parent_port;
9594*4882a593Smuzhiyun 	phy = hpsa_sas_phy->phy;
9595*4882a593Smuzhiyun 
9596*4882a593Smuzhiyun 	identify = &phy->identify;
9597*4882a593Smuzhiyun 	memset(identify, 0, sizeof(*identify));
9598*4882a593Smuzhiyun 	identify->sas_address = hpsa_sas_port->sas_address;
9599*4882a593Smuzhiyun 	identify->device_type = SAS_END_DEVICE;
9600*4882a593Smuzhiyun 	identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9601*4882a593Smuzhiyun 	identify->target_port_protocols = SAS_PROTOCOL_STP;
9602*4882a593Smuzhiyun 	phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9603*4882a593Smuzhiyun 	phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9604*4882a593Smuzhiyun 	phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN;
9605*4882a593Smuzhiyun 	phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN;
9606*4882a593Smuzhiyun 	phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
9607*4882a593Smuzhiyun 
9608*4882a593Smuzhiyun 	rc = sas_phy_add(hpsa_sas_phy->phy);
9609*4882a593Smuzhiyun 	if (rc)
9610*4882a593Smuzhiyun 		return rc;
9611*4882a593Smuzhiyun 
9612*4882a593Smuzhiyun 	sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy);
9613*4882a593Smuzhiyun 	list_add_tail(&hpsa_sas_phy->phy_list_entry,
9614*4882a593Smuzhiyun 			&hpsa_sas_port->phy_list_head);
9615*4882a593Smuzhiyun 	hpsa_sas_phy->added_to_port = true;
9616*4882a593Smuzhiyun 
9617*4882a593Smuzhiyun 	return 0;
9618*4882a593Smuzhiyun }
9619*4882a593Smuzhiyun 
9620*4882a593Smuzhiyun static int
hpsa_sas_port_add_rphy(struct hpsa_sas_port * hpsa_sas_port,struct sas_rphy * rphy)9621*4882a593Smuzhiyun 	hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port,
9622*4882a593Smuzhiyun 				struct sas_rphy *rphy)
9623*4882a593Smuzhiyun {
9624*4882a593Smuzhiyun 	struct sas_identify *identify;
9625*4882a593Smuzhiyun 
9626*4882a593Smuzhiyun 	identify = &rphy->identify;
9627*4882a593Smuzhiyun 	identify->sas_address = hpsa_sas_port->sas_address;
9628*4882a593Smuzhiyun 	identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9629*4882a593Smuzhiyun 	identify->target_port_protocols = SAS_PROTOCOL_STP;
9630*4882a593Smuzhiyun 
9631*4882a593Smuzhiyun 	return sas_rphy_add(rphy);
9632*4882a593Smuzhiyun }
9633*4882a593Smuzhiyun 
9634*4882a593Smuzhiyun static struct hpsa_sas_port
hpsa_alloc_sas_port(struct hpsa_sas_node * hpsa_sas_node,u64 sas_address)9635*4882a593Smuzhiyun 	*hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node,
9636*4882a593Smuzhiyun 				u64 sas_address)
9637*4882a593Smuzhiyun {
9638*4882a593Smuzhiyun 	int rc;
9639*4882a593Smuzhiyun 	struct hpsa_sas_port *hpsa_sas_port;
9640*4882a593Smuzhiyun 	struct sas_port *port;
9641*4882a593Smuzhiyun 
9642*4882a593Smuzhiyun 	hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL);
9643*4882a593Smuzhiyun 	if (!hpsa_sas_port)
9644*4882a593Smuzhiyun 		return NULL;
9645*4882a593Smuzhiyun 
9646*4882a593Smuzhiyun 	INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head);
9647*4882a593Smuzhiyun 	hpsa_sas_port->parent_node = hpsa_sas_node;
9648*4882a593Smuzhiyun 
9649*4882a593Smuzhiyun 	port = sas_port_alloc_num(hpsa_sas_node->parent_dev);
9650*4882a593Smuzhiyun 	if (!port)
9651*4882a593Smuzhiyun 		goto free_hpsa_port;
9652*4882a593Smuzhiyun 
9653*4882a593Smuzhiyun 	rc = sas_port_add(port);
9654*4882a593Smuzhiyun 	if (rc)
9655*4882a593Smuzhiyun 		goto free_sas_port;
9656*4882a593Smuzhiyun 
9657*4882a593Smuzhiyun 	hpsa_sas_port->port = port;
9658*4882a593Smuzhiyun 	hpsa_sas_port->sas_address = sas_address;
9659*4882a593Smuzhiyun 	list_add_tail(&hpsa_sas_port->port_list_entry,
9660*4882a593Smuzhiyun 			&hpsa_sas_node->port_list_head);
9661*4882a593Smuzhiyun 
9662*4882a593Smuzhiyun 	return hpsa_sas_port;
9663*4882a593Smuzhiyun 
9664*4882a593Smuzhiyun free_sas_port:
9665*4882a593Smuzhiyun 	sas_port_free(port);
9666*4882a593Smuzhiyun free_hpsa_port:
9667*4882a593Smuzhiyun 	kfree(hpsa_sas_port);
9668*4882a593Smuzhiyun 
9669*4882a593Smuzhiyun 	return NULL;
9670*4882a593Smuzhiyun }
9671*4882a593Smuzhiyun 
hpsa_free_sas_port(struct hpsa_sas_port * hpsa_sas_port)9672*4882a593Smuzhiyun static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port)
9673*4882a593Smuzhiyun {
9674*4882a593Smuzhiyun 	struct hpsa_sas_phy *hpsa_sas_phy;
9675*4882a593Smuzhiyun 	struct hpsa_sas_phy *next;
9676*4882a593Smuzhiyun 
9677*4882a593Smuzhiyun 	list_for_each_entry_safe(hpsa_sas_phy, next,
9678*4882a593Smuzhiyun 			&hpsa_sas_port->phy_list_head, phy_list_entry)
9679*4882a593Smuzhiyun 		hpsa_free_sas_phy(hpsa_sas_phy);
9680*4882a593Smuzhiyun 
9681*4882a593Smuzhiyun 	sas_port_delete(hpsa_sas_port->port);
9682*4882a593Smuzhiyun 	list_del(&hpsa_sas_port->port_list_entry);
9683*4882a593Smuzhiyun 	kfree(hpsa_sas_port);
9684*4882a593Smuzhiyun }
9685*4882a593Smuzhiyun 
hpsa_alloc_sas_node(struct device * parent_dev)9686*4882a593Smuzhiyun static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev)
9687*4882a593Smuzhiyun {
9688*4882a593Smuzhiyun 	struct hpsa_sas_node *hpsa_sas_node;
9689*4882a593Smuzhiyun 
9690*4882a593Smuzhiyun 	hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL);
9691*4882a593Smuzhiyun 	if (hpsa_sas_node) {
9692*4882a593Smuzhiyun 		hpsa_sas_node->parent_dev = parent_dev;
9693*4882a593Smuzhiyun 		INIT_LIST_HEAD(&hpsa_sas_node->port_list_head);
9694*4882a593Smuzhiyun 	}
9695*4882a593Smuzhiyun 
9696*4882a593Smuzhiyun 	return hpsa_sas_node;
9697*4882a593Smuzhiyun }
9698*4882a593Smuzhiyun 
hpsa_free_sas_node(struct hpsa_sas_node * hpsa_sas_node)9699*4882a593Smuzhiyun static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node)
9700*4882a593Smuzhiyun {
9701*4882a593Smuzhiyun 	struct hpsa_sas_port *hpsa_sas_port;
9702*4882a593Smuzhiyun 	struct hpsa_sas_port *next;
9703*4882a593Smuzhiyun 
9704*4882a593Smuzhiyun 	if (!hpsa_sas_node)
9705*4882a593Smuzhiyun 		return;
9706*4882a593Smuzhiyun 
9707*4882a593Smuzhiyun 	list_for_each_entry_safe(hpsa_sas_port, next,
9708*4882a593Smuzhiyun 			&hpsa_sas_node->port_list_head, port_list_entry)
9709*4882a593Smuzhiyun 		hpsa_free_sas_port(hpsa_sas_port);
9710*4882a593Smuzhiyun 
9711*4882a593Smuzhiyun 	kfree(hpsa_sas_node);
9712*4882a593Smuzhiyun }
9713*4882a593Smuzhiyun 
9714*4882a593Smuzhiyun static struct hpsa_scsi_dev_t
hpsa_find_device_by_sas_rphy(struct ctlr_info * h,struct sas_rphy * rphy)9715*4882a593Smuzhiyun 	*hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
9716*4882a593Smuzhiyun 					struct sas_rphy *rphy)
9717*4882a593Smuzhiyun {
9718*4882a593Smuzhiyun 	int i;
9719*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *device;
9720*4882a593Smuzhiyun 
9721*4882a593Smuzhiyun 	for (i = 0; i < h->ndevices; i++) {
9722*4882a593Smuzhiyun 		device = h->dev[i];
9723*4882a593Smuzhiyun 		if (!device->sas_port)
9724*4882a593Smuzhiyun 			continue;
9725*4882a593Smuzhiyun 		if (device->sas_port->rphy == rphy)
9726*4882a593Smuzhiyun 			return device;
9727*4882a593Smuzhiyun 	}
9728*4882a593Smuzhiyun 
9729*4882a593Smuzhiyun 	return NULL;
9730*4882a593Smuzhiyun }
9731*4882a593Smuzhiyun 
hpsa_add_sas_host(struct ctlr_info * h)9732*4882a593Smuzhiyun static int hpsa_add_sas_host(struct ctlr_info *h)
9733*4882a593Smuzhiyun {
9734*4882a593Smuzhiyun 	int rc;
9735*4882a593Smuzhiyun 	struct device *parent_dev;
9736*4882a593Smuzhiyun 	struct hpsa_sas_node *hpsa_sas_node;
9737*4882a593Smuzhiyun 	struct hpsa_sas_port *hpsa_sas_port;
9738*4882a593Smuzhiyun 	struct hpsa_sas_phy *hpsa_sas_phy;
9739*4882a593Smuzhiyun 
9740*4882a593Smuzhiyun 	parent_dev = &h->scsi_host->shost_dev;
9741*4882a593Smuzhiyun 
9742*4882a593Smuzhiyun 	hpsa_sas_node = hpsa_alloc_sas_node(parent_dev);
9743*4882a593Smuzhiyun 	if (!hpsa_sas_node)
9744*4882a593Smuzhiyun 		return -ENOMEM;
9745*4882a593Smuzhiyun 
9746*4882a593Smuzhiyun 	hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address);
9747*4882a593Smuzhiyun 	if (!hpsa_sas_port) {
9748*4882a593Smuzhiyun 		rc = -ENODEV;
9749*4882a593Smuzhiyun 		goto free_sas_node;
9750*4882a593Smuzhiyun 	}
9751*4882a593Smuzhiyun 
9752*4882a593Smuzhiyun 	hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port);
9753*4882a593Smuzhiyun 	if (!hpsa_sas_phy) {
9754*4882a593Smuzhiyun 		rc = -ENODEV;
9755*4882a593Smuzhiyun 		goto free_sas_port;
9756*4882a593Smuzhiyun 	}
9757*4882a593Smuzhiyun 
9758*4882a593Smuzhiyun 	rc = hpsa_sas_port_add_phy(hpsa_sas_phy);
9759*4882a593Smuzhiyun 	if (rc)
9760*4882a593Smuzhiyun 		goto free_sas_phy;
9761*4882a593Smuzhiyun 
9762*4882a593Smuzhiyun 	h->sas_host = hpsa_sas_node;
9763*4882a593Smuzhiyun 
9764*4882a593Smuzhiyun 	return 0;
9765*4882a593Smuzhiyun 
9766*4882a593Smuzhiyun free_sas_phy:
9767*4882a593Smuzhiyun 	hpsa_free_sas_phy(hpsa_sas_phy);
9768*4882a593Smuzhiyun free_sas_port:
9769*4882a593Smuzhiyun 	hpsa_free_sas_port(hpsa_sas_port);
9770*4882a593Smuzhiyun free_sas_node:
9771*4882a593Smuzhiyun 	hpsa_free_sas_node(hpsa_sas_node);
9772*4882a593Smuzhiyun 
9773*4882a593Smuzhiyun 	return rc;
9774*4882a593Smuzhiyun }
9775*4882a593Smuzhiyun 
hpsa_delete_sas_host(struct ctlr_info * h)9776*4882a593Smuzhiyun static void hpsa_delete_sas_host(struct ctlr_info *h)
9777*4882a593Smuzhiyun {
9778*4882a593Smuzhiyun 	hpsa_free_sas_node(h->sas_host);
9779*4882a593Smuzhiyun }
9780*4882a593Smuzhiyun 
hpsa_add_sas_device(struct hpsa_sas_node * hpsa_sas_node,struct hpsa_scsi_dev_t * device)9781*4882a593Smuzhiyun static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
9782*4882a593Smuzhiyun 				struct hpsa_scsi_dev_t *device)
9783*4882a593Smuzhiyun {
9784*4882a593Smuzhiyun 	int rc;
9785*4882a593Smuzhiyun 	struct hpsa_sas_port *hpsa_sas_port;
9786*4882a593Smuzhiyun 	struct sas_rphy *rphy;
9787*4882a593Smuzhiyun 
9788*4882a593Smuzhiyun 	hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address);
9789*4882a593Smuzhiyun 	if (!hpsa_sas_port)
9790*4882a593Smuzhiyun 		return -ENOMEM;
9791*4882a593Smuzhiyun 
9792*4882a593Smuzhiyun 	rphy = sas_end_device_alloc(hpsa_sas_port->port);
9793*4882a593Smuzhiyun 	if (!rphy) {
9794*4882a593Smuzhiyun 		rc = -ENODEV;
9795*4882a593Smuzhiyun 		goto free_sas_port;
9796*4882a593Smuzhiyun 	}
9797*4882a593Smuzhiyun 
9798*4882a593Smuzhiyun 	hpsa_sas_port->rphy = rphy;
9799*4882a593Smuzhiyun 	device->sas_port = hpsa_sas_port;
9800*4882a593Smuzhiyun 
9801*4882a593Smuzhiyun 	rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy);
9802*4882a593Smuzhiyun 	if (rc)
9803*4882a593Smuzhiyun 		goto free_sas_port;
9804*4882a593Smuzhiyun 
9805*4882a593Smuzhiyun 	return 0;
9806*4882a593Smuzhiyun 
9807*4882a593Smuzhiyun free_sas_port:
9808*4882a593Smuzhiyun 	hpsa_free_sas_port(hpsa_sas_port);
9809*4882a593Smuzhiyun 	device->sas_port = NULL;
9810*4882a593Smuzhiyun 
9811*4882a593Smuzhiyun 	return rc;
9812*4882a593Smuzhiyun }
9813*4882a593Smuzhiyun 
hpsa_remove_sas_device(struct hpsa_scsi_dev_t * device)9814*4882a593Smuzhiyun static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device)
9815*4882a593Smuzhiyun {
9816*4882a593Smuzhiyun 	if (device->sas_port) {
9817*4882a593Smuzhiyun 		hpsa_free_sas_port(device->sas_port);
9818*4882a593Smuzhiyun 		device->sas_port = NULL;
9819*4882a593Smuzhiyun 	}
9820*4882a593Smuzhiyun }
9821*4882a593Smuzhiyun 
9822*4882a593Smuzhiyun static int
hpsa_sas_get_linkerrors(struct sas_phy * phy)9823*4882a593Smuzhiyun hpsa_sas_get_linkerrors(struct sas_phy *phy)
9824*4882a593Smuzhiyun {
9825*4882a593Smuzhiyun 	return 0;
9826*4882a593Smuzhiyun }
9827*4882a593Smuzhiyun 
9828*4882a593Smuzhiyun static int
hpsa_sas_get_enclosure_identifier(struct sas_rphy * rphy,u64 * identifier)9829*4882a593Smuzhiyun hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier)
9830*4882a593Smuzhiyun {
9831*4882a593Smuzhiyun 	struct Scsi_Host *shost = phy_to_shost(rphy);
9832*4882a593Smuzhiyun 	struct ctlr_info *h;
9833*4882a593Smuzhiyun 	struct hpsa_scsi_dev_t *sd;
9834*4882a593Smuzhiyun 
9835*4882a593Smuzhiyun 	if (!shost)
9836*4882a593Smuzhiyun 		return -ENXIO;
9837*4882a593Smuzhiyun 
9838*4882a593Smuzhiyun 	h = shost_to_hba(shost);
9839*4882a593Smuzhiyun 
9840*4882a593Smuzhiyun 	if (!h)
9841*4882a593Smuzhiyun 		return -ENXIO;
9842*4882a593Smuzhiyun 
9843*4882a593Smuzhiyun 	sd = hpsa_find_device_by_sas_rphy(h, rphy);
9844*4882a593Smuzhiyun 	if (!sd)
9845*4882a593Smuzhiyun 		return -ENXIO;
9846*4882a593Smuzhiyun 
9847*4882a593Smuzhiyun 	*identifier = sd->eli;
9848*4882a593Smuzhiyun 
9849*4882a593Smuzhiyun 	return 0;
9850*4882a593Smuzhiyun }
9851*4882a593Smuzhiyun 
9852*4882a593Smuzhiyun static int
hpsa_sas_get_bay_identifier(struct sas_rphy * rphy)9853*4882a593Smuzhiyun hpsa_sas_get_bay_identifier(struct sas_rphy *rphy)
9854*4882a593Smuzhiyun {
9855*4882a593Smuzhiyun 	return -ENXIO;
9856*4882a593Smuzhiyun }
9857*4882a593Smuzhiyun 
9858*4882a593Smuzhiyun static int
hpsa_sas_phy_reset(struct sas_phy * phy,int hard_reset)9859*4882a593Smuzhiyun hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset)
9860*4882a593Smuzhiyun {
9861*4882a593Smuzhiyun 	return 0;
9862*4882a593Smuzhiyun }
9863*4882a593Smuzhiyun 
9864*4882a593Smuzhiyun static int
hpsa_sas_phy_enable(struct sas_phy * phy,int enable)9865*4882a593Smuzhiyun hpsa_sas_phy_enable(struct sas_phy *phy, int enable)
9866*4882a593Smuzhiyun {
9867*4882a593Smuzhiyun 	return 0;
9868*4882a593Smuzhiyun }
9869*4882a593Smuzhiyun 
9870*4882a593Smuzhiyun static int
hpsa_sas_phy_setup(struct sas_phy * phy)9871*4882a593Smuzhiyun hpsa_sas_phy_setup(struct sas_phy *phy)
9872*4882a593Smuzhiyun {
9873*4882a593Smuzhiyun 	return 0;
9874*4882a593Smuzhiyun }
9875*4882a593Smuzhiyun 
9876*4882a593Smuzhiyun static void
hpsa_sas_phy_release(struct sas_phy * phy)9877*4882a593Smuzhiyun hpsa_sas_phy_release(struct sas_phy *phy)
9878*4882a593Smuzhiyun {
9879*4882a593Smuzhiyun }
9880*4882a593Smuzhiyun 
9881*4882a593Smuzhiyun static int
hpsa_sas_phy_speed(struct sas_phy * phy,struct sas_phy_linkrates * rates)9882*4882a593Smuzhiyun hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates)
9883*4882a593Smuzhiyun {
9884*4882a593Smuzhiyun 	return -EINVAL;
9885*4882a593Smuzhiyun }
9886*4882a593Smuzhiyun 
9887*4882a593Smuzhiyun static struct sas_function_template hpsa_sas_transport_functions = {
9888*4882a593Smuzhiyun 	.get_linkerrors = hpsa_sas_get_linkerrors,
9889*4882a593Smuzhiyun 	.get_enclosure_identifier = hpsa_sas_get_enclosure_identifier,
9890*4882a593Smuzhiyun 	.get_bay_identifier = hpsa_sas_get_bay_identifier,
9891*4882a593Smuzhiyun 	.phy_reset = hpsa_sas_phy_reset,
9892*4882a593Smuzhiyun 	.phy_enable = hpsa_sas_phy_enable,
9893*4882a593Smuzhiyun 	.phy_setup = hpsa_sas_phy_setup,
9894*4882a593Smuzhiyun 	.phy_release = hpsa_sas_phy_release,
9895*4882a593Smuzhiyun 	.set_phy_speed = hpsa_sas_phy_speed,
9896*4882a593Smuzhiyun };
9897*4882a593Smuzhiyun 
9898*4882a593Smuzhiyun /*
9899*4882a593Smuzhiyun  *  This is it.  Register the PCI driver information for the cards we control
9900*4882a593Smuzhiyun  *  the OS will call our registered routines when it finds one of our cards.
9901*4882a593Smuzhiyun  */
hpsa_init(void)9902*4882a593Smuzhiyun static int __init hpsa_init(void)
9903*4882a593Smuzhiyun {
9904*4882a593Smuzhiyun 	int rc;
9905*4882a593Smuzhiyun 
9906*4882a593Smuzhiyun 	hpsa_sas_transport_template =
9907*4882a593Smuzhiyun 		sas_attach_transport(&hpsa_sas_transport_functions);
9908*4882a593Smuzhiyun 	if (!hpsa_sas_transport_template)
9909*4882a593Smuzhiyun 		return -ENODEV;
9910*4882a593Smuzhiyun 
9911*4882a593Smuzhiyun 	rc = pci_register_driver(&hpsa_pci_driver);
9912*4882a593Smuzhiyun 
9913*4882a593Smuzhiyun 	if (rc)
9914*4882a593Smuzhiyun 		sas_release_transport(hpsa_sas_transport_template);
9915*4882a593Smuzhiyun 
9916*4882a593Smuzhiyun 	return rc;
9917*4882a593Smuzhiyun }
9918*4882a593Smuzhiyun 
hpsa_cleanup(void)9919*4882a593Smuzhiyun static void __exit hpsa_cleanup(void)
9920*4882a593Smuzhiyun {
9921*4882a593Smuzhiyun 	pci_unregister_driver(&hpsa_pci_driver);
9922*4882a593Smuzhiyun 	sas_release_transport(hpsa_sas_transport_template);
9923*4882a593Smuzhiyun }
9924*4882a593Smuzhiyun 
verify_offsets(void)9925*4882a593Smuzhiyun static void __attribute__((unused)) verify_offsets(void)
9926*4882a593Smuzhiyun {
9927*4882a593Smuzhiyun #define VERIFY_OFFSET(member, offset) \
9928*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
9929*4882a593Smuzhiyun 
9930*4882a593Smuzhiyun 	VERIFY_OFFSET(structure_size, 0);
9931*4882a593Smuzhiyun 	VERIFY_OFFSET(volume_blk_size, 4);
9932*4882a593Smuzhiyun 	VERIFY_OFFSET(volume_blk_cnt, 8);
9933*4882a593Smuzhiyun 	VERIFY_OFFSET(phys_blk_shift, 16);
9934*4882a593Smuzhiyun 	VERIFY_OFFSET(parity_rotation_shift, 17);
9935*4882a593Smuzhiyun 	VERIFY_OFFSET(strip_size, 18);
9936*4882a593Smuzhiyun 	VERIFY_OFFSET(disk_starting_blk, 20);
9937*4882a593Smuzhiyun 	VERIFY_OFFSET(disk_blk_cnt, 28);
9938*4882a593Smuzhiyun 	VERIFY_OFFSET(data_disks_per_row, 36);
9939*4882a593Smuzhiyun 	VERIFY_OFFSET(metadata_disks_per_row, 38);
9940*4882a593Smuzhiyun 	VERIFY_OFFSET(row_cnt, 40);
9941*4882a593Smuzhiyun 	VERIFY_OFFSET(layout_map_count, 42);
9942*4882a593Smuzhiyun 	VERIFY_OFFSET(flags, 44);
9943*4882a593Smuzhiyun 	VERIFY_OFFSET(dekindex, 46);
9944*4882a593Smuzhiyun 	/* VERIFY_OFFSET(reserved, 48 */
9945*4882a593Smuzhiyun 	VERIFY_OFFSET(data, 64);
9946*4882a593Smuzhiyun 
9947*4882a593Smuzhiyun #undef VERIFY_OFFSET
9948*4882a593Smuzhiyun 
9949*4882a593Smuzhiyun #define VERIFY_OFFSET(member, offset) \
9950*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
9951*4882a593Smuzhiyun 
9952*4882a593Smuzhiyun 	VERIFY_OFFSET(IU_type, 0);
9953*4882a593Smuzhiyun 	VERIFY_OFFSET(direction, 1);
9954*4882a593Smuzhiyun 	VERIFY_OFFSET(reply_queue, 2);
9955*4882a593Smuzhiyun 	/* VERIFY_OFFSET(reserved1, 3);  */
9956*4882a593Smuzhiyun 	VERIFY_OFFSET(scsi_nexus, 4);
9957*4882a593Smuzhiyun 	VERIFY_OFFSET(Tag, 8);
9958*4882a593Smuzhiyun 	VERIFY_OFFSET(cdb, 16);
9959*4882a593Smuzhiyun 	VERIFY_OFFSET(cciss_lun, 32);
9960*4882a593Smuzhiyun 	VERIFY_OFFSET(data_len, 40);
9961*4882a593Smuzhiyun 	VERIFY_OFFSET(cmd_priority_task_attr, 44);
9962*4882a593Smuzhiyun 	VERIFY_OFFSET(sg_count, 45);
9963*4882a593Smuzhiyun 	/* VERIFY_OFFSET(reserved3 */
9964*4882a593Smuzhiyun 	VERIFY_OFFSET(err_ptr, 48);
9965*4882a593Smuzhiyun 	VERIFY_OFFSET(err_len, 56);
9966*4882a593Smuzhiyun 	/* VERIFY_OFFSET(reserved4  */
9967*4882a593Smuzhiyun 	VERIFY_OFFSET(sg, 64);
9968*4882a593Smuzhiyun 
9969*4882a593Smuzhiyun #undef VERIFY_OFFSET
9970*4882a593Smuzhiyun 
9971*4882a593Smuzhiyun #define VERIFY_OFFSET(member, offset) \
9972*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
9973*4882a593Smuzhiyun 
9974*4882a593Smuzhiyun 	VERIFY_OFFSET(dev_handle, 0x00);
9975*4882a593Smuzhiyun 	VERIFY_OFFSET(reserved1, 0x02);
9976*4882a593Smuzhiyun 	VERIFY_OFFSET(function, 0x03);
9977*4882a593Smuzhiyun 	VERIFY_OFFSET(reserved2, 0x04);
9978*4882a593Smuzhiyun 	VERIFY_OFFSET(err_info, 0x0C);
9979*4882a593Smuzhiyun 	VERIFY_OFFSET(reserved3, 0x10);
9980*4882a593Smuzhiyun 	VERIFY_OFFSET(err_info_len, 0x12);
9981*4882a593Smuzhiyun 	VERIFY_OFFSET(reserved4, 0x13);
9982*4882a593Smuzhiyun 	VERIFY_OFFSET(sgl_offset, 0x14);
9983*4882a593Smuzhiyun 	VERIFY_OFFSET(reserved5, 0x15);
9984*4882a593Smuzhiyun 	VERIFY_OFFSET(transfer_len, 0x1C);
9985*4882a593Smuzhiyun 	VERIFY_OFFSET(reserved6, 0x20);
9986*4882a593Smuzhiyun 	VERIFY_OFFSET(io_flags, 0x24);
9987*4882a593Smuzhiyun 	VERIFY_OFFSET(reserved7, 0x26);
9988*4882a593Smuzhiyun 	VERIFY_OFFSET(LUN, 0x34);
9989*4882a593Smuzhiyun 	VERIFY_OFFSET(control, 0x3C);
9990*4882a593Smuzhiyun 	VERIFY_OFFSET(CDB, 0x40);
9991*4882a593Smuzhiyun 	VERIFY_OFFSET(reserved8, 0x50);
9992*4882a593Smuzhiyun 	VERIFY_OFFSET(host_context_flags, 0x60);
9993*4882a593Smuzhiyun 	VERIFY_OFFSET(timeout_sec, 0x62);
9994*4882a593Smuzhiyun 	VERIFY_OFFSET(ReplyQueue, 0x64);
9995*4882a593Smuzhiyun 	VERIFY_OFFSET(reserved9, 0x65);
9996*4882a593Smuzhiyun 	VERIFY_OFFSET(tag, 0x68);
9997*4882a593Smuzhiyun 	VERIFY_OFFSET(host_addr, 0x70);
9998*4882a593Smuzhiyun 	VERIFY_OFFSET(CISS_LUN, 0x78);
9999*4882a593Smuzhiyun 	VERIFY_OFFSET(SG, 0x78 + 8);
10000*4882a593Smuzhiyun #undef VERIFY_OFFSET
10001*4882a593Smuzhiyun }
10002*4882a593Smuzhiyun 
10003*4882a593Smuzhiyun module_init(hpsa_init);
10004*4882a593Smuzhiyun module_exit(hpsa_cleanup);
10005