1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright 2008 Cisco Systems, Inc. All rights reserved.
3*4882a593Smuzhiyun * Copyright 2007 Nuova Systems, Inc. All rights reserved.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * This program is free software; you may redistribute it and/or modify
6*4882a593Smuzhiyun * it under the terms of the GNU General Public License as published by
7*4882a593Smuzhiyun * the Free Software Foundation; version 2 of the License.
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11*4882a593Smuzhiyun * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13*4882a593Smuzhiyun * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14*4882a593Smuzhiyun * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15*4882a593Smuzhiyun * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16*4882a593Smuzhiyun * SOFTWARE.
17*4882a593Smuzhiyun */
18*4882a593Smuzhiyun #ifndef _VNIC_RQ_H_
19*4882a593Smuzhiyun #define _VNIC_RQ_H_
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #include <linux/pci.h>
22*4882a593Smuzhiyun #include "vnic_dev.h"
23*4882a593Smuzhiyun #include "vnic_cq.h"
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun /*
26*4882a593Smuzhiyun * These defines avoid symbol clash between fnic and enic (Cisco 10G Eth
27*4882a593Smuzhiyun * Driver) when both are built with CONFIG options =y
28*4882a593Smuzhiyun */
29*4882a593Smuzhiyun #define vnic_rq_desc_avail fnic_rq_desc_avail
30*4882a593Smuzhiyun #define vnic_rq_desc_used fnic_rq_desc_used
31*4882a593Smuzhiyun #define vnic_rq_next_desc fnic_rq_next_desc
32*4882a593Smuzhiyun #define vnic_rq_next_index fnic_rq_next_index
33*4882a593Smuzhiyun #define vnic_rq_next_buf_index fnic_rq_next_buf_index
34*4882a593Smuzhiyun #define vnic_rq_post fnic_rq_post
35*4882a593Smuzhiyun #define vnic_rq_posting_soon fnic_rq_posting_soon
36*4882a593Smuzhiyun #define vnic_rq_return_descs fnic_rq_return_descs
37*4882a593Smuzhiyun #define vnic_rq_service fnic_rq_service
38*4882a593Smuzhiyun #define vnic_rq_fill fnic_rq_fill
39*4882a593Smuzhiyun #define vnic_rq_free fnic_rq_free
40*4882a593Smuzhiyun #define vnic_rq_alloc fnic_rq_alloc
41*4882a593Smuzhiyun #define vnic_rq_init fnic_rq_init
42*4882a593Smuzhiyun #define vnic_rq_error_status fnic_rq_error_status
43*4882a593Smuzhiyun #define vnic_rq_enable fnic_rq_enable
44*4882a593Smuzhiyun #define vnic_rq_disable fnic_rq_disable
45*4882a593Smuzhiyun #define vnic_rq_clean fnic_rq_clean
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun /* Receive queue control */
48*4882a593Smuzhiyun struct vnic_rq_ctrl {
49*4882a593Smuzhiyun u64 ring_base; /* 0x00 */
50*4882a593Smuzhiyun u32 ring_size; /* 0x08 */
51*4882a593Smuzhiyun u32 pad0;
52*4882a593Smuzhiyun u32 posted_index; /* 0x10 */
53*4882a593Smuzhiyun u32 pad1;
54*4882a593Smuzhiyun u32 cq_index; /* 0x18 */
55*4882a593Smuzhiyun u32 pad2;
56*4882a593Smuzhiyun u32 enable; /* 0x20 */
57*4882a593Smuzhiyun u32 pad3;
58*4882a593Smuzhiyun u32 running; /* 0x28 */
59*4882a593Smuzhiyun u32 pad4;
60*4882a593Smuzhiyun u32 fetch_index; /* 0x30 */
61*4882a593Smuzhiyun u32 pad5;
62*4882a593Smuzhiyun u32 error_interrupt_enable; /* 0x38 */
63*4882a593Smuzhiyun u32 pad6;
64*4882a593Smuzhiyun u32 error_interrupt_offset; /* 0x40 */
65*4882a593Smuzhiyun u32 pad7;
66*4882a593Smuzhiyun u32 error_status; /* 0x48 */
67*4882a593Smuzhiyun u32 pad8;
68*4882a593Smuzhiyun u32 dropped_packet_count; /* 0x50 */
69*4882a593Smuzhiyun u32 pad9;
70*4882a593Smuzhiyun u32 dropped_packet_count_rc; /* 0x58 */
71*4882a593Smuzhiyun u32 pad10;
72*4882a593Smuzhiyun };
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun /* Break the vnic_rq_buf allocations into blocks of 64 entries */
75*4882a593Smuzhiyun #define VNIC_RQ_BUF_BLK_ENTRIES 64
76*4882a593Smuzhiyun #define VNIC_RQ_BUF_BLK_SZ \
77*4882a593Smuzhiyun (VNIC_RQ_BUF_BLK_ENTRIES * sizeof(struct vnic_rq_buf))
78*4882a593Smuzhiyun #define VNIC_RQ_BUF_BLKS_NEEDED(entries) \
79*4882a593Smuzhiyun DIV_ROUND_UP(entries, VNIC_RQ_BUF_BLK_ENTRIES)
80*4882a593Smuzhiyun #define VNIC_RQ_BUF_BLKS_MAX VNIC_RQ_BUF_BLKS_NEEDED(4096)
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun struct vnic_rq_buf {
83*4882a593Smuzhiyun struct vnic_rq_buf *next;
84*4882a593Smuzhiyun dma_addr_t dma_addr;
85*4882a593Smuzhiyun void *os_buf;
86*4882a593Smuzhiyun unsigned int os_buf_index;
87*4882a593Smuzhiyun unsigned int len;
88*4882a593Smuzhiyun unsigned int index;
89*4882a593Smuzhiyun void *desc;
90*4882a593Smuzhiyun };
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun struct vnic_rq {
93*4882a593Smuzhiyun unsigned int index;
94*4882a593Smuzhiyun struct vnic_dev *vdev;
95*4882a593Smuzhiyun struct vnic_rq_ctrl __iomem *ctrl; /* memory-mapped */
96*4882a593Smuzhiyun struct vnic_dev_ring ring;
97*4882a593Smuzhiyun struct vnic_rq_buf *bufs[VNIC_RQ_BUF_BLKS_MAX];
98*4882a593Smuzhiyun struct vnic_rq_buf *to_use;
99*4882a593Smuzhiyun struct vnic_rq_buf *to_clean;
100*4882a593Smuzhiyun void *os_buf_head;
101*4882a593Smuzhiyun unsigned int buf_index;
102*4882a593Smuzhiyun unsigned int pkts_outstanding;
103*4882a593Smuzhiyun };
104*4882a593Smuzhiyun
vnic_rq_desc_avail(struct vnic_rq * rq)105*4882a593Smuzhiyun static inline unsigned int vnic_rq_desc_avail(struct vnic_rq *rq)
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun /* how many does SW own? */
108*4882a593Smuzhiyun return rq->ring.desc_avail;
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun
vnic_rq_desc_used(struct vnic_rq * rq)111*4882a593Smuzhiyun static inline unsigned int vnic_rq_desc_used(struct vnic_rq *rq)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun /* how many does HW own? */
114*4882a593Smuzhiyun return rq->ring.desc_count - rq->ring.desc_avail - 1;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
vnic_rq_next_desc(struct vnic_rq * rq)117*4882a593Smuzhiyun static inline void *vnic_rq_next_desc(struct vnic_rq *rq)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun return rq->to_use->desc;
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun
vnic_rq_next_index(struct vnic_rq * rq)122*4882a593Smuzhiyun static inline unsigned int vnic_rq_next_index(struct vnic_rq *rq)
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun return rq->to_use->index;
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun
vnic_rq_next_buf_index(struct vnic_rq * rq)127*4882a593Smuzhiyun static inline unsigned int vnic_rq_next_buf_index(struct vnic_rq *rq)
128*4882a593Smuzhiyun {
129*4882a593Smuzhiyun return rq->buf_index++;
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun
vnic_rq_post(struct vnic_rq * rq,void * os_buf,unsigned int os_buf_index,dma_addr_t dma_addr,unsigned int len)132*4882a593Smuzhiyun static inline void vnic_rq_post(struct vnic_rq *rq,
133*4882a593Smuzhiyun void *os_buf, unsigned int os_buf_index,
134*4882a593Smuzhiyun dma_addr_t dma_addr, unsigned int len)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun struct vnic_rq_buf *buf = rq->to_use;
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun buf->os_buf = os_buf;
139*4882a593Smuzhiyun buf->os_buf_index = os_buf_index;
140*4882a593Smuzhiyun buf->dma_addr = dma_addr;
141*4882a593Smuzhiyun buf->len = len;
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun buf = buf->next;
144*4882a593Smuzhiyun rq->to_use = buf;
145*4882a593Smuzhiyun rq->ring.desc_avail--;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun /* Move the posted_index every nth descriptor
148*4882a593Smuzhiyun */
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun #ifndef VNIC_RQ_RETURN_RATE
151*4882a593Smuzhiyun #define VNIC_RQ_RETURN_RATE 0xf /* keep 2^n - 1 */
152*4882a593Smuzhiyun #endif
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun if ((buf->index & VNIC_RQ_RETURN_RATE) == 0) {
155*4882a593Smuzhiyun /* Adding write memory barrier prevents compiler and/or CPU
156*4882a593Smuzhiyun * reordering, thus avoiding descriptor posting before
157*4882a593Smuzhiyun * descriptor is initialized. Otherwise, hardware can read
158*4882a593Smuzhiyun * stale descriptor fields.
159*4882a593Smuzhiyun */
160*4882a593Smuzhiyun wmb();
161*4882a593Smuzhiyun iowrite32(buf->index, &rq->ctrl->posted_index);
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun
vnic_rq_posting_soon(struct vnic_rq * rq)165*4882a593Smuzhiyun static inline int vnic_rq_posting_soon(struct vnic_rq *rq)
166*4882a593Smuzhiyun {
167*4882a593Smuzhiyun return (rq->to_use->index & VNIC_RQ_RETURN_RATE) == 0;
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun
vnic_rq_return_descs(struct vnic_rq * rq,unsigned int count)170*4882a593Smuzhiyun static inline void vnic_rq_return_descs(struct vnic_rq *rq, unsigned int count)
171*4882a593Smuzhiyun {
172*4882a593Smuzhiyun rq->ring.desc_avail += count;
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun enum desc_return_options {
176*4882a593Smuzhiyun VNIC_RQ_RETURN_DESC,
177*4882a593Smuzhiyun VNIC_RQ_DEFER_RETURN_DESC,
178*4882a593Smuzhiyun };
179*4882a593Smuzhiyun
vnic_rq_service(struct vnic_rq * rq,struct cq_desc * cq_desc,u16 completed_index,int desc_return,void (* buf_service)(struct vnic_rq * rq,struct cq_desc * cq_desc,struct vnic_rq_buf * buf,int skipped,void * opaque),void * opaque)180*4882a593Smuzhiyun static inline void vnic_rq_service(struct vnic_rq *rq,
181*4882a593Smuzhiyun struct cq_desc *cq_desc, u16 completed_index,
182*4882a593Smuzhiyun int desc_return, void (*buf_service)(struct vnic_rq *rq,
183*4882a593Smuzhiyun struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
184*4882a593Smuzhiyun int skipped, void *opaque), void *opaque)
185*4882a593Smuzhiyun {
186*4882a593Smuzhiyun struct vnic_rq_buf *buf;
187*4882a593Smuzhiyun int skipped;
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun buf = rq->to_clean;
190*4882a593Smuzhiyun while (1) {
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun skipped = (buf->index != completed_index);
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun (*buf_service)(rq, cq_desc, buf, skipped, opaque);
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun if (desc_return == VNIC_RQ_RETURN_DESC)
197*4882a593Smuzhiyun rq->ring.desc_avail++;
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun rq->to_clean = buf->next;
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun if (!skipped)
202*4882a593Smuzhiyun break;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun buf = rq->to_clean;
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun
vnic_rq_fill(struct vnic_rq * rq,int (* buf_fill)(struct vnic_rq * rq))208*4882a593Smuzhiyun static inline int vnic_rq_fill(struct vnic_rq *rq,
209*4882a593Smuzhiyun int (*buf_fill)(struct vnic_rq *rq))
210*4882a593Smuzhiyun {
211*4882a593Smuzhiyun int err;
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun while (vnic_rq_desc_avail(rq) > 1) {
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun err = (*buf_fill)(rq);
216*4882a593Smuzhiyun if (err)
217*4882a593Smuzhiyun return err;
218*4882a593Smuzhiyun }
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun return 0;
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun void vnic_rq_free(struct vnic_rq *rq);
224*4882a593Smuzhiyun int vnic_rq_alloc(struct vnic_dev *vdev, struct vnic_rq *rq, unsigned int index,
225*4882a593Smuzhiyun unsigned int desc_count, unsigned int desc_size);
226*4882a593Smuzhiyun void vnic_rq_init(struct vnic_rq *rq, unsigned int cq_index,
227*4882a593Smuzhiyun unsigned int error_interrupt_enable,
228*4882a593Smuzhiyun unsigned int error_interrupt_offset);
229*4882a593Smuzhiyun unsigned int vnic_rq_error_status(struct vnic_rq *rq);
230*4882a593Smuzhiyun void vnic_rq_enable(struct vnic_rq *rq);
231*4882a593Smuzhiyun int vnic_rq_disable(struct vnic_rq *rq);
232*4882a593Smuzhiyun void vnic_rq_clean(struct vnic_rq *rq,
233*4882a593Smuzhiyun void (*buf_clean)(struct vnic_rq *rq, struct vnic_rq_buf *buf));
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun #endif /* _VNIC_RQ_H_ */
236