1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
4*4882a593Smuzhiyun * Copyright (c) 2014- QLogic Corporation.
5*4882a593Smuzhiyun * All rights reserved
6*4882a593Smuzhiyun * www.qlogic.com
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Linux driver for QLogic BR-series Fibre Channel Host Bus Adapter.
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #ifndef __BFA_IOC_H__
12*4882a593Smuzhiyun #define __BFA_IOC_H__
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include "bfad_drv.h"
15*4882a593Smuzhiyun #include "bfa_cs.h"
16*4882a593Smuzhiyun #include "bfi.h"
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #define BFA_DBG_FWTRC_ENTS (BFI_IOC_TRC_ENTS)
19*4882a593Smuzhiyun #define BFA_DBG_FWTRC_LEN \
20*4882a593Smuzhiyun (BFA_DBG_FWTRC_ENTS * sizeof(struct bfa_trc_s) + \
21*4882a593Smuzhiyun (sizeof(struct bfa_trc_mod_s) - \
22*4882a593Smuzhiyun BFA_TRC_MAX * sizeof(struct bfa_trc_s)))
23*4882a593Smuzhiyun /*
24*4882a593Smuzhiyun * BFA timer declarations
25*4882a593Smuzhiyun */
26*4882a593Smuzhiyun typedef void (*bfa_timer_cbfn_t)(void *);
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun /*
29*4882a593Smuzhiyun * BFA timer data structure
30*4882a593Smuzhiyun */
31*4882a593Smuzhiyun struct bfa_timer_s {
32*4882a593Smuzhiyun struct list_head qe;
33*4882a593Smuzhiyun bfa_timer_cbfn_t timercb;
34*4882a593Smuzhiyun void *arg;
35*4882a593Smuzhiyun int timeout; /* in millisecs */
36*4882a593Smuzhiyun };
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun /*
39*4882a593Smuzhiyun * Timer module structure
40*4882a593Smuzhiyun */
41*4882a593Smuzhiyun struct bfa_timer_mod_s {
42*4882a593Smuzhiyun struct list_head timer_q;
43*4882a593Smuzhiyun };
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun #define BFA_TIMER_FREQ 200 /* specified in millisecs */
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun void bfa_timer_beat(struct bfa_timer_mod_s *mod);
48*4882a593Smuzhiyun void bfa_timer_begin(struct bfa_timer_mod_s *mod, struct bfa_timer_s *timer,
49*4882a593Smuzhiyun bfa_timer_cbfn_t timercb, void *arg,
50*4882a593Smuzhiyun unsigned int timeout);
51*4882a593Smuzhiyun void bfa_timer_stop(struct bfa_timer_s *timer);
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun /*
54*4882a593Smuzhiyun * Generic Scatter Gather Element used by driver
55*4882a593Smuzhiyun */
56*4882a593Smuzhiyun struct bfa_sge_s {
57*4882a593Smuzhiyun u32 sg_len;
58*4882a593Smuzhiyun void *sg_addr;
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun #define bfa_sge_word_swap(__sge) do { \
62*4882a593Smuzhiyun ((u32 *)(__sge))[0] = swab32(((u32 *)(__sge))[0]); \
63*4882a593Smuzhiyun ((u32 *)(__sge))[1] = swab32(((u32 *)(__sge))[1]); \
64*4882a593Smuzhiyun ((u32 *)(__sge))[2] = swab32(((u32 *)(__sge))[2]); \
65*4882a593Smuzhiyun } while (0)
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun #define bfa_swap_words(_x) ( \
68*4882a593Smuzhiyun ((u64)(_x) << 32) | ((u64)(_x) >> 32))
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun #ifdef __BIG_ENDIAN
71*4882a593Smuzhiyun #define bfa_sge_to_be(_x)
72*4882a593Smuzhiyun #define bfa_sge_to_le(_x) bfa_sge_word_swap(_x)
73*4882a593Smuzhiyun #define bfa_sgaddr_le(_x) bfa_swap_words(_x)
74*4882a593Smuzhiyun #else
75*4882a593Smuzhiyun #define bfa_sge_to_be(_x) bfa_sge_word_swap(_x)
76*4882a593Smuzhiyun #define bfa_sge_to_le(_x)
77*4882a593Smuzhiyun #define bfa_sgaddr_le(_x) (_x)
78*4882a593Smuzhiyun #endif
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun /*
81*4882a593Smuzhiyun * BFA memory resources
82*4882a593Smuzhiyun */
83*4882a593Smuzhiyun struct bfa_mem_dma_s {
84*4882a593Smuzhiyun struct list_head qe; /* Queue of DMA elements */
85*4882a593Smuzhiyun u32 mem_len; /* Total Length in Bytes */
86*4882a593Smuzhiyun u8 *kva; /* kernel virtual address */
87*4882a593Smuzhiyun u64 dma; /* dma address if DMA memory */
88*4882a593Smuzhiyun u8 *kva_curp; /* kva allocation cursor */
89*4882a593Smuzhiyun u64 dma_curp; /* dma allocation cursor */
90*4882a593Smuzhiyun };
91*4882a593Smuzhiyun #define bfa_mem_dma_t struct bfa_mem_dma_s
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun struct bfa_mem_kva_s {
94*4882a593Smuzhiyun struct list_head qe; /* Queue of KVA elements */
95*4882a593Smuzhiyun u32 mem_len; /* Total Length in Bytes */
96*4882a593Smuzhiyun u8 *kva; /* kernel virtual address */
97*4882a593Smuzhiyun u8 *kva_curp; /* kva allocation cursor */
98*4882a593Smuzhiyun };
99*4882a593Smuzhiyun #define bfa_mem_kva_t struct bfa_mem_kva_s
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun struct bfa_meminfo_s {
102*4882a593Smuzhiyun struct bfa_mem_dma_s dma_info;
103*4882a593Smuzhiyun struct bfa_mem_kva_s kva_info;
104*4882a593Smuzhiyun };
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun /* BFA memory segment setup helpers */
bfa_mem_dma_setup(struct bfa_meminfo_s * meminfo,struct bfa_mem_dma_s * dm_ptr,size_t seg_sz)107*4882a593Smuzhiyun static inline void bfa_mem_dma_setup(struct bfa_meminfo_s *meminfo,
108*4882a593Smuzhiyun struct bfa_mem_dma_s *dm_ptr,
109*4882a593Smuzhiyun size_t seg_sz)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun dm_ptr->mem_len = seg_sz;
112*4882a593Smuzhiyun if (seg_sz)
113*4882a593Smuzhiyun list_add_tail(&dm_ptr->qe, &meminfo->dma_info.qe);
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun
bfa_mem_kva_setup(struct bfa_meminfo_s * meminfo,struct bfa_mem_kva_s * kva_ptr,size_t seg_sz)116*4882a593Smuzhiyun static inline void bfa_mem_kva_setup(struct bfa_meminfo_s *meminfo,
117*4882a593Smuzhiyun struct bfa_mem_kva_s *kva_ptr,
118*4882a593Smuzhiyun size_t seg_sz)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun kva_ptr->mem_len = seg_sz;
121*4882a593Smuzhiyun if (seg_sz)
122*4882a593Smuzhiyun list_add_tail(&kva_ptr->qe, &meminfo->kva_info.qe);
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun /* BFA dma memory segments iterator */
126*4882a593Smuzhiyun #define bfa_mem_dma_sptr(_mod, _i) (&(_mod)->dma_seg[(_i)])
127*4882a593Smuzhiyun #define bfa_mem_dma_seg_iter(_mod, _sptr, _nr, _i) \
128*4882a593Smuzhiyun for (_i = 0, _sptr = bfa_mem_dma_sptr(_mod, _i); _i < (_nr); \
129*4882a593Smuzhiyun _i++, _sptr = bfa_mem_dma_sptr(_mod, _i))
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun #define bfa_mem_kva_curp(_mod) ((_mod)->kva_seg.kva_curp)
132*4882a593Smuzhiyun #define bfa_mem_dma_virt(_sptr) ((_sptr)->kva_curp)
133*4882a593Smuzhiyun #define bfa_mem_dma_phys(_sptr) ((_sptr)->dma_curp)
134*4882a593Smuzhiyun #define bfa_mem_dma_len(_sptr) ((_sptr)->mem_len)
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun /* Get the corresponding dma buf kva for a req - from the tag */
137*4882a593Smuzhiyun #define bfa_mem_get_dmabuf_kva(_mod, _tag, _rqsz) \
138*4882a593Smuzhiyun (((u8 *)(_mod)->dma_seg[BFI_MEM_SEG_FROM_TAG(_tag, _rqsz)].kva_curp) +\
139*4882a593Smuzhiyun BFI_MEM_SEG_REQ_OFFSET(_tag, _rqsz) * (_rqsz))
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun /* Get the corresponding dma buf pa for a req - from the tag */
142*4882a593Smuzhiyun #define bfa_mem_get_dmabuf_pa(_mod, _tag, _rqsz) \
143*4882a593Smuzhiyun ((_mod)->dma_seg[BFI_MEM_SEG_FROM_TAG(_tag, _rqsz)].dma_curp + \
144*4882a593Smuzhiyun BFI_MEM_SEG_REQ_OFFSET(_tag, _rqsz) * (_rqsz))
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun /*
147*4882a593Smuzhiyun * PCI device information required by IOC
148*4882a593Smuzhiyun */
149*4882a593Smuzhiyun struct bfa_pcidev_s {
150*4882a593Smuzhiyun int pci_slot;
151*4882a593Smuzhiyun u8 pci_func;
152*4882a593Smuzhiyun u16 device_id;
153*4882a593Smuzhiyun u16 ssid;
154*4882a593Smuzhiyun void __iomem *pci_bar_kva;
155*4882a593Smuzhiyun };
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun /*
158*4882a593Smuzhiyun * Structure used to remember the DMA-able memory block's KVA and Physical
159*4882a593Smuzhiyun * Address
160*4882a593Smuzhiyun */
161*4882a593Smuzhiyun struct bfa_dma_s {
162*4882a593Smuzhiyun void *kva; /* ! Kernel virtual address */
163*4882a593Smuzhiyun u64 pa; /* ! Physical address */
164*4882a593Smuzhiyun };
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun #define BFA_DMA_ALIGN_SZ 256
167*4882a593Smuzhiyun #define BFA_ROUNDUP(_l, _s) (((_l) + ((_s) - 1)) & ~((_s) - 1))
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun /*
170*4882a593Smuzhiyun * smem size for Crossbow and Catapult
171*4882a593Smuzhiyun */
172*4882a593Smuzhiyun #define BFI_SMEM_CB_SIZE 0x200000U /* ! 2MB for crossbow */
173*4882a593Smuzhiyun #define BFI_SMEM_CT_SIZE 0x280000U /* ! 2.5MB for catapult */
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun #define bfa_dma_be_addr_set(dma_addr, pa) \
176*4882a593Smuzhiyun __bfa_dma_be_addr_set(&dma_addr, (u64)pa)
177*4882a593Smuzhiyun static inline void
__bfa_dma_be_addr_set(union bfi_addr_u * dma_addr,u64 pa)178*4882a593Smuzhiyun __bfa_dma_be_addr_set(union bfi_addr_u *dma_addr, u64 pa)
179*4882a593Smuzhiyun {
180*4882a593Smuzhiyun dma_addr->a32.addr_lo = cpu_to_be32(pa);
181*4882a593Smuzhiyun dma_addr->a32.addr_hi = cpu_to_be32(pa >> 32);
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun #define bfa_alen_set(__alen, __len, __pa) \
185*4882a593Smuzhiyun __bfa_alen_set(__alen, __len, (u64)__pa)
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun static inline void
__bfa_alen_set(struct bfi_alen_s * alen,u32 len,u64 pa)188*4882a593Smuzhiyun __bfa_alen_set(struct bfi_alen_s *alen, u32 len, u64 pa)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun alen->al_len = cpu_to_be32(len);
191*4882a593Smuzhiyun bfa_dma_be_addr_set(alen->al_addr, pa);
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun struct bfa_ioc_regs_s {
195*4882a593Smuzhiyun void __iomem *hfn_mbox_cmd;
196*4882a593Smuzhiyun void __iomem *hfn_mbox;
197*4882a593Smuzhiyun void __iomem *lpu_mbox_cmd;
198*4882a593Smuzhiyun void __iomem *lpu_mbox;
199*4882a593Smuzhiyun void __iomem *lpu_read_stat;
200*4882a593Smuzhiyun void __iomem *pss_ctl_reg;
201*4882a593Smuzhiyun void __iomem *pss_err_status_reg;
202*4882a593Smuzhiyun void __iomem *app_pll_fast_ctl_reg;
203*4882a593Smuzhiyun void __iomem *app_pll_slow_ctl_reg;
204*4882a593Smuzhiyun void __iomem *ioc_sem_reg;
205*4882a593Smuzhiyun void __iomem *ioc_usage_sem_reg;
206*4882a593Smuzhiyun void __iomem *ioc_init_sem_reg;
207*4882a593Smuzhiyun void __iomem *ioc_usage_reg;
208*4882a593Smuzhiyun void __iomem *host_page_num_fn;
209*4882a593Smuzhiyun void __iomem *heartbeat;
210*4882a593Smuzhiyun void __iomem *ioc_fwstate;
211*4882a593Smuzhiyun void __iomem *alt_ioc_fwstate;
212*4882a593Smuzhiyun void __iomem *ll_halt;
213*4882a593Smuzhiyun void __iomem *alt_ll_halt;
214*4882a593Smuzhiyun void __iomem *err_set;
215*4882a593Smuzhiyun void __iomem *ioc_fail_sync;
216*4882a593Smuzhiyun void __iomem *shirq_isr_next;
217*4882a593Smuzhiyun void __iomem *shirq_msk_next;
218*4882a593Smuzhiyun void __iomem *smem_page_start;
219*4882a593Smuzhiyun u32 smem_pg0;
220*4882a593Smuzhiyun };
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun #define bfa_mem_read(_raddr, _off) swab32(readl(((_raddr) + (_off))))
223*4882a593Smuzhiyun #define bfa_mem_write(_raddr, _off, _val) \
224*4882a593Smuzhiyun writel(swab32((_val)), ((_raddr) + (_off)))
225*4882a593Smuzhiyun /*
226*4882a593Smuzhiyun * IOC Mailbox structures
227*4882a593Smuzhiyun */
228*4882a593Smuzhiyun struct bfa_mbox_cmd_s {
229*4882a593Smuzhiyun struct list_head qe;
230*4882a593Smuzhiyun u32 msg[BFI_IOC_MSGSZ];
231*4882a593Smuzhiyun };
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun /*
234*4882a593Smuzhiyun * IOC mailbox module
235*4882a593Smuzhiyun */
236*4882a593Smuzhiyun typedef void (*bfa_ioc_mbox_mcfunc_t)(void *cbarg, struct bfi_mbmsg_s *m);
237*4882a593Smuzhiyun struct bfa_ioc_mbox_mod_s {
238*4882a593Smuzhiyun struct list_head cmd_q; /* pending mbox queue */
239*4882a593Smuzhiyun int nmclass; /* number of handlers */
240*4882a593Smuzhiyun struct {
241*4882a593Smuzhiyun bfa_ioc_mbox_mcfunc_t cbfn; /* message handlers */
242*4882a593Smuzhiyun void *cbarg;
243*4882a593Smuzhiyun } mbhdlr[BFI_MC_MAX];
244*4882a593Smuzhiyun };
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun /*
247*4882a593Smuzhiyun * IOC callback function interfaces
248*4882a593Smuzhiyun */
249*4882a593Smuzhiyun typedef void (*bfa_ioc_enable_cbfn_t)(void *bfa, enum bfa_status status);
250*4882a593Smuzhiyun typedef void (*bfa_ioc_disable_cbfn_t)(void *bfa);
251*4882a593Smuzhiyun typedef void (*bfa_ioc_hbfail_cbfn_t)(void *bfa);
252*4882a593Smuzhiyun typedef void (*bfa_ioc_reset_cbfn_t)(void *bfa);
253*4882a593Smuzhiyun struct bfa_ioc_cbfn_s {
254*4882a593Smuzhiyun bfa_ioc_enable_cbfn_t enable_cbfn;
255*4882a593Smuzhiyun bfa_ioc_disable_cbfn_t disable_cbfn;
256*4882a593Smuzhiyun bfa_ioc_hbfail_cbfn_t hbfail_cbfn;
257*4882a593Smuzhiyun bfa_ioc_reset_cbfn_t reset_cbfn;
258*4882a593Smuzhiyun };
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun /*
261*4882a593Smuzhiyun * IOC event notification mechanism.
262*4882a593Smuzhiyun */
263*4882a593Smuzhiyun enum bfa_ioc_event_e {
264*4882a593Smuzhiyun BFA_IOC_E_ENABLED = 1,
265*4882a593Smuzhiyun BFA_IOC_E_DISABLED = 2,
266*4882a593Smuzhiyun BFA_IOC_E_FAILED = 3,
267*4882a593Smuzhiyun };
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun typedef void (*bfa_ioc_notify_cbfn_t)(void *, enum bfa_ioc_event_e);
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun struct bfa_ioc_notify_s {
272*4882a593Smuzhiyun struct list_head qe;
273*4882a593Smuzhiyun bfa_ioc_notify_cbfn_t cbfn;
274*4882a593Smuzhiyun void *cbarg;
275*4882a593Smuzhiyun };
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun /*
278*4882a593Smuzhiyun * Initialize a IOC event notification structure
279*4882a593Smuzhiyun */
280*4882a593Smuzhiyun #define bfa_ioc_notify_init(__notify, __cbfn, __cbarg) do { \
281*4882a593Smuzhiyun (__notify)->cbfn = (__cbfn); \
282*4882a593Smuzhiyun (__notify)->cbarg = (__cbarg); \
283*4882a593Smuzhiyun } while (0)
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun struct bfa_iocpf_s {
286*4882a593Smuzhiyun bfa_fsm_t fsm;
287*4882a593Smuzhiyun struct bfa_ioc_s *ioc;
288*4882a593Smuzhiyun bfa_boolean_t fw_mismatch_notified;
289*4882a593Smuzhiyun bfa_boolean_t auto_recover;
290*4882a593Smuzhiyun u32 poll_time;
291*4882a593Smuzhiyun };
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun struct bfa_ioc_s {
294*4882a593Smuzhiyun bfa_fsm_t fsm;
295*4882a593Smuzhiyun struct bfa_s *bfa;
296*4882a593Smuzhiyun struct bfa_pcidev_s pcidev;
297*4882a593Smuzhiyun struct bfa_timer_mod_s *timer_mod;
298*4882a593Smuzhiyun struct bfa_timer_s ioc_timer;
299*4882a593Smuzhiyun struct bfa_timer_s sem_timer;
300*4882a593Smuzhiyun struct bfa_timer_s hb_timer;
301*4882a593Smuzhiyun u32 hb_count;
302*4882a593Smuzhiyun struct list_head notify_q;
303*4882a593Smuzhiyun void *dbg_fwsave;
304*4882a593Smuzhiyun int dbg_fwsave_len;
305*4882a593Smuzhiyun bfa_boolean_t dbg_fwsave_once;
306*4882a593Smuzhiyun enum bfi_pcifn_class clscode;
307*4882a593Smuzhiyun struct bfa_ioc_regs_s ioc_regs;
308*4882a593Smuzhiyun struct bfa_trc_mod_s *trcmod;
309*4882a593Smuzhiyun struct bfa_ioc_drv_stats_s stats;
310*4882a593Smuzhiyun bfa_boolean_t fcmode;
311*4882a593Smuzhiyun bfa_boolean_t pllinit;
312*4882a593Smuzhiyun bfa_boolean_t stats_busy; /* outstanding stats */
313*4882a593Smuzhiyun u8 port_id;
314*4882a593Smuzhiyun struct bfa_dma_s attr_dma;
315*4882a593Smuzhiyun struct bfi_ioc_attr_s *attr;
316*4882a593Smuzhiyun struct bfa_ioc_cbfn_s *cbfn;
317*4882a593Smuzhiyun struct bfa_ioc_mbox_mod_s mbox_mod;
318*4882a593Smuzhiyun struct bfa_ioc_hwif_s *ioc_hwif;
319*4882a593Smuzhiyun struct bfa_iocpf_s iocpf;
320*4882a593Smuzhiyun enum bfi_asic_gen asic_gen;
321*4882a593Smuzhiyun enum bfi_asic_mode asic_mode;
322*4882a593Smuzhiyun enum bfi_port_mode port0_mode;
323*4882a593Smuzhiyun enum bfi_port_mode port1_mode;
324*4882a593Smuzhiyun enum bfa_mode_s port_mode;
325*4882a593Smuzhiyun u8 ad_cap_bm; /* adapter cap bit mask */
326*4882a593Smuzhiyun u8 port_mode_cfg; /* config port mode */
327*4882a593Smuzhiyun int ioc_aen_seq;
328*4882a593Smuzhiyun };
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun struct bfa_ioc_hwif_s {
331*4882a593Smuzhiyun bfa_status_t (*ioc_pll_init) (void __iomem *rb, enum bfi_asic_mode m);
332*4882a593Smuzhiyun bfa_boolean_t (*ioc_firmware_lock) (struct bfa_ioc_s *ioc);
333*4882a593Smuzhiyun void (*ioc_firmware_unlock) (struct bfa_ioc_s *ioc);
334*4882a593Smuzhiyun void (*ioc_reg_init) (struct bfa_ioc_s *ioc);
335*4882a593Smuzhiyun void (*ioc_map_port) (struct bfa_ioc_s *ioc);
336*4882a593Smuzhiyun void (*ioc_isr_mode_set) (struct bfa_ioc_s *ioc,
337*4882a593Smuzhiyun bfa_boolean_t msix);
338*4882a593Smuzhiyun void (*ioc_notify_fail) (struct bfa_ioc_s *ioc);
339*4882a593Smuzhiyun void (*ioc_ownership_reset) (struct bfa_ioc_s *ioc);
340*4882a593Smuzhiyun bfa_boolean_t (*ioc_sync_start) (struct bfa_ioc_s *ioc);
341*4882a593Smuzhiyun void (*ioc_sync_join) (struct bfa_ioc_s *ioc);
342*4882a593Smuzhiyun void (*ioc_sync_leave) (struct bfa_ioc_s *ioc);
343*4882a593Smuzhiyun void (*ioc_sync_ack) (struct bfa_ioc_s *ioc);
344*4882a593Smuzhiyun bfa_boolean_t (*ioc_sync_complete) (struct bfa_ioc_s *ioc);
345*4882a593Smuzhiyun bfa_boolean_t (*ioc_lpu_read_stat) (struct bfa_ioc_s *ioc);
346*4882a593Smuzhiyun void (*ioc_set_fwstate) (struct bfa_ioc_s *ioc,
347*4882a593Smuzhiyun enum bfi_ioc_state fwstate);
348*4882a593Smuzhiyun enum bfi_ioc_state (*ioc_get_fwstate) (struct bfa_ioc_s *ioc);
349*4882a593Smuzhiyun void (*ioc_set_alt_fwstate) (struct bfa_ioc_s *ioc,
350*4882a593Smuzhiyun enum bfi_ioc_state fwstate);
351*4882a593Smuzhiyun enum bfi_ioc_state (*ioc_get_alt_fwstate) (struct bfa_ioc_s *ioc);
352*4882a593Smuzhiyun };
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun /*
355*4882a593Smuzhiyun * Queue element to wait for room in request queue. FIFO order is
356*4882a593Smuzhiyun * maintained when fullfilling requests.
357*4882a593Smuzhiyun */
358*4882a593Smuzhiyun struct bfa_reqq_wait_s {
359*4882a593Smuzhiyun struct list_head qe;
360*4882a593Smuzhiyun void (*qresume) (void *cbarg);
361*4882a593Smuzhiyun void *cbarg;
362*4882a593Smuzhiyun };
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun typedef void (*bfa_cb_cbfn_t) (void *cbarg, bfa_boolean_t complete);
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun /*
367*4882a593Smuzhiyun * Generic BFA callback element.
368*4882a593Smuzhiyun */
369*4882a593Smuzhiyun struct bfa_cb_qe_s {
370*4882a593Smuzhiyun struct list_head qe;
371*4882a593Smuzhiyun bfa_cb_cbfn_t cbfn;
372*4882a593Smuzhiyun bfa_boolean_t once;
373*4882a593Smuzhiyun bfa_boolean_t pre_rmv; /* set for stack based qe(s) */
374*4882a593Smuzhiyun bfa_status_t fw_status; /* to access fw status in comp proc */
375*4882a593Smuzhiyun void *cbarg;
376*4882a593Smuzhiyun };
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun /*
379*4882a593Smuzhiyun * IOCFC state machine definitions/declarations
380*4882a593Smuzhiyun */
381*4882a593Smuzhiyun enum iocfc_event {
382*4882a593Smuzhiyun IOCFC_E_INIT = 1, /* IOCFC init request */
383*4882a593Smuzhiyun IOCFC_E_START = 2, /* IOCFC mod start request */
384*4882a593Smuzhiyun IOCFC_E_STOP = 3, /* IOCFC stop request */
385*4882a593Smuzhiyun IOCFC_E_ENABLE = 4, /* IOCFC enable request */
386*4882a593Smuzhiyun IOCFC_E_DISABLE = 5, /* IOCFC disable request */
387*4882a593Smuzhiyun IOCFC_E_IOC_ENABLED = 6, /* IOC enabled message */
388*4882a593Smuzhiyun IOCFC_E_IOC_DISABLED = 7, /* IOC disabled message */
389*4882a593Smuzhiyun IOCFC_E_IOC_FAILED = 8, /* failure notice by IOC sm */
390*4882a593Smuzhiyun IOCFC_E_DCONF_DONE = 9, /* dconf read/write done */
391*4882a593Smuzhiyun IOCFC_E_CFG_DONE = 10, /* IOCFC config complete */
392*4882a593Smuzhiyun };
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun /*
395*4882a593Smuzhiyun * ASIC block configurtion related
396*4882a593Smuzhiyun */
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun typedef void (*bfa_ablk_cbfn_t)(void *, enum bfa_status);
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun struct bfa_ablk_s {
401*4882a593Smuzhiyun struct bfa_ioc_s *ioc;
402*4882a593Smuzhiyun struct bfa_ablk_cfg_s *cfg;
403*4882a593Smuzhiyun u16 *pcifn;
404*4882a593Smuzhiyun struct bfa_dma_s dma_addr;
405*4882a593Smuzhiyun bfa_boolean_t busy;
406*4882a593Smuzhiyun struct bfa_mbox_cmd_s mb;
407*4882a593Smuzhiyun bfa_ablk_cbfn_t cbfn;
408*4882a593Smuzhiyun void *cbarg;
409*4882a593Smuzhiyun struct bfa_ioc_notify_s ioc_notify;
410*4882a593Smuzhiyun struct bfa_mem_dma_s ablk_dma;
411*4882a593Smuzhiyun };
412*4882a593Smuzhiyun #define BFA_MEM_ABLK_DMA(__bfa) (&((__bfa)->modules.ablk.ablk_dma))
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun /*
415*4882a593Smuzhiyun * SFP module specific
416*4882a593Smuzhiyun */
417*4882a593Smuzhiyun typedef void (*bfa_cb_sfp_t) (void *cbarg, bfa_status_t status);
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun struct bfa_sfp_s {
420*4882a593Smuzhiyun void *dev;
421*4882a593Smuzhiyun struct bfa_ioc_s *ioc;
422*4882a593Smuzhiyun struct bfa_trc_mod_s *trcmod;
423*4882a593Smuzhiyun struct sfp_mem_s *sfpmem;
424*4882a593Smuzhiyun bfa_cb_sfp_t cbfn;
425*4882a593Smuzhiyun void *cbarg;
426*4882a593Smuzhiyun enum bfi_sfp_mem_e memtype; /* mem access type */
427*4882a593Smuzhiyun u32 status;
428*4882a593Smuzhiyun struct bfa_mbox_cmd_s mbcmd;
429*4882a593Smuzhiyun u8 *dbuf_kva; /* dma buf virtual address */
430*4882a593Smuzhiyun u64 dbuf_pa; /* dma buf physical address */
431*4882a593Smuzhiyun struct bfa_ioc_notify_s ioc_notify;
432*4882a593Smuzhiyun enum bfa_defs_sfp_media_e *media;
433*4882a593Smuzhiyun enum bfa_port_speed portspeed;
434*4882a593Smuzhiyun bfa_cb_sfp_t state_query_cbfn;
435*4882a593Smuzhiyun void *state_query_cbarg;
436*4882a593Smuzhiyun u8 lock;
437*4882a593Smuzhiyun u8 data_valid; /* data in dbuf is valid */
438*4882a593Smuzhiyun u8 state; /* sfp state */
439*4882a593Smuzhiyun u8 state_query_lock;
440*4882a593Smuzhiyun struct bfa_mem_dma_s sfp_dma;
441*4882a593Smuzhiyun u8 is_elb; /* eloopback */
442*4882a593Smuzhiyun };
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun #define BFA_SFP_MOD(__bfa) (&(__bfa)->modules.sfp)
445*4882a593Smuzhiyun #define BFA_MEM_SFP_DMA(__bfa) (&(BFA_SFP_MOD(__bfa)->sfp_dma))
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun u32 bfa_sfp_meminfo(void);
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun void bfa_sfp_attach(struct bfa_sfp_s *sfp, struct bfa_ioc_s *ioc,
450*4882a593Smuzhiyun void *dev, struct bfa_trc_mod_s *trcmod);
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun void bfa_sfp_memclaim(struct bfa_sfp_s *diag, u8 *dm_kva, u64 dm_pa);
453*4882a593Smuzhiyun void bfa_sfp_intr(void *bfaarg, struct bfi_mbmsg_s *msg);
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun bfa_status_t bfa_sfp_show(struct bfa_sfp_s *sfp, struct sfp_mem_s *sfpmem,
456*4882a593Smuzhiyun bfa_cb_sfp_t cbfn, void *cbarg);
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun bfa_status_t bfa_sfp_media(struct bfa_sfp_s *sfp,
459*4882a593Smuzhiyun enum bfa_defs_sfp_media_e *media,
460*4882a593Smuzhiyun bfa_cb_sfp_t cbfn, void *cbarg);
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun bfa_status_t bfa_sfp_speed(struct bfa_sfp_s *sfp,
463*4882a593Smuzhiyun enum bfa_port_speed portspeed,
464*4882a593Smuzhiyun bfa_cb_sfp_t cbfn, void *cbarg);
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun /*
467*4882a593Smuzhiyun * Flash module specific
468*4882a593Smuzhiyun */
469*4882a593Smuzhiyun typedef void (*bfa_cb_flash_t) (void *cbarg, bfa_status_t status);
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun struct bfa_flash_s {
472*4882a593Smuzhiyun struct bfa_ioc_s *ioc; /* back pointer to ioc */
473*4882a593Smuzhiyun struct bfa_trc_mod_s *trcmod;
474*4882a593Smuzhiyun u32 type; /* partition type */
475*4882a593Smuzhiyun u8 instance; /* partition instance */
476*4882a593Smuzhiyun u8 rsv[3];
477*4882a593Smuzhiyun u32 op_busy; /* operation busy flag */
478*4882a593Smuzhiyun u32 residue; /* residual length */
479*4882a593Smuzhiyun u32 offset; /* offset */
480*4882a593Smuzhiyun bfa_status_t status; /* status */
481*4882a593Smuzhiyun u8 *dbuf_kva; /* dma buf virtual address */
482*4882a593Smuzhiyun u64 dbuf_pa; /* dma buf physical address */
483*4882a593Smuzhiyun struct bfa_reqq_wait_s reqq_wait; /* to wait for room in reqq */
484*4882a593Smuzhiyun bfa_cb_flash_t cbfn; /* user callback function */
485*4882a593Smuzhiyun void *cbarg; /* user callback arg */
486*4882a593Smuzhiyun u8 *ubuf; /* user supplied buffer */
487*4882a593Smuzhiyun struct bfa_cb_qe_s hcb_qe; /* comp: BFA callback qelem */
488*4882a593Smuzhiyun u32 addr_off; /* partition address offset */
489*4882a593Smuzhiyun struct bfa_mbox_cmd_s mb; /* mailbox */
490*4882a593Smuzhiyun struct bfa_ioc_notify_s ioc_notify; /* ioc event notify */
491*4882a593Smuzhiyun struct bfa_mem_dma_s flash_dma;
492*4882a593Smuzhiyun };
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun #define BFA_FLASH(__bfa) (&(__bfa)->modules.flash)
495*4882a593Smuzhiyun #define BFA_MEM_FLASH_DMA(__bfa) (&(BFA_FLASH(__bfa)->flash_dma))
496*4882a593Smuzhiyun
497*4882a593Smuzhiyun bfa_status_t bfa_flash_get_attr(struct bfa_flash_s *flash,
498*4882a593Smuzhiyun struct bfa_flash_attr_s *attr,
499*4882a593Smuzhiyun bfa_cb_flash_t cbfn, void *cbarg);
500*4882a593Smuzhiyun bfa_status_t bfa_flash_erase_part(struct bfa_flash_s *flash,
501*4882a593Smuzhiyun enum bfa_flash_part_type type, u8 instance,
502*4882a593Smuzhiyun bfa_cb_flash_t cbfn, void *cbarg);
503*4882a593Smuzhiyun bfa_status_t bfa_flash_update_part(struct bfa_flash_s *flash,
504*4882a593Smuzhiyun enum bfa_flash_part_type type, u8 instance,
505*4882a593Smuzhiyun void *buf, u32 len, u32 offset,
506*4882a593Smuzhiyun bfa_cb_flash_t cbfn, void *cbarg);
507*4882a593Smuzhiyun bfa_status_t bfa_flash_read_part(struct bfa_flash_s *flash,
508*4882a593Smuzhiyun enum bfa_flash_part_type type, u8 instance, void *buf,
509*4882a593Smuzhiyun u32 len, u32 offset, bfa_cb_flash_t cbfn, void *cbarg);
510*4882a593Smuzhiyun u32 bfa_flash_meminfo(bfa_boolean_t mincfg);
511*4882a593Smuzhiyun void bfa_flash_attach(struct bfa_flash_s *flash, struct bfa_ioc_s *ioc,
512*4882a593Smuzhiyun void *dev, struct bfa_trc_mod_s *trcmod, bfa_boolean_t mincfg);
513*4882a593Smuzhiyun void bfa_flash_memclaim(struct bfa_flash_s *flash,
514*4882a593Smuzhiyun u8 *dm_kva, u64 dm_pa, bfa_boolean_t mincfg);
515*4882a593Smuzhiyun bfa_status_t bfa_flash_raw_read(void __iomem *pci_bar_kva,
516*4882a593Smuzhiyun u32 offset, char *buf, u32 len);
517*4882a593Smuzhiyun
518*4882a593Smuzhiyun /*
519*4882a593Smuzhiyun * DIAG module specific
520*4882a593Smuzhiyun */
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun typedef void (*bfa_cb_diag_t) (void *cbarg, bfa_status_t status);
523*4882a593Smuzhiyun typedef void (*bfa_cb_diag_beacon_t) (void *dev, bfa_boolean_t beacon,
524*4882a593Smuzhiyun bfa_boolean_t link_e2e_beacon);
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun /*
527*4882a593Smuzhiyun * Firmware ping test results
528*4882a593Smuzhiyun */
529*4882a593Smuzhiyun struct bfa_diag_results_fwping {
530*4882a593Smuzhiyun u32 data; /* store the corrupted data */
531*4882a593Smuzhiyun u32 status;
532*4882a593Smuzhiyun u32 dmastatus;
533*4882a593Smuzhiyun u8 rsvd[4];
534*4882a593Smuzhiyun };
535*4882a593Smuzhiyun
536*4882a593Smuzhiyun struct bfa_diag_qtest_result_s {
537*4882a593Smuzhiyun u32 status;
538*4882a593Smuzhiyun u16 count; /* successful queue test count */
539*4882a593Smuzhiyun u8 queue;
540*4882a593Smuzhiyun u8 rsvd; /* 64-bit align */
541*4882a593Smuzhiyun };
542*4882a593Smuzhiyun
543*4882a593Smuzhiyun /*
544*4882a593Smuzhiyun * Firmware ping test results
545*4882a593Smuzhiyun */
546*4882a593Smuzhiyun struct bfa_diag_fwping_s {
547*4882a593Smuzhiyun struct bfa_diag_results_fwping *result;
548*4882a593Smuzhiyun bfa_cb_diag_t cbfn;
549*4882a593Smuzhiyun void *cbarg;
550*4882a593Smuzhiyun u32 data;
551*4882a593Smuzhiyun u8 lock;
552*4882a593Smuzhiyun u8 rsv[3];
553*4882a593Smuzhiyun u32 status;
554*4882a593Smuzhiyun u32 count;
555*4882a593Smuzhiyun struct bfa_mbox_cmd_s mbcmd;
556*4882a593Smuzhiyun u8 *dbuf_kva; /* dma buf virtual address */
557*4882a593Smuzhiyun u64 dbuf_pa; /* dma buf physical address */
558*4882a593Smuzhiyun };
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun /*
561*4882a593Smuzhiyun * Temperature sensor query results
562*4882a593Smuzhiyun */
563*4882a593Smuzhiyun struct bfa_diag_results_tempsensor_s {
564*4882a593Smuzhiyun u32 status;
565*4882a593Smuzhiyun u16 temp; /* 10-bit A/D value */
566*4882a593Smuzhiyun u16 brd_temp; /* 9-bit board temp */
567*4882a593Smuzhiyun u8 ts_junc; /* show junction tempsensor */
568*4882a593Smuzhiyun u8 ts_brd; /* show board tempsensor */
569*4882a593Smuzhiyun u8 rsvd[6]; /* keep 8 bytes alignment */
570*4882a593Smuzhiyun };
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun struct bfa_diag_tsensor_s {
573*4882a593Smuzhiyun bfa_cb_diag_t cbfn;
574*4882a593Smuzhiyun void *cbarg;
575*4882a593Smuzhiyun struct bfa_diag_results_tempsensor_s *temp;
576*4882a593Smuzhiyun u8 lock;
577*4882a593Smuzhiyun u8 rsv[3];
578*4882a593Smuzhiyun u32 status;
579*4882a593Smuzhiyun struct bfa_mbox_cmd_s mbcmd;
580*4882a593Smuzhiyun };
581*4882a593Smuzhiyun
582*4882a593Smuzhiyun struct bfa_diag_sfpshow_s {
583*4882a593Smuzhiyun struct sfp_mem_s *sfpmem;
584*4882a593Smuzhiyun bfa_cb_diag_t cbfn;
585*4882a593Smuzhiyun void *cbarg;
586*4882a593Smuzhiyun u8 lock;
587*4882a593Smuzhiyun u8 static_data;
588*4882a593Smuzhiyun u8 rsv[2];
589*4882a593Smuzhiyun u32 status;
590*4882a593Smuzhiyun struct bfa_mbox_cmd_s mbcmd;
591*4882a593Smuzhiyun u8 *dbuf_kva; /* dma buf virtual address */
592*4882a593Smuzhiyun u64 dbuf_pa; /* dma buf physical address */
593*4882a593Smuzhiyun };
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun struct bfa_diag_led_s {
596*4882a593Smuzhiyun struct bfa_mbox_cmd_s mbcmd;
597*4882a593Smuzhiyun bfa_boolean_t lock; /* 1: ledtest is operating */
598*4882a593Smuzhiyun };
599*4882a593Smuzhiyun
600*4882a593Smuzhiyun struct bfa_diag_beacon_s {
601*4882a593Smuzhiyun struct bfa_mbox_cmd_s mbcmd;
602*4882a593Smuzhiyun bfa_boolean_t state; /* port beacon state */
603*4882a593Smuzhiyun bfa_boolean_t link_e2e; /* link beacon state */
604*4882a593Smuzhiyun };
605*4882a593Smuzhiyun
606*4882a593Smuzhiyun struct bfa_diag_s {
607*4882a593Smuzhiyun void *dev;
608*4882a593Smuzhiyun struct bfa_ioc_s *ioc;
609*4882a593Smuzhiyun struct bfa_trc_mod_s *trcmod;
610*4882a593Smuzhiyun struct bfa_diag_fwping_s fwping;
611*4882a593Smuzhiyun struct bfa_diag_tsensor_s tsensor;
612*4882a593Smuzhiyun struct bfa_diag_sfpshow_s sfpshow;
613*4882a593Smuzhiyun struct bfa_diag_led_s ledtest;
614*4882a593Smuzhiyun struct bfa_diag_beacon_s beacon;
615*4882a593Smuzhiyun void *result;
616*4882a593Smuzhiyun struct bfa_timer_s timer;
617*4882a593Smuzhiyun bfa_cb_diag_beacon_t cbfn_beacon;
618*4882a593Smuzhiyun bfa_cb_diag_t cbfn;
619*4882a593Smuzhiyun void *cbarg;
620*4882a593Smuzhiyun u8 block;
621*4882a593Smuzhiyun u8 timer_active;
622*4882a593Smuzhiyun u8 rsvd[2];
623*4882a593Smuzhiyun u32 status;
624*4882a593Smuzhiyun struct bfa_ioc_notify_s ioc_notify;
625*4882a593Smuzhiyun struct bfa_mem_dma_s diag_dma;
626*4882a593Smuzhiyun };
627*4882a593Smuzhiyun
628*4882a593Smuzhiyun #define BFA_DIAG_MOD(__bfa) (&(__bfa)->modules.diag_mod)
629*4882a593Smuzhiyun #define BFA_MEM_DIAG_DMA(__bfa) (&(BFA_DIAG_MOD(__bfa)->diag_dma))
630*4882a593Smuzhiyun
631*4882a593Smuzhiyun u32 bfa_diag_meminfo(void);
632*4882a593Smuzhiyun void bfa_diag_memclaim(struct bfa_diag_s *diag, u8 *dm_kva, u64 dm_pa);
633*4882a593Smuzhiyun void bfa_diag_attach(struct bfa_diag_s *diag, struct bfa_ioc_s *ioc, void *dev,
634*4882a593Smuzhiyun bfa_cb_diag_beacon_t cbfn_beacon,
635*4882a593Smuzhiyun struct bfa_trc_mod_s *trcmod);
636*4882a593Smuzhiyun bfa_status_t bfa_diag_reg_read(struct bfa_diag_s *diag, u32 offset,
637*4882a593Smuzhiyun u32 len, u32 *buf, u32 force);
638*4882a593Smuzhiyun bfa_status_t bfa_diag_reg_write(struct bfa_diag_s *diag, u32 offset,
639*4882a593Smuzhiyun u32 len, u32 value, u32 force);
640*4882a593Smuzhiyun bfa_status_t bfa_diag_tsensor_query(struct bfa_diag_s *diag,
641*4882a593Smuzhiyun struct bfa_diag_results_tempsensor_s *result,
642*4882a593Smuzhiyun bfa_cb_diag_t cbfn, void *cbarg);
643*4882a593Smuzhiyun bfa_status_t bfa_diag_fwping(struct bfa_diag_s *diag, u32 cnt,
644*4882a593Smuzhiyun u32 pattern, struct bfa_diag_results_fwping *result,
645*4882a593Smuzhiyun bfa_cb_diag_t cbfn, void *cbarg);
646*4882a593Smuzhiyun bfa_status_t bfa_diag_sfpshow(struct bfa_diag_s *diag,
647*4882a593Smuzhiyun struct sfp_mem_s *sfpmem, u8 static_data,
648*4882a593Smuzhiyun bfa_cb_diag_t cbfn, void *cbarg);
649*4882a593Smuzhiyun bfa_status_t bfa_diag_memtest(struct bfa_diag_s *diag,
650*4882a593Smuzhiyun struct bfa_diag_memtest_s *memtest, u32 pattern,
651*4882a593Smuzhiyun struct bfa_diag_memtest_result *result,
652*4882a593Smuzhiyun bfa_cb_diag_t cbfn, void *cbarg);
653*4882a593Smuzhiyun bfa_status_t bfa_diag_ledtest(struct bfa_diag_s *diag,
654*4882a593Smuzhiyun struct bfa_diag_ledtest_s *ledtest);
655*4882a593Smuzhiyun bfa_status_t bfa_diag_beacon_port(struct bfa_diag_s *diag,
656*4882a593Smuzhiyun bfa_boolean_t beacon, bfa_boolean_t link_e2e_beacon,
657*4882a593Smuzhiyun u32 sec);
658*4882a593Smuzhiyun
659*4882a593Smuzhiyun /*
660*4882a593Smuzhiyun * PHY module specific
661*4882a593Smuzhiyun */
662*4882a593Smuzhiyun typedef void (*bfa_cb_phy_t) (void *cbarg, bfa_status_t status);
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun struct bfa_phy_s {
665*4882a593Smuzhiyun struct bfa_ioc_s *ioc; /* back pointer to ioc */
666*4882a593Smuzhiyun struct bfa_trc_mod_s *trcmod; /* trace module */
667*4882a593Smuzhiyun u8 instance; /* port instance */
668*4882a593Smuzhiyun u8 op_busy; /* operation busy flag */
669*4882a593Smuzhiyun u8 rsv[2];
670*4882a593Smuzhiyun u32 residue; /* residual length */
671*4882a593Smuzhiyun u32 offset; /* offset */
672*4882a593Smuzhiyun bfa_status_t status; /* status */
673*4882a593Smuzhiyun u8 *dbuf_kva; /* dma buf virtual address */
674*4882a593Smuzhiyun u64 dbuf_pa; /* dma buf physical address */
675*4882a593Smuzhiyun struct bfa_reqq_wait_s reqq_wait; /* to wait for room in reqq */
676*4882a593Smuzhiyun bfa_cb_phy_t cbfn; /* user callback function */
677*4882a593Smuzhiyun void *cbarg; /* user callback arg */
678*4882a593Smuzhiyun u8 *ubuf; /* user supplied buffer */
679*4882a593Smuzhiyun struct bfa_cb_qe_s hcb_qe; /* comp: BFA callback qelem */
680*4882a593Smuzhiyun u32 addr_off; /* phy address offset */
681*4882a593Smuzhiyun struct bfa_mbox_cmd_s mb; /* mailbox */
682*4882a593Smuzhiyun struct bfa_ioc_notify_s ioc_notify; /* ioc event notify */
683*4882a593Smuzhiyun struct bfa_mem_dma_s phy_dma;
684*4882a593Smuzhiyun };
685*4882a593Smuzhiyun #define BFA_PHY(__bfa) (&(__bfa)->modules.phy)
686*4882a593Smuzhiyun #define BFA_MEM_PHY_DMA(__bfa) (&(BFA_PHY(__bfa)->phy_dma))
687*4882a593Smuzhiyun
688*4882a593Smuzhiyun bfa_boolean_t bfa_phy_busy(struct bfa_ioc_s *ioc);
689*4882a593Smuzhiyun bfa_status_t bfa_phy_get_attr(struct bfa_phy_s *phy, u8 instance,
690*4882a593Smuzhiyun struct bfa_phy_attr_s *attr,
691*4882a593Smuzhiyun bfa_cb_phy_t cbfn, void *cbarg);
692*4882a593Smuzhiyun bfa_status_t bfa_phy_get_stats(struct bfa_phy_s *phy, u8 instance,
693*4882a593Smuzhiyun struct bfa_phy_stats_s *stats,
694*4882a593Smuzhiyun bfa_cb_phy_t cbfn, void *cbarg);
695*4882a593Smuzhiyun bfa_status_t bfa_phy_update(struct bfa_phy_s *phy, u8 instance,
696*4882a593Smuzhiyun void *buf, u32 len, u32 offset,
697*4882a593Smuzhiyun bfa_cb_phy_t cbfn, void *cbarg);
698*4882a593Smuzhiyun bfa_status_t bfa_phy_read(struct bfa_phy_s *phy, u8 instance,
699*4882a593Smuzhiyun void *buf, u32 len, u32 offset,
700*4882a593Smuzhiyun bfa_cb_phy_t cbfn, void *cbarg);
701*4882a593Smuzhiyun
702*4882a593Smuzhiyun u32 bfa_phy_meminfo(bfa_boolean_t mincfg);
703*4882a593Smuzhiyun void bfa_phy_attach(struct bfa_phy_s *phy, struct bfa_ioc_s *ioc,
704*4882a593Smuzhiyun void *dev, struct bfa_trc_mod_s *trcmod, bfa_boolean_t mincfg);
705*4882a593Smuzhiyun void bfa_phy_memclaim(struct bfa_phy_s *phy,
706*4882a593Smuzhiyun u8 *dm_kva, u64 dm_pa, bfa_boolean_t mincfg);
707*4882a593Smuzhiyun void bfa_phy_intr(void *phyarg, struct bfi_mbmsg_s *msg);
708*4882a593Smuzhiyun
709*4882a593Smuzhiyun /*
710*4882a593Smuzhiyun * FRU module specific
711*4882a593Smuzhiyun */
712*4882a593Smuzhiyun typedef void (*bfa_cb_fru_t) (void *cbarg, bfa_status_t status);
713*4882a593Smuzhiyun
714*4882a593Smuzhiyun struct bfa_fru_s {
715*4882a593Smuzhiyun struct bfa_ioc_s *ioc; /* back pointer to ioc */
716*4882a593Smuzhiyun struct bfa_trc_mod_s *trcmod; /* trace module */
717*4882a593Smuzhiyun u8 op_busy; /* operation busy flag */
718*4882a593Smuzhiyun u8 rsv[3];
719*4882a593Smuzhiyun u32 residue; /* residual length */
720*4882a593Smuzhiyun u32 offset; /* offset */
721*4882a593Smuzhiyun bfa_status_t status; /* status */
722*4882a593Smuzhiyun u8 *dbuf_kva; /* dma buf virtual address */
723*4882a593Smuzhiyun u64 dbuf_pa; /* dma buf physical address */
724*4882a593Smuzhiyun struct bfa_reqq_wait_s reqq_wait; /* to wait for room in reqq */
725*4882a593Smuzhiyun bfa_cb_fru_t cbfn; /* user callback function */
726*4882a593Smuzhiyun void *cbarg; /* user callback arg */
727*4882a593Smuzhiyun u8 *ubuf; /* user supplied buffer */
728*4882a593Smuzhiyun struct bfa_cb_qe_s hcb_qe; /* comp: BFA callback qelem */
729*4882a593Smuzhiyun u32 addr_off; /* fru address offset */
730*4882a593Smuzhiyun struct bfa_mbox_cmd_s mb; /* mailbox */
731*4882a593Smuzhiyun struct bfa_ioc_notify_s ioc_notify; /* ioc event notify */
732*4882a593Smuzhiyun struct bfa_mem_dma_s fru_dma;
733*4882a593Smuzhiyun u8 trfr_cmpl;
734*4882a593Smuzhiyun };
735*4882a593Smuzhiyun
736*4882a593Smuzhiyun #define BFA_FRU(__bfa) (&(__bfa)->modules.fru)
737*4882a593Smuzhiyun #define BFA_MEM_FRU_DMA(__bfa) (&(BFA_FRU(__bfa)->fru_dma))
738*4882a593Smuzhiyun
739*4882a593Smuzhiyun bfa_status_t bfa_fruvpd_update(struct bfa_fru_s *fru,
740*4882a593Smuzhiyun void *buf, u32 len, u32 offset,
741*4882a593Smuzhiyun bfa_cb_fru_t cbfn, void *cbarg, u8 trfr_cmpl);
742*4882a593Smuzhiyun bfa_status_t bfa_fruvpd_read(struct bfa_fru_s *fru,
743*4882a593Smuzhiyun void *buf, u32 len, u32 offset,
744*4882a593Smuzhiyun bfa_cb_fru_t cbfn, void *cbarg);
745*4882a593Smuzhiyun bfa_status_t bfa_fruvpd_get_max_size(struct bfa_fru_s *fru, u32 *max_size);
746*4882a593Smuzhiyun bfa_status_t bfa_tfru_write(struct bfa_fru_s *fru,
747*4882a593Smuzhiyun void *buf, u32 len, u32 offset,
748*4882a593Smuzhiyun bfa_cb_fru_t cbfn, void *cbarg);
749*4882a593Smuzhiyun bfa_status_t bfa_tfru_read(struct bfa_fru_s *fru,
750*4882a593Smuzhiyun void *buf, u32 len, u32 offset,
751*4882a593Smuzhiyun bfa_cb_fru_t cbfn, void *cbarg);
752*4882a593Smuzhiyun u32 bfa_fru_meminfo(bfa_boolean_t mincfg);
753*4882a593Smuzhiyun void bfa_fru_attach(struct bfa_fru_s *fru, struct bfa_ioc_s *ioc,
754*4882a593Smuzhiyun void *dev, struct bfa_trc_mod_s *trcmod, bfa_boolean_t mincfg);
755*4882a593Smuzhiyun void bfa_fru_memclaim(struct bfa_fru_s *fru,
756*4882a593Smuzhiyun u8 *dm_kva, u64 dm_pa, bfa_boolean_t mincfg);
757*4882a593Smuzhiyun void bfa_fru_intr(void *fruarg, struct bfi_mbmsg_s *msg);
758*4882a593Smuzhiyun
759*4882a593Smuzhiyun /*
760*4882a593Smuzhiyun * Driver Config( dconf) specific
761*4882a593Smuzhiyun */
762*4882a593Smuzhiyun #define BFI_DCONF_SIGNATURE 0xabcdabcd
763*4882a593Smuzhiyun #define BFI_DCONF_VERSION 1
764*4882a593Smuzhiyun
765*4882a593Smuzhiyun #pragma pack(1)
766*4882a593Smuzhiyun struct bfa_dconf_hdr_s {
767*4882a593Smuzhiyun u32 signature;
768*4882a593Smuzhiyun u32 version;
769*4882a593Smuzhiyun };
770*4882a593Smuzhiyun
771*4882a593Smuzhiyun struct bfa_dconf_s {
772*4882a593Smuzhiyun struct bfa_dconf_hdr_s hdr;
773*4882a593Smuzhiyun struct bfa_lunmask_cfg_s lun_mask;
774*4882a593Smuzhiyun struct bfa_throttle_cfg_s throttle_cfg;
775*4882a593Smuzhiyun };
776*4882a593Smuzhiyun #pragma pack()
777*4882a593Smuzhiyun
778*4882a593Smuzhiyun struct bfa_dconf_mod_s {
779*4882a593Smuzhiyun bfa_sm_t sm;
780*4882a593Smuzhiyun u8 instance;
781*4882a593Smuzhiyun bfa_boolean_t read_data_valid;
782*4882a593Smuzhiyun bfa_boolean_t min_cfg;
783*4882a593Smuzhiyun struct bfa_timer_s timer;
784*4882a593Smuzhiyun struct bfa_s *bfa;
785*4882a593Smuzhiyun void *bfad;
786*4882a593Smuzhiyun void *trcmod;
787*4882a593Smuzhiyun struct bfa_dconf_s *dconf;
788*4882a593Smuzhiyun struct bfa_mem_kva_s kva_seg;
789*4882a593Smuzhiyun };
790*4882a593Smuzhiyun
791*4882a593Smuzhiyun #define BFA_DCONF_MOD(__bfa) \
792*4882a593Smuzhiyun (&(__bfa)->modules.dconf_mod)
793*4882a593Smuzhiyun #define BFA_MEM_DCONF_KVA(__bfa) (&(BFA_DCONF_MOD(__bfa)->kva_seg))
794*4882a593Smuzhiyun #define bfa_dconf_read_data_valid(__bfa) \
795*4882a593Smuzhiyun (BFA_DCONF_MOD(__bfa)->read_data_valid)
796*4882a593Smuzhiyun #define BFA_DCONF_UPDATE_TOV 5000 /* memtest timeout in msec */
797*4882a593Smuzhiyun #define bfa_dconf_get_min_cfg(__bfa) \
798*4882a593Smuzhiyun (BFA_DCONF_MOD(__bfa)->min_cfg)
799*4882a593Smuzhiyun
800*4882a593Smuzhiyun void bfa_dconf_modinit(struct bfa_s *bfa);
801*4882a593Smuzhiyun void bfa_dconf_modexit(struct bfa_s *bfa);
802*4882a593Smuzhiyun bfa_status_t bfa_dconf_update(struct bfa_s *bfa);
803*4882a593Smuzhiyun
804*4882a593Smuzhiyun /*
805*4882a593Smuzhiyun * IOC specfic macros
806*4882a593Smuzhiyun */
807*4882a593Smuzhiyun #define bfa_ioc_pcifn(__ioc) ((__ioc)->pcidev.pci_func)
808*4882a593Smuzhiyun #define bfa_ioc_devid(__ioc) ((__ioc)->pcidev.device_id)
809*4882a593Smuzhiyun #define bfa_ioc_bar0(__ioc) ((__ioc)->pcidev.pci_bar_kva)
810*4882a593Smuzhiyun #define bfa_ioc_portid(__ioc) ((__ioc)->port_id)
811*4882a593Smuzhiyun #define bfa_ioc_asic_gen(__ioc) ((__ioc)->asic_gen)
812*4882a593Smuzhiyun #define bfa_ioc_is_cna(__ioc) \
813*4882a593Smuzhiyun ((bfa_ioc_get_type(__ioc) == BFA_IOC_TYPE_FCoE) || \
814*4882a593Smuzhiyun (bfa_ioc_get_type(__ioc) == BFA_IOC_TYPE_LL))
815*4882a593Smuzhiyun #define bfa_ioc_fetch_stats(__ioc, __stats) \
816*4882a593Smuzhiyun (((__stats)->drv_stats) = (__ioc)->stats)
817*4882a593Smuzhiyun #define bfa_ioc_clr_stats(__ioc) \
818*4882a593Smuzhiyun memset(&(__ioc)->stats, 0, sizeof((__ioc)->stats))
819*4882a593Smuzhiyun #define bfa_ioc_maxfrsize(__ioc) ((__ioc)->attr->maxfrsize)
820*4882a593Smuzhiyun #define bfa_ioc_rx_bbcredit(__ioc) ((__ioc)->attr->rx_bbcredit)
821*4882a593Smuzhiyun #define bfa_ioc_speed_sup(__ioc) \
822*4882a593Smuzhiyun ((bfa_ioc_is_cna(__ioc)) ? BFA_PORT_SPEED_10GBPS : \
823*4882a593Smuzhiyun BFI_ADAPTER_GETP(SPEED, (__ioc)->attr->adapter_prop))
824*4882a593Smuzhiyun #define bfa_ioc_get_nports(__ioc) \
825*4882a593Smuzhiyun BFI_ADAPTER_GETP(NPORTS, (__ioc)->attr->adapter_prop)
826*4882a593Smuzhiyun
827*4882a593Smuzhiyun #define bfa_ioc_stats(_ioc, _stats) ((_ioc)->stats._stats++)
828*4882a593Smuzhiyun #define BFA_IOC_FWIMG_MINSZ (16 * 1024)
829*4882a593Smuzhiyun #define BFA_IOC_FW_SMEM_SIZE(__ioc) \
830*4882a593Smuzhiyun ((bfa_ioc_asic_gen(__ioc) == BFI_ASIC_GEN_CB) \
831*4882a593Smuzhiyun ? BFI_SMEM_CB_SIZE : BFI_SMEM_CT_SIZE)
832*4882a593Smuzhiyun #define BFA_IOC_FLASH_CHUNK_NO(off) (off / BFI_FLASH_CHUNK_SZ_WORDS)
833*4882a593Smuzhiyun #define BFA_IOC_FLASH_OFFSET_IN_CHUNK(off) (off % BFI_FLASH_CHUNK_SZ_WORDS)
834*4882a593Smuzhiyun #define BFA_IOC_FLASH_CHUNK_ADDR(chunkno) (chunkno * BFI_FLASH_CHUNK_SZ_WORDS)
835*4882a593Smuzhiyun
836*4882a593Smuzhiyun /*
837*4882a593Smuzhiyun * IOC mailbox interface
838*4882a593Smuzhiyun */
839*4882a593Smuzhiyun void bfa_ioc_mbox_queue(struct bfa_ioc_s *ioc, struct bfa_mbox_cmd_s *cmd);
840*4882a593Smuzhiyun void bfa_ioc_mbox_register(struct bfa_ioc_s *ioc,
841*4882a593Smuzhiyun bfa_ioc_mbox_mcfunc_t *mcfuncs);
842*4882a593Smuzhiyun void bfa_ioc_mbox_isr(struct bfa_ioc_s *ioc);
843*4882a593Smuzhiyun void bfa_ioc_mbox_send(struct bfa_ioc_s *ioc, void *ioc_msg, int len);
844*4882a593Smuzhiyun bfa_boolean_t bfa_ioc_msgget(struct bfa_ioc_s *ioc, void *mbmsg);
845*4882a593Smuzhiyun void bfa_ioc_mbox_regisr(struct bfa_ioc_s *ioc, enum bfi_mclass mc,
846*4882a593Smuzhiyun bfa_ioc_mbox_mcfunc_t cbfn, void *cbarg);
847*4882a593Smuzhiyun
848*4882a593Smuzhiyun /*
849*4882a593Smuzhiyun * IOC interfaces
850*4882a593Smuzhiyun */
851*4882a593Smuzhiyun
852*4882a593Smuzhiyun #define bfa_ioc_pll_init_asic(__ioc) \
853*4882a593Smuzhiyun ((__ioc)->ioc_hwif->ioc_pll_init((__ioc)->pcidev.pci_bar_kva, \
854*4882a593Smuzhiyun (__ioc)->asic_mode))
855*4882a593Smuzhiyun
856*4882a593Smuzhiyun bfa_status_t bfa_ioc_pll_init(struct bfa_ioc_s *ioc);
857*4882a593Smuzhiyun bfa_status_t bfa_ioc_cb_pll_init(void __iomem *rb, enum bfi_asic_mode mode);
858*4882a593Smuzhiyun bfa_status_t bfa_ioc_ct_pll_init(void __iomem *rb, enum bfi_asic_mode mode);
859*4882a593Smuzhiyun bfa_status_t bfa_ioc_ct2_pll_init(void __iomem *rb, enum bfi_asic_mode mode);
860*4882a593Smuzhiyun
861*4882a593Smuzhiyun #define bfa_ioc_isr_mode_set(__ioc, __msix) do { \
862*4882a593Smuzhiyun if ((__ioc)->ioc_hwif->ioc_isr_mode_set) \
863*4882a593Smuzhiyun ((__ioc)->ioc_hwif->ioc_isr_mode_set(__ioc, __msix)); \
864*4882a593Smuzhiyun } while (0)
865*4882a593Smuzhiyun #define bfa_ioc_ownership_reset(__ioc) \
866*4882a593Smuzhiyun ((__ioc)->ioc_hwif->ioc_ownership_reset(__ioc))
867*4882a593Smuzhiyun #define bfa_ioc_get_fcmode(__ioc) ((__ioc)->fcmode)
868*4882a593Smuzhiyun #define bfa_ioc_lpu_read_stat(__ioc) do { \
869*4882a593Smuzhiyun if ((__ioc)->ioc_hwif->ioc_lpu_read_stat) \
870*4882a593Smuzhiyun ((__ioc)->ioc_hwif->ioc_lpu_read_stat(__ioc)); \
871*4882a593Smuzhiyun } while (0)
872*4882a593Smuzhiyun
873*4882a593Smuzhiyun void bfa_ioc_set_cb_hwif(struct bfa_ioc_s *ioc);
874*4882a593Smuzhiyun void bfa_ioc_set_ct_hwif(struct bfa_ioc_s *ioc);
875*4882a593Smuzhiyun void bfa_ioc_set_ct2_hwif(struct bfa_ioc_s *ioc);
876*4882a593Smuzhiyun void bfa_ioc_ct2_poweron(struct bfa_ioc_s *ioc);
877*4882a593Smuzhiyun
878*4882a593Smuzhiyun void bfa_ioc_attach(struct bfa_ioc_s *ioc, void *bfa,
879*4882a593Smuzhiyun struct bfa_ioc_cbfn_s *cbfn, struct bfa_timer_mod_s *timer_mod);
880*4882a593Smuzhiyun void bfa_ioc_auto_recover(bfa_boolean_t auto_recover);
881*4882a593Smuzhiyun void bfa_ioc_detach(struct bfa_ioc_s *ioc);
882*4882a593Smuzhiyun void bfa_ioc_suspend(struct bfa_ioc_s *ioc);
883*4882a593Smuzhiyun void bfa_ioc_pci_init(struct bfa_ioc_s *ioc, struct bfa_pcidev_s *pcidev,
884*4882a593Smuzhiyun enum bfi_pcifn_class clscode);
885*4882a593Smuzhiyun void bfa_ioc_mem_claim(struct bfa_ioc_s *ioc, u8 *dm_kva, u64 dm_pa);
886*4882a593Smuzhiyun void bfa_ioc_enable(struct bfa_ioc_s *ioc);
887*4882a593Smuzhiyun void bfa_ioc_disable(struct bfa_ioc_s *ioc);
888*4882a593Smuzhiyun bfa_boolean_t bfa_ioc_intx_claim(struct bfa_ioc_s *ioc);
889*4882a593Smuzhiyun
890*4882a593Smuzhiyun bfa_status_t bfa_ioc_boot(struct bfa_ioc_s *ioc, u32 boot_type,
891*4882a593Smuzhiyun u32 boot_env);
892*4882a593Smuzhiyun void bfa_ioc_isr(struct bfa_ioc_s *ioc, struct bfi_mbmsg_s *msg);
893*4882a593Smuzhiyun void bfa_ioc_error_isr(struct bfa_ioc_s *ioc);
894*4882a593Smuzhiyun bfa_boolean_t bfa_ioc_is_operational(struct bfa_ioc_s *ioc);
895*4882a593Smuzhiyun bfa_boolean_t bfa_ioc_is_initialized(struct bfa_ioc_s *ioc);
896*4882a593Smuzhiyun bfa_boolean_t bfa_ioc_is_disabled(struct bfa_ioc_s *ioc);
897*4882a593Smuzhiyun bfa_boolean_t bfa_ioc_is_acq_addr(struct bfa_ioc_s *ioc);
898*4882a593Smuzhiyun bfa_boolean_t bfa_ioc_fw_mismatch(struct bfa_ioc_s *ioc);
899*4882a593Smuzhiyun bfa_boolean_t bfa_ioc_adapter_is_disabled(struct bfa_ioc_s *ioc);
900*4882a593Smuzhiyun void bfa_ioc_reset_fwstate(struct bfa_ioc_s *ioc);
901*4882a593Smuzhiyun enum bfa_ioc_type_e bfa_ioc_get_type(struct bfa_ioc_s *ioc);
902*4882a593Smuzhiyun void bfa_ioc_get_adapter_serial_num(struct bfa_ioc_s *ioc, char *serial_num);
903*4882a593Smuzhiyun void bfa_ioc_get_adapter_fw_ver(struct bfa_ioc_s *ioc, char *fw_ver);
904*4882a593Smuzhiyun void bfa_ioc_get_adapter_optrom_ver(struct bfa_ioc_s *ioc, char *optrom_ver);
905*4882a593Smuzhiyun void bfa_ioc_get_adapter_model(struct bfa_ioc_s *ioc, char *model);
906*4882a593Smuzhiyun void bfa_ioc_get_adapter_manufacturer(struct bfa_ioc_s *ioc,
907*4882a593Smuzhiyun char *manufacturer);
908*4882a593Smuzhiyun void bfa_ioc_get_pci_chip_rev(struct bfa_ioc_s *ioc, char *chip_rev);
909*4882a593Smuzhiyun enum bfa_ioc_state bfa_ioc_get_state(struct bfa_ioc_s *ioc);
910*4882a593Smuzhiyun
911*4882a593Smuzhiyun void bfa_ioc_get_attr(struct bfa_ioc_s *ioc, struct bfa_ioc_attr_s *ioc_attr);
912*4882a593Smuzhiyun void bfa_ioc_get_adapter_attr(struct bfa_ioc_s *ioc,
913*4882a593Smuzhiyun struct bfa_adapter_attr_s *ad_attr);
914*4882a593Smuzhiyun void bfa_ioc_debug_memclaim(struct bfa_ioc_s *ioc, void *dbg_fwsave);
915*4882a593Smuzhiyun bfa_status_t bfa_ioc_debug_fwsave(struct bfa_ioc_s *ioc, void *trcdata,
916*4882a593Smuzhiyun int *trclen);
917*4882a593Smuzhiyun bfa_status_t bfa_ioc_debug_fwtrc(struct bfa_ioc_s *ioc, void *trcdata,
918*4882a593Smuzhiyun int *trclen);
919*4882a593Smuzhiyun bfa_status_t bfa_ioc_debug_fwcore(struct bfa_ioc_s *ioc, void *buf,
920*4882a593Smuzhiyun u32 *offset, int *buflen);
921*4882a593Smuzhiyun bfa_status_t bfa_ioc_fwsig_invalidate(struct bfa_ioc_s *ioc);
922*4882a593Smuzhiyun bfa_boolean_t bfa_ioc_sem_get(void __iomem *sem_reg);
923*4882a593Smuzhiyun void bfa_ioc_fwver_get(struct bfa_ioc_s *ioc,
924*4882a593Smuzhiyun struct bfi_ioc_image_hdr_s *fwhdr);
925*4882a593Smuzhiyun bfa_boolean_t bfa_ioc_fwver_cmp(struct bfa_ioc_s *ioc,
926*4882a593Smuzhiyun struct bfi_ioc_image_hdr_s *fwhdr);
927*4882a593Smuzhiyun void bfa_ioc_aen_post(struct bfa_ioc_s *ioc, enum bfa_ioc_aen_event event);
928*4882a593Smuzhiyun bfa_status_t bfa_ioc_fw_stats_get(struct bfa_ioc_s *ioc, void *stats);
929*4882a593Smuzhiyun bfa_status_t bfa_ioc_fw_stats_clear(struct bfa_ioc_s *ioc);
930*4882a593Smuzhiyun void bfa_ioc_debug_save_ftrc(struct bfa_ioc_s *ioc);
931*4882a593Smuzhiyun
932*4882a593Smuzhiyun /*
933*4882a593Smuzhiyun * asic block configuration related APIs
934*4882a593Smuzhiyun */
935*4882a593Smuzhiyun u32 bfa_ablk_meminfo(void);
936*4882a593Smuzhiyun void bfa_ablk_memclaim(struct bfa_ablk_s *ablk, u8 *dma_kva, u64 dma_pa);
937*4882a593Smuzhiyun void bfa_ablk_attach(struct bfa_ablk_s *ablk, struct bfa_ioc_s *ioc);
938*4882a593Smuzhiyun bfa_status_t bfa_ablk_query(struct bfa_ablk_s *ablk,
939*4882a593Smuzhiyun struct bfa_ablk_cfg_s *ablk_cfg,
940*4882a593Smuzhiyun bfa_ablk_cbfn_t cbfn, void *cbarg);
941*4882a593Smuzhiyun bfa_status_t bfa_ablk_adapter_config(struct bfa_ablk_s *ablk,
942*4882a593Smuzhiyun enum bfa_mode_s mode, int max_pf, int max_vf,
943*4882a593Smuzhiyun bfa_ablk_cbfn_t cbfn, void *cbarg);
944*4882a593Smuzhiyun bfa_status_t bfa_ablk_port_config(struct bfa_ablk_s *ablk, int port,
945*4882a593Smuzhiyun enum bfa_mode_s mode, int max_pf, int max_vf,
946*4882a593Smuzhiyun bfa_ablk_cbfn_t cbfn, void *cbarg);
947*4882a593Smuzhiyun bfa_status_t bfa_ablk_pf_create(struct bfa_ablk_s *ablk, u16 *pcifn,
948*4882a593Smuzhiyun u8 port, enum bfi_pcifn_class personality,
949*4882a593Smuzhiyun u16 bw_min, u16 bw_max, bfa_ablk_cbfn_t cbfn, void *cbarg);
950*4882a593Smuzhiyun bfa_status_t bfa_ablk_pf_delete(struct bfa_ablk_s *ablk, int pcifn,
951*4882a593Smuzhiyun bfa_ablk_cbfn_t cbfn, void *cbarg);
952*4882a593Smuzhiyun bfa_status_t bfa_ablk_pf_update(struct bfa_ablk_s *ablk, int pcifn,
953*4882a593Smuzhiyun u16 bw_min, u16 bw_max, bfa_ablk_cbfn_t cbfn, void *cbarg);
954*4882a593Smuzhiyun bfa_status_t bfa_ablk_optrom_en(struct bfa_ablk_s *ablk,
955*4882a593Smuzhiyun bfa_ablk_cbfn_t cbfn, void *cbarg);
956*4882a593Smuzhiyun bfa_status_t bfa_ablk_optrom_dis(struct bfa_ablk_s *ablk,
957*4882a593Smuzhiyun bfa_ablk_cbfn_t cbfn, void *cbarg);
958*4882a593Smuzhiyun
959*4882a593Smuzhiyun bfa_status_t bfa_ioc_flash_img_get_chnk(struct bfa_ioc_s *ioc, u32 off,
960*4882a593Smuzhiyun u32 *fwimg);
961*4882a593Smuzhiyun /*
962*4882a593Smuzhiyun * bfa mfg wwn API functions
963*4882a593Smuzhiyun */
964*4882a593Smuzhiyun mac_t bfa_ioc_get_mac(struct bfa_ioc_s *ioc);
965*4882a593Smuzhiyun mac_t bfa_ioc_get_mfg_mac(struct bfa_ioc_s *ioc);
966*4882a593Smuzhiyun
967*4882a593Smuzhiyun /*
968*4882a593Smuzhiyun * F/W Image Size & Chunk
969*4882a593Smuzhiyun */
970*4882a593Smuzhiyun extern u32 bfi_image_cb_size;
971*4882a593Smuzhiyun extern u32 bfi_image_ct_size;
972*4882a593Smuzhiyun extern u32 bfi_image_ct2_size;
973*4882a593Smuzhiyun extern u32 *bfi_image_cb;
974*4882a593Smuzhiyun extern u32 *bfi_image_ct;
975*4882a593Smuzhiyun extern u32 *bfi_image_ct2;
976*4882a593Smuzhiyun
977*4882a593Smuzhiyun static inline u32 *
bfi_image_cb_get_chunk(u32 off)978*4882a593Smuzhiyun bfi_image_cb_get_chunk(u32 off)
979*4882a593Smuzhiyun {
980*4882a593Smuzhiyun return (u32 *)(bfi_image_cb + off);
981*4882a593Smuzhiyun }
982*4882a593Smuzhiyun
983*4882a593Smuzhiyun static inline u32 *
bfi_image_ct_get_chunk(u32 off)984*4882a593Smuzhiyun bfi_image_ct_get_chunk(u32 off)
985*4882a593Smuzhiyun {
986*4882a593Smuzhiyun return (u32 *)(bfi_image_ct + off);
987*4882a593Smuzhiyun }
988*4882a593Smuzhiyun
989*4882a593Smuzhiyun static inline u32 *
bfi_image_ct2_get_chunk(u32 off)990*4882a593Smuzhiyun bfi_image_ct2_get_chunk(u32 off)
991*4882a593Smuzhiyun {
992*4882a593Smuzhiyun return (u32 *)(bfi_image_ct2 + off);
993*4882a593Smuzhiyun }
994*4882a593Smuzhiyun
995*4882a593Smuzhiyun static inline u32*
bfa_cb_image_get_chunk(enum bfi_asic_gen asic_gen,u32 off)996*4882a593Smuzhiyun bfa_cb_image_get_chunk(enum bfi_asic_gen asic_gen, u32 off)
997*4882a593Smuzhiyun {
998*4882a593Smuzhiyun switch (asic_gen) {
999*4882a593Smuzhiyun case BFI_ASIC_GEN_CB:
1000*4882a593Smuzhiyun return bfi_image_cb_get_chunk(off);
1001*4882a593Smuzhiyun break;
1002*4882a593Smuzhiyun case BFI_ASIC_GEN_CT:
1003*4882a593Smuzhiyun return bfi_image_ct_get_chunk(off);
1004*4882a593Smuzhiyun break;
1005*4882a593Smuzhiyun case BFI_ASIC_GEN_CT2:
1006*4882a593Smuzhiyun return bfi_image_ct2_get_chunk(off);
1007*4882a593Smuzhiyun break;
1008*4882a593Smuzhiyun default:
1009*4882a593Smuzhiyun return NULL;
1010*4882a593Smuzhiyun }
1011*4882a593Smuzhiyun }
1012*4882a593Smuzhiyun
1013*4882a593Smuzhiyun static inline u32
bfa_cb_image_get_size(enum bfi_asic_gen asic_gen)1014*4882a593Smuzhiyun bfa_cb_image_get_size(enum bfi_asic_gen asic_gen)
1015*4882a593Smuzhiyun {
1016*4882a593Smuzhiyun switch (asic_gen) {
1017*4882a593Smuzhiyun case BFI_ASIC_GEN_CB:
1018*4882a593Smuzhiyun return bfi_image_cb_size;
1019*4882a593Smuzhiyun break;
1020*4882a593Smuzhiyun case BFI_ASIC_GEN_CT:
1021*4882a593Smuzhiyun return bfi_image_ct_size;
1022*4882a593Smuzhiyun break;
1023*4882a593Smuzhiyun case BFI_ASIC_GEN_CT2:
1024*4882a593Smuzhiyun return bfi_image_ct2_size;
1025*4882a593Smuzhiyun break;
1026*4882a593Smuzhiyun default:
1027*4882a593Smuzhiyun return 0;
1028*4882a593Smuzhiyun }
1029*4882a593Smuzhiyun }
1030*4882a593Smuzhiyun
1031*4882a593Smuzhiyun /*
1032*4882a593Smuzhiyun * CNA TRCMOD declaration
1033*4882a593Smuzhiyun */
1034*4882a593Smuzhiyun /*
1035*4882a593Smuzhiyun * !!! Only append to the enums defined here to avoid any versioning
1036*4882a593Smuzhiyun * !!! needed between trace utility and driver version
1037*4882a593Smuzhiyun */
1038*4882a593Smuzhiyun enum {
1039*4882a593Smuzhiyun BFA_TRC_CNA_PORT = 1,
1040*4882a593Smuzhiyun BFA_TRC_CNA_IOC = 2,
1041*4882a593Smuzhiyun BFA_TRC_CNA_IOC_CB = 3,
1042*4882a593Smuzhiyun BFA_TRC_CNA_IOC_CT = 4,
1043*4882a593Smuzhiyun };
1044*4882a593Smuzhiyun
1045*4882a593Smuzhiyun #endif /* __BFA_IOC_H__ */
1046