1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Instruction formats for the sequencer program downloaded to 3*4882a593Smuzhiyun * Aic7xxx SCSI host adapters 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 1997, 1998, 2000 Justin T. Gibbs. 6*4882a593Smuzhiyun * All rights reserved. 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or without 9*4882a593Smuzhiyun * modification, are permitted provided that the following conditions 10*4882a593Smuzhiyun * are met: 11*4882a593Smuzhiyun * 1. Redistributions of source code must retain the above copyright 12*4882a593Smuzhiyun * notice, this list of conditions, and the following disclaimer, 13*4882a593Smuzhiyun * without modification. 14*4882a593Smuzhiyun * 2. Redistributions in binary form must reproduce at minimum a disclaimer 15*4882a593Smuzhiyun * substantially similar to the "NO WARRANTY" disclaimer below 16*4882a593Smuzhiyun * ("Disclaimer") and any redistribution must be conditioned upon 17*4882a593Smuzhiyun * including a substantially similar Disclaimer requirement for further 18*4882a593Smuzhiyun * binary redistribution. 19*4882a593Smuzhiyun * 3. Neither the names of the above-listed copyright holders nor the names 20*4882a593Smuzhiyun * of any contributors may be used to endorse or promote products derived 21*4882a593Smuzhiyun * from this software without specific prior written permission. 22*4882a593Smuzhiyun * 23*4882a593Smuzhiyun * Alternatively, this software may be distributed under the terms of the 24*4882a593Smuzhiyun * GNU General Public License ("GPL") version 2 as published by the Free 25*4882a593Smuzhiyun * Software Foundation. 26*4882a593Smuzhiyun * 27*4882a593Smuzhiyun * NO WARRANTY 28*4882a593Smuzhiyun * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 29*4882a593Smuzhiyun * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 30*4882a593Smuzhiyun * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 31*4882a593Smuzhiyun * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 32*4882a593Smuzhiyun * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33*4882a593Smuzhiyun * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34*4882a593Smuzhiyun * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35*4882a593Smuzhiyun * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 36*4882a593Smuzhiyun * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 37*4882a593Smuzhiyun * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38*4882a593Smuzhiyun * POSSIBILITY OF SUCH DAMAGES. 39*4882a593Smuzhiyun * 40*4882a593Smuzhiyun * $Id: //depot/aic7xxx/aic7xxx/aicasm/aicasm_insformat.h#12 $ 41*4882a593Smuzhiyun * 42*4882a593Smuzhiyun * $FreeBSD$ 43*4882a593Smuzhiyun */ 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #include <asm/byteorder.h> 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun /* 8bit ALU logic operations */ 48*4882a593Smuzhiyun struct ins_format1 { 49*4882a593Smuzhiyun #ifdef __LITTLE_ENDIAN 50*4882a593Smuzhiyun uint32_t immediate : 8, 51*4882a593Smuzhiyun source : 9, 52*4882a593Smuzhiyun destination : 9, 53*4882a593Smuzhiyun ret : 1, 54*4882a593Smuzhiyun opcode : 4, 55*4882a593Smuzhiyun parity : 1; 56*4882a593Smuzhiyun #else 57*4882a593Smuzhiyun uint32_t parity : 1, 58*4882a593Smuzhiyun opcode : 4, 59*4882a593Smuzhiyun ret : 1, 60*4882a593Smuzhiyun destination : 9, 61*4882a593Smuzhiyun source : 9, 62*4882a593Smuzhiyun immediate : 8; 63*4882a593Smuzhiyun #endif 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun /* 8bit ALU shift/rotate operations */ 67*4882a593Smuzhiyun struct ins_format2 { 68*4882a593Smuzhiyun #ifdef __LITTLE_ENDIAN 69*4882a593Smuzhiyun uint32_t shift_control : 8, 70*4882a593Smuzhiyun source : 9, 71*4882a593Smuzhiyun destination : 9, 72*4882a593Smuzhiyun ret : 1, 73*4882a593Smuzhiyun opcode : 4, 74*4882a593Smuzhiyun parity : 1; 75*4882a593Smuzhiyun #else 76*4882a593Smuzhiyun uint32_t parity : 1, 77*4882a593Smuzhiyun opcode : 4, 78*4882a593Smuzhiyun ret : 1, 79*4882a593Smuzhiyun destination : 9, 80*4882a593Smuzhiyun source : 9, 81*4882a593Smuzhiyun shift_control : 8; 82*4882a593Smuzhiyun #endif 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun /* 8bit branch control operations */ 86*4882a593Smuzhiyun struct ins_format3 { 87*4882a593Smuzhiyun #ifdef __LITTLE_ENDIAN 88*4882a593Smuzhiyun uint32_t immediate : 8, 89*4882a593Smuzhiyun source : 9, 90*4882a593Smuzhiyun address : 10, 91*4882a593Smuzhiyun opcode : 4, 92*4882a593Smuzhiyun parity : 1; 93*4882a593Smuzhiyun #else 94*4882a593Smuzhiyun uint32_t parity : 1, 95*4882a593Smuzhiyun opcode : 4, 96*4882a593Smuzhiyun address : 10, 97*4882a593Smuzhiyun source : 9, 98*4882a593Smuzhiyun immediate : 8; 99*4882a593Smuzhiyun #endif 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun /* 16bit ALU logic operations */ 103*4882a593Smuzhiyun struct ins_format4 { 104*4882a593Smuzhiyun #ifdef __LITTLE_ENDIAN 105*4882a593Smuzhiyun uint32_t opcode_ext : 8, 106*4882a593Smuzhiyun source : 9, 107*4882a593Smuzhiyun destination : 9, 108*4882a593Smuzhiyun ret : 1, 109*4882a593Smuzhiyun opcode : 4, 110*4882a593Smuzhiyun parity : 1; 111*4882a593Smuzhiyun #else 112*4882a593Smuzhiyun uint32_t parity : 1, 113*4882a593Smuzhiyun opcode : 4, 114*4882a593Smuzhiyun ret : 1, 115*4882a593Smuzhiyun destination : 9, 116*4882a593Smuzhiyun source : 9, 117*4882a593Smuzhiyun opcode_ext : 8; 118*4882a593Smuzhiyun #endif 119*4882a593Smuzhiyun }; 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun /* 16bit branch control operations */ 122*4882a593Smuzhiyun struct ins_format5 { 123*4882a593Smuzhiyun #ifdef __LITTLE_ENDIAN 124*4882a593Smuzhiyun uint32_t opcode_ext : 8, 125*4882a593Smuzhiyun source : 9, 126*4882a593Smuzhiyun address : 10, 127*4882a593Smuzhiyun opcode : 4, 128*4882a593Smuzhiyun parity : 1; 129*4882a593Smuzhiyun #else 130*4882a593Smuzhiyun uint32_t parity : 1, 131*4882a593Smuzhiyun opcode : 4, 132*4882a593Smuzhiyun address : 10, 133*4882a593Smuzhiyun source : 9, 134*4882a593Smuzhiyun opcode_ext : 8; 135*4882a593Smuzhiyun #endif 136*4882a593Smuzhiyun }; 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun /* Far branch operations */ 139*4882a593Smuzhiyun struct ins_format6 { 140*4882a593Smuzhiyun #ifdef __LITTLE_ENDIAN 141*4882a593Smuzhiyun uint32_t page : 3, 142*4882a593Smuzhiyun opcode_ext : 5, 143*4882a593Smuzhiyun source : 9, 144*4882a593Smuzhiyun address : 10, 145*4882a593Smuzhiyun opcode : 4, 146*4882a593Smuzhiyun parity : 1; 147*4882a593Smuzhiyun #else 148*4882a593Smuzhiyun uint32_t parity : 1, 149*4882a593Smuzhiyun opcode : 4, 150*4882a593Smuzhiyun address : 10, 151*4882a593Smuzhiyun source : 9, 152*4882a593Smuzhiyun opcode_ext : 5, 153*4882a593Smuzhiyun page : 3; 154*4882a593Smuzhiyun #endif 155*4882a593Smuzhiyun }; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun union ins_formats { 158*4882a593Smuzhiyun struct ins_format1 format1; 159*4882a593Smuzhiyun struct ins_format2 format2; 160*4882a593Smuzhiyun struct ins_format3 format3; 161*4882a593Smuzhiyun struct ins_format4 format4; 162*4882a593Smuzhiyun struct ins_format5 format5; 163*4882a593Smuzhiyun struct ins_format6 format6; 164*4882a593Smuzhiyun uint8_t bytes[4]; 165*4882a593Smuzhiyun uint32_t integer; 166*4882a593Smuzhiyun }; 167*4882a593Smuzhiyun struct instruction { 168*4882a593Smuzhiyun union ins_formats format; 169*4882a593Smuzhiyun u_int srcline; 170*4882a593Smuzhiyun struct symbol *patch_label; 171*4882a593Smuzhiyun STAILQ_ENTRY(instruction) links; 172*4882a593Smuzhiyun }; 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun #define AIC_OP_OR 0x0 175*4882a593Smuzhiyun #define AIC_OP_AND 0x1 176*4882a593Smuzhiyun #define AIC_OP_XOR 0x2 177*4882a593Smuzhiyun #define AIC_OP_ADD 0x3 178*4882a593Smuzhiyun #define AIC_OP_ADC 0x4 179*4882a593Smuzhiyun #define AIC_OP_ROL 0x5 180*4882a593Smuzhiyun #define AIC_OP_BMOV 0x6 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun #define AIC_OP_MVI16 0x7 183*4882a593Smuzhiyun 184*4882a593Smuzhiyun #define AIC_OP_JMP 0x8 185*4882a593Smuzhiyun #define AIC_OP_JC 0x9 186*4882a593Smuzhiyun #define AIC_OP_JNC 0xa 187*4882a593Smuzhiyun #define AIC_OP_CALL 0xb 188*4882a593Smuzhiyun #define AIC_OP_JNE 0xc 189*4882a593Smuzhiyun #define AIC_OP_JNZ 0xd 190*4882a593Smuzhiyun #define AIC_OP_JE 0xe 191*4882a593Smuzhiyun #define AIC_OP_JZ 0xf 192*4882a593Smuzhiyun 193*4882a593Smuzhiyun /* Pseudo Ops */ 194*4882a593Smuzhiyun #define AIC_OP_SHL 0x10 195*4882a593Smuzhiyun #define AIC_OP_SHR 0x20 196*4882a593Smuzhiyun #define AIC_OP_ROR 0x30 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun /* 16bit Ops. Low byte main opcode. High byte extended opcode. */ 199*4882a593Smuzhiyun #define AIC_OP_OR16 0x8005 200*4882a593Smuzhiyun #define AIC_OP_AND16 0x8105 201*4882a593Smuzhiyun #define AIC_OP_XOR16 0x8205 202*4882a593Smuzhiyun #define AIC_OP_ADD16 0x8305 203*4882a593Smuzhiyun #define AIC_OP_ADC16 0x8405 204*4882a593Smuzhiyun #define AIC_OP_JNE16 0x8805 205*4882a593Smuzhiyun #define AIC_OP_JNZ16 0x8905 206*4882a593Smuzhiyun #define AIC_OP_JE16 0x8C05 207*4882a593Smuzhiyun #define AIC_OP_JZ16 0x8B05 208*4882a593Smuzhiyun #define AIC_OP_JMP16 0x9005 209*4882a593Smuzhiyun #define AIC_OP_JC16 0x9105 210*4882a593Smuzhiyun #define AIC_OP_JNC16 0x9205 211*4882a593Smuzhiyun #define AIC_OP_CALL16 0x9305 212*4882a593Smuzhiyun 213*4882a593Smuzhiyun /* Page extension is low three bits of second opcode byte. */ 214*4882a593Smuzhiyun #define AIC_OP_JMPF 0xA005 215*4882a593Smuzhiyun #define AIC_OP_CALLF 0xB005 216*4882a593Smuzhiyun #define AIC_OP_JCF 0xC005 217*4882a593Smuzhiyun #define AIC_OP_JNCF 0xD005 218*4882a593Smuzhiyun #define AIC_OP_CMPXCHG 0xE005 219