1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Linux driver attachment glue for PCI based controllers.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (c) 2000-2001 Adaptec Inc.
5*4882a593Smuzhiyun * All rights reserved.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or without
8*4882a593Smuzhiyun * modification, are permitted provided that the following conditions
9*4882a593Smuzhiyun * are met:
10*4882a593Smuzhiyun * 1. Redistributions of source code must retain the above copyright
11*4882a593Smuzhiyun * notice, this list of conditions, and the following disclaimer,
12*4882a593Smuzhiyun * without modification.
13*4882a593Smuzhiyun * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14*4882a593Smuzhiyun * substantially similar to the "NO WARRANTY" disclaimer below
15*4882a593Smuzhiyun * ("Disclaimer") and any redistribution must be conditioned upon
16*4882a593Smuzhiyun * including a substantially similar Disclaimer requirement for further
17*4882a593Smuzhiyun * binary redistribution.
18*4882a593Smuzhiyun * 3. Neither the names of the above-listed copyright holders nor the names
19*4882a593Smuzhiyun * of any contributors may be used to endorse or promote products derived
20*4882a593Smuzhiyun * from this software without specific prior written permission.
21*4882a593Smuzhiyun *
22*4882a593Smuzhiyun * Alternatively, this software may be distributed under the terms of the
23*4882a593Smuzhiyun * GNU General Public License ("GPL") version 2 as published by the Free
24*4882a593Smuzhiyun * Software Foundation.
25*4882a593Smuzhiyun *
26*4882a593Smuzhiyun * NO WARRANTY
27*4882a593Smuzhiyun * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28*4882a593Smuzhiyun * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29*4882a593Smuzhiyun * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
30*4882a593Smuzhiyun * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31*4882a593Smuzhiyun * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32*4882a593Smuzhiyun * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33*4882a593Smuzhiyun * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34*4882a593Smuzhiyun * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
35*4882a593Smuzhiyun * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
36*4882a593Smuzhiyun * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37*4882a593Smuzhiyun * POSSIBILITY OF SUCH DAMAGES.
38*4882a593Smuzhiyun *
39*4882a593Smuzhiyun * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic7xxx_osm_pci.c#47 $
40*4882a593Smuzhiyun */
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun #include "aic7xxx_osm.h"
43*4882a593Smuzhiyun #include "aic7xxx_pci.h"
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun /* Define the macro locally since it's different for different class of chips.
46*4882a593Smuzhiyun */
47*4882a593Smuzhiyun #define ID(x) ID_C(x, PCI_CLASS_STORAGE_SCSI)
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun static const struct pci_device_id ahc_linux_pci_id_table[] = {
50*4882a593Smuzhiyun /* aic7850 based controllers */
51*4882a593Smuzhiyun ID(ID_AHA_2902_04_10_15_20C_30C),
52*4882a593Smuzhiyun /* aic7860 based controllers */
53*4882a593Smuzhiyun ID(ID_AHA_2930CU),
54*4882a593Smuzhiyun ID(ID_AHA_1480A & ID_DEV_VENDOR_MASK),
55*4882a593Smuzhiyun ID(ID_AHA_2940AU_0 & ID_DEV_VENDOR_MASK),
56*4882a593Smuzhiyun ID(ID_AHA_2940AU_CN & ID_DEV_VENDOR_MASK),
57*4882a593Smuzhiyun ID(ID_AHA_2930C_VAR & ID_DEV_VENDOR_MASK),
58*4882a593Smuzhiyun /* aic7870 based controllers */
59*4882a593Smuzhiyun ID(ID_AHA_2940),
60*4882a593Smuzhiyun ID(ID_AHA_3940),
61*4882a593Smuzhiyun ID(ID_AHA_398X),
62*4882a593Smuzhiyun ID(ID_AHA_2944),
63*4882a593Smuzhiyun ID(ID_AHA_3944),
64*4882a593Smuzhiyun ID(ID_AHA_4944),
65*4882a593Smuzhiyun /* aic7880 based controllers */
66*4882a593Smuzhiyun ID(ID_AHA_2940U & ID_DEV_VENDOR_MASK),
67*4882a593Smuzhiyun ID(ID_AHA_3940U & ID_DEV_VENDOR_MASK),
68*4882a593Smuzhiyun ID(ID_AHA_2944U & ID_DEV_VENDOR_MASK),
69*4882a593Smuzhiyun ID(ID_AHA_3944U & ID_DEV_VENDOR_MASK),
70*4882a593Smuzhiyun ID(ID_AHA_398XU & ID_DEV_VENDOR_MASK),
71*4882a593Smuzhiyun ID(ID_AHA_4944U & ID_DEV_VENDOR_MASK),
72*4882a593Smuzhiyun ID(ID_AHA_2930U & ID_DEV_VENDOR_MASK),
73*4882a593Smuzhiyun ID(ID_AHA_2940U_PRO & ID_DEV_VENDOR_MASK),
74*4882a593Smuzhiyun ID(ID_AHA_2940U_CN & ID_DEV_VENDOR_MASK),
75*4882a593Smuzhiyun /* aic7890 based controllers */
76*4882a593Smuzhiyun ID(ID_AHA_2930U2),
77*4882a593Smuzhiyun ID(ID_AHA_2940U2B),
78*4882a593Smuzhiyun ID(ID_AHA_2940U2_OEM),
79*4882a593Smuzhiyun ID(ID_AHA_2940U2),
80*4882a593Smuzhiyun ID(ID_AHA_2950U2B),
81*4882a593Smuzhiyun ID16(ID_AIC7890_ARO & ID_AIC7895_ARO_MASK),
82*4882a593Smuzhiyun ID(ID_AAA_131U2),
83*4882a593Smuzhiyun /* aic7890 based controllers */
84*4882a593Smuzhiyun ID(ID_AHA_29160),
85*4882a593Smuzhiyun ID(ID_AHA_29160_CPQ),
86*4882a593Smuzhiyun ID(ID_AHA_29160N),
87*4882a593Smuzhiyun ID(ID_AHA_29160C),
88*4882a593Smuzhiyun ID(ID_AHA_29160B),
89*4882a593Smuzhiyun ID(ID_AHA_19160B),
90*4882a593Smuzhiyun ID(ID_AIC7892_ARO),
91*4882a593Smuzhiyun /* aic7892 based controllers */
92*4882a593Smuzhiyun ID(ID_AHA_2940U_DUAL),
93*4882a593Smuzhiyun ID(ID_AHA_3940AU),
94*4882a593Smuzhiyun ID(ID_AHA_3944AU),
95*4882a593Smuzhiyun ID(ID_AIC7895_ARO),
96*4882a593Smuzhiyun ID(ID_AHA_3950U2B_0),
97*4882a593Smuzhiyun ID(ID_AHA_3950U2B_1),
98*4882a593Smuzhiyun ID(ID_AHA_3950U2D_0),
99*4882a593Smuzhiyun ID(ID_AHA_3950U2D_1),
100*4882a593Smuzhiyun ID(ID_AIC7896_ARO),
101*4882a593Smuzhiyun /* aic7899 based controllers */
102*4882a593Smuzhiyun ID(ID_AHA_3960D),
103*4882a593Smuzhiyun ID(ID_AHA_3960D_CPQ),
104*4882a593Smuzhiyun ID(ID_AIC7899_ARO),
105*4882a593Smuzhiyun /* Generic chip probes for devices we don't know exactly. */
106*4882a593Smuzhiyun ID(ID_AIC7850 & ID_DEV_VENDOR_MASK),
107*4882a593Smuzhiyun ID(ID_AIC7855 & ID_DEV_VENDOR_MASK),
108*4882a593Smuzhiyun ID(ID_AIC7859 & ID_DEV_VENDOR_MASK),
109*4882a593Smuzhiyun ID(ID_AIC7860 & ID_DEV_VENDOR_MASK),
110*4882a593Smuzhiyun ID(ID_AIC7870 & ID_DEV_VENDOR_MASK),
111*4882a593Smuzhiyun ID(ID_AIC7880 & ID_DEV_VENDOR_MASK),
112*4882a593Smuzhiyun ID16(ID_AIC7890 & ID_9005_GENERIC_MASK),
113*4882a593Smuzhiyun ID16(ID_AIC7892 & ID_9005_GENERIC_MASK),
114*4882a593Smuzhiyun ID(ID_AIC7895 & ID_DEV_VENDOR_MASK),
115*4882a593Smuzhiyun ID16(ID_AIC7896 & ID_9005_GENERIC_MASK),
116*4882a593Smuzhiyun ID16(ID_AIC7899 & ID_9005_GENERIC_MASK),
117*4882a593Smuzhiyun ID(ID_AIC7810 & ID_DEV_VENDOR_MASK),
118*4882a593Smuzhiyun ID(ID_AIC7815 & ID_DEV_VENDOR_MASK),
119*4882a593Smuzhiyun { 0 }
120*4882a593Smuzhiyun };
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, ahc_linux_pci_id_table);
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun #ifdef CONFIG_PM
125*4882a593Smuzhiyun static int
ahc_linux_pci_dev_suspend(struct pci_dev * pdev,pm_message_t mesg)126*4882a593Smuzhiyun ahc_linux_pci_dev_suspend(struct pci_dev *pdev, pm_message_t mesg)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun struct ahc_softc *ahc = pci_get_drvdata(pdev);
129*4882a593Smuzhiyun int rc;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun if ((rc = ahc_suspend(ahc)))
132*4882a593Smuzhiyun return rc;
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun pci_save_state(pdev);
135*4882a593Smuzhiyun pci_disable_device(pdev);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun if (mesg.event & PM_EVENT_SLEEP)
138*4882a593Smuzhiyun pci_set_power_state(pdev, PCI_D3hot);
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun return rc;
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun static int
ahc_linux_pci_dev_resume(struct pci_dev * pdev)144*4882a593Smuzhiyun ahc_linux_pci_dev_resume(struct pci_dev *pdev)
145*4882a593Smuzhiyun {
146*4882a593Smuzhiyun struct ahc_softc *ahc = pci_get_drvdata(pdev);
147*4882a593Smuzhiyun int rc;
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun pci_set_power_state(pdev, PCI_D0);
150*4882a593Smuzhiyun pci_restore_state(pdev);
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun if ((rc = pci_enable_device(pdev))) {
153*4882a593Smuzhiyun dev_printk(KERN_ERR, &pdev->dev,
154*4882a593Smuzhiyun "failed to enable device after resume (%d)\n", rc);
155*4882a593Smuzhiyun return rc;
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun pci_set_master(pdev);
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun ahc_pci_resume(ahc);
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun return (ahc_resume(ahc));
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun #endif
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun static void
ahc_linux_pci_dev_remove(struct pci_dev * pdev)167*4882a593Smuzhiyun ahc_linux_pci_dev_remove(struct pci_dev *pdev)
168*4882a593Smuzhiyun {
169*4882a593Smuzhiyun struct ahc_softc *ahc = pci_get_drvdata(pdev);
170*4882a593Smuzhiyun u_long s;
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun if (ahc->platform_data && ahc->platform_data->host)
173*4882a593Smuzhiyun scsi_remove_host(ahc->platform_data->host);
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun ahc_lock(ahc, &s);
176*4882a593Smuzhiyun ahc_intr_enable(ahc, FALSE);
177*4882a593Smuzhiyun ahc_unlock(ahc, &s);
178*4882a593Smuzhiyun ahc_free(ahc);
179*4882a593Smuzhiyun }
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun static void
ahc_linux_pci_inherit_flags(struct ahc_softc * ahc)182*4882a593Smuzhiyun ahc_linux_pci_inherit_flags(struct ahc_softc *ahc)
183*4882a593Smuzhiyun {
184*4882a593Smuzhiyun struct pci_dev *pdev = ahc->dev_softc, *master_pdev;
185*4882a593Smuzhiyun unsigned int master_devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0);
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun master_pdev = pci_get_slot(pdev->bus, master_devfn);
188*4882a593Smuzhiyun if (master_pdev) {
189*4882a593Smuzhiyun struct ahc_softc *master = pci_get_drvdata(master_pdev);
190*4882a593Smuzhiyun if (master) {
191*4882a593Smuzhiyun ahc->flags &= ~AHC_BIOS_ENABLED;
192*4882a593Smuzhiyun ahc->flags |= master->flags & AHC_BIOS_ENABLED;
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun ahc->flags &= ~AHC_PRIMARY_CHANNEL;
195*4882a593Smuzhiyun ahc->flags |= master->flags & AHC_PRIMARY_CHANNEL;
196*4882a593Smuzhiyun } else
197*4882a593Smuzhiyun printk(KERN_ERR "aic7xxx: no multichannel peer found!\n");
198*4882a593Smuzhiyun pci_dev_put(master_pdev);
199*4882a593Smuzhiyun }
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun static int
ahc_linux_pci_dev_probe(struct pci_dev * pdev,const struct pci_device_id * ent)203*4882a593Smuzhiyun ahc_linux_pci_dev_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
204*4882a593Smuzhiyun {
205*4882a593Smuzhiyun char buf[80];
206*4882a593Smuzhiyun const uint64_t mask_39bit = 0x7FFFFFFFFFULL;
207*4882a593Smuzhiyun struct ahc_softc *ahc;
208*4882a593Smuzhiyun ahc_dev_softc_t pci;
209*4882a593Smuzhiyun const struct ahc_pci_identity *entry;
210*4882a593Smuzhiyun char *name;
211*4882a593Smuzhiyun int error;
212*4882a593Smuzhiyun struct device *dev = &pdev->dev;
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun pci = pdev;
215*4882a593Smuzhiyun entry = ahc_find_pci_device(pci);
216*4882a593Smuzhiyun if (entry == NULL)
217*4882a593Smuzhiyun return (-ENODEV);
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun /*
220*4882a593Smuzhiyun * Allocate a softc for this card and
221*4882a593Smuzhiyun * set it up for attachment by our
222*4882a593Smuzhiyun * common detect routine.
223*4882a593Smuzhiyun */
224*4882a593Smuzhiyun sprintf(buf, "ahc_pci:%d:%d:%d",
225*4882a593Smuzhiyun ahc_get_pci_bus(pci),
226*4882a593Smuzhiyun ahc_get_pci_slot(pci),
227*4882a593Smuzhiyun ahc_get_pci_function(pci));
228*4882a593Smuzhiyun name = kstrdup(buf, GFP_ATOMIC);
229*4882a593Smuzhiyun if (name == NULL)
230*4882a593Smuzhiyun return (-ENOMEM);
231*4882a593Smuzhiyun ahc = ahc_alloc(NULL, name);
232*4882a593Smuzhiyun if (ahc == NULL)
233*4882a593Smuzhiyun return (-ENOMEM);
234*4882a593Smuzhiyun if (pci_enable_device(pdev)) {
235*4882a593Smuzhiyun ahc_free(ahc);
236*4882a593Smuzhiyun return (-ENODEV);
237*4882a593Smuzhiyun }
238*4882a593Smuzhiyun pci_set_master(pdev);
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun if (sizeof(dma_addr_t) > 4
241*4882a593Smuzhiyun && ahc->features & AHC_LARGE_SCBS
242*4882a593Smuzhiyun && dma_set_mask(dev, mask_39bit) == 0
243*4882a593Smuzhiyun && dma_get_required_mask(dev) > DMA_BIT_MASK(32)) {
244*4882a593Smuzhiyun ahc->flags |= AHC_39BIT_ADDRESSING;
245*4882a593Smuzhiyun } else {
246*4882a593Smuzhiyun if (dma_set_mask(dev, DMA_BIT_MASK(32))) {
247*4882a593Smuzhiyun ahc_free(ahc);
248*4882a593Smuzhiyun printk(KERN_WARNING "aic7xxx: No suitable DMA available.\n");
249*4882a593Smuzhiyun return (-ENODEV);
250*4882a593Smuzhiyun }
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun ahc->dev_softc = pci;
253*4882a593Smuzhiyun ahc->dev = &pci->dev;
254*4882a593Smuzhiyun error = ahc_pci_config(ahc, entry);
255*4882a593Smuzhiyun if (error != 0) {
256*4882a593Smuzhiyun ahc_free(ahc);
257*4882a593Smuzhiyun return (-error);
258*4882a593Smuzhiyun }
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun /*
261*4882a593Smuzhiyun * Second Function PCI devices need to inherit some
262*4882a593Smuzhiyun * settings from function 0.
263*4882a593Smuzhiyun */
264*4882a593Smuzhiyun if ((ahc->features & AHC_MULTI_FUNC) && PCI_FUNC(pdev->devfn) != 0)
265*4882a593Smuzhiyun ahc_linux_pci_inherit_flags(ahc);
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun pci_set_drvdata(pdev, ahc);
268*4882a593Smuzhiyun ahc_linux_register_host(ahc, &aic7xxx_driver_template);
269*4882a593Smuzhiyun return (0);
270*4882a593Smuzhiyun }
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun /******************************* PCI Routines *********************************/
273*4882a593Smuzhiyun uint32_t
ahc_pci_read_config(ahc_dev_softc_t pci,int reg,int width)274*4882a593Smuzhiyun ahc_pci_read_config(ahc_dev_softc_t pci, int reg, int width)
275*4882a593Smuzhiyun {
276*4882a593Smuzhiyun switch (width) {
277*4882a593Smuzhiyun case 1:
278*4882a593Smuzhiyun {
279*4882a593Smuzhiyun uint8_t retval;
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun pci_read_config_byte(pci, reg, &retval);
282*4882a593Smuzhiyun return (retval);
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun case 2:
285*4882a593Smuzhiyun {
286*4882a593Smuzhiyun uint16_t retval;
287*4882a593Smuzhiyun pci_read_config_word(pci, reg, &retval);
288*4882a593Smuzhiyun return (retval);
289*4882a593Smuzhiyun }
290*4882a593Smuzhiyun case 4:
291*4882a593Smuzhiyun {
292*4882a593Smuzhiyun uint32_t retval;
293*4882a593Smuzhiyun pci_read_config_dword(pci, reg, &retval);
294*4882a593Smuzhiyun return (retval);
295*4882a593Smuzhiyun }
296*4882a593Smuzhiyun default:
297*4882a593Smuzhiyun panic("ahc_pci_read_config: Read size too big");
298*4882a593Smuzhiyun /* NOTREACHED */
299*4882a593Smuzhiyun return (0);
300*4882a593Smuzhiyun }
301*4882a593Smuzhiyun }
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun void
ahc_pci_write_config(ahc_dev_softc_t pci,int reg,uint32_t value,int width)304*4882a593Smuzhiyun ahc_pci_write_config(ahc_dev_softc_t pci, int reg, uint32_t value, int width)
305*4882a593Smuzhiyun {
306*4882a593Smuzhiyun switch (width) {
307*4882a593Smuzhiyun case 1:
308*4882a593Smuzhiyun pci_write_config_byte(pci, reg, value);
309*4882a593Smuzhiyun break;
310*4882a593Smuzhiyun case 2:
311*4882a593Smuzhiyun pci_write_config_word(pci, reg, value);
312*4882a593Smuzhiyun break;
313*4882a593Smuzhiyun case 4:
314*4882a593Smuzhiyun pci_write_config_dword(pci, reg, value);
315*4882a593Smuzhiyun break;
316*4882a593Smuzhiyun default:
317*4882a593Smuzhiyun panic("ahc_pci_write_config: Write size too big");
318*4882a593Smuzhiyun /* NOTREACHED */
319*4882a593Smuzhiyun }
320*4882a593Smuzhiyun }
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun static struct pci_driver aic7xxx_pci_driver = {
324*4882a593Smuzhiyun .name = "aic7xxx",
325*4882a593Smuzhiyun .probe = ahc_linux_pci_dev_probe,
326*4882a593Smuzhiyun #ifdef CONFIG_PM
327*4882a593Smuzhiyun .suspend = ahc_linux_pci_dev_suspend,
328*4882a593Smuzhiyun .resume = ahc_linux_pci_dev_resume,
329*4882a593Smuzhiyun #endif
330*4882a593Smuzhiyun .remove = ahc_linux_pci_dev_remove,
331*4882a593Smuzhiyun .id_table = ahc_linux_pci_id_table
332*4882a593Smuzhiyun };
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun int
ahc_linux_pci_init(void)335*4882a593Smuzhiyun ahc_linux_pci_init(void)
336*4882a593Smuzhiyun {
337*4882a593Smuzhiyun return pci_register_driver(&aic7xxx_pci_driver);
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun void
ahc_linux_pci_exit(void)341*4882a593Smuzhiyun ahc_linux_pci_exit(void)
342*4882a593Smuzhiyun {
343*4882a593Smuzhiyun pci_unregister_driver(&aic7xxx_pci_driver);
344*4882a593Smuzhiyun }
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun static int
ahc_linux_pci_reserve_io_region(struct ahc_softc * ahc,resource_size_t * base)347*4882a593Smuzhiyun ahc_linux_pci_reserve_io_region(struct ahc_softc *ahc, resource_size_t *base)
348*4882a593Smuzhiyun {
349*4882a593Smuzhiyun if (aic7xxx_allow_memio == 0)
350*4882a593Smuzhiyun return (ENOMEM);
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun *base = pci_resource_start(ahc->dev_softc, 0);
353*4882a593Smuzhiyun if (*base == 0)
354*4882a593Smuzhiyun return (ENOMEM);
355*4882a593Smuzhiyun if (!request_region(*base, 256, "aic7xxx"))
356*4882a593Smuzhiyun return (ENOMEM);
357*4882a593Smuzhiyun return (0);
358*4882a593Smuzhiyun }
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun static int
ahc_linux_pci_reserve_mem_region(struct ahc_softc * ahc,resource_size_t * bus_addr,uint8_t __iomem ** maddr)361*4882a593Smuzhiyun ahc_linux_pci_reserve_mem_region(struct ahc_softc *ahc,
362*4882a593Smuzhiyun resource_size_t *bus_addr,
363*4882a593Smuzhiyun uint8_t __iomem **maddr)
364*4882a593Smuzhiyun {
365*4882a593Smuzhiyun resource_size_t start;
366*4882a593Smuzhiyun int error;
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun error = 0;
369*4882a593Smuzhiyun start = pci_resource_start(ahc->dev_softc, 1);
370*4882a593Smuzhiyun if (start != 0) {
371*4882a593Smuzhiyun *bus_addr = start;
372*4882a593Smuzhiyun if (!request_mem_region(start, 0x1000, "aic7xxx"))
373*4882a593Smuzhiyun error = ENOMEM;
374*4882a593Smuzhiyun if (error == 0) {
375*4882a593Smuzhiyun *maddr = ioremap(start, 256);
376*4882a593Smuzhiyun if (*maddr == NULL) {
377*4882a593Smuzhiyun error = ENOMEM;
378*4882a593Smuzhiyun release_mem_region(start, 0x1000);
379*4882a593Smuzhiyun }
380*4882a593Smuzhiyun }
381*4882a593Smuzhiyun } else
382*4882a593Smuzhiyun error = ENOMEM;
383*4882a593Smuzhiyun return (error);
384*4882a593Smuzhiyun }
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun int
ahc_pci_map_registers(struct ahc_softc * ahc)387*4882a593Smuzhiyun ahc_pci_map_registers(struct ahc_softc *ahc)
388*4882a593Smuzhiyun {
389*4882a593Smuzhiyun uint32_t command;
390*4882a593Smuzhiyun resource_size_t base;
391*4882a593Smuzhiyun uint8_t __iomem *maddr;
392*4882a593Smuzhiyun int error;
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun /*
395*4882a593Smuzhiyun * If its allowed, we prefer memory mapped access.
396*4882a593Smuzhiyun */
397*4882a593Smuzhiyun command = ahc_pci_read_config(ahc->dev_softc, PCIR_COMMAND, 4);
398*4882a593Smuzhiyun command &= ~(PCIM_CMD_PORTEN|PCIM_CMD_MEMEN);
399*4882a593Smuzhiyun base = 0;
400*4882a593Smuzhiyun maddr = NULL;
401*4882a593Smuzhiyun error = ahc_linux_pci_reserve_mem_region(ahc, &base, &maddr);
402*4882a593Smuzhiyun if (error == 0) {
403*4882a593Smuzhiyun ahc->platform_data->mem_busaddr = base;
404*4882a593Smuzhiyun ahc->tag = BUS_SPACE_MEMIO;
405*4882a593Smuzhiyun ahc->bsh.maddr = maddr;
406*4882a593Smuzhiyun ahc_pci_write_config(ahc->dev_softc, PCIR_COMMAND,
407*4882a593Smuzhiyun command | PCIM_CMD_MEMEN, 4);
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun /*
410*4882a593Smuzhiyun * Do a quick test to see if memory mapped
411*4882a593Smuzhiyun * I/O is functioning correctly.
412*4882a593Smuzhiyun */
413*4882a593Smuzhiyun if (ahc_pci_test_register_access(ahc) != 0) {
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun printk("aic7xxx: PCI Device %d:%d:%d "
416*4882a593Smuzhiyun "failed memory mapped test. Using PIO.\n",
417*4882a593Smuzhiyun ahc_get_pci_bus(ahc->dev_softc),
418*4882a593Smuzhiyun ahc_get_pci_slot(ahc->dev_softc),
419*4882a593Smuzhiyun ahc_get_pci_function(ahc->dev_softc));
420*4882a593Smuzhiyun iounmap(maddr);
421*4882a593Smuzhiyun release_mem_region(ahc->platform_data->mem_busaddr,
422*4882a593Smuzhiyun 0x1000);
423*4882a593Smuzhiyun ahc->bsh.maddr = NULL;
424*4882a593Smuzhiyun maddr = NULL;
425*4882a593Smuzhiyun } else
426*4882a593Smuzhiyun command |= PCIM_CMD_MEMEN;
427*4882a593Smuzhiyun } else {
428*4882a593Smuzhiyun printk("aic7xxx: PCI%d:%d:%d MEM region 0x%llx "
429*4882a593Smuzhiyun "unavailable. Cannot memory map device.\n",
430*4882a593Smuzhiyun ahc_get_pci_bus(ahc->dev_softc),
431*4882a593Smuzhiyun ahc_get_pci_slot(ahc->dev_softc),
432*4882a593Smuzhiyun ahc_get_pci_function(ahc->dev_softc),
433*4882a593Smuzhiyun (unsigned long long)base);
434*4882a593Smuzhiyun }
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun /*
437*4882a593Smuzhiyun * We always prefer memory mapped access.
438*4882a593Smuzhiyun */
439*4882a593Smuzhiyun if (maddr == NULL) {
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun error = ahc_linux_pci_reserve_io_region(ahc, &base);
442*4882a593Smuzhiyun if (error == 0) {
443*4882a593Smuzhiyun ahc->tag = BUS_SPACE_PIO;
444*4882a593Smuzhiyun ahc->bsh.ioport = (u_long)base;
445*4882a593Smuzhiyun command |= PCIM_CMD_PORTEN;
446*4882a593Smuzhiyun } else {
447*4882a593Smuzhiyun printk("aic7xxx: PCI%d:%d:%d IO region 0x%llx[0..255] "
448*4882a593Smuzhiyun "unavailable. Cannot map device.\n",
449*4882a593Smuzhiyun ahc_get_pci_bus(ahc->dev_softc),
450*4882a593Smuzhiyun ahc_get_pci_slot(ahc->dev_softc),
451*4882a593Smuzhiyun ahc_get_pci_function(ahc->dev_softc),
452*4882a593Smuzhiyun (unsigned long long)base);
453*4882a593Smuzhiyun }
454*4882a593Smuzhiyun }
455*4882a593Smuzhiyun ahc_pci_write_config(ahc->dev_softc, PCIR_COMMAND, command, 4);
456*4882a593Smuzhiyun return (error);
457*4882a593Smuzhiyun }
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun int
ahc_pci_map_int(struct ahc_softc * ahc)460*4882a593Smuzhiyun ahc_pci_map_int(struct ahc_softc *ahc)
461*4882a593Smuzhiyun {
462*4882a593Smuzhiyun int error;
463*4882a593Smuzhiyun
464*4882a593Smuzhiyun error = request_irq(ahc->dev_softc->irq, ahc_linux_isr,
465*4882a593Smuzhiyun IRQF_SHARED, "aic7xxx", ahc);
466*4882a593Smuzhiyun if (error == 0)
467*4882a593Smuzhiyun ahc->platform_data->irq = ahc->dev_softc->irq;
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun return (-error);
470*4882a593Smuzhiyun }
471*4882a593Smuzhiyun
472