1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Adaptec AIC7xxx device driver for Linux.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (c) 1994 John Aycock
5*4882a593Smuzhiyun * The University of Calgary Department of Computer Science.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify
8*4882a593Smuzhiyun * it under the terms of the GNU General Public License as published by
9*4882a593Smuzhiyun * the Free Software Foundation; either version 2, or (at your option)
10*4882a593Smuzhiyun * any later version.
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful,
13*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of
14*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15*4882a593Smuzhiyun * GNU General Public License for more details.
16*4882a593Smuzhiyun *
17*4882a593Smuzhiyun * You should have received a copy of the GNU General Public License
18*4882a593Smuzhiyun * along with this program; see the file COPYING. If not, write to
19*4882a593Smuzhiyun * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
20*4882a593Smuzhiyun *
21*4882a593Smuzhiyun * Copyright (c) 2000-2003 Adaptec Inc.
22*4882a593Smuzhiyun * All rights reserved.
23*4882a593Smuzhiyun *
24*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or without
25*4882a593Smuzhiyun * modification, are permitted provided that the following conditions
26*4882a593Smuzhiyun * are met:
27*4882a593Smuzhiyun * 1. Redistributions of source code must retain the above copyright
28*4882a593Smuzhiyun * notice, this list of conditions, and the following disclaimer,
29*4882a593Smuzhiyun * without modification.
30*4882a593Smuzhiyun * 2. Redistributions in binary form must reproduce at minimum a disclaimer
31*4882a593Smuzhiyun * substantially similar to the "NO WARRANTY" disclaimer below
32*4882a593Smuzhiyun * ("Disclaimer") and any redistribution must be conditioned upon
33*4882a593Smuzhiyun * including a substantially similar Disclaimer requirement for further
34*4882a593Smuzhiyun * binary redistribution.
35*4882a593Smuzhiyun * 3. Neither the names of the above-listed copyright holders nor the names
36*4882a593Smuzhiyun * of any contributors may be used to endorse or promote products derived
37*4882a593Smuzhiyun * from this software without specific prior written permission.
38*4882a593Smuzhiyun *
39*4882a593Smuzhiyun * Alternatively, this software may be distributed under the terms of the
40*4882a593Smuzhiyun * GNU General Public License ("GPL") version 2 as published by the Free
41*4882a593Smuzhiyun * Software Foundation.
42*4882a593Smuzhiyun *
43*4882a593Smuzhiyun * NO WARRANTY
44*4882a593Smuzhiyun * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
45*4882a593Smuzhiyun * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
46*4882a593Smuzhiyun * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
47*4882a593Smuzhiyun * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
48*4882a593Smuzhiyun * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
49*4882a593Smuzhiyun * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
50*4882a593Smuzhiyun * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
51*4882a593Smuzhiyun * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
52*4882a593Smuzhiyun * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
53*4882a593Smuzhiyun * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
54*4882a593Smuzhiyun * POSSIBILITY OF SUCH DAMAGES.
55*4882a593Smuzhiyun *
56*4882a593Smuzhiyun * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic7xxx_osm.h#151 $
57*4882a593Smuzhiyun *
58*4882a593Smuzhiyun */
59*4882a593Smuzhiyun #ifndef _AIC7XXX_LINUX_H_
60*4882a593Smuzhiyun #define _AIC7XXX_LINUX_H_
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun #include <linux/types.h>
63*4882a593Smuzhiyun #include <linux/blkdev.h>
64*4882a593Smuzhiyun #include <linux/delay.h>
65*4882a593Smuzhiyun #include <linux/ioport.h>
66*4882a593Smuzhiyun #include <linux/pci.h>
67*4882a593Smuzhiyun #include <linux/interrupt.h>
68*4882a593Smuzhiyun #include <linux/module.h>
69*4882a593Smuzhiyun #include <linux/slab.h>
70*4882a593Smuzhiyun #include <asm/byteorder.h>
71*4882a593Smuzhiyun #include <asm/io.h>
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun #include <scsi/scsi.h>
74*4882a593Smuzhiyun #include <scsi/scsi_cmnd.h>
75*4882a593Smuzhiyun #include <scsi/scsi_eh.h>
76*4882a593Smuzhiyun #include <scsi/scsi_device.h>
77*4882a593Smuzhiyun #include <scsi/scsi_host.h>
78*4882a593Smuzhiyun #include <scsi/scsi_tcq.h>
79*4882a593Smuzhiyun #include <scsi/scsi_transport.h>
80*4882a593Smuzhiyun #include <scsi/scsi_transport_spi.h>
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun /* Core SCSI definitions */
83*4882a593Smuzhiyun #define AIC_LIB_PREFIX ahc
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun #include "cam.h"
86*4882a593Smuzhiyun #include "queue.h"
87*4882a593Smuzhiyun #include "scsi_message.h"
88*4882a593Smuzhiyun #include "aiclib.h"
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun /*********************************** Debugging ********************************/
91*4882a593Smuzhiyun #ifdef CONFIG_AIC7XXX_DEBUG_ENABLE
92*4882a593Smuzhiyun #ifdef CONFIG_AIC7XXX_DEBUG_MASK
93*4882a593Smuzhiyun #define AHC_DEBUG 1
94*4882a593Smuzhiyun #define AHC_DEBUG_OPTS CONFIG_AIC7XXX_DEBUG_MASK
95*4882a593Smuzhiyun #else
96*4882a593Smuzhiyun /*
97*4882a593Smuzhiyun * Compile in debugging code, but do not enable any printfs.
98*4882a593Smuzhiyun */
99*4882a593Smuzhiyun #define AHC_DEBUG 1
100*4882a593Smuzhiyun #endif
101*4882a593Smuzhiyun /* No debugging code. */
102*4882a593Smuzhiyun #endif
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun /************************* Forward Declarations *******************************/
105*4882a593Smuzhiyun struct ahc_softc;
106*4882a593Smuzhiyun typedef struct pci_dev *ahc_dev_softc_t;
107*4882a593Smuzhiyun typedef struct scsi_cmnd *ahc_io_ctx_t;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun /******************************* Byte Order ***********************************/
110*4882a593Smuzhiyun #define ahc_htobe16(x) cpu_to_be16(x)
111*4882a593Smuzhiyun #define ahc_htobe32(x) cpu_to_be32(x)
112*4882a593Smuzhiyun #define ahc_htobe64(x) cpu_to_be64(x)
113*4882a593Smuzhiyun #define ahc_htole16(x) cpu_to_le16(x)
114*4882a593Smuzhiyun #define ahc_htole32(x) cpu_to_le32(x)
115*4882a593Smuzhiyun #define ahc_htole64(x) cpu_to_le64(x)
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun #define ahc_be16toh(x) be16_to_cpu(x)
118*4882a593Smuzhiyun #define ahc_be32toh(x) be32_to_cpu(x)
119*4882a593Smuzhiyun #define ahc_be64toh(x) be64_to_cpu(x)
120*4882a593Smuzhiyun #define ahc_le16toh(x) le16_to_cpu(x)
121*4882a593Smuzhiyun #define ahc_le32toh(x) le32_to_cpu(x)
122*4882a593Smuzhiyun #define ahc_le64toh(x) le64_to_cpu(x)
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun /************************* Configuration Data *********************************/
125*4882a593Smuzhiyun extern u_int aic7xxx_no_probe;
126*4882a593Smuzhiyun extern u_int aic7xxx_allow_memio;
127*4882a593Smuzhiyun extern struct scsi_host_template aic7xxx_driver_template;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun /***************************** Bus Space/DMA **********************************/
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun typedef uint32_t bus_size_t;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun typedef enum {
134*4882a593Smuzhiyun BUS_SPACE_MEMIO,
135*4882a593Smuzhiyun BUS_SPACE_PIO
136*4882a593Smuzhiyun } bus_space_tag_t;
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun typedef union {
139*4882a593Smuzhiyun u_long ioport;
140*4882a593Smuzhiyun volatile uint8_t __iomem *maddr;
141*4882a593Smuzhiyun } bus_space_handle_t;
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun typedef struct bus_dma_segment
144*4882a593Smuzhiyun {
145*4882a593Smuzhiyun dma_addr_t ds_addr;
146*4882a593Smuzhiyun bus_size_t ds_len;
147*4882a593Smuzhiyun } bus_dma_segment_t;
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun struct ahc_linux_dma_tag
150*4882a593Smuzhiyun {
151*4882a593Smuzhiyun bus_size_t alignment;
152*4882a593Smuzhiyun bus_size_t boundary;
153*4882a593Smuzhiyun bus_size_t maxsize;
154*4882a593Smuzhiyun };
155*4882a593Smuzhiyun typedef struct ahc_linux_dma_tag* bus_dma_tag_t;
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun typedef dma_addr_t bus_dmamap_t;
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun typedef int bus_dma_filter_t(void*, dma_addr_t);
160*4882a593Smuzhiyun typedef void bus_dmamap_callback_t(void *, bus_dma_segment_t *, int, int);
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun #define BUS_DMA_WAITOK 0x0
163*4882a593Smuzhiyun #define BUS_DMA_NOWAIT 0x1
164*4882a593Smuzhiyun #define BUS_DMA_ALLOCNOW 0x2
165*4882a593Smuzhiyun #define BUS_DMA_LOAD_SEGS 0x4 /*
166*4882a593Smuzhiyun * Argument is an S/G list not
167*4882a593Smuzhiyun * a single buffer.
168*4882a593Smuzhiyun */
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun #define BUS_SPACE_MAXADDR 0xFFFFFFFF
171*4882a593Smuzhiyun #define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFF
172*4882a593Smuzhiyun #define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFF
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun int ahc_dma_tag_create(struct ahc_softc *, bus_dma_tag_t /*parent*/,
175*4882a593Smuzhiyun bus_size_t /*alignment*/, bus_size_t /*boundary*/,
176*4882a593Smuzhiyun dma_addr_t /*lowaddr*/, dma_addr_t /*highaddr*/,
177*4882a593Smuzhiyun bus_dma_filter_t*/*filter*/, void */*filterarg*/,
178*4882a593Smuzhiyun bus_size_t /*maxsize*/, int /*nsegments*/,
179*4882a593Smuzhiyun bus_size_t /*maxsegsz*/, int /*flags*/,
180*4882a593Smuzhiyun bus_dma_tag_t */*dma_tagp*/);
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun void ahc_dma_tag_destroy(struct ahc_softc *, bus_dma_tag_t /*tag*/);
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun int ahc_dmamem_alloc(struct ahc_softc *, bus_dma_tag_t /*dmat*/,
185*4882a593Smuzhiyun void** /*vaddr*/, int /*flags*/,
186*4882a593Smuzhiyun bus_dmamap_t* /*mapp*/);
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun void ahc_dmamem_free(struct ahc_softc *, bus_dma_tag_t /*dmat*/,
189*4882a593Smuzhiyun void* /*vaddr*/, bus_dmamap_t /*map*/);
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun void ahc_dmamap_destroy(struct ahc_softc *, bus_dma_tag_t /*tag*/,
192*4882a593Smuzhiyun bus_dmamap_t /*map*/);
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun int ahc_dmamap_load(struct ahc_softc *ahc, bus_dma_tag_t /*dmat*/,
195*4882a593Smuzhiyun bus_dmamap_t /*map*/, void * /*buf*/,
196*4882a593Smuzhiyun bus_size_t /*buflen*/, bus_dmamap_callback_t *,
197*4882a593Smuzhiyun void */*callback_arg*/, int /*flags*/);
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun int ahc_dmamap_unload(struct ahc_softc *, bus_dma_tag_t, bus_dmamap_t);
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun /*
202*4882a593Smuzhiyun * Operations performed by ahc_dmamap_sync().
203*4882a593Smuzhiyun */
204*4882a593Smuzhiyun #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
205*4882a593Smuzhiyun #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
206*4882a593Smuzhiyun #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
207*4882a593Smuzhiyun #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun /*
210*4882a593Smuzhiyun * XXX
211*4882a593Smuzhiyun * ahc_dmamap_sync is only used on buffers allocated with
212*4882a593Smuzhiyun * the pci_alloc_consistent() API. Although I'm not sure how
213*4882a593Smuzhiyun * this works on architectures with a write buffer, Linux does
214*4882a593Smuzhiyun * not have an API to sync "coherent" memory. Perhaps we need
215*4882a593Smuzhiyun * to do an mb()?
216*4882a593Smuzhiyun */
217*4882a593Smuzhiyun #define ahc_dmamap_sync(ahc, dma_tag, dmamap, offset, len, op)
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun /********************************** Includes **********************************/
220*4882a593Smuzhiyun #ifdef CONFIG_AIC7XXX_REG_PRETTY_PRINT
221*4882a593Smuzhiyun #define AIC_DEBUG_REGISTERS 1
222*4882a593Smuzhiyun #else
223*4882a593Smuzhiyun #define AIC_DEBUG_REGISTERS 0
224*4882a593Smuzhiyun #endif
225*4882a593Smuzhiyun #include "aic7xxx.h"
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun /***************************** Timer Facilities *******************************/
228*4882a593Smuzhiyun static inline void
ahc_scb_timer_reset(struct scb * scb,u_int usec)229*4882a593Smuzhiyun ahc_scb_timer_reset(struct scb *scb, u_int usec)
230*4882a593Smuzhiyun {
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun /***************************** SMP support ************************************/
234*4882a593Smuzhiyun #include <linux/spinlock.h>
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun #define AIC7XXX_DRIVER_VERSION "7.0"
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun /*************************** Device Data Structures ***************************/
239*4882a593Smuzhiyun /*
240*4882a593Smuzhiyun * A per probed device structure used to deal with some error recovery
241*4882a593Smuzhiyun * scenarios that the Linux mid-layer code just doesn't know how to
242*4882a593Smuzhiyun * handle. The structure allocated for a device only becomes persistent
243*4882a593Smuzhiyun * after a successfully completed inquiry command to the target when
244*4882a593Smuzhiyun * that inquiry data indicates a lun is present.
245*4882a593Smuzhiyun */
246*4882a593Smuzhiyun typedef enum {
247*4882a593Smuzhiyun AHC_DEV_FREEZE_TIL_EMPTY = 0x02, /* Freeze queue until active == 0 */
248*4882a593Smuzhiyun AHC_DEV_Q_BASIC = 0x10, /* Allow basic device queuing */
249*4882a593Smuzhiyun AHC_DEV_Q_TAGGED = 0x20, /* Allow full SCSI2 command queueing */
250*4882a593Smuzhiyun AHC_DEV_PERIODIC_OTAG = 0x40, /* Send OTAG to prevent starvation */
251*4882a593Smuzhiyun } ahc_linux_dev_flags;
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun struct ahc_linux_device {
254*4882a593Smuzhiyun /*
255*4882a593Smuzhiyun * The number of transactions currently
256*4882a593Smuzhiyun * queued to the device.
257*4882a593Smuzhiyun */
258*4882a593Smuzhiyun int active;
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun /*
261*4882a593Smuzhiyun * The currently allowed number of
262*4882a593Smuzhiyun * transactions that can be queued to
263*4882a593Smuzhiyun * the device. Must be signed for
264*4882a593Smuzhiyun * conversion from tagged to untagged
265*4882a593Smuzhiyun * mode where the device may have more
266*4882a593Smuzhiyun * than one outstanding active transaction.
267*4882a593Smuzhiyun */
268*4882a593Smuzhiyun int openings;
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun /*
271*4882a593Smuzhiyun * A positive count indicates that this
272*4882a593Smuzhiyun * device's queue is halted.
273*4882a593Smuzhiyun */
274*4882a593Smuzhiyun u_int qfrozen;
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun /*
277*4882a593Smuzhiyun * Cumulative command counter.
278*4882a593Smuzhiyun */
279*4882a593Smuzhiyun u_long commands_issued;
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun /*
282*4882a593Smuzhiyun * The number of tagged transactions when
283*4882a593Smuzhiyun * running at our current opening level
284*4882a593Smuzhiyun * that have been successfully received by
285*4882a593Smuzhiyun * this device since the last QUEUE FULL.
286*4882a593Smuzhiyun */
287*4882a593Smuzhiyun u_int tag_success_count;
288*4882a593Smuzhiyun #define AHC_TAG_SUCCESS_INTERVAL 50
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun ahc_linux_dev_flags flags;
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun /*
293*4882a593Smuzhiyun * The high limit for the tags variable.
294*4882a593Smuzhiyun */
295*4882a593Smuzhiyun u_int maxtags;
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun /*
298*4882a593Smuzhiyun * The computed number of tags outstanding
299*4882a593Smuzhiyun * at the time of the last QUEUE FULL event.
300*4882a593Smuzhiyun */
301*4882a593Smuzhiyun u_int tags_on_last_queuefull;
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun /*
304*4882a593Smuzhiyun * How many times we have seen a queue full
305*4882a593Smuzhiyun * with the same number of tags. This is used
306*4882a593Smuzhiyun * to stop our adaptive queue depth algorithm
307*4882a593Smuzhiyun * on devices with a fixed number of tags.
308*4882a593Smuzhiyun */
309*4882a593Smuzhiyun u_int last_queuefull_same_count;
310*4882a593Smuzhiyun #define AHC_LOCK_TAGS_COUNT 50
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun /*
313*4882a593Smuzhiyun * How many transactions have been queued
314*4882a593Smuzhiyun * without the device going idle. We use
315*4882a593Smuzhiyun * this statistic to determine when to issue
316*4882a593Smuzhiyun * an ordered tag to prevent transaction
317*4882a593Smuzhiyun * starvation. This statistic is only updated
318*4882a593Smuzhiyun * if the AHC_DEV_PERIODIC_OTAG flag is set
319*4882a593Smuzhiyun * on this device.
320*4882a593Smuzhiyun */
321*4882a593Smuzhiyun u_int commands_since_idle_or_otag;
322*4882a593Smuzhiyun #define AHC_OTAG_THRESH 500
323*4882a593Smuzhiyun };
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun /********************* Definitions Required by the Core ***********************/
326*4882a593Smuzhiyun /*
327*4882a593Smuzhiyun * Number of SG segments we require. So long as the S/G segments for
328*4882a593Smuzhiyun * a particular transaction are allocated in a physically contiguous
329*4882a593Smuzhiyun * manner and are allocated below 4GB, the number of S/G segments is
330*4882a593Smuzhiyun * unrestricted.
331*4882a593Smuzhiyun */
332*4882a593Smuzhiyun #define AHC_NSEG 128
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun /*
335*4882a593Smuzhiyun * Per-SCB OSM storage.
336*4882a593Smuzhiyun */
337*4882a593Smuzhiyun struct scb_platform_data {
338*4882a593Smuzhiyun struct ahc_linux_device *dev;
339*4882a593Smuzhiyun dma_addr_t buf_busaddr;
340*4882a593Smuzhiyun uint32_t xfer_len;
341*4882a593Smuzhiyun uint32_t sense_resid; /* Auto-Sense residual */
342*4882a593Smuzhiyun };
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun /*
345*4882a593Smuzhiyun * Define a structure used for each host adapter. All members are
346*4882a593Smuzhiyun * aligned on a boundary >= the size of the member to honor the
347*4882a593Smuzhiyun * alignment restrictions of the various platforms supported by
348*4882a593Smuzhiyun * this driver.
349*4882a593Smuzhiyun */
350*4882a593Smuzhiyun struct ahc_platform_data {
351*4882a593Smuzhiyun /*
352*4882a593Smuzhiyun * Fields accessed from interrupt context.
353*4882a593Smuzhiyun */
354*4882a593Smuzhiyun struct scsi_target *starget[AHC_NUM_TARGETS];
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun spinlock_t spin_lock;
357*4882a593Smuzhiyun u_int qfrozen;
358*4882a593Smuzhiyun struct completion *eh_done;
359*4882a593Smuzhiyun struct Scsi_Host *host; /* pointer to scsi host */
360*4882a593Smuzhiyun #define AHC_LINUX_NOIRQ ((uint32_t)~0)
361*4882a593Smuzhiyun uint32_t irq; /* IRQ for this adapter */
362*4882a593Smuzhiyun uint32_t bios_address;
363*4882a593Smuzhiyun resource_size_t mem_busaddr; /* Mem Base Addr */
364*4882a593Smuzhiyun };
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun void ahc_delay(long);
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun /***************************** Low Level I/O **********************************/
370*4882a593Smuzhiyun uint8_t ahc_inb(struct ahc_softc * ahc, long port);
371*4882a593Smuzhiyun void ahc_outb(struct ahc_softc * ahc, long port, uint8_t val);
372*4882a593Smuzhiyun void ahc_outsb(struct ahc_softc * ahc, long port,
373*4882a593Smuzhiyun uint8_t *, int count);
374*4882a593Smuzhiyun void ahc_insb(struct ahc_softc * ahc, long port,
375*4882a593Smuzhiyun uint8_t *, int count);
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun /**************************** Initialization **********************************/
378*4882a593Smuzhiyun int ahc_linux_register_host(struct ahc_softc *,
379*4882a593Smuzhiyun struct scsi_host_template *);
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun /******************************** Locking *************************************/
382*4882a593Smuzhiyun /* Lock protecting internal data structures */
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun static inline void
ahc_lockinit(struct ahc_softc * ahc)385*4882a593Smuzhiyun ahc_lockinit(struct ahc_softc *ahc)
386*4882a593Smuzhiyun {
387*4882a593Smuzhiyun spin_lock_init(&ahc->platform_data->spin_lock);
388*4882a593Smuzhiyun }
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun static inline void
ahc_lock(struct ahc_softc * ahc,unsigned long * flags)391*4882a593Smuzhiyun ahc_lock(struct ahc_softc *ahc, unsigned long *flags)
392*4882a593Smuzhiyun {
393*4882a593Smuzhiyun spin_lock_irqsave(&ahc->platform_data->spin_lock, *flags);
394*4882a593Smuzhiyun }
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun static inline void
ahc_unlock(struct ahc_softc * ahc,unsigned long * flags)397*4882a593Smuzhiyun ahc_unlock(struct ahc_softc *ahc, unsigned long *flags)
398*4882a593Smuzhiyun {
399*4882a593Smuzhiyun spin_unlock_irqrestore(&ahc->platform_data->spin_lock, *flags);
400*4882a593Smuzhiyun }
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun /******************************* PCI Definitions ******************************/
403*4882a593Smuzhiyun /*
404*4882a593Smuzhiyun * PCIM_xxx: mask to locate subfield in register
405*4882a593Smuzhiyun * PCIR_xxx: config register offset
406*4882a593Smuzhiyun * PCIC_xxx: device class
407*4882a593Smuzhiyun * PCIS_xxx: device subclass
408*4882a593Smuzhiyun * PCIP_xxx: device programming interface
409*4882a593Smuzhiyun * PCIV_xxx: PCI vendor ID (only required to fixup ancient devices)
410*4882a593Smuzhiyun * PCID_xxx: device ID
411*4882a593Smuzhiyun */
412*4882a593Smuzhiyun #define PCIR_DEVVENDOR 0x00
413*4882a593Smuzhiyun #define PCIR_VENDOR 0x00
414*4882a593Smuzhiyun #define PCIR_DEVICE 0x02
415*4882a593Smuzhiyun #define PCIR_COMMAND 0x04
416*4882a593Smuzhiyun #define PCIM_CMD_PORTEN 0x0001
417*4882a593Smuzhiyun #define PCIM_CMD_MEMEN 0x0002
418*4882a593Smuzhiyun #define PCIM_CMD_BUSMASTEREN 0x0004
419*4882a593Smuzhiyun #define PCIM_CMD_MWRICEN 0x0010
420*4882a593Smuzhiyun #define PCIM_CMD_PERRESPEN 0x0040
421*4882a593Smuzhiyun #define PCIM_CMD_SERRESPEN 0x0100
422*4882a593Smuzhiyun #define PCIR_STATUS 0x06
423*4882a593Smuzhiyun #define PCIR_REVID 0x08
424*4882a593Smuzhiyun #define PCIR_PROGIF 0x09
425*4882a593Smuzhiyun #define PCIR_SUBCLASS 0x0a
426*4882a593Smuzhiyun #define PCIR_CLASS 0x0b
427*4882a593Smuzhiyun #define PCIR_CACHELNSZ 0x0c
428*4882a593Smuzhiyun #define PCIR_LATTIMER 0x0d
429*4882a593Smuzhiyun #define PCIR_HEADERTYPE 0x0e
430*4882a593Smuzhiyun #define PCIM_MFDEV 0x80
431*4882a593Smuzhiyun #define PCIR_BIST 0x0f
432*4882a593Smuzhiyun #define PCIR_CAP_PTR 0x34
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun /* config registers for header type 0 devices */
435*4882a593Smuzhiyun #define PCIR_MAPS 0x10
436*4882a593Smuzhiyun #define PCIR_SUBVEND_0 0x2c
437*4882a593Smuzhiyun #define PCIR_SUBDEV_0 0x2e
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun typedef enum
440*4882a593Smuzhiyun {
441*4882a593Smuzhiyun AHC_POWER_STATE_D0,
442*4882a593Smuzhiyun AHC_POWER_STATE_D1,
443*4882a593Smuzhiyun AHC_POWER_STATE_D2,
444*4882a593Smuzhiyun AHC_POWER_STATE_D3
445*4882a593Smuzhiyun } ahc_power_state;
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun /**************************** VL/EISA Routines ********************************/
448*4882a593Smuzhiyun #ifdef CONFIG_EISA
449*4882a593Smuzhiyun int ahc_linux_eisa_init(void);
450*4882a593Smuzhiyun void ahc_linux_eisa_exit(void);
451*4882a593Smuzhiyun int aic7770_map_registers(struct ahc_softc *ahc,
452*4882a593Smuzhiyun u_int port);
453*4882a593Smuzhiyun int aic7770_map_int(struct ahc_softc *ahc, u_int irq);
454*4882a593Smuzhiyun #else
ahc_linux_eisa_init(void)455*4882a593Smuzhiyun static inline int ahc_linux_eisa_init(void) {
456*4882a593Smuzhiyun return -ENODEV;
457*4882a593Smuzhiyun }
ahc_linux_eisa_exit(void)458*4882a593Smuzhiyun static inline void ahc_linux_eisa_exit(void) {
459*4882a593Smuzhiyun }
460*4882a593Smuzhiyun #endif
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun /******************************* PCI Routines *********************************/
463*4882a593Smuzhiyun #ifdef CONFIG_PCI
464*4882a593Smuzhiyun int ahc_linux_pci_init(void);
465*4882a593Smuzhiyun void ahc_linux_pci_exit(void);
466*4882a593Smuzhiyun int ahc_pci_map_registers(struct ahc_softc *ahc);
467*4882a593Smuzhiyun int ahc_pci_map_int(struct ahc_softc *ahc);
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun uint32_t ahc_pci_read_config(ahc_dev_softc_t pci,
470*4882a593Smuzhiyun int reg, int width);
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun void ahc_pci_write_config(ahc_dev_softc_t pci,
473*4882a593Smuzhiyun int reg, uint32_t value,
474*4882a593Smuzhiyun int width);
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun static inline int ahc_get_pci_function(ahc_dev_softc_t);
477*4882a593Smuzhiyun static inline int
ahc_get_pci_function(ahc_dev_softc_t pci)478*4882a593Smuzhiyun ahc_get_pci_function(ahc_dev_softc_t pci)
479*4882a593Smuzhiyun {
480*4882a593Smuzhiyun return (PCI_FUNC(pci->devfn));
481*4882a593Smuzhiyun }
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun static inline int ahc_get_pci_slot(ahc_dev_softc_t);
484*4882a593Smuzhiyun static inline int
ahc_get_pci_slot(ahc_dev_softc_t pci)485*4882a593Smuzhiyun ahc_get_pci_slot(ahc_dev_softc_t pci)
486*4882a593Smuzhiyun {
487*4882a593Smuzhiyun return (PCI_SLOT(pci->devfn));
488*4882a593Smuzhiyun }
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun static inline int ahc_get_pci_bus(ahc_dev_softc_t);
491*4882a593Smuzhiyun static inline int
ahc_get_pci_bus(ahc_dev_softc_t pci)492*4882a593Smuzhiyun ahc_get_pci_bus(ahc_dev_softc_t pci)
493*4882a593Smuzhiyun {
494*4882a593Smuzhiyun return (pci->bus->number);
495*4882a593Smuzhiyun }
496*4882a593Smuzhiyun #else
ahc_linux_pci_init(void)497*4882a593Smuzhiyun static inline int ahc_linux_pci_init(void) {
498*4882a593Smuzhiyun return 0;
499*4882a593Smuzhiyun }
ahc_linux_pci_exit(void)500*4882a593Smuzhiyun static inline void ahc_linux_pci_exit(void) {
501*4882a593Smuzhiyun }
502*4882a593Smuzhiyun #endif
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun static inline void ahc_flush_device_writes(struct ahc_softc *);
505*4882a593Smuzhiyun static inline void
ahc_flush_device_writes(struct ahc_softc * ahc)506*4882a593Smuzhiyun ahc_flush_device_writes(struct ahc_softc *ahc)
507*4882a593Smuzhiyun {
508*4882a593Smuzhiyun /* XXX Is this sufficient for all architectures??? */
509*4882a593Smuzhiyun ahc_inb(ahc, INTSTAT);
510*4882a593Smuzhiyun }
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun /**************************** Proc FS Support *********************************/
513*4882a593Smuzhiyun int ahc_proc_write_seeprom(struct Scsi_Host *, char *, int);
514*4882a593Smuzhiyun int ahc_linux_show_info(struct seq_file *, struct Scsi_Host *);
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun /*************************** Domain Validation ********************************/
517*4882a593Smuzhiyun /*********************** Transaction Access Wrappers *************************/
518*4882a593Smuzhiyun static inline void ahc_cmd_set_transaction_status(struct scsi_cmnd *, uint32_t);
519*4882a593Smuzhiyun static inline void ahc_set_transaction_status(struct scb *, uint32_t);
520*4882a593Smuzhiyun static inline void ahc_cmd_set_scsi_status(struct scsi_cmnd *, uint32_t);
521*4882a593Smuzhiyun static inline void ahc_set_scsi_status(struct scb *, uint32_t);
522*4882a593Smuzhiyun static inline uint32_t ahc_cmd_get_transaction_status(struct scsi_cmnd *cmd);
523*4882a593Smuzhiyun static inline uint32_t ahc_get_transaction_status(struct scb *);
524*4882a593Smuzhiyun static inline uint32_t ahc_cmd_get_scsi_status(struct scsi_cmnd *cmd);
525*4882a593Smuzhiyun static inline uint32_t ahc_get_scsi_status(struct scb *);
526*4882a593Smuzhiyun static inline void ahc_set_transaction_tag(struct scb *, int, u_int);
527*4882a593Smuzhiyun static inline u_long ahc_get_transfer_length(struct scb *);
528*4882a593Smuzhiyun static inline int ahc_get_transfer_dir(struct scb *);
529*4882a593Smuzhiyun static inline void ahc_set_residual(struct scb *, u_long);
530*4882a593Smuzhiyun static inline void ahc_set_sense_residual(struct scb *scb, u_long resid);
531*4882a593Smuzhiyun static inline u_long ahc_get_residual(struct scb *);
532*4882a593Smuzhiyun static inline u_long ahc_get_sense_residual(struct scb *);
533*4882a593Smuzhiyun static inline int ahc_perform_autosense(struct scb *);
534*4882a593Smuzhiyun static inline uint32_t ahc_get_sense_bufsize(struct ahc_softc *,
535*4882a593Smuzhiyun struct scb *);
536*4882a593Smuzhiyun static inline void ahc_notify_xfer_settings_change(struct ahc_softc *,
537*4882a593Smuzhiyun struct ahc_devinfo *);
538*4882a593Smuzhiyun static inline void ahc_platform_scb_free(struct ahc_softc *ahc,
539*4882a593Smuzhiyun struct scb *scb);
540*4882a593Smuzhiyun static inline void ahc_freeze_scb(struct scb *scb);
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun static inline
ahc_cmd_set_transaction_status(struct scsi_cmnd * cmd,uint32_t status)543*4882a593Smuzhiyun void ahc_cmd_set_transaction_status(struct scsi_cmnd *cmd, uint32_t status)
544*4882a593Smuzhiyun {
545*4882a593Smuzhiyun cmd->result &= ~(CAM_STATUS_MASK << 16);
546*4882a593Smuzhiyun cmd->result |= status << 16;
547*4882a593Smuzhiyun }
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun static inline
ahc_set_transaction_status(struct scb * scb,uint32_t status)550*4882a593Smuzhiyun void ahc_set_transaction_status(struct scb *scb, uint32_t status)
551*4882a593Smuzhiyun {
552*4882a593Smuzhiyun ahc_cmd_set_transaction_status(scb->io_ctx,status);
553*4882a593Smuzhiyun }
554*4882a593Smuzhiyun
555*4882a593Smuzhiyun static inline
ahc_cmd_set_scsi_status(struct scsi_cmnd * cmd,uint32_t status)556*4882a593Smuzhiyun void ahc_cmd_set_scsi_status(struct scsi_cmnd *cmd, uint32_t status)
557*4882a593Smuzhiyun {
558*4882a593Smuzhiyun cmd->result &= ~0xFFFF;
559*4882a593Smuzhiyun cmd->result |= status;
560*4882a593Smuzhiyun }
561*4882a593Smuzhiyun
562*4882a593Smuzhiyun static inline
ahc_set_scsi_status(struct scb * scb,uint32_t status)563*4882a593Smuzhiyun void ahc_set_scsi_status(struct scb *scb, uint32_t status)
564*4882a593Smuzhiyun {
565*4882a593Smuzhiyun ahc_cmd_set_scsi_status(scb->io_ctx, status);
566*4882a593Smuzhiyun }
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun static inline
ahc_cmd_get_transaction_status(struct scsi_cmnd * cmd)569*4882a593Smuzhiyun uint32_t ahc_cmd_get_transaction_status(struct scsi_cmnd *cmd)
570*4882a593Smuzhiyun {
571*4882a593Smuzhiyun return ((cmd->result >> 16) & CAM_STATUS_MASK);
572*4882a593Smuzhiyun }
573*4882a593Smuzhiyun
574*4882a593Smuzhiyun static inline
ahc_get_transaction_status(struct scb * scb)575*4882a593Smuzhiyun uint32_t ahc_get_transaction_status(struct scb *scb)
576*4882a593Smuzhiyun {
577*4882a593Smuzhiyun return (ahc_cmd_get_transaction_status(scb->io_ctx));
578*4882a593Smuzhiyun }
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun static inline
ahc_cmd_get_scsi_status(struct scsi_cmnd * cmd)581*4882a593Smuzhiyun uint32_t ahc_cmd_get_scsi_status(struct scsi_cmnd *cmd)
582*4882a593Smuzhiyun {
583*4882a593Smuzhiyun return (cmd->result & 0xFFFF);
584*4882a593Smuzhiyun }
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun static inline
ahc_get_scsi_status(struct scb * scb)587*4882a593Smuzhiyun uint32_t ahc_get_scsi_status(struct scb *scb)
588*4882a593Smuzhiyun {
589*4882a593Smuzhiyun return (ahc_cmd_get_scsi_status(scb->io_ctx));
590*4882a593Smuzhiyun }
591*4882a593Smuzhiyun
592*4882a593Smuzhiyun static inline
ahc_set_transaction_tag(struct scb * scb,int enabled,u_int type)593*4882a593Smuzhiyun void ahc_set_transaction_tag(struct scb *scb, int enabled, u_int type)
594*4882a593Smuzhiyun {
595*4882a593Smuzhiyun /*
596*4882a593Smuzhiyun * Nothing to do for linux as the incoming transaction
597*4882a593Smuzhiyun * has no concept of tag/non tagged, etc.
598*4882a593Smuzhiyun */
599*4882a593Smuzhiyun }
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun static inline
ahc_get_transfer_length(struct scb * scb)602*4882a593Smuzhiyun u_long ahc_get_transfer_length(struct scb *scb)
603*4882a593Smuzhiyun {
604*4882a593Smuzhiyun return (scb->platform_data->xfer_len);
605*4882a593Smuzhiyun }
606*4882a593Smuzhiyun
607*4882a593Smuzhiyun static inline
ahc_get_transfer_dir(struct scb * scb)608*4882a593Smuzhiyun int ahc_get_transfer_dir(struct scb *scb)
609*4882a593Smuzhiyun {
610*4882a593Smuzhiyun return (scb->io_ctx->sc_data_direction);
611*4882a593Smuzhiyun }
612*4882a593Smuzhiyun
613*4882a593Smuzhiyun static inline
ahc_set_residual(struct scb * scb,u_long resid)614*4882a593Smuzhiyun void ahc_set_residual(struct scb *scb, u_long resid)
615*4882a593Smuzhiyun {
616*4882a593Smuzhiyun scsi_set_resid(scb->io_ctx, resid);
617*4882a593Smuzhiyun }
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun static inline
ahc_set_sense_residual(struct scb * scb,u_long resid)620*4882a593Smuzhiyun void ahc_set_sense_residual(struct scb *scb, u_long resid)
621*4882a593Smuzhiyun {
622*4882a593Smuzhiyun scb->platform_data->sense_resid = resid;
623*4882a593Smuzhiyun }
624*4882a593Smuzhiyun
625*4882a593Smuzhiyun static inline
ahc_get_residual(struct scb * scb)626*4882a593Smuzhiyun u_long ahc_get_residual(struct scb *scb)
627*4882a593Smuzhiyun {
628*4882a593Smuzhiyun return scsi_get_resid(scb->io_ctx);
629*4882a593Smuzhiyun }
630*4882a593Smuzhiyun
631*4882a593Smuzhiyun static inline
ahc_get_sense_residual(struct scb * scb)632*4882a593Smuzhiyun u_long ahc_get_sense_residual(struct scb *scb)
633*4882a593Smuzhiyun {
634*4882a593Smuzhiyun return (scb->platform_data->sense_resid);
635*4882a593Smuzhiyun }
636*4882a593Smuzhiyun
637*4882a593Smuzhiyun static inline
ahc_perform_autosense(struct scb * scb)638*4882a593Smuzhiyun int ahc_perform_autosense(struct scb *scb)
639*4882a593Smuzhiyun {
640*4882a593Smuzhiyun /*
641*4882a593Smuzhiyun * We always perform autosense in Linux.
642*4882a593Smuzhiyun * On other platforms this is set on a
643*4882a593Smuzhiyun * per-transaction basis.
644*4882a593Smuzhiyun */
645*4882a593Smuzhiyun return (1);
646*4882a593Smuzhiyun }
647*4882a593Smuzhiyun
648*4882a593Smuzhiyun static inline uint32_t
ahc_get_sense_bufsize(struct ahc_softc * ahc,struct scb * scb)649*4882a593Smuzhiyun ahc_get_sense_bufsize(struct ahc_softc *ahc, struct scb *scb)
650*4882a593Smuzhiyun {
651*4882a593Smuzhiyun return (sizeof(struct scsi_sense_data));
652*4882a593Smuzhiyun }
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun static inline void
ahc_notify_xfer_settings_change(struct ahc_softc * ahc,struct ahc_devinfo * devinfo)655*4882a593Smuzhiyun ahc_notify_xfer_settings_change(struct ahc_softc *ahc,
656*4882a593Smuzhiyun struct ahc_devinfo *devinfo)
657*4882a593Smuzhiyun {
658*4882a593Smuzhiyun /* Nothing to do here for linux */
659*4882a593Smuzhiyun }
660*4882a593Smuzhiyun
661*4882a593Smuzhiyun static inline void
ahc_platform_scb_free(struct ahc_softc * ahc,struct scb * scb)662*4882a593Smuzhiyun ahc_platform_scb_free(struct ahc_softc *ahc, struct scb *scb)
663*4882a593Smuzhiyun {
664*4882a593Smuzhiyun }
665*4882a593Smuzhiyun
666*4882a593Smuzhiyun int ahc_platform_alloc(struct ahc_softc *ahc, void *platform_arg);
667*4882a593Smuzhiyun void ahc_platform_free(struct ahc_softc *ahc);
668*4882a593Smuzhiyun void ahc_platform_freeze_devq(struct ahc_softc *ahc, struct scb *scb);
669*4882a593Smuzhiyun
670*4882a593Smuzhiyun static inline void
ahc_freeze_scb(struct scb * scb)671*4882a593Smuzhiyun ahc_freeze_scb(struct scb *scb)
672*4882a593Smuzhiyun {
673*4882a593Smuzhiyun if ((scb->io_ctx->result & (CAM_DEV_QFRZN << 16)) == 0) {
674*4882a593Smuzhiyun scb->io_ctx->result |= CAM_DEV_QFRZN << 16;
675*4882a593Smuzhiyun scb->platform_data->dev->qfrozen++;
676*4882a593Smuzhiyun }
677*4882a593Smuzhiyun }
678*4882a593Smuzhiyun
679*4882a593Smuzhiyun void ahc_platform_set_tags(struct ahc_softc *ahc, struct scsi_device *sdev,
680*4882a593Smuzhiyun struct ahc_devinfo *devinfo, ahc_queue_alg);
681*4882a593Smuzhiyun int ahc_platform_abort_scbs(struct ahc_softc *ahc, int target,
682*4882a593Smuzhiyun char channel, int lun, u_int tag,
683*4882a593Smuzhiyun role_t role, uint32_t status);
684*4882a593Smuzhiyun irqreturn_t
685*4882a593Smuzhiyun ahc_linux_isr(int irq, void *dev_id);
686*4882a593Smuzhiyun void ahc_platform_flushwork(struct ahc_softc *ahc);
687*4882a593Smuzhiyun void ahc_done(struct ahc_softc*, struct scb*);
688*4882a593Smuzhiyun void ahc_send_async(struct ahc_softc *, char channel,
689*4882a593Smuzhiyun u_int target, u_int lun, ac_code);
690*4882a593Smuzhiyun void ahc_print_path(struct ahc_softc *, struct scb *);
691*4882a593Smuzhiyun
692*4882a593Smuzhiyun #ifdef CONFIG_PCI
693*4882a593Smuzhiyun #define AHC_PCI_CONFIG 1
694*4882a593Smuzhiyun #else
695*4882a593Smuzhiyun #define AHC_PCI_CONFIG 0
696*4882a593Smuzhiyun #endif
697*4882a593Smuzhiyun #define bootverbose aic7xxx_verbose
698*4882a593Smuzhiyun extern u_int aic7xxx_verbose;
699*4882a593Smuzhiyun #endif /* _AIC7XXX_LINUX_H_ */
700