xref: /OK3568_Linux_fs/kernel/drivers/scsi/aha152x.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun #ifndef _AHA152X_H
3*4882a593Smuzhiyun #define _AHA152X_H
4*4882a593Smuzhiyun 
5*4882a593Smuzhiyun /*
6*4882a593Smuzhiyun  * $Id: aha152x.h,v 2.7 2004/01/24 11:39:03 fischer Exp $
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun /* number of queueable commands
10*4882a593Smuzhiyun    (unless we support more than 1 cmd_per_lun this should do) */
11*4882a593Smuzhiyun #define AHA152X_MAXQUEUE 7
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #define AHA152X_REVID "Adaptec 152x SCSI driver; $Revision: 2.7 $"
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun /* port addresses */
16*4882a593Smuzhiyun #define SCSISEQ      (HOSTIOPORT0+0x00)    /* SCSI sequence control */
17*4882a593Smuzhiyun #define SXFRCTL0     (HOSTIOPORT0+0x01)    /* SCSI transfer control 0 */
18*4882a593Smuzhiyun #define SXFRCTL1     (HOSTIOPORT0+0x02)    /* SCSI transfer control 1 */
19*4882a593Smuzhiyun #define SCSISIG      (HOSTIOPORT0+0x03)    /* SCSI signal in/out */
20*4882a593Smuzhiyun #define SCSIRATE     (HOSTIOPORT0+0x04)    /* SCSI rate control */
21*4882a593Smuzhiyun #define SELID        (HOSTIOPORT0+0x05)    /* selection/reselection ID */
22*4882a593Smuzhiyun #define SCSIID       SELID                 /* SCSI ID */
23*4882a593Smuzhiyun #define SCSIDAT      (HOSTIOPORT0+0x06)    /* SCSI latched data */
24*4882a593Smuzhiyun #define SCSIBUS      (HOSTIOPORT0+0x07)    /* SCSI data bus */
25*4882a593Smuzhiyun #define STCNT0       (HOSTIOPORT0+0x08)    /* SCSI transfer count 0 */
26*4882a593Smuzhiyun #define STCNT1       (HOSTIOPORT0+0x09)    /* SCSI transfer count 1 */
27*4882a593Smuzhiyun #define STCNT2       (HOSTIOPORT0+0x0a)    /* SCSI transfer count 2 */
28*4882a593Smuzhiyun #define SSTAT0       (HOSTIOPORT0+0x0b)    /* SCSI interrupt status 0 */
29*4882a593Smuzhiyun #define SSTAT1       (HOSTIOPORT0+0x0c)    /* SCSI interrupt status 1 */
30*4882a593Smuzhiyun #define SSTAT2       (HOSTIOPORT0+0x0d)    /* SCSI interrupt status 2 */
31*4882a593Smuzhiyun #define SCSITEST     (HOSTIOPORT0+0x0e)    /* SCSI test control */
32*4882a593Smuzhiyun #define SSTAT3       SCSITEST              /* SCSI interrupt status 3 */
33*4882a593Smuzhiyun #define SSTAT4       (HOSTIOPORT0+0x0f)    /* SCSI status 4 */
34*4882a593Smuzhiyun #define SIMODE0      (HOSTIOPORT1+0x10)    /* SCSI interrupt mode 0 */
35*4882a593Smuzhiyun #define SIMODE1      (HOSTIOPORT1+0x11)    /* SCSI interrupt mode 1 */
36*4882a593Smuzhiyun #define DMACNTRL0    (HOSTIOPORT1+0x12)    /* DMA control 0 */
37*4882a593Smuzhiyun #define DMACNTRL1    (HOSTIOPORT1+0x13)    /* DMA control 1 */
38*4882a593Smuzhiyun #define DMASTAT      (HOSTIOPORT1+0x14)    /* DMA status */
39*4882a593Smuzhiyun #define FIFOSTAT     (HOSTIOPORT1+0x15)    /* FIFO status */
40*4882a593Smuzhiyun #define DATAPORT     (HOSTIOPORT1+0x16)    /* DATA port */
41*4882a593Smuzhiyun #define BRSTCNTRL    (HOSTIOPORT1+0x18)    /* burst control */
42*4882a593Smuzhiyun #define PORTA        (HOSTIOPORT1+0x1a)    /* PORT A */
43*4882a593Smuzhiyun #define PORTB        (HOSTIOPORT1+0x1b)    /* PORT B */
44*4882a593Smuzhiyun #define REV          (HOSTIOPORT1+0x1c)    /* revision */
45*4882a593Smuzhiyun #define STACK        (HOSTIOPORT1+0x1d)    /* stack */
46*4882a593Smuzhiyun #define TEST         (HOSTIOPORT1+0x1e)    /* test register */
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun #define IO_RANGE        0x20
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun /* used in aha152x_porttest */
51*4882a593Smuzhiyun #define O_PORTA         0x1a               /* PORT A */
52*4882a593Smuzhiyun #define O_PORTB         0x1b               /* PORT B */
53*4882a593Smuzhiyun #define O_DMACNTRL1     0x13               /* DMA control 1 */
54*4882a593Smuzhiyun #define O_STACK         0x1d               /* stack */
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun /* used in tc1550_porttest */
57*4882a593Smuzhiyun #define O_TC_PORTA      0x0a               /* PORT A */
58*4882a593Smuzhiyun #define O_TC_PORTB      0x0b               /* PORT B */
59*4882a593Smuzhiyun #define O_TC_DMACNTRL1  0x03               /* DMA control 1 */
60*4882a593Smuzhiyun #define O_TC_STACK      0x0d               /* stack */
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun /* bits and bitmasks to ports */
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun /* SCSI sequence control */
65*4882a593Smuzhiyun #define TEMODEO      0x80
66*4882a593Smuzhiyun #define ENSELO       0x40
67*4882a593Smuzhiyun #define ENSELI       0x20
68*4882a593Smuzhiyun #define ENRESELI     0x10
69*4882a593Smuzhiyun #define ENAUTOATNO   0x08
70*4882a593Smuzhiyun #define ENAUTOATNI   0x04
71*4882a593Smuzhiyun #define ENAUTOATNP   0x02
72*4882a593Smuzhiyun #define SCSIRSTO     0x01
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun /* SCSI transfer control 0 */
75*4882a593Smuzhiyun #define SCSIEN       0x80
76*4882a593Smuzhiyun #define DMAEN        0x40
77*4882a593Smuzhiyun #define CH1          0x20
78*4882a593Smuzhiyun #define CLRSTCNT     0x10
79*4882a593Smuzhiyun #define SPIOEN       0x08
80*4882a593Smuzhiyun #define CLRCH1       0x02
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun /* SCSI transfer control 1 */
83*4882a593Smuzhiyun #define BITBUCKET    0x80
84*4882a593Smuzhiyun #define SWRAPEN      0x40
85*4882a593Smuzhiyun #define ENSPCHK      0x20
86*4882a593Smuzhiyun #define STIMESEL     0x18    /* mask */
87*4882a593Smuzhiyun #define STIMESEL_    3
88*4882a593Smuzhiyun #define ENSTIMER     0x04
89*4882a593Smuzhiyun #define BYTEALIGN    0x02
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun /* SCSI signal IN */
92*4882a593Smuzhiyun #define SIG_CDI          0x80
93*4882a593Smuzhiyun #define SIG_IOI          0x40
94*4882a593Smuzhiyun #define SIG_MSGI         0x20
95*4882a593Smuzhiyun #define SIG_ATNI         0x10
96*4882a593Smuzhiyun #define SIG_SELI         0x08
97*4882a593Smuzhiyun #define SIG_BSYI         0x04
98*4882a593Smuzhiyun #define SIG_REQI         0x02
99*4882a593Smuzhiyun #define SIG_ACKI         0x01
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun /* SCSI Phases */
102*4882a593Smuzhiyun #define P_MASK       (SIG_MSGI|SIG_CDI|SIG_IOI)
103*4882a593Smuzhiyun #define P_DATAO      (0)
104*4882a593Smuzhiyun #define P_DATAI      (SIG_IOI)
105*4882a593Smuzhiyun #define P_CMD        (SIG_CDI)
106*4882a593Smuzhiyun #define P_STATUS     (SIG_CDI|SIG_IOI)
107*4882a593Smuzhiyun #define P_MSGO       (SIG_MSGI|SIG_CDI)
108*4882a593Smuzhiyun #define P_MSGI       (SIG_MSGI|SIG_CDI|SIG_IOI)
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun /* SCSI signal OUT */
111*4882a593Smuzhiyun #define SIG_CDO          0x80
112*4882a593Smuzhiyun #define SIG_IOO          0x40
113*4882a593Smuzhiyun #define SIG_MSGO         0x20
114*4882a593Smuzhiyun #define SIG_ATNO         0x10
115*4882a593Smuzhiyun #define SIG_SELO         0x08
116*4882a593Smuzhiyun #define SIG_BSYO         0x04
117*4882a593Smuzhiyun #define SIG_REQO         0x02
118*4882a593Smuzhiyun #define SIG_ACKO         0x01
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun /* SCSI rate control */
121*4882a593Smuzhiyun #define SXFR         0x70    /* mask */
122*4882a593Smuzhiyun #define SXFR_        4
123*4882a593Smuzhiyun #define SOFS         0x0f    /* mask */
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun /* SCSI ID */
126*4882a593Smuzhiyun #define OID          0x70
127*4882a593Smuzhiyun #define OID_         4
128*4882a593Smuzhiyun #define TID          0x07
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun /* SCSI transfer count */
131*4882a593Smuzhiyun #define GETSTCNT() ( (GETPORT(STCNT2)<<16) \
132*4882a593Smuzhiyun                    + (GETPORT(STCNT1)<< 8) \
133*4882a593Smuzhiyun                    + GETPORT(STCNT0) )
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun #define SETSTCNT(X) { SETPORT(STCNT2, ((X) & 0xFF0000) >> 16); \
136*4882a593Smuzhiyun                       SETPORT(STCNT1, ((X) & 0x00FF00) >>  8); \
137*4882a593Smuzhiyun                       SETPORT(STCNT0, ((X) & 0x0000FF) ); }
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun /* SCSI interrupt status */
140*4882a593Smuzhiyun #define TARGET       0x80
141*4882a593Smuzhiyun #define SELDO        0x40
142*4882a593Smuzhiyun #define SELDI        0x20
143*4882a593Smuzhiyun #define SELINGO      0x10
144*4882a593Smuzhiyun #define SWRAP        0x08
145*4882a593Smuzhiyun #define SDONE        0x04
146*4882a593Smuzhiyun #define SPIORDY      0x02
147*4882a593Smuzhiyun #define DMADONE      0x01
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun #define SETSDONE     0x80
150*4882a593Smuzhiyun #define CLRSELDO     0x40
151*4882a593Smuzhiyun #define CLRSELDI     0x20
152*4882a593Smuzhiyun #define CLRSELINGO   0x10
153*4882a593Smuzhiyun #define CLRSWRAP     0x08
154*4882a593Smuzhiyun #define CLRSDONE     0x04
155*4882a593Smuzhiyun #define CLRSPIORDY   0x02
156*4882a593Smuzhiyun #define CLRDMADONE   0x01
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun /* SCSI status 1 */
159*4882a593Smuzhiyun #define SELTO        0x80
160*4882a593Smuzhiyun #define ATNTARG      0x40
161*4882a593Smuzhiyun #define SCSIRSTI     0x20
162*4882a593Smuzhiyun #define PHASEMIS     0x10
163*4882a593Smuzhiyun #define BUSFREE      0x08
164*4882a593Smuzhiyun #define SCSIPERR     0x04
165*4882a593Smuzhiyun #define PHASECHG     0x02
166*4882a593Smuzhiyun #define REQINIT      0x01
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun #define CLRSELTIMO   0x80
169*4882a593Smuzhiyun #define CLRATNO      0x40
170*4882a593Smuzhiyun #define CLRSCSIRSTI  0x20
171*4882a593Smuzhiyun #define CLRBUSFREE   0x08
172*4882a593Smuzhiyun #define CLRSCSIPERR  0x04
173*4882a593Smuzhiyun #define CLRPHASECHG  0x02
174*4882a593Smuzhiyun #define CLRREQINIT   0x01
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun /* SCSI status 2 */
177*4882a593Smuzhiyun #define SOFFSET      0x20
178*4882a593Smuzhiyun #define SEMPTY       0x10
179*4882a593Smuzhiyun #define SFULL        0x08
180*4882a593Smuzhiyun #define SFCNT        0x07    /* mask */
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun /* SCSI status 3 */
183*4882a593Smuzhiyun #define SCSICNT      0xf0    /* mask */
184*4882a593Smuzhiyun #define SCSICNT_     4
185*4882a593Smuzhiyun #define OFFCNT       0x0f    /* mask */
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun /* SCSI TEST control */
188*4882a593Smuzhiyun #define SCTESTU      0x08
189*4882a593Smuzhiyun #define SCTESTD      0x04
190*4882a593Smuzhiyun #define STCTEST      0x01
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun /* SCSI status 4 */
193*4882a593Smuzhiyun #define SYNCERR      0x04
194*4882a593Smuzhiyun #define FWERR        0x02
195*4882a593Smuzhiyun #define FRERR        0x01
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun #define CLRSYNCERR   0x04
198*4882a593Smuzhiyun #define CLRFWERR     0x02
199*4882a593Smuzhiyun #define CLRFRERR     0x01
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun /* SCSI interrupt mode 0 */
202*4882a593Smuzhiyun #define ENSELDO      0x40
203*4882a593Smuzhiyun #define ENSELDI      0x20
204*4882a593Smuzhiyun #define ENSELINGO    0x10
205*4882a593Smuzhiyun #define ENSWRAP      0x08
206*4882a593Smuzhiyun #define ENSDONE      0x04
207*4882a593Smuzhiyun #define ENSPIORDY    0x02
208*4882a593Smuzhiyun #define ENDMADONE    0x01
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun /* SCSI interrupt mode 1 */
211*4882a593Smuzhiyun #define ENSELTIMO    0x80
212*4882a593Smuzhiyun #define ENATNTARG    0x40
213*4882a593Smuzhiyun #define ENSCSIRST    0x20
214*4882a593Smuzhiyun #define ENPHASEMIS   0x10
215*4882a593Smuzhiyun #define ENBUSFREE    0x08
216*4882a593Smuzhiyun #define ENSCSIPERR   0x04
217*4882a593Smuzhiyun #define ENPHASECHG   0x02
218*4882a593Smuzhiyun #define ENREQINIT    0x01
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun /* DMA control 0 */
221*4882a593Smuzhiyun #define ENDMA        0x80
222*4882a593Smuzhiyun #define _8BIT        0x40
223*4882a593Smuzhiyun #define DMA          0x20
224*4882a593Smuzhiyun #define WRITE_READ   0x08
225*4882a593Smuzhiyun #define INTEN        0x04
226*4882a593Smuzhiyun #define RSTFIFO      0x02
227*4882a593Smuzhiyun #define SWINT        0x01
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun /* DMA control 1 */
230*4882a593Smuzhiyun #define PWRDWN       0x80
231*4882a593Smuzhiyun #define STK          0x07    /* mask */
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun /* DMA status */
234*4882a593Smuzhiyun #define ATDONE       0x80
235*4882a593Smuzhiyun #define WORDRDY      0x40
236*4882a593Smuzhiyun #define INTSTAT      0x20
237*4882a593Smuzhiyun #define DFIFOFULL    0x10
238*4882a593Smuzhiyun #define DFIFOEMP     0x08
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun /* BURST control */
241*4882a593Smuzhiyun #define BON          0xf0
242*4882a593Smuzhiyun #define BOFF         0x0f
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun /* TEST REGISTER */
245*4882a593Smuzhiyun #define BOFFTMR      0x40
246*4882a593Smuzhiyun #define BONTMR       0x20
247*4882a593Smuzhiyun #define STCNTH       0x10
248*4882a593Smuzhiyun #define STCNTM       0x08
249*4882a593Smuzhiyun #define STCNTL       0x04
250*4882a593Smuzhiyun #define SCSIBLK      0x02
251*4882a593Smuzhiyun #define DMABLK       0x01
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun /* On the AHA-152x board PORTA and PORTB contain
254*4882a593Smuzhiyun    some information about the board's configuration. */
255*4882a593Smuzhiyun typedef union {
256*4882a593Smuzhiyun   struct {
257*4882a593Smuzhiyun     unsigned reserved:2;    /* reserved */
258*4882a593Smuzhiyun     unsigned tardisc:1;     /* Target disconnect: 0=disabled, 1=enabled */
259*4882a593Smuzhiyun     unsigned syncneg:1;     /* Initial sync neg: 0=disabled, 1=enabled */
260*4882a593Smuzhiyun     unsigned msgclasses:2;  /* Message classes
261*4882a593Smuzhiyun                                  0=#4
262*4882a593Smuzhiyun                                  1=#0, #1, #2, #3, #4
263*4882a593Smuzhiyun                                  2=#0, #3, #4
264*4882a593Smuzhiyun                                  3=#0, #4
265*4882a593Smuzhiyun                              */
266*4882a593Smuzhiyun     unsigned boot:1;        /* boot: 0=disabled, 1=enabled */
267*4882a593Smuzhiyun     unsigned dma:1;         /* Transfer mode: 0=PIO; 1=DMA */
268*4882a593Smuzhiyun     unsigned id:3;          /* SCSI-id */
269*4882a593Smuzhiyun     unsigned irq:2;         /* IRQ-Channel: 0,3=12, 1=10, 2=11 */
270*4882a593Smuzhiyun     unsigned dmachan:2;     /* DMA-Channel: 0=0, 1=5, 2=6, 3=7 */
271*4882a593Smuzhiyun     unsigned parity:1;      /* SCSI-parity: 1=enabled 0=disabled */
272*4882a593Smuzhiyun   } fields;
273*4882a593Smuzhiyun   unsigned short port;
274*4882a593Smuzhiyun } aha152x_config ;
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun #define cf_parity     fields.parity
277*4882a593Smuzhiyun #define cf_dmachan    fields.dmachan
278*4882a593Smuzhiyun #define cf_irq        fields.irq
279*4882a593Smuzhiyun #define cf_id         fields.id
280*4882a593Smuzhiyun #define cf_dma        fields.dma
281*4882a593Smuzhiyun #define cf_boot       fields.boot
282*4882a593Smuzhiyun #define cf_msgclasses fields.msgclasses
283*4882a593Smuzhiyun #define cf_syncneg    fields.syncneg
284*4882a593Smuzhiyun #define cf_tardisc    fields.tardisc
285*4882a593Smuzhiyun #define cf_port       port
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun /* Some macros to manipulate ports and their bits */
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun #define SETPORT(PORT, VAL)	outb( (VAL), (PORT) )
290*4882a593Smuzhiyun #define GETPORT(PORT)		inb( PORT )
291*4882a593Smuzhiyun #define SETBITS(PORT, BITS)	outb( (inb(PORT) | (BITS)), (PORT) )
292*4882a593Smuzhiyun #define CLRBITS(PORT, BITS)	outb( (inb(PORT) & ~(BITS)), (PORT) )
293*4882a593Smuzhiyun #define TESTHI(PORT, BITS)	((inb(PORT) & (BITS)) == (BITS))
294*4882a593Smuzhiyun #define TESTLO(PORT, BITS)	((inb(PORT) & (BITS)) == 0)
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun #define SETRATE(RATE)		SETPORT(SCSIRATE,(RATE) & 0x7f)
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun #if defined(AHA152X_DEBUG)
299*4882a593Smuzhiyun enum {
300*4882a593Smuzhiyun   debug_procinfo  = 0x0001,
301*4882a593Smuzhiyun   debug_queue     = 0x0002,
302*4882a593Smuzhiyun   debug_locking   = 0x0004,
303*4882a593Smuzhiyun   debug_intr      = 0x0008,
304*4882a593Smuzhiyun   debug_selection = 0x0010,
305*4882a593Smuzhiyun   debug_msgo      = 0x0020,
306*4882a593Smuzhiyun   debug_msgi      = 0x0040,
307*4882a593Smuzhiyun   debug_status    = 0x0080,
308*4882a593Smuzhiyun   debug_cmd       = 0x0100,
309*4882a593Smuzhiyun   debug_datai     = 0x0200,
310*4882a593Smuzhiyun   debug_datao     = 0x0400,
311*4882a593Smuzhiyun   debug_eh	  = 0x0800,
312*4882a593Smuzhiyun   debug_done      = 0x1000,
313*4882a593Smuzhiyun   debug_phases    = 0x2000,
314*4882a593Smuzhiyun };
315*4882a593Smuzhiyun #endif
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun /* for the pcmcia stub */
318*4882a593Smuzhiyun struct aha152x_setup {
319*4882a593Smuzhiyun 	int io_port;
320*4882a593Smuzhiyun 	int irq;
321*4882a593Smuzhiyun 	int scsiid;
322*4882a593Smuzhiyun 	int reconnect;
323*4882a593Smuzhiyun 	int parity;
324*4882a593Smuzhiyun 	int synchronous;
325*4882a593Smuzhiyun 	int delay;
326*4882a593Smuzhiyun 	int ext_trans;
327*4882a593Smuzhiyun 	int tc1550;
328*4882a593Smuzhiyun #if defined(AHA152X_DEBUG)
329*4882a593Smuzhiyun 	int debug;
330*4882a593Smuzhiyun #endif
331*4882a593Smuzhiyun 	char *conf;
332*4882a593Smuzhiyun };
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun struct Scsi_Host *aha152x_probe_one(struct aha152x_setup *);
335*4882a593Smuzhiyun void aha152x_release(struct Scsi_Host *);
336*4882a593Smuzhiyun int aha152x_host_reset_host(struct Scsi_Host *);
337*4882a593Smuzhiyun 
338*4882a593Smuzhiyun #endif /* _AHA152X_H */
339