xref: /OK3568_Linux_fs/kernel/drivers/scsi/aacraid/comminit.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *	Adaptec AAC series RAID controller driver
4*4882a593Smuzhiyun  *	(c) Copyright 2001 Red Hat Inc.
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * based on the old aacraid driver that is..
7*4882a593Smuzhiyun  * Adaptec aacraid device driver for Linux.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * Copyright (c) 2000-2010 Adaptec, Inc.
10*4882a593Smuzhiyun  *               2010-2015 PMC-Sierra, Inc. (aacraid@pmc-sierra.com)
11*4882a593Smuzhiyun  *               2016-2017 Microsemi Corp. (aacraid@microsemi.com)
12*4882a593Smuzhiyun  *
13*4882a593Smuzhiyun  * Module Name:
14*4882a593Smuzhiyun  *  comminit.c
15*4882a593Smuzhiyun  *
16*4882a593Smuzhiyun  * Abstract: This supports the initialization of the host adapter commuication interface.
17*4882a593Smuzhiyun  *    This is a platform dependent module for the pci cyclone board.
18*4882a593Smuzhiyun  */
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #include <linux/kernel.h>
21*4882a593Smuzhiyun #include <linux/init.h>
22*4882a593Smuzhiyun #include <linux/types.h>
23*4882a593Smuzhiyun #include <linux/pci.h>
24*4882a593Smuzhiyun #include <linux/spinlock.h>
25*4882a593Smuzhiyun #include <linux/slab.h>
26*4882a593Smuzhiyun #include <linux/blkdev.h>
27*4882a593Smuzhiyun #include <linux/delay.h>
28*4882a593Smuzhiyun #include <linux/completion.h>
29*4882a593Smuzhiyun #include <linux/mm.h>
30*4882a593Smuzhiyun #include <scsi/scsi_host.h>
31*4882a593Smuzhiyun #include <scsi/scsi_device.h>
32*4882a593Smuzhiyun #include <scsi/scsi_cmnd.h>
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #include "aacraid.h"
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun struct aac_common aac_config = {
37*4882a593Smuzhiyun 	.irq_mod = 1
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun 
aac_is_msix_mode(struct aac_dev * dev)40*4882a593Smuzhiyun static inline int aac_is_msix_mode(struct aac_dev *dev)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun 	u32 status = 0;
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun 	if (aac_is_src(dev))
45*4882a593Smuzhiyun 		status = src_readl(dev, MUnit.OMR);
46*4882a593Smuzhiyun 	return (status & AAC_INT_MODE_MSIX);
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun 
aac_change_to_intx(struct aac_dev * dev)49*4882a593Smuzhiyun static inline void aac_change_to_intx(struct aac_dev *dev)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun 	aac_src_access_devreg(dev, AAC_DISABLE_MSIX);
52*4882a593Smuzhiyun 	aac_src_access_devreg(dev, AAC_ENABLE_INTX);
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun 
aac_alloc_comm(struct aac_dev * dev,void ** commaddr,unsigned long commsize,unsigned long commalign)55*4882a593Smuzhiyun static int aac_alloc_comm(struct aac_dev *dev, void **commaddr, unsigned long commsize, unsigned long commalign)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun 	unsigned char *base;
58*4882a593Smuzhiyun 	unsigned long size, align;
59*4882a593Smuzhiyun 	const unsigned long fibsize = dev->max_fib_size;
60*4882a593Smuzhiyun 	const unsigned long printfbufsiz = 256;
61*4882a593Smuzhiyun 	unsigned long host_rrq_size, aac_init_size;
62*4882a593Smuzhiyun 	union aac_init *init;
63*4882a593Smuzhiyun 	dma_addr_t phys;
64*4882a593Smuzhiyun 	unsigned long aac_max_hostphysmempages;
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 	if ((dev->comm_interface == AAC_COMM_MESSAGE_TYPE1) ||
67*4882a593Smuzhiyun 		(dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) ||
68*4882a593Smuzhiyun 		(dev->comm_interface == AAC_COMM_MESSAGE_TYPE3 &&
69*4882a593Smuzhiyun 		!dev->sa_firmware)) {
70*4882a593Smuzhiyun 		host_rrq_size =
71*4882a593Smuzhiyun 			(dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB)
72*4882a593Smuzhiyun 				* sizeof(u32);
73*4882a593Smuzhiyun 		aac_init_size = sizeof(union aac_init);
74*4882a593Smuzhiyun 	} else if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3 &&
75*4882a593Smuzhiyun 		dev->sa_firmware) {
76*4882a593Smuzhiyun 		host_rrq_size = (dev->scsi_host_ptr->can_queue
77*4882a593Smuzhiyun 			+ AAC_NUM_MGT_FIB) * sizeof(u32)  * AAC_MAX_MSIX;
78*4882a593Smuzhiyun 		aac_init_size = sizeof(union aac_init) +
79*4882a593Smuzhiyun 			(AAC_MAX_HRRQ - 1) * sizeof(struct _rrq);
80*4882a593Smuzhiyun 	} else {
81*4882a593Smuzhiyun 		host_rrq_size = 0;
82*4882a593Smuzhiyun 		aac_init_size = sizeof(union aac_init);
83*4882a593Smuzhiyun 	}
84*4882a593Smuzhiyun 	size = fibsize + aac_init_size + commsize + commalign +
85*4882a593Smuzhiyun 			printfbufsiz + host_rrq_size;
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	base = dma_alloc_coherent(&dev->pdev->dev, size, &phys, GFP_KERNEL);
88*4882a593Smuzhiyun 	if (base == NULL) {
89*4882a593Smuzhiyun 		printk(KERN_ERR "aacraid: unable to create mapping.\n");
90*4882a593Smuzhiyun 		return 0;
91*4882a593Smuzhiyun 	}
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 	dev->comm_addr = (void *)base;
94*4882a593Smuzhiyun 	dev->comm_phys = phys;
95*4882a593Smuzhiyun 	dev->comm_size = size;
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	if ((dev->comm_interface == AAC_COMM_MESSAGE_TYPE1) ||
98*4882a593Smuzhiyun 	    (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) ||
99*4882a593Smuzhiyun 	    (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3)) {
100*4882a593Smuzhiyun 		dev->host_rrq = (u32 *)(base + fibsize);
101*4882a593Smuzhiyun 		dev->host_rrq_pa = phys + fibsize;
102*4882a593Smuzhiyun 		memset(dev->host_rrq, 0, host_rrq_size);
103*4882a593Smuzhiyun 	}
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	dev->init = (union aac_init *)(base + fibsize + host_rrq_size);
106*4882a593Smuzhiyun 	dev->init_pa = phys + fibsize + host_rrq_size;
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	init = dev->init;
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3) {
111*4882a593Smuzhiyun 		int i;
112*4882a593Smuzhiyun 		u64 addr;
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 		init->r8.init_struct_revision =
115*4882a593Smuzhiyun 			cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_8);
116*4882a593Smuzhiyun 		init->r8.init_flags = cpu_to_le32(INITFLAGS_NEW_COMM_SUPPORTED |
117*4882a593Smuzhiyun 					INITFLAGS_DRIVER_USES_UTC_TIME |
118*4882a593Smuzhiyun 					INITFLAGS_DRIVER_SUPPORTS_PM);
119*4882a593Smuzhiyun 		init->r8.init_flags |=
120*4882a593Smuzhiyun 				cpu_to_le32(INITFLAGS_DRIVER_SUPPORTS_HBA_MODE);
121*4882a593Smuzhiyun 		init->r8.rr_queue_count = cpu_to_le32(dev->max_msix);
122*4882a593Smuzhiyun 		init->r8.max_io_size =
123*4882a593Smuzhiyun 			cpu_to_le32(dev->scsi_host_ptr->max_sectors << 9);
124*4882a593Smuzhiyun 		init->r8.max_num_aif = init->r8.reserved1 =
125*4882a593Smuzhiyun 			init->r8.reserved2 = 0;
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 		for (i = 0; i < dev->max_msix; i++) {
128*4882a593Smuzhiyun 			addr = (u64)dev->host_rrq_pa + dev->vector_cap * i *
129*4882a593Smuzhiyun 					sizeof(u32);
130*4882a593Smuzhiyun 			init->r8.rrq[i].host_addr_high = cpu_to_le32(
131*4882a593Smuzhiyun 						upper_32_bits(addr));
132*4882a593Smuzhiyun 			init->r8.rrq[i].host_addr_low = cpu_to_le32(
133*4882a593Smuzhiyun 						lower_32_bits(addr));
134*4882a593Smuzhiyun 			init->r8.rrq[i].msix_id = i;
135*4882a593Smuzhiyun 			init->r8.rrq[i].element_count = cpu_to_le16(
136*4882a593Smuzhiyun 					(u16)dev->vector_cap);
137*4882a593Smuzhiyun 			init->r8.rrq[i].comp_thresh =
138*4882a593Smuzhiyun 					init->r8.rrq[i].unused = 0;
139*4882a593Smuzhiyun 		}
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun 		pr_warn("aacraid: Comm Interface type3 enabled\n");
142*4882a593Smuzhiyun 	} else {
143*4882a593Smuzhiyun 		init->r7.init_struct_revision =
144*4882a593Smuzhiyun 			cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION);
145*4882a593Smuzhiyun 		if (dev->max_fib_size != sizeof(struct hw_fib))
146*4882a593Smuzhiyun 			init->r7.init_struct_revision =
147*4882a593Smuzhiyun 				cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_4);
148*4882a593Smuzhiyun 		init->r7.no_of_msix_vectors = cpu_to_le32(SA_MINIPORT_REVISION);
149*4882a593Smuzhiyun 		init->r7.fsrev = cpu_to_le32(dev->fsrev);
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 		/*
152*4882a593Smuzhiyun 		 *	Adapter Fibs are the first thing allocated so that they
153*4882a593Smuzhiyun 		 *	start page aligned
154*4882a593Smuzhiyun 		 */
155*4882a593Smuzhiyun 		dev->aif_base_va = (struct hw_fib *)base;
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 		init->r7.adapter_fibs_virtual_address = 0;
158*4882a593Smuzhiyun 		init->r7.adapter_fibs_physical_address = cpu_to_le32((u32)phys);
159*4882a593Smuzhiyun 		init->r7.adapter_fibs_size = cpu_to_le32(fibsize);
160*4882a593Smuzhiyun 		init->r7.adapter_fib_align = cpu_to_le32(sizeof(struct hw_fib));
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 		/*
163*4882a593Smuzhiyun 		 * number of 4k pages of host physical memory. The aacraid fw
164*4882a593Smuzhiyun 		 * needs this number to be less than 4gb worth of pages. New
165*4882a593Smuzhiyun 		 * firmware doesn't have any issues with the mapping system, but
166*4882a593Smuzhiyun 		 * older Firmware did, and had *troubles* dealing with the math
167*4882a593Smuzhiyun 		 * overloading past 32 bits, thus we must limit this field.
168*4882a593Smuzhiyun 		 */
169*4882a593Smuzhiyun 		aac_max_hostphysmempages =
170*4882a593Smuzhiyun 				dma_get_required_mask(&dev->pdev->dev) >> 12;
171*4882a593Smuzhiyun 		if (aac_max_hostphysmempages < AAC_MAX_HOSTPHYSMEMPAGES)
172*4882a593Smuzhiyun 			init->r7.host_phys_mem_pages =
173*4882a593Smuzhiyun 					cpu_to_le32(aac_max_hostphysmempages);
174*4882a593Smuzhiyun 		else
175*4882a593Smuzhiyun 			init->r7.host_phys_mem_pages =
176*4882a593Smuzhiyun 					cpu_to_le32(AAC_MAX_HOSTPHYSMEMPAGES);
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun 		init->r7.init_flags =
179*4882a593Smuzhiyun 			cpu_to_le32(INITFLAGS_DRIVER_USES_UTC_TIME |
180*4882a593Smuzhiyun 			INITFLAGS_DRIVER_SUPPORTS_PM);
181*4882a593Smuzhiyun 		init->r7.max_io_commands =
182*4882a593Smuzhiyun 			cpu_to_le32(dev->scsi_host_ptr->can_queue +
183*4882a593Smuzhiyun 					AAC_NUM_MGT_FIB);
184*4882a593Smuzhiyun 		init->r7.max_io_size =
185*4882a593Smuzhiyun 			cpu_to_le32(dev->scsi_host_ptr->max_sectors << 9);
186*4882a593Smuzhiyun 		init->r7.max_fib_size = cpu_to_le32(dev->max_fib_size);
187*4882a593Smuzhiyun 		init->r7.max_num_aif = cpu_to_le32(dev->max_num_aif);
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 		if (dev->comm_interface == AAC_COMM_MESSAGE) {
190*4882a593Smuzhiyun 			init->r7.init_flags |=
191*4882a593Smuzhiyun 				cpu_to_le32(INITFLAGS_NEW_COMM_SUPPORTED);
192*4882a593Smuzhiyun 			pr_warn("aacraid: Comm Interface enabled\n");
193*4882a593Smuzhiyun 		} else if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE1) {
194*4882a593Smuzhiyun 			init->r7.init_struct_revision =
195*4882a593Smuzhiyun 				cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_6);
196*4882a593Smuzhiyun 			init->r7.init_flags |=
197*4882a593Smuzhiyun 				cpu_to_le32(INITFLAGS_NEW_COMM_SUPPORTED |
198*4882a593Smuzhiyun 				INITFLAGS_NEW_COMM_TYPE1_SUPPORTED |
199*4882a593Smuzhiyun 				INITFLAGS_FAST_JBOD_SUPPORTED);
200*4882a593Smuzhiyun 			init->r7.host_rrq_addr_high =
201*4882a593Smuzhiyun 				cpu_to_le32(upper_32_bits(dev->host_rrq_pa));
202*4882a593Smuzhiyun 			init->r7.host_rrq_addr_low =
203*4882a593Smuzhiyun 				cpu_to_le32(lower_32_bits(dev->host_rrq_pa));
204*4882a593Smuzhiyun 			pr_warn("aacraid: Comm Interface type1 enabled\n");
205*4882a593Smuzhiyun 		} else if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) {
206*4882a593Smuzhiyun 			init->r7.init_struct_revision =
207*4882a593Smuzhiyun 				cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_7);
208*4882a593Smuzhiyun 			init->r7.init_flags |=
209*4882a593Smuzhiyun 				cpu_to_le32(INITFLAGS_NEW_COMM_SUPPORTED |
210*4882a593Smuzhiyun 				INITFLAGS_NEW_COMM_TYPE2_SUPPORTED |
211*4882a593Smuzhiyun 				INITFLAGS_FAST_JBOD_SUPPORTED);
212*4882a593Smuzhiyun 			init->r7.host_rrq_addr_high =
213*4882a593Smuzhiyun 				cpu_to_le32(upper_32_bits(dev->host_rrq_pa));
214*4882a593Smuzhiyun 			init->r7.host_rrq_addr_low =
215*4882a593Smuzhiyun 				cpu_to_le32(lower_32_bits(dev->host_rrq_pa));
216*4882a593Smuzhiyun 			init->r7.no_of_msix_vectors =
217*4882a593Smuzhiyun 				cpu_to_le32(dev->max_msix);
218*4882a593Smuzhiyun 			/* must be the COMM_PREFERRED_SETTINGS values */
219*4882a593Smuzhiyun 			pr_warn("aacraid: Comm Interface type2 enabled\n");
220*4882a593Smuzhiyun 		}
221*4882a593Smuzhiyun 	}
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun 	/*
224*4882a593Smuzhiyun 	 * Increment the base address by the amount already used
225*4882a593Smuzhiyun 	 */
226*4882a593Smuzhiyun 	base = base + fibsize + host_rrq_size + aac_init_size;
227*4882a593Smuzhiyun 	phys = (dma_addr_t)((ulong)phys + fibsize + host_rrq_size +
228*4882a593Smuzhiyun 			aac_init_size);
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	/*
231*4882a593Smuzhiyun 	 *	Align the beginning of Headers to commalign
232*4882a593Smuzhiyun 	 */
233*4882a593Smuzhiyun 	align = (commalign - ((uintptr_t)(base) & (commalign - 1)));
234*4882a593Smuzhiyun 	base = base + align;
235*4882a593Smuzhiyun 	phys = phys + align;
236*4882a593Smuzhiyun 	/*
237*4882a593Smuzhiyun 	 *	Fill in addresses of the Comm Area Headers and Queues
238*4882a593Smuzhiyun 	 */
239*4882a593Smuzhiyun 	*commaddr = base;
240*4882a593Smuzhiyun 	if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE3)
241*4882a593Smuzhiyun 		init->r7.comm_header_address = cpu_to_le32((u32)phys);
242*4882a593Smuzhiyun 	/*
243*4882a593Smuzhiyun 	 *	Increment the base address by the size of the CommArea
244*4882a593Smuzhiyun 	 */
245*4882a593Smuzhiyun 	base = base + commsize;
246*4882a593Smuzhiyun 	phys = phys + commsize;
247*4882a593Smuzhiyun 	/*
248*4882a593Smuzhiyun 	 *	 Place the Printf buffer area after the Fast I/O comm area.
249*4882a593Smuzhiyun 	 */
250*4882a593Smuzhiyun 	dev->printfbuf = (void *)base;
251*4882a593Smuzhiyun 	if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE3) {
252*4882a593Smuzhiyun 		init->r7.printfbuf = cpu_to_le32(phys);
253*4882a593Smuzhiyun 		init->r7.printfbufsiz = cpu_to_le32(printfbufsiz);
254*4882a593Smuzhiyun 	}
255*4882a593Smuzhiyun 	memset(base, 0, printfbufsiz);
256*4882a593Smuzhiyun 	return 1;
257*4882a593Smuzhiyun }
258*4882a593Smuzhiyun 
aac_queue_init(struct aac_dev * dev,struct aac_queue * q,u32 * mem,int qsize)259*4882a593Smuzhiyun static void aac_queue_init(struct aac_dev * dev, struct aac_queue * q, u32 *mem, int qsize)
260*4882a593Smuzhiyun {
261*4882a593Smuzhiyun 	atomic_set(&q->numpending, 0);
262*4882a593Smuzhiyun 	q->dev = dev;
263*4882a593Smuzhiyun 	init_waitqueue_head(&q->cmdready);
264*4882a593Smuzhiyun 	INIT_LIST_HEAD(&q->cmdq);
265*4882a593Smuzhiyun 	init_waitqueue_head(&q->qfull);
266*4882a593Smuzhiyun 	spin_lock_init(&q->lockdata);
267*4882a593Smuzhiyun 	q->lock = &q->lockdata;
268*4882a593Smuzhiyun 	q->headers.producer = (__le32 *)mem;
269*4882a593Smuzhiyun 	q->headers.consumer = (__le32 *)(mem+1);
270*4882a593Smuzhiyun 	*(q->headers.producer) = cpu_to_le32(qsize);
271*4882a593Smuzhiyun 	*(q->headers.consumer) = cpu_to_le32(qsize);
272*4882a593Smuzhiyun 	q->entries = qsize;
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun 
wait_for_io_iter(struct scsi_cmnd * cmd,void * data,bool rsvd)275*4882a593Smuzhiyun static bool wait_for_io_iter(struct scsi_cmnd *cmd, void *data, bool rsvd)
276*4882a593Smuzhiyun {
277*4882a593Smuzhiyun 	int *active = data;
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun 	if (cmd->SCp.phase == AAC_OWNER_FIRMWARE)
280*4882a593Smuzhiyun 		*active = *active + 1;
281*4882a593Smuzhiyun 	return true;
282*4882a593Smuzhiyun }
aac_wait_for_io_completion(struct aac_dev * aac)283*4882a593Smuzhiyun static void aac_wait_for_io_completion(struct aac_dev *aac)
284*4882a593Smuzhiyun {
285*4882a593Smuzhiyun 	int i = 0, active;
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 	for (i = 60; i; --i) {
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun 		active = 0;
290*4882a593Smuzhiyun 		scsi_host_busy_iter(aac->scsi_host_ptr,
291*4882a593Smuzhiyun 				    wait_for_io_iter, &active);
292*4882a593Smuzhiyun 		/*
293*4882a593Smuzhiyun 		 * We can exit If all the commands are complete
294*4882a593Smuzhiyun 		 */
295*4882a593Smuzhiyun 		if (active == 0)
296*4882a593Smuzhiyun 			break;
297*4882a593Smuzhiyun 		dev_info(&aac->pdev->dev,
298*4882a593Smuzhiyun 			 "Wait for %d commands to complete\n", active);
299*4882a593Smuzhiyun 		ssleep(1);
300*4882a593Smuzhiyun 	}
301*4882a593Smuzhiyun 	if (active)
302*4882a593Smuzhiyun 		dev_err(&aac->pdev->dev,
303*4882a593Smuzhiyun 			"%d outstanding commands during shutdown\n", active);
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun /**
307*4882a593Smuzhiyun  *	aac_send_shutdown		-	shutdown an adapter
308*4882a593Smuzhiyun  *	@dev: Adapter to shutdown
309*4882a593Smuzhiyun  *
310*4882a593Smuzhiyun  *	This routine will send a VM_CloseAll (shutdown) request to the adapter.
311*4882a593Smuzhiyun  */
312*4882a593Smuzhiyun 
aac_send_shutdown(struct aac_dev * dev)313*4882a593Smuzhiyun int aac_send_shutdown(struct aac_dev * dev)
314*4882a593Smuzhiyun {
315*4882a593Smuzhiyun 	struct fib * fibctx;
316*4882a593Smuzhiyun 	struct aac_close *cmd;
317*4882a593Smuzhiyun 	int status = 0;
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun 	if (aac_adapter_check_health(dev))
320*4882a593Smuzhiyun 		return status;
321*4882a593Smuzhiyun 
322*4882a593Smuzhiyun 	if (!dev->adapter_shutdown) {
323*4882a593Smuzhiyun 		mutex_lock(&dev->ioctl_mutex);
324*4882a593Smuzhiyun 		dev->adapter_shutdown = 1;
325*4882a593Smuzhiyun 		mutex_unlock(&dev->ioctl_mutex);
326*4882a593Smuzhiyun 	}
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun 	aac_wait_for_io_completion(dev);
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun 	fibctx = aac_fib_alloc(dev);
331*4882a593Smuzhiyun 	if (!fibctx)
332*4882a593Smuzhiyun 		return -ENOMEM;
333*4882a593Smuzhiyun 	aac_fib_init(fibctx);
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 	cmd = (struct aac_close *) fib_data(fibctx);
336*4882a593Smuzhiyun 	cmd->command = cpu_to_le32(VM_CloseAll);
337*4882a593Smuzhiyun 	cmd->cid = cpu_to_le32(0xfffffffe);
338*4882a593Smuzhiyun 
339*4882a593Smuzhiyun 	status = aac_fib_send(ContainerCommand,
340*4882a593Smuzhiyun 			  fibctx,
341*4882a593Smuzhiyun 			  sizeof(struct aac_close),
342*4882a593Smuzhiyun 			  FsaNormal,
343*4882a593Smuzhiyun 			  -2 /* Timeout silently */, 1,
344*4882a593Smuzhiyun 			  NULL, NULL);
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun 	if (status >= 0)
347*4882a593Smuzhiyun 		aac_fib_complete(fibctx);
348*4882a593Smuzhiyun 	/* FIB should be freed only after getting the response from the F/W */
349*4882a593Smuzhiyun 	if (status != -ERESTARTSYS)
350*4882a593Smuzhiyun 		aac_fib_free(fibctx);
351*4882a593Smuzhiyun 	if (aac_is_src(dev) &&
352*4882a593Smuzhiyun 	     dev->msi_enabled)
353*4882a593Smuzhiyun 		aac_set_intx_mode(dev);
354*4882a593Smuzhiyun 	return status;
355*4882a593Smuzhiyun }
356*4882a593Smuzhiyun 
357*4882a593Smuzhiyun /**
358*4882a593Smuzhiyun  *	aac_comm_init	-	Initialise FSA data structures
359*4882a593Smuzhiyun  *	@dev:	Adapter to initialise
360*4882a593Smuzhiyun  *
361*4882a593Smuzhiyun  *	Initializes the data structures that are required for the FSA commuication
362*4882a593Smuzhiyun  *	interface to operate.
363*4882a593Smuzhiyun  *	Returns
364*4882a593Smuzhiyun  *		1 - if we were able to init the commuication interface.
365*4882a593Smuzhiyun  *		0 - If there were errors initing. This is a fatal error.
366*4882a593Smuzhiyun  */
367*4882a593Smuzhiyun 
aac_comm_init(struct aac_dev * dev)368*4882a593Smuzhiyun static int aac_comm_init(struct aac_dev * dev)
369*4882a593Smuzhiyun {
370*4882a593Smuzhiyun 	unsigned long hdrsize = (sizeof(u32) * NUMBER_OF_COMM_QUEUES) * 2;
371*4882a593Smuzhiyun 	unsigned long queuesize = sizeof(struct aac_entry) * TOTAL_QUEUE_ENTRIES;
372*4882a593Smuzhiyun 	u32 *headers;
373*4882a593Smuzhiyun 	struct aac_entry * queues;
374*4882a593Smuzhiyun 	unsigned long size;
375*4882a593Smuzhiyun 	struct aac_queue_block * comm = dev->queues;
376*4882a593Smuzhiyun 	/*
377*4882a593Smuzhiyun 	 *	Now allocate and initialize the zone structures used as our
378*4882a593Smuzhiyun 	 *	pool of FIB context records.  The size of the zone is based
379*4882a593Smuzhiyun 	 *	on the system memory size.  We also initialize the mutex used
380*4882a593Smuzhiyun 	 *	to protect the zone.
381*4882a593Smuzhiyun 	 */
382*4882a593Smuzhiyun 	spin_lock_init(&dev->fib_lock);
383*4882a593Smuzhiyun 
384*4882a593Smuzhiyun 	/*
385*4882a593Smuzhiyun 	 *	Allocate the physically contiguous space for the commuication
386*4882a593Smuzhiyun 	 *	queue headers.
387*4882a593Smuzhiyun 	 */
388*4882a593Smuzhiyun 
389*4882a593Smuzhiyun 	size = hdrsize + queuesize;
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun 	if (!aac_alloc_comm(dev, (void * *)&headers, size, QUEUE_ALIGNMENT))
392*4882a593Smuzhiyun 		return -ENOMEM;
393*4882a593Smuzhiyun 
394*4882a593Smuzhiyun 	queues = (struct aac_entry *)(((ulong)headers) + hdrsize);
395*4882a593Smuzhiyun 
396*4882a593Smuzhiyun 	/* Adapter to Host normal priority Command queue */
397*4882a593Smuzhiyun 	comm->queue[HostNormCmdQueue].base = queues;
398*4882a593Smuzhiyun 	aac_queue_init(dev, &comm->queue[HostNormCmdQueue], headers, HOST_NORM_CMD_ENTRIES);
399*4882a593Smuzhiyun 	queues += HOST_NORM_CMD_ENTRIES;
400*4882a593Smuzhiyun 	headers += 2;
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun 	/* Adapter to Host high priority command queue */
403*4882a593Smuzhiyun 	comm->queue[HostHighCmdQueue].base = queues;
404*4882a593Smuzhiyun 	aac_queue_init(dev, &comm->queue[HostHighCmdQueue], headers, HOST_HIGH_CMD_ENTRIES);
405*4882a593Smuzhiyun 
406*4882a593Smuzhiyun 	queues += HOST_HIGH_CMD_ENTRIES;
407*4882a593Smuzhiyun 	headers +=2;
408*4882a593Smuzhiyun 
409*4882a593Smuzhiyun 	/* Host to adapter normal priority command queue */
410*4882a593Smuzhiyun 	comm->queue[AdapNormCmdQueue].base = queues;
411*4882a593Smuzhiyun 	aac_queue_init(dev, &comm->queue[AdapNormCmdQueue], headers, ADAP_NORM_CMD_ENTRIES);
412*4882a593Smuzhiyun 
413*4882a593Smuzhiyun 	queues += ADAP_NORM_CMD_ENTRIES;
414*4882a593Smuzhiyun 	headers += 2;
415*4882a593Smuzhiyun 
416*4882a593Smuzhiyun 	/* host to adapter high priority command queue */
417*4882a593Smuzhiyun 	comm->queue[AdapHighCmdQueue].base = queues;
418*4882a593Smuzhiyun 	aac_queue_init(dev, &comm->queue[AdapHighCmdQueue], headers, ADAP_HIGH_CMD_ENTRIES);
419*4882a593Smuzhiyun 
420*4882a593Smuzhiyun 	queues += ADAP_HIGH_CMD_ENTRIES;
421*4882a593Smuzhiyun 	headers += 2;
422*4882a593Smuzhiyun 
423*4882a593Smuzhiyun 	/* adapter to host normal priority response queue */
424*4882a593Smuzhiyun 	comm->queue[HostNormRespQueue].base = queues;
425*4882a593Smuzhiyun 	aac_queue_init(dev, &comm->queue[HostNormRespQueue], headers, HOST_NORM_RESP_ENTRIES);
426*4882a593Smuzhiyun 	queues += HOST_NORM_RESP_ENTRIES;
427*4882a593Smuzhiyun 	headers += 2;
428*4882a593Smuzhiyun 
429*4882a593Smuzhiyun 	/* adapter to host high priority response queue */
430*4882a593Smuzhiyun 	comm->queue[HostHighRespQueue].base = queues;
431*4882a593Smuzhiyun 	aac_queue_init(dev, &comm->queue[HostHighRespQueue], headers, HOST_HIGH_RESP_ENTRIES);
432*4882a593Smuzhiyun 
433*4882a593Smuzhiyun 	queues += HOST_HIGH_RESP_ENTRIES;
434*4882a593Smuzhiyun 	headers += 2;
435*4882a593Smuzhiyun 
436*4882a593Smuzhiyun 	/* host to adapter normal priority response queue */
437*4882a593Smuzhiyun 	comm->queue[AdapNormRespQueue].base = queues;
438*4882a593Smuzhiyun 	aac_queue_init(dev, &comm->queue[AdapNormRespQueue], headers, ADAP_NORM_RESP_ENTRIES);
439*4882a593Smuzhiyun 
440*4882a593Smuzhiyun 	queues += ADAP_NORM_RESP_ENTRIES;
441*4882a593Smuzhiyun 	headers += 2;
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun 	/* host to adapter high priority response queue */
444*4882a593Smuzhiyun 	comm->queue[AdapHighRespQueue].base = queues;
445*4882a593Smuzhiyun 	aac_queue_init(dev, &comm->queue[AdapHighRespQueue], headers, ADAP_HIGH_RESP_ENTRIES);
446*4882a593Smuzhiyun 
447*4882a593Smuzhiyun 	comm->queue[AdapNormCmdQueue].lock = comm->queue[HostNormRespQueue].lock;
448*4882a593Smuzhiyun 	comm->queue[AdapHighCmdQueue].lock = comm->queue[HostHighRespQueue].lock;
449*4882a593Smuzhiyun 	comm->queue[AdapNormRespQueue].lock = comm->queue[HostNormCmdQueue].lock;
450*4882a593Smuzhiyun 	comm->queue[AdapHighRespQueue].lock = comm->queue[HostHighCmdQueue].lock;
451*4882a593Smuzhiyun 
452*4882a593Smuzhiyun 	return 0;
453*4882a593Smuzhiyun }
454*4882a593Smuzhiyun 
aac_define_int_mode(struct aac_dev * dev)455*4882a593Smuzhiyun void aac_define_int_mode(struct aac_dev *dev)
456*4882a593Smuzhiyun {
457*4882a593Smuzhiyun 	int i, msi_count, min_msix;
458*4882a593Smuzhiyun 
459*4882a593Smuzhiyun 	msi_count = i = 0;
460*4882a593Smuzhiyun 	/* max. vectors from GET_COMM_PREFERRED_SETTINGS */
461*4882a593Smuzhiyun 	if (dev->max_msix == 0 ||
462*4882a593Smuzhiyun 	    dev->pdev->device == PMC_DEVICE_S6 ||
463*4882a593Smuzhiyun 	    dev->sync_mode) {
464*4882a593Smuzhiyun 		dev->max_msix = 1;
465*4882a593Smuzhiyun 		dev->vector_cap =
466*4882a593Smuzhiyun 			dev->scsi_host_ptr->can_queue +
467*4882a593Smuzhiyun 			AAC_NUM_MGT_FIB;
468*4882a593Smuzhiyun 		return;
469*4882a593Smuzhiyun 	}
470*4882a593Smuzhiyun 
471*4882a593Smuzhiyun 	/* Don't bother allocating more MSI-X vectors than cpus */
472*4882a593Smuzhiyun 	msi_count = min(dev->max_msix,
473*4882a593Smuzhiyun 		(unsigned int)num_online_cpus());
474*4882a593Smuzhiyun 
475*4882a593Smuzhiyun 	dev->max_msix = msi_count;
476*4882a593Smuzhiyun 
477*4882a593Smuzhiyun 	if (msi_count > AAC_MAX_MSIX)
478*4882a593Smuzhiyun 		msi_count = AAC_MAX_MSIX;
479*4882a593Smuzhiyun 
480*4882a593Smuzhiyun 	if (msi_count > 1 &&
481*4882a593Smuzhiyun 	    pci_find_capability(dev->pdev, PCI_CAP_ID_MSIX)) {
482*4882a593Smuzhiyun 		min_msix = 2;
483*4882a593Smuzhiyun 		i = pci_alloc_irq_vectors(dev->pdev,
484*4882a593Smuzhiyun 					  min_msix, msi_count,
485*4882a593Smuzhiyun 					  PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
486*4882a593Smuzhiyun 		if (i > 0) {
487*4882a593Smuzhiyun 			dev->msi_enabled = 1;
488*4882a593Smuzhiyun 			msi_count = i;
489*4882a593Smuzhiyun 		} else {
490*4882a593Smuzhiyun 			dev->msi_enabled = 0;
491*4882a593Smuzhiyun 			dev_err(&dev->pdev->dev,
492*4882a593Smuzhiyun 			"MSIX not supported!! Will try INTX 0x%x.\n", i);
493*4882a593Smuzhiyun 		}
494*4882a593Smuzhiyun 	}
495*4882a593Smuzhiyun 
496*4882a593Smuzhiyun 	if (!dev->msi_enabled)
497*4882a593Smuzhiyun 		dev->max_msix = msi_count = 1;
498*4882a593Smuzhiyun 	else {
499*4882a593Smuzhiyun 		if (dev->max_msix > msi_count)
500*4882a593Smuzhiyun 			dev->max_msix = msi_count;
501*4882a593Smuzhiyun 	}
502*4882a593Smuzhiyun 	if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3 && dev->sa_firmware)
503*4882a593Smuzhiyun 		dev->vector_cap = dev->scsi_host_ptr->can_queue +
504*4882a593Smuzhiyun 				AAC_NUM_MGT_FIB;
505*4882a593Smuzhiyun 	else
506*4882a593Smuzhiyun 		dev->vector_cap = (dev->scsi_host_ptr->can_queue +
507*4882a593Smuzhiyun 				AAC_NUM_MGT_FIB) / msi_count;
508*4882a593Smuzhiyun 
509*4882a593Smuzhiyun }
aac_init_adapter(struct aac_dev * dev)510*4882a593Smuzhiyun struct aac_dev *aac_init_adapter(struct aac_dev *dev)
511*4882a593Smuzhiyun {
512*4882a593Smuzhiyun 	u32 status[5];
513*4882a593Smuzhiyun 	struct Scsi_Host * host = dev->scsi_host_ptr;
514*4882a593Smuzhiyun 	extern int aac_sync_mode;
515*4882a593Smuzhiyun 
516*4882a593Smuzhiyun 	/*
517*4882a593Smuzhiyun 	 *	Check the preferred comm settings, defaults from template.
518*4882a593Smuzhiyun 	 */
519*4882a593Smuzhiyun 	dev->management_fib_count = 0;
520*4882a593Smuzhiyun 	spin_lock_init(&dev->manage_lock);
521*4882a593Smuzhiyun 	spin_lock_init(&dev->sync_lock);
522*4882a593Smuzhiyun 	spin_lock_init(&dev->iq_lock);
523*4882a593Smuzhiyun 	dev->max_fib_size = sizeof(struct hw_fib);
524*4882a593Smuzhiyun 	dev->sg_tablesize = host->sg_tablesize = (dev->max_fib_size
525*4882a593Smuzhiyun 		- sizeof(struct aac_fibhdr)
526*4882a593Smuzhiyun 		- sizeof(struct aac_write) + sizeof(struct sgentry))
527*4882a593Smuzhiyun 			/ sizeof(struct sgentry);
528*4882a593Smuzhiyun 	dev->comm_interface = AAC_COMM_PRODUCER;
529*4882a593Smuzhiyun 	dev->raw_io_interface = dev->raw_io_64 = 0;
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun 
532*4882a593Smuzhiyun 	/*
533*4882a593Smuzhiyun 	 * Enable INTX mode, if not done already Enabled
534*4882a593Smuzhiyun 	 */
535*4882a593Smuzhiyun 	if (aac_is_msix_mode(dev)) {
536*4882a593Smuzhiyun 		aac_change_to_intx(dev);
537*4882a593Smuzhiyun 		dev_info(&dev->pdev->dev, "Changed firmware to INTX mode");
538*4882a593Smuzhiyun 	}
539*4882a593Smuzhiyun 
540*4882a593Smuzhiyun 	if ((!aac_adapter_sync_cmd(dev, GET_ADAPTER_PROPERTIES,
541*4882a593Smuzhiyun 		0, 0, 0, 0, 0, 0,
542*4882a593Smuzhiyun 		status+0, status+1, status+2, status+3, status+4)) &&
543*4882a593Smuzhiyun 		(status[0] == 0x00000001)) {
544*4882a593Smuzhiyun 		dev->doorbell_mask = status[3];
545*4882a593Smuzhiyun 		if (status[1] & AAC_OPT_NEW_COMM_64)
546*4882a593Smuzhiyun 			dev->raw_io_64 = 1;
547*4882a593Smuzhiyun 		dev->sync_mode = aac_sync_mode;
548*4882a593Smuzhiyun 		if (dev->a_ops.adapter_comm &&
549*4882a593Smuzhiyun 		    (status[1] & AAC_OPT_NEW_COMM)) {
550*4882a593Smuzhiyun 			dev->comm_interface = AAC_COMM_MESSAGE;
551*4882a593Smuzhiyun 			dev->raw_io_interface = 1;
552*4882a593Smuzhiyun 			if ((status[1] & AAC_OPT_NEW_COMM_TYPE1)) {
553*4882a593Smuzhiyun 				/* driver supports TYPE1 (Tupelo) */
554*4882a593Smuzhiyun 				dev->comm_interface = AAC_COMM_MESSAGE_TYPE1;
555*4882a593Smuzhiyun 			} else if (status[1] & AAC_OPT_NEW_COMM_TYPE2) {
556*4882a593Smuzhiyun 				/* driver supports TYPE2 (Denali, Yosemite) */
557*4882a593Smuzhiyun 				dev->comm_interface = AAC_COMM_MESSAGE_TYPE2;
558*4882a593Smuzhiyun 			} else if (status[1] & AAC_OPT_NEW_COMM_TYPE3) {
559*4882a593Smuzhiyun 				/* driver supports TYPE3 (Yosemite, Thor) */
560*4882a593Smuzhiyun 				dev->comm_interface = AAC_COMM_MESSAGE_TYPE3;
561*4882a593Smuzhiyun 			} else if (status[1] & AAC_OPT_NEW_COMM_TYPE4) {
562*4882a593Smuzhiyun 				/* not supported TYPE - switch to sync. mode */
563*4882a593Smuzhiyun 				dev->comm_interface = AAC_COMM_MESSAGE_TYPE2;
564*4882a593Smuzhiyun 				dev->sync_mode = 1;
565*4882a593Smuzhiyun 			}
566*4882a593Smuzhiyun 		}
567*4882a593Smuzhiyun 		if ((status[1] & le32_to_cpu(AAC_OPT_EXTENDED)) &&
568*4882a593Smuzhiyun 			(status[4] & le32_to_cpu(AAC_EXTOPT_SA_FIRMWARE)))
569*4882a593Smuzhiyun 			dev->sa_firmware = 1;
570*4882a593Smuzhiyun 		else
571*4882a593Smuzhiyun 			dev->sa_firmware = 0;
572*4882a593Smuzhiyun 
573*4882a593Smuzhiyun 		if (status[4] & le32_to_cpu(AAC_EXTOPT_SOFT_RESET))
574*4882a593Smuzhiyun 			dev->soft_reset_support = 1;
575*4882a593Smuzhiyun 		else
576*4882a593Smuzhiyun 			dev->soft_reset_support = 0;
577*4882a593Smuzhiyun 
578*4882a593Smuzhiyun 		if ((dev->comm_interface == AAC_COMM_MESSAGE) &&
579*4882a593Smuzhiyun 		    (status[2] > dev->base_size)) {
580*4882a593Smuzhiyun 			aac_adapter_ioremap(dev, 0);
581*4882a593Smuzhiyun 			dev->base_size = status[2];
582*4882a593Smuzhiyun 			if (aac_adapter_ioremap(dev, status[2])) {
583*4882a593Smuzhiyun 				/* remap failed, go back ... */
584*4882a593Smuzhiyun 				dev->comm_interface = AAC_COMM_PRODUCER;
585*4882a593Smuzhiyun 				if (aac_adapter_ioremap(dev, AAC_MIN_FOOTPRINT_SIZE)) {
586*4882a593Smuzhiyun 					printk(KERN_WARNING
587*4882a593Smuzhiyun 					  "aacraid: unable to map adapter.\n");
588*4882a593Smuzhiyun 					return NULL;
589*4882a593Smuzhiyun 				}
590*4882a593Smuzhiyun 			}
591*4882a593Smuzhiyun 		}
592*4882a593Smuzhiyun 	}
593*4882a593Smuzhiyun 	dev->max_msix = 0;
594*4882a593Smuzhiyun 	dev->msi_enabled = 0;
595*4882a593Smuzhiyun 	dev->adapter_shutdown = 0;
596*4882a593Smuzhiyun 	if ((!aac_adapter_sync_cmd(dev, GET_COMM_PREFERRED_SETTINGS,
597*4882a593Smuzhiyun 	  0, 0, 0, 0, 0, 0,
598*4882a593Smuzhiyun 	  status+0, status+1, status+2, status+3, status+4))
599*4882a593Smuzhiyun 	 && (status[0] == 0x00000001)) {
600*4882a593Smuzhiyun 		/*
601*4882a593Smuzhiyun 		 *	status[1] >> 16		maximum command size in KB
602*4882a593Smuzhiyun 		 *	status[1] & 0xFFFF	maximum FIB size
603*4882a593Smuzhiyun 		 *	status[2] >> 16		maximum SG elements to driver
604*4882a593Smuzhiyun 		 *	status[2] & 0xFFFF	maximum SG elements from driver
605*4882a593Smuzhiyun 		 *	status[3] & 0xFFFF	maximum number FIBs outstanding
606*4882a593Smuzhiyun 		 */
607*4882a593Smuzhiyun 		host->max_sectors = (status[1] >> 16) << 1;
608*4882a593Smuzhiyun 		/* Multiple of 32 for PMC */
609*4882a593Smuzhiyun 		dev->max_fib_size = status[1] & 0xFFE0;
610*4882a593Smuzhiyun 		host->sg_tablesize = status[2] >> 16;
611*4882a593Smuzhiyun 		dev->sg_tablesize = status[2] & 0xFFFF;
612*4882a593Smuzhiyun 		if (aac_is_src(dev)) {
613*4882a593Smuzhiyun 			if (host->can_queue > (status[3] >> 16) -
614*4882a593Smuzhiyun 					AAC_NUM_MGT_FIB)
615*4882a593Smuzhiyun 				host->can_queue = (status[3] >> 16) -
616*4882a593Smuzhiyun 					AAC_NUM_MGT_FIB;
617*4882a593Smuzhiyun 		} else if (host->can_queue > (status[3] & 0xFFFF) -
618*4882a593Smuzhiyun 				AAC_NUM_MGT_FIB)
619*4882a593Smuzhiyun 			host->can_queue = (status[3] & 0xFFFF) -
620*4882a593Smuzhiyun 				AAC_NUM_MGT_FIB;
621*4882a593Smuzhiyun 
622*4882a593Smuzhiyun 		dev->max_num_aif = status[4] & 0xFFFF;
623*4882a593Smuzhiyun 	}
624*4882a593Smuzhiyun 	if (numacb > 0) {
625*4882a593Smuzhiyun 		if (numacb < host->can_queue)
626*4882a593Smuzhiyun 			host->can_queue = numacb;
627*4882a593Smuzhiyun 		else
628*4882a593Smuzhiyun 			pr_warn("numacb=%d ignored\n", numacb);
629*4882a593Smuzhiyun 	}
630*4882a593Smuzhiyun 
631*4882a593Smuzhiyun 	if (aac_is_src(dev))
632*4882a593Smuzhiyun 		aac_define_int_mode(dev);
633*4882a593Smuzhiyun 	/*
634*4882a593Smuzhiyun 	 *	Ok now init the communication subsystem
635*4882a593Smuzhiyun 	 */
636*4882a593Smuzhiyun 
637*4882a593Smuzhiyun 	dev->queues = kzalloc(sizeof(struct aac_queue_block), GFP_KERNEL);
638*4882a593Smuzhiyun 	if (dev->queues == NULL) {
639*4882a593Smuzhiyun 		printk(KERN_ERR "Error could not allocate comm region.\n");
640*4882a593Smuzhiyun 		return NULL;
641*4882a593Smuzhiyun 	}
642*4882a593Smuzhiyun 
643*4882a593Smuzhiyun 	if (aac_comm_init(dev)<0){
644*4882a593Smuzhiyun 		kfree(dev->queues);
645*4882a593Smuzhiyun 		return NULL;
646*4882a593Smuzhiyun 	}
647*4882a593Smuzhiyun 	/*
648*4882a593Smuzhiyun 	 *	Initialize the list of fibs
649*4882a593Smuzhiyun 	 */
650*4882a593Smuzhiyun 	if (aac_fib_setup(dev) < 0) {
651*4882a593Smuzhiyun 		kfree(dev->queues);
652*4882a593Smuzhiyun 		return NULL;
653*4882a593Smuzhiyun 	}
654*4882a593Smuzhiyun 
655*4882a593Smuzhiyun 	INIT_LIST_HEAD(&dev->fib_list);
656*4882a593Smuzhiyun 	INIT_LIST_HEAD(&dev->sync_fib_list);
657*4882a593Smuzhiyun 
658*4882a593Smuzhiyun 	return dev;
659*4882a593Smuzhiyun }
660*4882a593Smuzhiyun 
661