1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef A3000_H 3*4882a593Smuzhiyun #define A3000_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun /* $Id: a3000.h,v 1.4 1997/01/19 23:07:10 davem Exp $ 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Header file for the Amiga 3000 built-in SCSI controller for Linux 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * Written and (C) 1993, Hamish Macdonald, see a3000.c for more info 10*4882a593Smuzhiyun * 11*4882a593Smuzhiyun */ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #include <linux/types.h> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #ifndef CMD_PER_LUN 16*4882a593Smuzhiyun #define CMD_PER_LUN 2 17*4882a593Smuzhiyun #endif 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #ifndef CAN_QUEUE 20*4882a593Smuzhiyun #define CAN_QUEUE 16 21*4882a593Smuzhiyun #endif 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun /* 24*4882a593Smuzhiyun * if the transfer address ANDed with this results in a non-zero 25*4882a593Smuzhiyun * result, then we can't use DMA. 26*4882a593Smuzhiyun */ 27*4882a593Smuzhiyun #define A3000_XFER_MASK (0x00000003) 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun struct a3000_scsiregs { 30*4882a593Smuzhiyun unsigned char pad1[2]; 31*4882a593Smuzhiyun volatile unsigned short DAWR; 32*4882a593Smuzhiyun volatile unsigned int WTC; 33*4882a593Smuzhiyun unsigned char pad2[2]; 34*4882a593Smuzhiyun volatile unsigned short CNTR; 35*4882a593Smuzhiyun volatile unsigned long ACR; 36*4882a593Smuzhiyun unsigned char pad3[2]; 37*4882a593Smuzhiyun volatile unsigned short ST_DMA; 38*4882a593Smuzhiyun unsigned char pad4[2]; 39*4882a593Smuzhiyun volatile unsigned short FLUSH; 40*4882a593Smuzhiyun unsigned char pad5[2]; 41*4882a593Smuzhiyun volatile unsigned short CINT; 42*4882a593Smuzhiyun unsigned char pad6[2]; 43*4882a593Smuzhiyun volatile unsigned short ISTR; 44*4882a593Smuzhiyun unsigned char pad7[30]; 45*4882a593Smuzhiyun volatile unsigned short SP_DMA; 46*4882a593Smuzhiyun unsigned char pad8; 47*4882a593Smuzhiyun volatile unsigned char SASR; 48*4882a593Smuzhiyun unsigned char pad9; 49*4882a593Smuzhiyun volatile unsigned char SCMD; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun #define DAWR_A3000 (3) 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun /* CNTR bits. */ 55*4882a593Smuzhiyun #define CNTR_TCEN (1<<5) 56*4882a593Smuzhiyun #define CNTR_PREST (1<<4) 57*4882a593Smuzhiyun #define CNTR_PDMD (1<<3) 58*4882a593Smuzhiyun #define CNTR_INTEN (1<<2) 59*4882a593Smuzhiyun #define CNTR_DDIR (1<<1) 60*4882a593Smuzhiyun #define CNTR_IO_DX (1<<0) 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun /* ISTR bits. */ 63*4882a593Smuzhiyun #define ISTR_INTX (1<<8) 64*4882a593Smuzhiyun #define ISTR_INT_F (1<<7) 65*4882a593Smuzhiyun #define ISTR_INTS (1<<6) 66*4882a593Smuzhiyun #define ISTR_E_INT (1<<5) 67*4882a593Smuzhiyun #define ISTR_INT_P (1<<4) 68*4882a593Smuzhiyun #define ISTR_UE_INT (1<<3) 69*4882a593Smuzhiyun #define ISTR_OE_INT (1<<2) 70*4882a593Smuzhiyun #define ISTR_FF_FLG (1<<1) 71*4882a593Smuzhiyun #define ISTR_FE_FLG (1<<0) 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun #endif /* A3000_H */ 74