xref: /OK3568_Linux_fs/kernel/drivers/s390/cio/qdio_main.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Linux for s390 qdio support, buffer handling, qdio API and module support.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright IBM Corp. 2000, 2008
6*4882a593Smuzhiyun  * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
7*4882a593Smuzhiyun  *	      Jan Glauber <jang@linux.vnet.ibm.com>
8*4882a593Smuzhiyun  * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/init.h>
12*4882a593Smuzhiyun #include <linux/kernel.h>
13*4882a593Smuzhiyun #include <linux/timer.h>
14*4882a593Smuzhiyun #include <linux/delay.h>
15*4882a593Smuzhiyun #include <linux/gfp.h>
16*4882a593Smuzhiyun #include <linux/io.h>
17*4882a593Smuzhiyun #include <linux/atomic.h>
18*4882a593Smuzhiyun #include <asm/debug.h>
19*4882a593Smuzhiyun #include <asm/qdio.h>
20*4882a593Smuzhiyun #include <asm/ipl.h>
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #include "cio.h"
23*4882a593Smuzhiyun #include "css.h"
24*4882a593Smuzhiyun #include "device.h"
25*4882a593Smuzhiyun #include "qdio.h"
26*4882a593Smuzhiyun #include "qdio_debug.h"
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\
29*4882a593Smuzhiyun 	"Jan Glauber <jang@linux.vnet.ibm.com>");
30*4882a593Smuzhiyun MODULE_DESCRIPTION("QDIO base support");
31*4882a593Smuzhiyun MODULE_LICENSE("GPL");
32*4882a593Smuzhiyun 
do_siga_sync(unsigned long schid,unsigned int out_mask,unsigned int in_mask,unsigned int fc)33*4882a593Smuzhiyun static inline int do_siga_sync(unsigned long schid,
34*4882a593Smuzhiyun 			       unsigned int out_mask, unsigned int in_mask,
35*4882a593Smuzhiyun 			       unsigned int fc)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun 	register unsigned long __fc asm ("0") = fc;
38*4882a593Smuzhiyun 	register unsigned long __schid asm ("1") = schid;
39*4882a593Smuzhiyun 	register unsigned long out asm ("2") = out_mask;
40*4882a593Smuzhiyun 	register unsigned long in asm ("3") = in_mask;
41*4882a593Smuzhiyun 	int cc;
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun 	asm volatile(
44*4882a593Smuzhiyun 		"	siga	0\n"
45*4882a593Smuzhiyun 		"	ipm	%0\n"
46*4882a593Smuzhiyun 		"	srl	%0,28\n"
47*4882a593Smuzhiyun 		: "=d" (cc)
48*4882a593Smuzhiyun 		: "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc");
49*4882a593Smuzhiyun 	return cc;
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun 
do_siga_input(unsigned long schid,unsigned int mask,unsigned int fc)52*4882a593Smuzhiyun static inline int do_siga_input(unsigned long schid, unsigned int mask,
53*4882a593Smuzhiyun 				unsigned int fc)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun 	register unsigned long __fc asm ("0") = fc;
56*4882a593Smuzhiyun 	register unsigned long __schid asm ("1") = schid;
57*4882a593Smuzhiyun 	register unsigned long __mask asm ("2") = mask;
58*4882a593Smuzhiyun 	int cc;
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun 	asm volatile(
61*4882a593Smuzhiyun 		"	siga	0\n"
62*4882a593Smuzhiyun 		"	ipm	%0\n"
63*4882a593Smuzhiyun 		"	srl	%0,28\n"
64*4882a593Smuzhiyun 		: "=d" (cc)
65*4882a593Smuzhiyun 		: "d" (__fc), "d" (__schid), "d" (__mask) : "cc");
66*4882a593Smuzhiyun 	return cc;
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun /**
70*4882a593Smuzhiyun  * do_siga_output - perform SIGA-w/wt function
71*4882a593Smuzhiyun  * @schid: subchannel id or in case of QEBSM the subchannel token
72*4882a593Smuzhiyun  * @mask: which output queues to process
73*4882a593Smuzhiyun  * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer
74*4882a593Smuzhiyun  * @fc: function code to perform
75*4882a593Smuzhiyun  * @aob: asynchronous operation block
76*4882a593Smuzhiyun  *
77*4882a593Smuzhiyun  * Returns condition code.
78*4882a593Smuzhiyun  * Note: For IQDC unicast queues only the highest priority queue is processed.
79*4882a593Smuzhiyun  */
do_siga_output(unsigned long schid,unsigned long mask,unsigned int * bb,unsigned int fc,unsigned long aob)80*4882a593Smuzhiyun static inline int do_siga_output(unsigned long schid, unsigned long mask,
81*4882a593Smuzhiyun 				 unsigned int *bb, unsigned int fc,
82*4882a593Smuzhiyun 				 unsigned long aob)
83*4882a593Smuzhiyun {
84*4882a593Smuzhiyun 	register unsigned long __fc asm("0") = fc;
85*4882a593Smuzhiyun 	register unsigned long __schid asm("1") = schid;
86*4882a593Smuzhiyun 	register unsigned long __mask asm("2") = mask;
87*4882a593Smuzhiyun 	register unsigned long __aob asm("3") = aob;
88*4882a593Smuzhiyun 	int cc;
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 	asm volatile(
91*4882a593Smuzhiyun 		"	siga	0\n"
92*4882a593Smuzhiyun 		"	ipm	%0\n"
93*4882a593Smuzhiyun 		"	srl	%0,28\n"
94*4882a593Smuzhiyun 		: "=d" (cc), "+d" (__fc), "+d" (__aob)
95*4882a593Smuzhiyun 		: "d" (__schid), "d" (__mask)
96*4882a593Smuzhiyun 		: "cc");
97*4882a593Smuzhiyun 	*bb = __fc >> 31;
98*4882a593Smuzhiyun 	return cc;
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun /**
102*4882a593Smuzhiyun  * qdio_do_eqbs - extract buffer states for QEBSM
103*4882a593Smuzhiyun  * @q: queue to manipulate
104*4882a593Smuzhiyun  * @state: state of the extracted buffers
105*4882a593Smuzhiyun  * @start: buffer number to start at
106*4882a593Smuzhiyun  * @count: count of buffers to examine
107*4882a593Smuzhiyun  * @auto_ack: automatically acknowledge buffers
108*4882a593Smuzhiyun  *
109*4882a593Smuzhiyun  * Returns the number of successfully extracted equal buffer states.
110*4882a593Smuzhiyun  * Stops processing if a state is different from the last buffers state.
111*4882a593Smuzhiyun  */
qdio_do_eqbs(struct qdio_q * q,unsigned char * state,int start,int count,int auto_ack)112*4882a593Smuzhiyun static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
113*4882a593Smuzhiyun 			int start, int count, int auto_ack)
114*4882a593Smuzhiyun {
115*4882a593Smuzhiyun 	int tmp_count = count, tmp_start = start, nr = q->nr;
116*4882a593Smuzhiyun 	unsigned int ccq = 0;
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 	qperf_inc(q, eqbs);
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	if (!q->is_input_q)
121*4882a593Smuzhiyun 		nr += q->irq_ptr->nr_input_qs;
122*4882a593Smuzhiyun again:
123*4882a593Smuzhiyun 	ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count,
124*4882a593Smuzhiyun 		      auto_ack);
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	switch (ccq) {
127*4882a593Smuzhiyun 	case 0:
128*4882a593Smuzhiyun 	case 32:
129*4882a593Smuzhiyun 		/* all done, or next buffer state different */
130*4882a593Smuzhiyun 		return count - tmp_count;
131*4882a593Smuzhiyun 	case 96:
132*4882a593Smuzhiyun 		/* not all buffers processed */
133*4882a593Smuzhiyun 		qperf_inc(q, eqbs_partial);
134*4882a593Smuzhiyun 		DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "EQBS part:%02x",
135*4882a593Smuzhiyun 			tmp_count);
136*4882a593Smuzhiyun 		return count - tmp_count;
137*4882a593Smuzhiyun 	case 97:
138*4882a593Smuzhiyun 		/* no buffer processed */
139*4882a593Smuzhiyun 		DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq);
140*4882a593Smuzhiyun 		goto again;
141*4882a593Smuzhiyun 	default:
142*4882a593Smuzhiyun 		DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
143*4882a593Smuzhiyun 		DBF_ERROR("%4x EQBS ERROR", SCH_NO(q));
144*4882a593Smuzhiyun 		DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
145*4882a593Smuzhiyun 		q->handler(q->irq_ptr->cdev, QDIO_ERROR_GET_BUF_STATE, q->nr,
146*4882a593Smuzhiyun 			   q->first_to_check, count, q->irq_ptr->int_parm);
147*4882a593Smuzhiyun 		return 0;
148*4882a593Smuzhiyun 	}
149*4882a593Smuzhiyun }
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun /**
152*4882a593Smuzhiyun  * qdio_do_sqbs - set buffer states for QEBSM
153*4882a593Smuzhiyun  * @q: queue to manipulate
154*4882a593Smuzhiyun  * @state: new state of the buffers
155*4882a593Smuzhiyun  * @start: first buffer number to change
156*4882a593Smuzhiyun  * @count: how many buffers to change
157*4882a593Smuzhiyun  *
158*4882a593Smuzhiyun  * Returns the number of successfully changed buffers.
159*4882a593Smuzhiyun  * Does retrying until the specified count of buffer states is set or an
160*4882a593Smuzhiyun  * error occurs.
161*4882a593Smuzhiyun  */
qdio_do_sqbs(struct qdio_q * q,unsigned char state,int start,int count)162*4882a593Smuzhiyun static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start,
163*4882a593Smuzhiyun 			int count)
164*4882a593Smuzhiyun {
165*4882a593Smuzhiyun 	unsigned int ccq = 0;
166*4882a593Smuzhiyun 	int tmp_count = count, tmp_start = start;
167*4882a593Smuzhiyun 	int nr = q->nr;
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 	if (!count)
170*4882a593Smuzhiyun 		return 0;
171*4882a593Smuzhiyun 	qperf_inc(q, sqbs);
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun 	if (!q->is_input_q)
174*4882a593Smuzhiyun 		nr += q->irq_ptr->nr_input_qs;
175*4882a593Smuzhiyun again:
176*4882a593Smuzhiyun 	ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count);
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun 	switch (ccq) {
179*4882a593Smuzhiyun 	case 0:
180*4882a593Smuzhiyun 	case 32:
181*4882a593Smuzhiyun 		/* all done, or active buffer adapter-owned */
182*4882a593Smuzhiyun 		WARN_ON_ONCE(tmp_count);
183*4882a593Smuzhiyun 		return count - tmp_count;
184*4882a593Smuzhiyun 	case 96:
185*4882a593Smuzhiyun 		/* not all buffers processed */
186*4882a593Smuzhiyun 		DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq);
187*4882a593Smuzhiyun 		qperf_inc(q, sqbs_partial);
188*4882a593Smuzhiyun 		goto again;
189*4882a593Smuzhiyun 	default:
190*4882a593Smuzhiyun 		DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
191*4882a593Smuzhiyun 		DBF_ERROR("%4x SQBS ERROR", SCH_NO(q));
192*4882a593Smuzhiyun 		DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
193*4882a593Smuzhiyun 		q->handler(q->irq_ptr->cdev, QDIO_ERROR_SET_BUF_STATE, q->nr,
194*4882a593Smuzhiyun 			   q->first_to_check, count, q->irq_ptr->int_parm);
195*4882a593Smuzhiyun 		return 0;
196*4882a593Smuzhiyun 	}
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun /*
200*4882a593Smuzhiyun  * Returns number of examined buffers and their common state in *state.
201*4882a593Smuzhiyun  * Requested number of buffers-to-examine must be > 0.
202*4882a593Smuzhiyun  */
get_buf_states(struct qdio_q * q,unsigned int bufnr,unsigned char * state,unsigned int count,int auto_ack,int merge_pending)203*4882a593Smuzhiyun static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr,
204*4882a593Smuzhiyun 				 unsigned char *state, unsigned int count,
205*4882a593Smuzhiyun 				 int auto_ack, int merge_pending)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun 	unsigned char __state = 0;
208*4882a593Smuzhiyun 	int i = 1;
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun 	if (is_qebsm(q))
211*4882a593Smuzhiyun 		return qdio_do_eqbs(q, state, bufnr, count, auto_ack);
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 	/* get initial state: */
214*4882a593Smuzhiyun 	__state = q->slsb.val[bufnr];
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun 	/* Bail out early if there is no work on the queue: */
217*4882a593Smuzhiyun 	if (__state & SLSB_OWNER_CU)
218*4882a593Smuzhiyun 		goto out;
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 	if (merge_pending && __state == SLSB_P_OUTPUT_PENDING)
221*4882a593Smuzhiyun 		__state = SLSB_P_OUTPUT_EMPTY;
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun 	for (; i < count; i++) {
224*4882a593Smuzhiyun 		bufnr = next_buf(bufnr);
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun 		/* merge PENDING into EMPTY: */
227*4882a593Smuzhiyun 		if (merge_pending &&
228*4882a593Smuzhiyun 		    q->slsb.val[bufnr] == SLSB_P_OUTPUT_PENDING &&
229*4882a593Smuzhiyun 		    __state == SLSB_P_OUTPUT_EMPTY)
230*4882a593Smuzhiyun 			continue;
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 		/* stop if next state differs from initial state: */
233*4882a593Smuzhiyun 		if (q->slsb.val[bufnr] != __state)
234*4882a593Smuzhiyun 			break;
235*4882a593Smuzhiyun 	}
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun out:
238*4882a593Smuzhiyun 	*state = __state;
239*4882a593Smuzhiyun 	return i;
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun 
get_buf_state(struct qdio_q * q,unsigned int bufnr,unsigned char * state,int auto_ack)242*4882a593Smuzhiyun static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr,
243*4882a593Smuzhiyun 				unsigned char *state, int auto_ack)
244*4882a593Smuzhiyun {
245*4882a593Smuzhiyun 	return get_buf_states(q, bufnr, state, 1, auto_ack, 0);
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun /* wrap-around safe setting of slsb states, returns number of changed buffers */
set_buf_states(struct qdio_q * q,int bufnr,unsigned char state,int count)249*4882a593Smuzhiyun static inline int set_buf_states(struct qdio_q *q, int bufnr,
250*4882a593Smuzhiyun 				 unsigned char state, int count)
251*4882a593Smuzhiyun {
252*4882a593Smuzhiyun 	int i;
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 	if (is_qebsm(q))
255*4882a593Smuzhiyun 		return qdio_do_sqbs(q, state, bufnr, count);
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 	/* Ensure that all preceding changes to the SBALs are visible: */
258*4882a593Smuzhiyun 	mb();
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	for (i = 0; i < count; i++) {
261*4882a593Smuzhiyun 		WRITE_ONCE(q->slsb.val[bufnr], state);
262*4882a593Smuzhiyun 		bufnr = next_buf(bufnr);
263*4882a593Smuzhiyun 	}
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun 	/* Make our SLSB changes visible: */
266*4882a593Smuzhiyun 	mb();
267*4882a593Smuzhiyun 
268*4882a593Smuzhiyun 	return count;
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun 
set_buf_state(struct qdio_q * q,int bufnr,unsigned char state)271*4882a593Smuzhiyun static inline int set_buf_state(struct qdio_q *q, int bufnr,
272*4882a593Smuzhiyun 				unsigned char state)
273*4882a593Smuzhiyun {
274*4882a593Smuzhiyun 	return set_buf_states(q, bufnr, state, 1);
275*4882a593Smuzhiyun }
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun /* set slsb states to initial state */
qdio_init_buf_states(struct qdio_irq * irq_ptr)278*4882a593Smuzhiyun static void qdio_init_buf_states(struct qdio_irq *irq_ptr)
279*4882a593Smuzhiyun {
280*4882a593Smuzhiyun 	struct qdio_q *q;
281*4882a593Smuzhiyun 	int i;
282*4882a593Smuzhiyun 
283*4882a593Smuzhiyun 	for_each_input_queue(irq_ptr, q, i)
284*4882a593Smuzhiyun 		set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT,
285*4882a593Smuzhiyun 			       QDIO_MAX_BUFFERS_PER_Q);
286*4882a593Smuzhiyun 	for_each_output_queue(irq_ptr, q, i)
287*4882a593Smuzhiyun 		set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT,
288*4882a593Smuzhiyun 			       QDIO_MAX_BUFFERS_PER_Q);
289*4882a593Smuzhiyun }
290*4882a593Smuzhiyun 
qdio_siga_sync(struct qdio_q * q,unsigned int output,unsigned int input)291*4882a593Smuzhiyun static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output,
292*4882a593Smuzhiyun 			  unsigned int input)
293*4882a593Smuzhiyun {
294*4882a593Smuzhiyun 	unsigned long schid = *((u32 *) &q->irq_ptr->schid);
295*4882a593Smuzhiyun 	unsigned int fc = QDIO_SIGA_SYNC;
296*4882a593Smuzhiyun 	int cc;
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 	DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr);
299*4882a593Smuzhiyun 	qperf_inc(q, siga_sync);
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun 	if (is_qebsm(q)) {
302*4882a593Smuzhiyun 		schid = q->irq_ptr->sch_token;
303*4882a593Smuzhiyun 		fc |= QDIO_SIGA_QEBSM_FLAG;
304*4882a593Smuzhiyun 	}
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun 	cc = do_siga_sync(schid, output, input, fc);
307*4882a593Smuzhiyun 	if (unlikely(cc))
308*4882a593Smuzhiyun 		DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc);
309*4882a593Smuzhiyun 	return (cc) ? -EIO : 0;
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun 
qdio_siga_sync_q(struct qdio_q * q)312*4882a593Smuzhiyun static inline int qdio_siga_sync_q(struct qdio_q *q)
313*4882a593Smuzhiyun {
314*4882a593Smuzhiyun 	if (q->is_input_q)
315*4882a593Smuzhiyun 		return qdio_siga_sync(q, 0, q->mask);
316*4882a593Smuzhiyun 	else
317*4882a593Smuzhiyun 		return qdio_siga_sync(q, q->mask, 0);
318*4882a593Smuzhiyun }
319*4882a593Smuzhiyun 
qdio_siga_output(struct qdio_q * q,unsigned int count,unsigned int * busy_bit,unsigned long aob)320*4882a593Smuzhiyun static int qdio_siga_output(struct qdio_q *q, unsigned int count,
321*4882a593Smuzhiyun 			    unsigned int *busy_bit, unsigned long aob)
322*4882a593Smuzhiyun {
323*4882a593Smuzhiyun 	unsigned long schid = *((u32 *) &q->irq_ptr->schid);
324*4882a593Smuzhiyun 	unsigned int fc = QDIO_SIGA_WRITE;
325*4882a593Smuzhiyun 	u64 start_time = 0;
326*4882a593Smuzhiyun 	int retries = 0, cc;
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun 	if (queue_type(q) == QDIO_IQDIO_QFMT && !multicast_outbound(q)) {
329*4882a593Smuzhiyun 		if (count > 1)
330*4882a593Smuzhiyun 			fc = QDIO_SIGA_WRITEM;
331*4882a593Smuzhiyun 		else if (aob)
332*4882a593Smuzhiyun 			fc = QDIO_SIGA_WRITEQ;
333*4882a593Smuzhiyun 	}
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 	if (is_qebsm(q)) {
336*4882a593Smuzhiyun 		schid = q->irq_ptr->sch_token;
337*4882a593Smuzhiyun 		fc |= QDIO_SIGA_QEBSM_FLAG;
338*4882a593Smuzhiyun 	}
339*4882a593Smuzhiyun again:
340*4882a593Smuzhiyun 	cc = do_siga_output(schid, q->mask, busy_bit, fc, aob);
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun 	/* hipersocket busy condition */
343*4882a593Smuzhiyun 	if (unlikely(*busy_bit)) {
344*4882a593Smuzhiyun 		retries++;
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun 		if (!start_time) {
347*4882a593Smuzhiyun 			start_time = get_tod_clock_fast();
348*4882a593Smuzhiyun 			goto again;
349*4882a593Smuzhiyun 		}
350*4882a593Smuzhiyun 		if (get_tod_clock_fast() - start_time < QDIO_BUSY_BIT_PATIENCE)
351*4882a593Smuzhiyun 			goto again;
352*4882a593Smuzhiyun 	}
353*4882a593Smuzhiyun 	if (retries) {
354*4882a593Smuzhiyun 		DBF_DEV_EVENT(DBF_WARN, q->irq_ptr,
355*4882a593Smuzhiyun 			      "%4x cc2 BB1:%1d", SCH_NO(q), q->nr);
356*4882a593Smuzhiyun 		DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "count:%u", retries);
357*4882a593Smuzhiyun 	}
358*4882a593Smuzhiyun 	return cc;
359*4882a593Smuzhiyun }
360*4882a593Smuzhiyun 
qdio_siga_input(struct qdio_q * q)361*4882a593Smuzhiyun static inline int qdio_siga_input(struct qdio_q *q)
362*4882a593Smuzhiyun {
363*4882a593Smuzhiyun 	unsigned long schid = *((u32 *) &q->irq_ptr->schid);
364*4882a593Smuzhiyun 	unsigned int fc = QDIO_SIGA_READ;
365*4882a593Smuzhiyun 	int cc;
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun 	DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr);
368*4882a593Smuzhiyun 	qperf_inc(q, siga_read);
369*4882a593Smuzhiyun 
370*4882a593Smuzhiyun 	if (is_qebsm(q)) {
371*4882a593Smuzhiyun 		schid = q->irq_ptr->sch_token;
372*4882a593Smuzhiyun 		fc |= QDIO_SIGA_QEBSM_FLAG;
373*4882a593Smuzhiyun 	}
374*4882a593Smuzhiyun 
375*4882a593Smuzhiyun 	cc = do_siga_input(schid, q->mask, fc);
376*4882a593Smuzhiyun 	if (unlikely(cc))
377*4882a593Smuzhiyun 		DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc);
378*4882a593Smuzhiyun 	return (cc) ? -EIO : 0;
379*4882a593Smuzhiyun }
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun #define qdio_siga_sync_out(q) qdio_siga_sync(q, ~0U, 0)
382*4882a593Smuzhiyun #define qdio_siga_sync_all(q) qdio_siga_sync(q, ~0U, ~0U)
383*4882a593Smuzhiyun 
qdio_sync_queues(struct qdio_q * q)384*4882a593Smuzhiyun static inline void qdio_sync_queues(struct qdio_q *q)
385*4882a593Smuzhiyun {
386*4882a593Smuzhiyun 	/* PCI capable outbound queues will also be scanned so sync them too */
387*4882a593Smuzhiyun 	if (pci_out_supported(q->irq_ptr))
388*4882a593Smuzhiyun 		qdio_siga_sync_all(q);
389*4882a593Smuzhiyun 	else
390*4882a593Smuzhiyun 		qdio_siga_sync_q(q);
391*4882a593Smuzhiyun }
392*4882a593Smuzhiyun 
debug_get_buf_state(struct qdio_q * q,unsigned int bufnr,unsigned char * state)393*4882a593Smuzhiyun int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
394*4882a593Smuzhiyun 			unsigned char *state)
395*4882a593Smuzhiyun {
396*4882a593Smuzhiyun 	if (need_siga_sync(q))
397*4882a593Smuzhiyun 		qdio_siga_sync_q(q);
398*4882a593Smuzhiyun 	return get_buf_state(q, bufnr, state, 0);
399*4882a593Smuzhiyun }
400*4882a593Smuzhiyun 
qdio_stop_polling(struct qdio_q * q)401*4882a593Smuzhiyun static inline void qdio_stop_polling(struct qdio_q *q)
402*4882a593Smuzhiyun {
403*4882a593Smuzhiyun 	if (!q->u.in.batch_count)
404*4882a593Smuzhiyun 		return;
405*4882a593Smuzhiyun 
406*4882a593Smuzhiyun 	qperf_inc(q, stop_polling);
407*4882a593Smuzhiyun 
408*4882a593Smuzhiyun 	/* show the card that we are not polling anymore */
409*4882a593Smuzhiyun 	set_buf_states(q, q->u.in.batch_start, SLSB_P_INPUT_NOT_INIT,
410*4882a593Smuzhiyun 		       q->u.in.batch_count);
411*4882a593Smuzhiyun 	q->u.in.batch_count = 0;
412*4882a593Smuzhiyun }
413*4882a593Smuzhiyun 
account_sbals(struct qdio_q * q,unsigned int count)414*4882a593Smuzhiyun static inline void account_sbals(struct qdio_q *q, unsigned int count)
415*4882a593Smuzhiyun {
416*4882a593Smuzhiyun 	q->q_stats.nr_sbal_total += count;
417*4882a593Smuzhiyun 	q->q_stats.nr_sbals[ilog2(count)]++;
418*4882a593Smuzhiyun }
419*4882a593Smuzhiyun 
process_buffer_error(struct qdio_q * q,unsigned int start,int count)420*4882a593Smuzhiyun static void process_buffer_error(struct qdio_q *q, unsigned int start,
421*4882a593Smuzhiyun 				 int count)
422*4882a593Smuzhiyun {
423*4882a593Smuzhiyun 	q->qdio_error = QDIO_ERROR_SLSB_STATE;
424*4882a593Smuzhiyun 
425*4882a593Smuzhiyun 	/* special handling for no target buffer empty */
426*4882a593Smuzhiyun 	if (queue_type(q) == QDIO_IQDIO_QFMT && !q->is_input_q &&
427*4882a593Smuzhiyun 	    q->sbal[start]->element[15].sflags == 0x10) {
428*4882a593Smuzhiyun 		qperf_inc(q, target_full);
429*4882a593Smuzhiyun 		DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x", start);
430*4882a593Smuzhiyun 		return;
431*4882a593Smuzhiyun 	}
432*4882a593Smuzhiyun 
433*4882a593Smuzhiyun 	DBF_ERROR("%4x BUF ERROR", SCH_NO(q));
434*4882a593Smuzhiyun 	DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr);
435*4882a593Smuzhiyun 	DBF_ERROR("FTC:%3d C:%3d", start, count);
436*4882a593Smuzhiyun 	DBF_ERROR("F14:%2x F15:%2x",
437*4882a593Smuzhiyun 		  q->sbal[start]->element[14].sflags,
438*4882a593Smuzhiyun 		  q->sbal[start]->element[15].sflags);
439*4882a593Smuzhiyun }
440*4882a593Smuzhiyun 
inbound_handle_work(struct qdio_q * q,unsigned int start,int count,bool auto_ack)441*4882a593Smuzhiyun static inline void inbound_handle_work(struct qdio_q *q, unsigned int start,
442*4882a593Smuzhiyun 				       int count, bool auto_ack)
443*4882a593Smuzhiyun {
444*4882a593Smuzhiyun 	/* ACK the newest SBAL: */
445*4882a593Smuzhiyun 	if (!auto_ack)
446*4882a593Smuzhiyun 		set_buf_state(q, add_buf(start, count - 1), SLSB_P_INPUT_ACK);
447*4882a593Smuzhiyun 
448*4882a593Smuzhiyun 	if (!q->u.in.batch_count)
449*4882a593Smuzhiyun 		q->u.in.batch_start = start;
450*4882a593Smuzhiyun 	q->u.in.batch_count += count;
451*4882a593Smuzhiyun }
452*4882a593Smuzhiyun 
get_inbound_buffer_frontier(struct qdio_q * q,unsigned int start)453*4882a593Smuzhiyun static int get_inbound_buffer_frontier(struct qdio_q *q, unsigned int start)
454*4882a593Smuzhiyun {
455*4882a593Smuzhiyun 	unsigned char state = 0;
456*4882a593Smuzhiyun 	int count;
457*4882a593Smuzhiyun 
458*4882a593Smuzhiyun 	q->timestamp = get_tod_clock_fast();
459*4882a593Smuzhiyun 
460*4882a593Smuzhiyun 	count = atomic_read(&q->nr_buf_used);
461*4882a593Smuzhiyun 	if (!count)
462*4882a593Smuzhiyun 		return 0;
463*4882a593Smuzhiyun 
464*4882a593Smuzhiyun 	/*
465*4882a593Smuzhiyun 	 * No siga sync here, as a PCI or we after a thin interrupt
466*4882a593Smuzhiyun 	 * already sync'ed the queues.
467*4882a593Smuzhiyun 	 */
468*4882a593Smuzhiyun 	count = get_buf_states(q, start, &state, count, 1, 0);
469*4882a593Smuzhiyun 	if (!count)
470*4882a593Smuzhiyun 		return 0;
471*4882a593Smuzhiyun 
472*4882a593Smuzhiyun 	switch (state) {
473*4882a593Smuzhiyun 	case SLSB_P_INPUT_PRIMED:
474*4882a593Smuzhiyun 		DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim:%1d %02x", q->nr,
475*4882a593Smuzhiyun 			      count);
476*4882a593Smuzhiyun 
477*4882a593Smuzhiyun 		inbound_handle_work(q, start, count, is_qebsm(q));
478*4882a593Smuzhiyun 		if (atomic_sub_return(count, &q->nr_buf_used) == 0)
479*4882a593Smuzhiyun 			qperf_inc(q, inbound_queue_full);
480*4882a593Smuzhiyun 		if (q->irq_ptr->perf_stat_enabled)
481*4882a593Smuzhiyun 			account_sbals(q, count);
482*4882a593Smuzhiyun 		return count;
483*4882a593Smuzhiyun 	case SLSB_P_INPUT_ERROR:
484*4882a593Smuzhiyun 		DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in err:%1d %02x", q->nr,
485*4882a593Smuzhiyun 			      count);
486*4882a593Smuzhiyun 
487*4882a593Smuzhiyun 		process_buffer_error(q, start, count);
488*4882a593Smuzhiyun 		inbound_handle_work(q, start, count, false);
489*4882a593Smuzhiyun 		if (atomic_sub_return(count, &q->nr_buf_used) == 0)
490*4882a593Smuzhiyun 			qperf_inc(q, inbound_queue_full);
491*4882a593Smuzhiyun 		if (q->irq_ptr->perf_stat_enabled)
492*4882a593Smuzhiyun 			account_sbals_error(q, count);
493*4882a593Smuzhiyun 		return count;
494*4882a593Smuzhiyun 	case SLSB_CU_INPUT_EMPTY:
495*4882a593Smuzhiyun 		if (q->irq_ptr->perf_stat_enabled)
496*4882a593Smuzhiyun 			q->q_stats.nr_sbal_nop++;
497*4882a593Smuzhiyun 		DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop:%1d %#02x",
498*4882a593Smuzhiyun 			      q->nr, start);
499*4882a593Smuzhiyun 		return 0;
500*4882a593Smuzhiyun 	case SLSB_P_INPUT_NOT_INIT:
501*4882a593Smuzhiyun 	case SLSB_P_INPUT_ACK:
502*4882a593Smuzhiyun 		/* We should never see this state, throw a WARN: */
503*4882a593Smuzhiyun 	default:
504*4882a593Smuzhiyun 		dev_WARN_ONCE(&q->irq_ptr->cdev->dev, 1,
505*4882a593Smuzhiyun 			      "found state %#x at index %u on queue %u\n",
506*4882a593Smuzhiyun 			      state, start, q->nr);
507*4882a593Smuzhiyun 		return 0;
508*4882a593Smuzhiyun 	}
509*4882a593Smuzhiyun }
510*4882a593Smuzhiyun 
qdio_inbound_q_moved(struct qdio_q * q,unsigned int start)511*4882a593Smuzhiyun static int qdio_inbound_q_moved(struct qdio_q *q, unsigned int start)
512*4882a593Smuzhiyun {
513*4882a593Smuzhiyun 	return get_inbound_buffer_frontier(q, start);
514*4882a593Smuzhiyun }
515*4882a593Smuzhiyun 
qdio_inbound_q_done(struct qdio_q * q,unsigned int start)516*4882a593Smuzhiyun static inline int qdio_inbound_q_done(struct qdio_q *q, unsigned int start)
517*4882a593Smuzhiyun {
518*4882a593Smuzhiyun 	unsigned char state = 0;
519*4882a593Smuzhiyun 
520*4882a593Smuzhiyun 	if (!atomic_read(&q->nr_buf_used))
521*4882a593Smuzhiyun 		return 1;
522*4882a593Smuzhiyun 
523*4882a593Smuzhiyun 	if (need_siga_sync(q))
524*4882a593Smuzhiyun 		qdio_siga_sync_q(q);
525*4882a593Smuzhiyun 	get_buf_state(q, start, &state, 0);
526*4882a593Smuzhiyun 
527*4882a593Smuzhiyun 	if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR)
528*4882a593Smuzhiyun 		/* more work coming */
529*4882a593Smuzhiyun 		return 0;
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun 	return 1;
532*4882a593Smuzhiyun }
533*4882a593Smuzhiyun 
qdio_aob_for_buffer(struct qdio_output_q * q,int bufnr)534*4882a593Smuzhiyun static inline unsigned long qdio_aob_for_buffer(struct qdio_output_q *q,
535*4882a593Smuzhiyun 					int bufnr)
536*4882a593Smuzhiyun {
537*4882a593Smuzhiyun 	unsigned long phys_aob = 0;
538*4882a593Smuzhiyun 
539*4882a593Smuzhiyun 	if (!q->aobs[bufnr]) {
540*4882a593Smuzhiyun 		struct qaob *aob = qdio_allocate_aob();
541*4882a593Smuzhiyun 		q->aobs[bufnr] = aob;
542*4882a593Smuzhiyun 	}
543*4882a593Smuzhiyun 	if (q->aobs[bufnr]) {
544*4882a593Smuzhiyun 		q->aobs[bufnr]->user1 = (u64) q->sbal_state[bufnr].user;
545*4882a593Smuzhiyun 		phys_aob = virt_to_phys(q->aobs[bufnr]);
546*4882a593Smuzhiyun 		WARN_ON_ONCE(phys_aob & 0xFF);
547*4882a593Smuzhiyun 	}
548*4882a593Smuzhiyun 
549*4882a593Smuzhiyun 	q->sbal_state[bufnr].flags = 0;
550*4882a593Smuzhiyun 	return phys_aob;
551*4882a593Smuzhiyun }
552*4882a593Smuzhiyun 
qdio_kick_handler(struct qdio_q * q,unsigned int start,unsigned int count)553*4882a593Smuzhiyun static void qdio_kick_handler(struct qdio_q *q, unsigned int start,
554*4882a593Smuzhiyun 			      unsigned int count)
555*4882a593Smuzhiyun {
556*4882a593Smuzhiyun 	if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
557*4882a593Smuzhiyun 		return;
558*4882a593Smuzhiyun 
559*4882a593Smuzhiyun 	if (q->is_input_q) {
560*4882a593Smuzhiyun 		qperf_inc(q, inbound_handler);
561*4882a593Smuzhiyun 		DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count);
562*4882a593Smuzhiyun 	} else {
563*4882a593Smuzhiyun 		qperf_inc(q, outbound_handler);
564*4882a593Smuzhiyun 		DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x",
565*4882a593Smuzhiyun 			      start, count);
566*4882a593Smuzhiyun 	}
567*4882a593Smuzhiyun 
568*4882a593Smuzhiyun 	q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count,
569*4882a593Smuzhiyun 		   q->irq_ptr->int_parm);
570*4882a593Smuzhiyun 
571*4882a593Smuzhiyun 	/* for the next time */
572*4882a593Smuzhiyun 	q->qdio_error = 0;
573*4882a593Smuzhiyun }
574*4882a593Smuzhiyun 
qdio_tasklet_schedule(struct qdio_q * q)575*4882a593Smuzhiyun static inline int qdio_tasklet_schedule(struct qdio_q *q)
576*4882a593Smuzhiyun {
577*4882a593Smuzhiyun 	if (likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE)) {
578*4882a593Smuzhiyun 		tasklet_schedule(&q->tasklet);
579*4882a593Smuzhiyun 		return 0;
580*4882a593Smuzhiyun 	}
581*4882a593Smuzhiyun 	return -EPERM;
582*4882a593Smuzhiyun }
583*4882a593Smuzhiyun 
__qdio_inbound_processing(struct qdio_q * q)584*4882a593Smuzhiyun static void __qdio_inbound_processing(struct qdio_q *q)
585*4882a593Smuzhiyun {
586*4882a593Smuzhiyun 	unsigned int start = q->first_to_check;
587*4882a593Smuzhiyun 	int count;
588*4882a593Smuzhiyun 
589*4882a593Smuzhiyun 	qperf_inc(q, tasklet_inbound);
590*4882a593Smuzhiyun 
591*4882a593Smuzhiyun 	count = qdio_inbound_q_moved(q, start);
592*4882a593Smuzhiyun 	if (count == 0)
593*4882a593Smuzhiyun 		return;
594*4882a593Smuzhiyun 
595*4882a593Smuzhiyun 	qdio_kick_handler(q, start, count);
596*4882a593Smuzhiyun 	start = add_buf(start, count);
597*4882a593Smuzhiyun 	q->first_to_check = start;
598*4882a593Smuzhiyun 
599*4882a593Smuzhiyun 	if (!qdio_inbound_q_done(q, start)) {
600*4882a593Smuzhiyun 		/* means poll time is not yet over */
601*4882a593Smuzhiyun 		qperf_inc(q, tasklet_inbound_resched);
602*4882a593Smuzhiyun 		if (!qdio_tasklet_schedule(q))
603*4882a593Smuzhiyun 			return;
604*4882a593Smuzhiyun 	}
605*4882a593Smuzhiyun 
606*4882a593Smuzhiyun 	qdio_stop_polling(q);
607*4882a593Smuzhiyun 	/*
608*4882a593Smuzhiyun 	 * We need to check again to not lose initiative after
609*4882a593Smuzhiyun 	 * resetting the ACK state.
610*4882a593Smuzhiyun 	 */
611*4882a593Smuzhiyun 	if (!qdio_inbound_q_done(q, start)) {
612*4882a593Smuzhiyun 		qperf_inc(q, tasklet_inbound_resched2);
613*4882a593Smuzhiyun 		qdio_tasklet_schedule(q);
614*4882a593Smuzhiyun 	}
615*4882a593Smuzhiyun }
616*4882a593Smuzhiyun 
qdio_inbound_processing(unsigned long data)617*4882a593Smuzhiyun void qdio_inbound_processing(unsigned long data)
618*4882a593Smuzhiyun {
619*4882a593Smuzhiyun 	struct qdio_q *q = (struct qdio_q *)data;
620*4882a593Smuzhiyun 	__qdio_inbound_processing(q);
621*4882a593Smuzhiyun }
622*4882a593Smuzhiyun 
qdio_check_pending(struct qdio_q * q,unsigned int index)623*4882a593Smuzhiyun static void qdio_check_pending(struct qdio_q *q, unsigned int index)
624*4882a593Smuzhiyun {
625*4882a593Smuzhiyun 	unsigned char state;
626*4882a593Smuzhiyun 
627*4882a593Smuzhiyun 	if (get_buf_state(q, index, &state, 0) > 0 &&
628*4882a593Smuzhiyun 	    state == SLSB_P_OUTPUT_PENDING &&
629*4882a593Smuzhiyun 	    q->u.out.aobs[index]) {
630*4882a593Smuzhiyun 		q->u.out.sbal_state[index].flags |=
631*4882a593Smuzhiyun 			QDIO_OUTBUF_STATE_FLAG_PENDING;
632*4882a593Smuzhiyun 		q->u.out.aobs[index] = NULL;
633*4882a593Smuzhiyun 	}
634*4882a593Smuzhiyun }
635*4882a593Smuzhiyun 
get_outbound_buffer_frontier(struct qdio_q * q,unsigned int start)636*4882a593Smuzhiyun static int get_outbound_buffer_frontier(struct qdio_q *q, unsigned int start)
637*4882a593Smuzhiyun {
638*4882a593Smuzhiyun 	unsigned char state = 0;
639*4882a593Smuzhiyun 	int count;
640*4882a593Smuzhiyun 
641*4882a593Smuzhiyun 	q->timestamp = get_tod_clock_fast();
642*4882a593Smuzhiyun 
643*4882a593Smuzhiyun 	if (need_siga_sync(q))
644*4882a593Smuzhiyun 		if (((queue_type(q) != QDIO_IQDIO_QFMT) &&
645*4882a593Smuzhiyun 		    !pci_out_supported(q->irq_ptr)) ||
646*4882a593Smuzhiyun 		    (queue_type(q) == QDIO_IQDIO_QFMT &&
647*4882a593Smuzhiyun 		    multicast_outbound(q)))
648*4882a593Smuzhiyun 			qdio_siga_sync_q(q);
649*4882a593Smuzhiyun 
650*4882a593Smuzhiyun 	count = atomic_read(&q->nr_buf_used);
651*4882a593Smuzhiyun 	if (!count)
652*4882a593Smuzhiyun 		return 0;
653*4882a593Smuzhiyun 
654*4882a593Smuzhiyun 	count = get_buf_states(q, start, &state, count, 0, q->u.out.use_cq);
655*4882a593Smuzhiyun 	if (!count)
656*4882a593Smuzhiyun 		return 0;
657*4882a593Smuzhiyun 
658*4882a593Smuzhiyun 	switch (state) {
659*4882a593Smuzhiyun 	case SLSB_P_OUTPUT_EMPTY:
660*4882a593Smuzhiyun 	case SLSB_P_OUTPUT_PENDING:
661*4882a593Smuzhiyun 		/* the adapter got it */
662*4882a593Smuzhiyun 		DBF_DEV_EVENT(DBF_INFO, q->irq_ptr,
663*4882a593Smuzhiyun 			"out empty:%1d %02x", q->nr, count);
664*4882a593Smuzhiyun 
665*4882a593Smuzhiyun 		atomic_sub(count, &q->nr_buf_used);
666*4882a593Smuzhiyun 		if (q->irq_ptr->perf_stat_enabled)
667*4882a593Smuzhiyun 			account_sbals(q, count);
668*4882a593Smuzhiyun 		return count;
669*4882a593Smuzhiyun 	case SLSB_P_OUTPUT_ERROR:
670*4882a593Smuzhiyun 		process_buffer_error(q, start, count);
671*4882a593Smuzhiyun 		atomic_sub(count, &q->nr_buf_used);
672*4882a593Smuzhiyun 		if (q->irq_ptr->perf_stat_enabled)
673*4882a593Smuzhiyun 			account_sbals_error(q, count);
674*4882a593Smuzhiyun 		return count;
675*4882a593Smuzhiyun 	case SLSB_CU_OUTPUT_PRIMED:
676*4882a593Smuzhiyun 		/* the adapter has not fetched the output yet */
677*4882a593Smuzhiyun 		if (q->irq_ptr->perf_stat_enabled)
678*4882a593Smuzhiyun 			q->q_stats.nr_sbal_nop++;
679*4882a593Smuzhiyun 		DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d",
680*4882a593Smuzhiyun 			      q->nr);
681*4882a593Smuzhiyun 		return 0;
682*4882a593Smuzhiyun 	case SLSB_P_OUTPUT_HALTED:
683*4882a593Smuzhiyun 		return 0;
684*4882a593Smuzhiyun 	case SLSB_P_OUTPUT_NOT_INIT:
685*4882a593Smuzhiyun 		/* We should never see this state, throw a WARN: */
686*4882a593Smuzhiyun 	default:
687*4882a593Smuzhiyun 		dev_WARN_ONCE(&q->irq_ptr->cdev->dev, 1,
688*4882a593Smuzhiyun 			      "found state %#x at index %u on queue %u\n",
689*4882a593Smuzhiyun 			      state, start, q->nr);
690*4882a593Smuzhiyun 		return 0;
691*4882a593Smuzhiyun 	}
692*4882a593Smuzhiyun }
693*4882a593Smuzhiyun 
694*4882a593Smuzhiyun /* all buffers processed? */
qdio_outbound_q_done(struct qdio_q * q)695*4882a593Smuzhiyun static inline int qdio_outbound_q_done(struct qdio_q *q)
696*4882a593Smuzhiyun {
697*4882a593Smuzhiyun 	return atomic_read(&q->nr_buf_used) == 0;
698*4882a593Smuzhiyun }
699*4882a593Smuzhiyun 
qdio_outbound_q_moved(struct qdio_q * q,unsigned int start)700*4882a593Smuzhiyun static inline int qdio_outbound_q_moved(struct qdio_q *q, unsigned int start)
701*4882a593Smuzhiyun {
702*4882a593Smuzhiyun 	int count;
703*4882a593Smuzhiyun 
704*4882a593Smuzhiyun 	count = get_outbound_buffer_frontier(q, start);
705*4882a593Smuzhiyun 
706*4882a593Smuzhiyun 	if (count) {
707*4882a593Smuzhiyun 		DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr);
708*4882a593Smuzhiyun 
709*4882a593Smuzhiyun 		if (q->u.out.use_cq) {
710*4882a593Smuzhiyun 			unsigned int i;
711*4882a593Smuzhiyun 
712*4882a593Smuzhiyun 			for (i = 0; i < count; i++)
713*4882a593Smuzhiyun 				qdio_check_pending(q, QDIO_BUFNR(start + i));
714*4882a593Smuzhiyun 		}
715*4882a593Smuzhiyun 	}
716*4882a593Smuzhiyun 
717*4882a593Smuzhiyun 	return count;
718*4882a593Smuzhiyun }
719*4882a593Smuzhiyun 
qdio_kick_outbound_q(struct qdio_q * q,unsigned int count,unsigned long aob)720*4882a593Smuzhiyun static int qdio_kick_outbound_q(struct qdio_q *q, unsigned int count,
721*4882a593Smuzhiyun 				unsigned long aob)
722*4882a593Smuzhiyun {
723*4882a593Smuzhiyun 	int retries = 0, cc;
724*4882a593Smuzhiyun 	unsigned int busy_bit;
725*4882a593Smuzhiyun 
726*4882a593Smuzhiyun 	if (!need_siga_out(q))
727*4882a593Smuzhiyun 		return 0;
728*4882a593Smuzhiyun 
729*4882a593Smuzhiyun 	DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr);
730*4882a593Smuzhiyun retry:
731*4882a593Smuzhiyun 	qperf_inc(q, siga_write);
732*4882a593Smuzhiyun 
733*4882a593Smuzhiyun 	cc = qdio_siga_output(q, count, &busy_bit, aob);
734*4882a593Smuzhiyun 	switch (cc) {
735*4882a593Smuzhiyun 	case 0:
736*4882a593Smuzhiyun 		break;
737*4882a593Smuzhiyun 	case 2:
738*4882a593Smuzhiyun 		if (busy_bit) {
739*4882a593Smuzhiyun 			while (++retries < QDIO_BUSY_BIT_RETRIES) {
740*4882a593Smuzhiyun 				mdelay(QDIO_BUSY_BIT_RETRY_DELAY);
741*4882a593Smuzhiyun 				goto retry;
742*4882a593Smuzhiyun 			}
743*4882a593Smuzhiyun 			DBF_ERROR("%4x cc2 BBC:%1d", SCH_NO(q), q->nr);
744*4882a593Smuzhiyun 			cc = -EBUSY;
745*4882a593Smuzhiyun 		} else {
746*4882a593Smuzhiyun 			DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr);
747*4882a593Smuzhiyun 			cc = -ENOBUFS;
748*4882a593Smuzhiyun 		}
749*4882a593Smuzhiyun 		break;
750*4882a593Smuzhiyun 	case 1:
751*4882a593Smuzhiyun 	case 3:
752*4882a593Smuzhiyun 		DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc);
753*4882a593Smuzhiyun 		cc = -EIO;
754*4882a593Smuzhiyun 		break;
755*4882a593Smuzhiyun 	}
756*4882a593Smuzhiyun 	if (retries) {
757*4882a593Smuzhiyun 		DBF_ERROR("%4x cc2 BB2:%1d", SCH_NO(q), q->nr);
758*4882a593Smuzhiyun 		DBF_ERROR("count:%u", retries);
759*4882a593Smuzhiyun 	}
760*4882a593Smuzhiyun 	return cc;
761*4882a593Smuzhiyun }
762*4882a593Smuzhiyun 
__qdio_outbound_processing(struct qdio_q * q)763*4882a593Smuzhiyun static void __qdio_outbound_processing(struct qdio_q *q)
764*4882a593Smuzhiyun {
765*4882a593Smuzhiyun 	unsigned int start = q->first_to_check;
766*4882a593Smuzhiyun 	int count;
767*4882a593Smuzhiyun 
768*4882a593Smuzhiyun 	qperf_inc(q, tasklet_outbound);
769*4882a593Smuzhiyun 	WARN_ON_ONCE(atomic_read(&q->nr_buf_used) < 0);
770*4882a593Smuzhiyun 
771*4882a593Smuzhiyun 	count = qdio_outbound_q_moved(q, start);
772*4882a593Smuzhiyun 	if (count) {
773*4882a593Smuzhiyun 		q->first_to_check = add_buf(start, count);
774*4882a593Smuzhiyun 		qdio_kick_handler(q, start, count);
775*4882a593Smuzhiyun 	}
776*4882a593Smuzhiyun 
777*4882a593Smuzhiyun 	if (queue_type(q) == QDIO_ZFCP_QFMT && !pci_out_supported(q->irq_ptr) &&
778*4882a593Smuzhiyun 	    !qdio_outbound_q_done(q))
779*4882a593Smuzhiyun 		goto sched;
780*4882a593Smuzhiyun 
781*4882a593Smuzhiyun 	if (q->u.out.pci_out_enabled)
782*4882a593Smuzhiyun 		return;
783*4882a593Smuzhiyun 
784*4882a593Smuzhiyun 	/*
785*4882a593Smuzhiyun 	 * Now we know that queue type is either qeth without pci enabled
786*4882a593Smuzhiyun 	 * or HiperSockets. Make sure buffer switch from PRIMED to EMPTY
787*4882a593Smuzhiyun 	 * is noticed and outbound_handler is called after some time.
788*4882a593Smuzhiyun 	 */
789*4882a593Smuzhiyun 	if (qdio_outbound_q_done(q))
790*4882a593Smuzhiyun 		del_timer_sync(&q->u.out.timer);
791*4882a593Smuzhiyun 	else
792*4882a593Smuzhiyun 		if (!timer_pending(&q->u.out.timer) &&
793*4882a593Smuzhiyun 		    likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE))
794*4882a593Smuzhiyun 			mod_timer(&q->u.out.timer, jiffies + 10 * HZ);
795*4882a593Smuzhiyun 	return;
796*4882a593Smuzhiyun 
797*4882a593Smuzhiyun sched:
798*4882a593Smuzhiyun 	qdio_tasklet_schedule(q);
799*4882a593Smuzhiyun }
800*4882a593Smuzhiyun 
801*4882a593Smuzhiyun /* outbound tasklet */
qdio_outbound_processing(unsigned long data)802*4882a593Smuzhiyun void qdio_outbound_processing(unsigned long data)
803*4882a593Smuzhiyun {
804*4882a593Smuzhiyun 	struct qdio_q *q = (struct qdio_q *)data;
805*4882a593Smuzhiyun 	__qdio_outbound_processing(q);
806*4882a593Smuzhiyun }
807*4882a593Smuzhiyun 
qdio_outbound_timer(struct timer_list * t)808*4882a593Smuzhiyun void qdio_outbound_timer(struct timer_list *t)
809*4882a593Smuzhiyun {
810*4882a593Smuzhiyun 	struct qdio_q *q = from_timer(q, t, u.out.timer);
811*4882a593Smuzhiyun 
812*4882a593Smuzhiyun 	qdio_tasklet_schedule(q);
813*4882a593Smuzhiyun }
814*4882a593Smuzhiyun 
qdio_check_outbound_pci_queues(struct qdio_irq * irq)815*4882a593Smuzhiyun static inline void qdio_check_outbound_pci_queues(struct qdio_irq *irq)
816*4882a593Smuzhiyun {
817*4882a593Smuzhiyun 	struct qdio_q *out;
818*4882a593Smuzhiyun 	int i;
819*4882a593Smuzhiyun 
820*4882a593Smuzhiyun 	if (!pci_out_supported(irq) || !irq->scan_threshold)
821*4882a593Smuzhiyun 		return;
822*4882a593Smuzhiyun 
823*4882a593Smuzhiyun 	for_each_output_queue(irq, out, i)
824*4882a593Smuzhiyun 		if (!qdio_outbound_q_done(out))
825*4882a593Smuzhiyun 			qdio_tasklet_schedule(out);
826*4882a593Smuzhiyun }
827*4882a593Smuzhiyun 
tiqdio_inbound_processing(unsigned long data)828*4882a593Smuzhiyun void tiqdio_inbound_processing(unsigned long data)
829*4882a593Smuzhiyun {
830*4882a593Smuzhiyun 	struct qdio_q *q = (struct qdio_q *)data;
831*4882a593Smuzhiyun 
832*4882a593Smuzhiyun 	if (need_siga_sync(q) && need_siga_sync_after_ai(q))
833*4882a593Smuzhiyun 		qdio_sync_queues(q);
834*4882a593Smuzhiyun 
835*4882a593Smuzhiyun 	/* The interrupt could be caused by a PCI request: */
836*4882a593Smuzhiyun 	qdio_check_outbound_pci_queues(q->irq_ptr);
837*4882a593Smuzhiyun 
838*4882a593Smuzhiyun 	__qdio_inbound_processing(q);
839*4882a593Smuzhiyun }
840*4882a593Smuzhiyun 
qdio_set_state(struct qdio_irq * irq_ptr,enum qdio_irq_states state)841*4882a593Smuzhiyun static inline void qdio_set_state(struct qdio_irq *irq_ptr,
842*4882a593Smuzhiyun 				  enum qdio_irq_states state)
843*4882a593Smuzhiyun {
844*4882a593Smuzhiyun 	DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state);
845*4882a593Smuzhiyun 
846*4882a593Smuzhiyun 	irq_ptr->state = state;
847*4882a593Smuzhiyun 	mb();
848*4882a593Smuzhiyun }
849*4882a593Smuzhiyun 
qdio_irq_check_sense(struct qdio_irq * irq_ptr,struct irb * irb)850*4882a593Smuzhiyun static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb)
851*4882a593Smuzhiyun {
852*4882a593Smuzhiyun 	if (irb->esw.esw0.erw.cons) {
853*4882a593Smuzhiyun 		DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no);
854*4882a593Smuzhiyun 		DBF_ERROR_HEX(irb, 64);
855*4882a593Smuzhiyun 		DBF_ERROR_HEX(irb->ecw, 64);
856*4882a593Smuzhiyun 	}
857*4882a593Smuzhiyun }
858*4882a593Smuzhiyun 
859*4882a593Smuzhiyun /* PCI interrupt handler */
qdio_int_handler_pci(struct qdio_irq * irq_ptr)860*4882a593Smuzhiyun static void qdio_int_handler_pci(struct qdio_irq *irq_ptr)
861*4882a593Smuzhiyun {
862*4882a593Smuzhiyun 	int i;
863*4882a593Smuzhiyun 	struct qdio_q *q;
864*4882a593Smuzhiyun 
865*4882a593Smuzhiyun 	if (unlikely(irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
866*4882a593Smuzhiyun 		return;
867*4882a593Smuzhiyun 
868*4882a593Smuzhiyun 	if (irq_ptr->irq_poll) {
869*4882a593Smuzhiyun 		if (!test_and_set_bit(QDIO_IRQ_DISABLED, &irq_ptr->poll_state))
870*4882a593Smuzhiyun 			irq_ptr->irq_poll(irq_ptr->cdev, irq_ptr->int_parm);
871*4882a593Smuzhiyun 		else
872*4882a593Smuzhiyun 			QDIO_PERF_STAT_INC(irq_ptr, int_discarded);
873*4882a593Smuzhiyun 	} else {
874*4882a593Smuzhiyun 		for_each_input_queue(irq_ptr, q, i)
875*4882a593Smuzhiyun 			tasklet_schedule(&q->tasklet);
876*4882a593Smuzhiyun 	}
877*4882a593Smuzhiyun 
878*4882a593Smuzhiyun 	if (!pci_out_supported(irq_ptr) || !irq_ptr->scan_threshold)
879*4882a593Smuzhiyun 		return;
880*4882a593Smuzhiyun 
881*4882a593Smuzhiyun 	for_each_output_queue(irq_ptr, q, i) {
882*4882a593Smuzhiyun 		if (qdio_outbound_q_done(q))
883*4882a593Smuzhiyun 			continue;
884*4882a593Smuzhiyun 		if (need_siga_sync(q) && need_siga_sync_out_after_pci(q))
885*4882a593Smuzhiyun 			qdio_siga_sync_q(q);
886*4882a593Smuzhiyun 		qdio_tasklet_schedule(q);
887*4882a593Smuzhiyun 	}
888*4882a593Smuzhiyun }
889*4882a593Smuzhiyun 
qdio_handle_activate_check(struct qdio_irq * irq_ptr,unsigned long intparm,int cstat,int dstat)890*4882a593Smuzhiyun static void qdio_handle_activate_check(struct qdio_irq *irq_ptr,
891*4882a593Smuzhiyun 				       unsigned long intparm, int cstat,
892*4882a593Smuzhiyun 				       int dstat)
893*4882a593Smuzhiyun {
894*4882a593Smuzhiyun 	struct qdio_q *q;
895*4882a593Smuzhiyun 
896*4882a593Smuzhiyun 	DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no);
897*4882a593Smuzhiyun 	DBF_ERROR("intp :%lx", intparm);
898*4882a593Smuzhiyun 	DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
899*4882a593Smuzhiyun 
900*4882a593Smuzhiyun 	if (irq_ptr->nr_input_qs) {
901*4882a593Smuzhiyun 		q = irq_ptr->input_qs[0];
902*4882a593Smuzhiyun 	} else if (irq_ptr->nr_output_qs) {
903*4882a593Smuzhiyun 		q = irq_ptr->output_qs[0];
904*4882a593Smuzhiyun 	} else {
905*4882a593Smuzhiyun 		dump_stack();
906*4882a593Smuzhiyun 		goto no_handler;
907*4882a593Smuzhiyun 	}
908*4882a593Smuzhiyun 
909*4882a593Smuzhiyun 	q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE,
910*4882a593Smuzhiyun 		   q->nr, q->first_to_check, 0, irq_ptr->int_parm);
911*4882a593Smuzhiyun no_handler:
912*4882a593Smuzhiyun 	qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
913*4882a593Smuzhiyun 	/*
914*4882a593Smuzhiyun 	 * In case of z/VM LGR (Live Guest Migration) QDIO recovery will happen.
915*4882a593Smuzhiyun 	 * Therefore we call the LGR detection function here.
916*4882a593Smuzhiyun 	 */
917*4882a593Smuzhiyun 	lgr_info_log();
918*4882a593Smuzhiyun }
919*4882a593Smuzhiyun 
qdio_establish_handle_irq(struct qdio_irq * irq_ptr,int cstat,int dstat)920*4882a593Smuzhiyun static void qdio_establish_handle_irq(struct qdio_irq *irq_ptr, int cstat,
921*4882a593Smuzhiyun 				      int dstat)
922*4882a593Smuzhiyun {
923*4882a593Smuzhiyun 	DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq");
924*4882a593Smuzhiyun 
925*4882a593Smuzhiyun 	if (cstat)
926*4882a593Smuzhiyun 		goto error;
927*4882a593Smuzhiyun 	if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END))
928*4882a593Smuzhiyun 		goto error;
929*4882a593Smuzhiyun 	if (!(dstat & DEV_STAT_DEV_END))
930*4882a593Smuzhiyun 		goto error;
931*4882a593Smuzhiyun 	qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED);
932*4882a593Smuzhiyun 	return;
933*4882a593Smuzhiyun 
934*4882a593Smuzhiyun error:
935*4882a593Smuzhiyun 	DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no);
936*4882a593Smuzhiyun 	DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
937*4882a593Smuzhiyun 	qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
938*4882a593Smuzhiyun }
939*4882a593Smuzhiyun 
940*4882a593Smuzhiyun /* qdio interrupt handler */
qdio_int_handler(struct ccw_device * cdev,unsigned long intparm,struct irb * irb)941*4882a593Smuzhiyun void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
942*4882a593Smuzhiyun 		      struct irb *irb)
943*4882a593Smuzhiyun {
944*4882a593Smuzhiyun 	struct qdio_irq *irq_ptr = cdev->private->qdio_data;
945*4882a593Smuzhiyun 	struct subchannel_id schid;
946*4882a593Smuzhiyun 	int cstat, dstat;
947*4882a593Smuzhiyun 
948*4882a593Smuzhiyun 	if (!intparm || !irq_ptr) {
949*4882a593Smuzhiyun 		ccw_device_get_schid(cdev, &schid);
950*4882a593Smuzhiyun 		DBF_ERROR("qint:%4x", schid.sch_no);
951*4882a593Smuzhiyun 		return;
952*4882a593Smuzhiyun 	}
953*4882a593Smuzhiyun 
954*4882a593Smuzhiyun 	if (irq_ptr->perf_stat_enabled)
955*4882a593Smuzhiyun 		irq_ptr->perf_stat.qdio_int++;
956*4882a593Smuzhiyun 
957*4882a593Smuzhiyun 	if (IS_ERR(irb)) {
958*4882a593Smuzhiyun 		DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no);
959*4882a593Smuzhiyun 		qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
960*4882a593Smuzhiyun 		wake_up(&cdev->private->wait_q);
961*4882a593Smuzhiyun 		return;
962*4882a593Smuzhiyun 	}
963*4882a593Smuzhiyun 	qdio_irq_check_sense(irq_ptr, irb);
964*4882a593Smuzhiyun 	cstat = irb->scsw.cmd.cstat;
965*4882a593Smuzhiyun 	dstat = irb->scsw.cmd.dstat;
966*4882a593Smuzhiyun 
967*4882a593Smuzhiyun 	switch (irq_ptr->state) {
968*4882a593Smuzhiyun 	case QDIO_IRQ_STATE_INACTIVE:
969*4882a593Smuzhiyun 		qdio_establish_handle_irq(irq_ptr, cstat, dstat);
970*4882a593Smuzhiyun 		break;
971*4882a593Smuzhiyun 	case QDIO_IRQ_STATE_CLEANUP:
972*4882a593Smuzhiyun 		qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
973*4882a593Smuzhiyun 		break;
974*4882a593Smuzhiyun 	case QDIO_IRQ_STATE_ESTABLISHED:
975*4882a593Smuzhiyun 	case QDIO_IRQ_STATE_ACTIVE:
976*4882a593Smuzhiyun 		if (cstat & SCHN_STAT_PCI) {
977*4882a593Smuzhiyun 			qdio_int_handler_pci(irq_ptr);
978*4882a593Smuzhiyun 			return;
979*4882a593Smuzhiyun 		}
980*4882a593Smuzhiyun 		if (cstat || dstat)
981*4882a593Smuzhiyun 			qdio_handle_activate_check(irq_ptr, intparm, cstat,
982*4882a593Smuzhiyun 						   dstat);
983*4882a593Smuzhiyun 		break;
984*4882a593Smuzhiyun 	case QDIO_IRQ_STATE_STOPPED:
985*4882a593Smuzhiyun 		break;
986*4882a593Smuzhiyun 	default:
987*4882a593Smuzhiyun 		WARN_ON_ONCE(1);
988*4882a593Smuzhiyun 	}
989*4882a593Smuzhiyun 	wake_up(&cdev->private->wait_q);
990*4882a593Smuzhiyun }
991*4882a593Smuzhiyun 
992*4882a593Smuzhiyun /**
993*4882a593Smuzhiyun  * qdio_get_ssqd_desc - get qdio subchannel description
994*4882a593Smuzhiyun  * @cdev: ccw device to get description for
995*4882a593Smuzhiyun  * @data: where to store the ssqd
996*4882a593Smuzhiyun  *
997*4882a593Smuzhiyun  * Returns 0 or an error code. The results of the chsc are stored in the
998*4882a593Smuzhiyun  * specified structure.
999*4882a593Smuzhiyun  */
qdio_get_ssqd_desc(struct ccw_device * cdev,struct qdio_ssqd_desc * data)1000*4882a593Smuzhiyun int qdio_get_ssqd_desc(struct ccw_device *cdev,
1001*4882a593Smuzhiyun 		       struct qdio_ssqd_desc *data)
1002*4882a593Smuzhiyun {
1003*4882a593Smuzhiyun 	struct subchannel_id schid;
1004*4882a593Smuzhiyun 
1005*4882a593Smuzhiyun 	if (!cdev || !cdev->private)
1006*4882a593Smuzhiyun 		return -EINVAL;
1007*4882a593Smuzhiyun 
1008*4882a593Smuzhiyun 	ccw_device_get_schid(cdev, &schid);
1009*4882a593Smuzhiyun 	DBF_EVENT("get ssqd:%4x", schid.sch_no);
1010*4882a593Smuzhiyun 	return qdio_setup_get_ssqd(NULL, &schid, data);
1011*4882a593Smuzhiyun }
1012*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc);
1013*4882a593Smuzhiyun 
qdio_shutdown_queues(struct qdio_irq * irq_ptr)1014*4882a593Smuzhiyun static void qdio_shutdown_queues(struct qdio_irq *irq_ptr)
1015*4882a593Smuzhiyun {
1016*4882a593Smuzhiyun 	struct qdio_q *q;
1017*4882a593Smuzhiyun 	int i;
1018*4882a593Smuzhiyun 
1019*4882a593Smuzhiyun 	for_each_input_queue(irq_ptr, q, i)
1020*4882a593Smuzhiyun 		tasklet_kill(&q->tasklet);
1021*4882a593Smuzhiyun 
1022*4882a593Smuzhiyun 	for_each_output_queue(irq_ptr, q, i) {
1023*4882a593Smuzhiyun 		del_timer_sync(&q->u.out.timer);
1024*4882a593Smuzhiyun 		tasklet_kill(&q->tasklet);
1025*4882a593Smuzhiyun 	}
1026*4882a593Smuzhiyun }
1027*4882a593Smuzhiyun 
qdio_cancel_ccw(struct qdio_irq * irq,int how)1028*4882a593Smuzhiyun static int qdio_cancel_ccw(struct qdio_irq *irq, int how)
1029*4882a593Smuzhiyun {
1030*4882a593Smuzhiyun 	struct ccw_device *cdev = irq->cdev;
1031*4882a593Smuzhiyun 	int rc;
1032*4882a593Smuzhiyun 
1033*4882a593Smuzhiyun 	spin_lock_irq(get_ccwdev_lock(cdev));
1034*4882a593Smuzhiyun 	qdio_set_state(irq, QDIO_IRQ_STATE_CLEANUP);
1035*4882a593Smuzhiyun 	if (how & QDIO_FLAG_CLEANUP_USING_CLEAR)
1036*4882a593Smuzhiyun 		rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
1037*4882a593Smuzhiyun 	else
1038*4882a593Smuzhiyun 		/* default behaviour is halt */
1039*4882a593Smuzhiyun 		rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
1040*4882a593Smuzhiyun 	spin_unlock_irq(get_ccwdev_lock(cdev));
1041*4882a593Smuzhiyun 	if (rc) {
1042*4882a593Smuzhiyun 		DBF_ERROR("%4x SHUTD ERR", irq->schid.sch_no);
1043*4882a593Smuzhiyun 		DBF_ERROR("rc:%4d", rc);
1044*4882a593Smuzhiyun 		return rc;
1045*4882a593Smuzhiyun 	}
1046*4882a593Smuzhiyun 
1047*4882a593Smuzhiyun 	wait_event_interruptible_timeout(cdev->private->wait_q,
1048*4882a593Smuzhiyun 					 irq->state == QDIO_IRQ_STATE_INACTIVE ||
1049*4882a593Smuzhiyun 					 irq->state == QDIO_IRQ_STATE_ERR,
1050*4882a593Smuzhiyun 					 10 * HZ);
1051*4882a593Smuzhiyun 
1052*4882a593Smuzhiyun 	return 0;
1053*4882a593Smuzhiyun }
1054*4882a593Smuzhiyun 
1055*4882a593Smuzhiyun /**
1056*4882a593Smuzhiyun  * qdio_shutdown - shut down a qdio subchannel
1057*4882a593Smuzhiyun  * @cdev: associated ccw device
1058*4882a593Smuzhiyun  * @how: use halt or clear to shutdown
1059*4882a593Smuzhiyun  */
qdio_shutdown(struct ccw_device * cdev,int how)1060*4882a593Smuzhiyun int qdio_shutdown(struct ccw_device *cdev, int how)
1061*4882a593Smuzhiyun {
1062*4882a593Smuzhiyun 	struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1063*4882a593Smuzhiyun 	struct subchannel_id schid;
1064*4882a593Smuzhiyun 	int rc;
1065*4882a593Smuzhiyun 
1066*4882a593Smuzhiyun 	if (!irq_ptr)
1067*4882a593Smuzhiyun 		return -ENODEV;
1068*4882a593Smuzhiyun 
1069*4882a593Smuzhiyun 	WARN_ON_ONCE(irqs_disabled());
1070*4882a593Smuzhiyun 	ccw_device_get_schid(cdev, &schid);
1071*4882a593Smuzhiyun 	DBF_EVENT("qshutdown:%4x", schid.sch_no);
1072*4882a593Smuzhiyun 
1073*4882a593Smuzhiyun 	mutex_lock(&irq_ptr->setup_mutex);
1074*4882a593Smuzhiyun 	/*
1075*4882a593Smuzhiyun 	 * Subchannel was already shot down. We cannot prevent being called
1076*4882a593Smuzhiyun 	 * twice since cio may trigger a shutdown asynchronously.
1077*4882a593Smuzhiyun 	 */
1078*4882a593Smuzhiyun 	if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
1079*4882a593Smuzhiyun 		mutex_unlock(&irq_ptr->setup_mutex);
1080*4882a593Smuzhiyun 		return 0;
1081*4882a593Smuzhiyun 	}
1082*4882a593Smuzhiyun 
1083*4882a593Smuzhiyun 	/*
1084*4882a593Smuzhiyun 	 * Indicate that the device is going down. Scheduling the queue
1085*4882a593Smuzhiyun 	 * tasklets is forbidden from here on.
1086*4882a593Smuzhiyun 	 */
1087*4882a593Smuzhiyun 	qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
1088*4882a593Smuzhiyun 
1089*4882a593Smuzhiyun 	tiqdio_remove_device(irq_ptr);
1090*4882a593Smuzhiyun 	qdio_shutdown_queues(irq_ptr);
1091*4882a593Smuzhiyun 	qdio_shutdown_debug_entries(irq_ptr);
1092*4882a593Smuzhiyun 
1093*4882a593Smuzhiyun 	rc = qdio_cancel_ccw(irq_ptr, how);
1094*4882a593Smuzhiyun 	qdio_shutdown_thinint(irq_ptr);
1095*4882a593Smuzhiyun 	qdio_shutdown_irq(irq_ptr);
1096*4882a593Smuzhiyun 
1097*4882a593Smuzhiyun 	qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1098*4882a593Smuzhiyun 	mutex_unlock(&irq_ptr->setup_mutex);
1099*4882a593Smuzhiyun 	if (rc)
1100*4882a593Smuzhiyun 		return rc;
1101*4882a593Smuzhiyun 	return 0;
1102*4882a593Smuzhiyun }
1103*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(qdio_shutdown);
1104*4882a593Smuzhiyun 
1105*4882a593Smuzhiyun /**
1106*4882a593Smuzhiyun  * qdio_free - free data structures for a qdio subchannel
1107*4882a593Smuzhiyun  * @cdev: associated ccw device
1108*4882a593Smuzhiyun  */
qdio_free(struct ccw_device * cdev)1109*4882a593Smuzhiyun int qdio_free(struct ccw_device *cdev)
1110*4882a593Smuzhiyun {
1111*4882a593Smuzhiyun 	struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1112*4882a593Smuzhiyun 	struct subchannel_id schid;
1113*4882a593Smuzhiyun 
1114*4882a593Smuzhiyun 	if (!irq_ptr)
1115*4882a593Smuzhiyun 		return -ENODEV;
1116*4882a593Smuzhiyun 
1117*4882a593Smuzhiyun 	ccw_device_get_schid(cdev, &schid);
1118*4882a593Smuzhiyun 	DBF_EVENT("qfree:%4x", schid.sch_no);
1119*4882a593Smuzhiyun 	DBF_DEV_EVENT(DBF_ERR, irq_ptr, "dbf abandoned");
1120*4882a593Smuzhiyun 	mutex_lock(&irq_ptr->setup_mutex);
1121*4882a593Smuzhiyun 
1122*4882a593Smuzhiyun 	irq_ptr->debug_area = NULL;
1123*4882a593Smuzhiyun 	cdev->private->qdio_data = NULL;
1124*4882a593Smuzhiyun 	mutex_unlock(&irq_ptr->setup_mutex);
1125*4882a593Smuzhiyun 
1126*4882a593Smuzhiyun 	qdio_free_async_data(irq_ptr);
1127*4882a593Smuzhiyun 	qdio_free_queues(irq_ptr);
1128*4882a593Smuzhiyun 	free_page((unsigned long) irq_ptr->qdr);
1129*4882a593Smuzhiyun 	free_page(irq_ptr->chsc_page);
1130*4882a593Smuzhiyun 	free_page((unsigned long) irq_ptr);
1131*4882a593Smuzhiyun 	return 0;
1132*4882a593Smuzhiyun }
1133*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(qdio_free);
1134*4882a593Smuzhiyun 
1135*4882a593Smuzhiyun /**
1136*4882a593Smuzhiyun  * qdio_allocate - allocate qdio queues and associated data
1137*4882a593Smuzhiyun  * @cdev: associated ccw device
1138*4882a593Smuzhiyun  * @no_input_qs: allocate this number of Input Queues
1139*4882a593Smuzhiyun  * @no_output_qs: allocate this number of Output Queues
1140*4882a593Smuzhiyun  */
qdio_allocate(struct ccw_device * cdev,unsigned int no_input_qs,unsigned int no_output_qs)1141*4882a593Smuzhiyun int qdio_allocate(struct ccw_device *cdev, unsigned int no_input_qs,
1142*4882a593Smuzhiyun 		  unsigned int no_output_qs)
1143*4882a593Smuzhiyun {
1144*4882a593Smuzhiyun 	struct subchannel_id schid;
1145*4882a593Smuzhiyun 	struct qdio_irq *irq_ptr;
1146*4882a593Smuzhiyun 	int rc = -ENOMEM;
1147*4882a593Smuzhiyun 
1148*4882a593Smuzhiyun 	ccw_device_get_schid(cdev, &schid);
1149*4882a593Smuzhiyun 	DBF_EVENT("qallocate:%4x", schid.sch_no);
1150*4882a593Smuzhiyun 
1151*4882a593Smuzhiyun 	if (no_input_qs > QDIO_MAX_QUEUES_PER_IRQ ||
1152*4882a593Smuzhiyun 	    no_output_qs > QDIO_MAX_QUEUES_PER_IRQ)
1153*4882a593Smuzhiyun 		return -EINVAL;
1154*4882a593Smuzhiyun 
1155*4882a593Smuzhiyun 	/* irq_ptr must be in GFP_DMA since it contains ccw1.cda */
1156*4882a593Smuzhiyun 	irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
1157*4882a593Smuzhiyun 	if (!irq_ptr)
1158*4882a593Smuzhiyun 		return -ENOMEM;
1159*4882a593Smuzhiyun 
1160*4882a593Smuzhiyun 	irq_ptr->cdev = cdev;
1161*4882a593Smuzhiyun 	mutex_init(&irq_ptr->setup_mutex);
1162*4882a593Smuzhiyun 	if (qdio_allocate_dbf(irq_ptr))
1163*4882a593Smuzhiyun 		goto err_dbf;
1164*4882a593Smuzhiyun 
1165*4882a593Smuzhiyun 	DBF_DEV_EVENT(DBF_ERR, irq_ptr, "alloc niq:%1u noq:%1u", no_input_qs,
1166*4882a593Smuzhiyun 		      no_output_qs);
1167*4882a593Smuzhiyun 
1168*4882a593Smuzhiyun 	/*
1169*4882a593Smuzhiyun 	 * Allocate a page for the chsc calls in qdio_establish.
1170*4882a593Smuzhiyun 	 * Must be pre-allocated since a zfcp recovery will call
1171*4882a593Smuzhiyun 	 * qdio_establish. In case of low memory and swap on a zfcp disk
1172*4882a593Smuzhiyun 	 * we may not be able to allocate memory otherwise.
1173*4882a593Smuzhiyun 	 */
1174*4882a593Smuzhiyun 	irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL);
1175*4882a593Smuzhiyun 	if (!irq_ptr->chsc_page)
1176*4882a593Smuzhiyun 		goto err_chsc;
1177*4882a593Smuzhiyun 
1178*4882a593Smuzhiyun 	/* qdr is used in ccw1.cda which is u32 */
1179*4882a593Smuzhiyun 	irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
1180*4882a593Smuzhiyun 	if (!irq_ptr->qdr)
1181*4882a593Smuzhiyun 		goto err_qdr;
1182*4882a593Smuzhiyun 
1183*4882a593Smuzhiyun 	rc = qdio_allocate_qs(irq_ptr, no_input_qs, no_output_qs);
1184*4882a593Smuzhiyun 	if (rc)
1185*4882a593Smuzhiyun 		goto err_queues;
1186*4882a593Smuzhiyun 
1187*4882a593Smuzhiyun 	INIT_LIST_HEAD(&irq_ptr->entry);
1188*4882a593Smuzhiyun 	cdev->private->qdio_data = irq_ptr;
1189*4882a593Smuzhiyun 	qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1190*4882a593Smuzhiyun 	return 0;
1191*4882a593Smuzhiyun 
1192*4882a593Smuzhiyun err_queues:
1193*4882a593Smuzhiyun 	free_page((unsigned long) irq_ptr->qdr);
1194*4882a593Smuzhiyun err_qdr:
1195*4882a593Smuzhiyun 	free_page(irq_ptr->chsc_page);
1196*4882a593Smuzhiyun err_chsc:
1197*4882a593Smuzhiyun err_dbf:
1198*4882a593Smuzhiyun 	free_page((unsigned long) irq_ptr);
1199*4882a593Smuzhiyun 	return rc;
1200*4882a593Smuzhiyun }
1201*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(qdio_allocate);
1202*4882a593Smuzhiyun 
qdio_detect_hsicq(struct qdio_irq * irq_ptr)1203*4882a593Smuzhiyun static void qdio_detect_hsicq(struct qdio_irq *irq_ptr)
1204*4882a593Smuzhiyun {
1205*4882a593Smuzhiyun 	struct qdio_q *q = irq_ptr->input_qs[0];
1206*4882a593Smuzhiyun 	int i, use_cq = 0;
1207*4882a593Smuzhiyun 
1208*4882a593Smuzhiyun 	if (irq_ptr->nr_input_qs > 1 && queue_type(q) == QDIO_IQDIO_QFMT)
1209*4882a593Smuzhiyun 		use_cq = 1;
1210*4882a593Smuzhiyun 
1211*4882a593Smuzhiyun 	for_each_output_queue(irq_ptr, q, i) {
1212*4882a593Smuzhiyun 		if (use_cq) {
1213*4882a593Smuzhiyun 			if (multicast_outbound(q))
1214*4882a593Smuzhiyun 				continue;
1215*4882a593Smuzhiyun 			if (qdio_enable_async_operation(&q->u.out) < 0) {
1216*4882a593Smuzhiyun 				use_cq = 0;
1217*4882a593Smuzhiyun 				continue;
1218*4882a593Smuzhiyun 			}
1219*4882a593Smuzhiyun 		} else
1220*4882a593Smuzhiyun 			qdio_disable_async_operation(&q->u.out);
1221*4882a593Smuzhiyun 	}
1222*4882a593Smuzhiyun 	DBF_EVENT("use_cq:%d", use_cq);
1223*4882a593Smuzhiyun }
1224*4882a593Smuzhiyun 
qdio_trace_init_data(struct qdio_irq * irq,struct qdio_initialize * data)1225*4882a593Smuzhiyun static void qdio_trace_init_data(struct qdio_irq *irq,
1226*4882a593Smuzhiyun 				 struct qdio_initialize *data)
1227*4882a593Smuzhiyun {
1228*4882a593Smuzhiyun 	DBF_DEV_EVENT(DBF_ERR, irq, "qfmt:%1u", data->q_format);
1229*4882a593Smuzhiyun 	DBF_DEV_EVENT(DBF_ERR, irq, "qpff%4x", data->qib_param_field_format);
1230*4882a593Smuzhiyun 	DBF_DEV_HEX(irq, &data->qib_param_field, sizeof(void *), DBF_ERR);
1231*4882a593Smuzhiyun 	DBF_DEV_HEX(irq, &data->input_slib_elements, sizeof(void *), DBF_ERR);
1232*4882a593Smuzhiyun 	DBF_DEV_HEX(irq, &data->output_slib_elements, sizeof(void *), DBF_ERR);
1233*4882a593Smuzhiyun 	DBF_DEV_EVENT(DBF_ERR, irq, "niq:%1u noq:%1u", data->no_input_qs,
1234*4882a593Smuzhiyun 		      data->no_output_qs);
1235*4882a593Smuzhiyun 	DBF_DEV_HEX(irq, &data->input_handler, sizeof(void *), DBF_ERR);
1236*4882a593Smuzhiyun 	DBF_DEV_HEX(irq, &data->output_handler, sizeof(void *), DBF_ERR);
1237*4882a593Smuzhiyun 	DBF_DEV_HEX(irq, &data->int_parm, sizeof(long), DBF_ERR);
1238*4882a593Smuzhiyun 	DBF_DEV_HEX(irq, &data->input_sbal_addr_array, sizeof(void *), DBF_ERR);
1239*4882a593Smuzhiyun 	DBF_DEV_HEX(irq, &data->output_sbal_addr_array, sizeof(void *),
1240*4882a593Smuzhiyun 		    DBF_ERR);
1241*4882a593Smuzhiyun }
1242*4882a593Smuzhiyun 
1243*4882a593Smuzhiyun /**
1244*4882a593Smuzhiyun  * qdio_establish - establish queues on a qdio subchannel
1245*4882a593Smuzhiyun  * @cdev: associated ccw device
1246*4882a593Smuzhiyun  * @init_data: initialization data
1247*4882a593Smuzhiyun  */
qdio_establish(struct ccw_device * cdev,struct qdio_initialize * init_data)1248*4882a593Smuzhiyun int qdio_establish(struct ccw_device *cdev,
1249*4882a593Smuzhiyun 		   struct qdio_initialize *init_data)
1250*4882a593Smuzhiyun {
1251*4882a593Smuzhiyun 	struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1252*4882a593Smuzhiyun 	struct subchannel_id schid;
1253*4882a593Smuzhiyun 	long timeout;
1254*4882a593Smuzhiyun 	int rc;
1255*4882a593Smuzhiyun 
1256*4882a593Smuzhiyun 	ccw_device_get_schid(cdev, &schid);
1257*4882a593Smuzhiyun 	DBF_EVENT("qestablish:%4x", schid.sch_no);
1258*4882a593Smuzhiyun 
1259*4882a593Smuzhiyun 	if (!irq_ptr)
1260*4882a593Smuzhiyun 		return -ENODEV;
1261*4882a593Smuzhiyun 
1262*4882a593Smuzhiyun 	if (init_data->no_input_qs > irq_ptr->max_input_qs ||
1263*4882a593Smuzhiyun 	    init_data->no_output_qs > irq_ptr->max_output_qs)
1264*4882a593Smuzhiyun 		return -EINVAL;
1265*4882a593Smuzhiyun 
1266*4882a593Smuzhiyun 	if ((init_data->no_input_qs && !init_data->input_handler) ||
1267*4882a593Smuzhiyun 	    (init_data->no_output_qs && !init_data->output_handler))
1268*4882a593Smuzhiyun 		return -EINVAL;
1269*4882a593Smuzhiyun 
1270*4882a593Smuzhiyun 	if (!init_data->input_sbal_addr_array ||
1271*4882a593Smuzhiyun 	    !init_data->output_sbal_addr_array)
1272*4882a593Smuzhiyun 		return -EINVAL;
1273*4882a593Smuzhiyun 
1274*4882a593Smuzhiyun 	mutex_lock(&irq_ptr->setup_mutex);
1275*4882a593Smuzhiyun 	qdio_trace_init_data(irq_ptr, init_data);
1276*4882a593Smuzhiyun 	qdio_setup_irq(irq_ptr, init_data);
1277*4882a593Smuzhiyun 
1278*4882a593Smuzhiyun 	rc = qdio_establish_thinint(irq_ptr);
1279*4882a593Smuzhiyun 	if (rc)
1280*4882a593Smuzhiyun 		goto err_thinint;
1281*4882a593Smuzhiyun 
1282*4882a593Smuzhiyun 	/* establish q */
1283*4882a593Smuzhiyun 	irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd;
1284*4882a593Smuzhiyun 	irq_ptr->ccw.flags = CCW_FLAG_SLI;
1285*4882a593Smuzhiyun 	irq_ptr->ccw.count = irq_ptr->equeue.count;
1286*4882a593Smuzhiyun 	irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr);
1287*4882a593Smuzhiyun 
1288*4882a593Smuzhiyun 	spin_lock_irq(get_ccwdev_lock(cdev));
1289*4882a593Smuzhiyun 	ccw_device_set_options_mask(cdev, 0);
1290*4882a593Smuzhiyun 
1291*4882a593Smuzhiyun 	rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0);
1292*4882a593Smuzhiyun 	spin_unlock_irq(get_ccwdev_lock(cdev));
1293*4882a593Smuzhiyun 	if (rc) {
1294*4882a593Smuzhiyun 		DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no);
1295*4882a593Smuzhiyun 		DBF_ERROR("rc:%4x", rc);
1296*4882a593Smuzhiyun 		goto err_ccw_start;
1297*4882a593Smuzhiyun 	}
1298*4882a593Smuzhiyun 
1299*4882a593Smuzhiyun 	timeout = wait_event_interruptible_timeout(cdev->private->wait_q,
1300*4882a593Smuzhiyun 						   irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
1301*4882a593Smuzhiyun 						   irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ);
1302*4882a593Smuzhiyun 	if (timeout <= 0) {
1303*4882a593Smuzhiyun 		rc = (timeout == -ERESTARTSYS) ? -EINTR : -ETIME;
1304*4882a593Smuzhiyun 		goto err_ccw_timeout;
1305*4882a593Smuzhiyun 	}
1306*4882a593Smuzhiyun 
1307*4882a593Smuzhiyun 	if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) {
1308*4882a593Smuzhiyun 		mutex_unlock(&irq_ptr->setup_mutex);
1309*4882a593Smuzhiyun 		qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
1310*4882a593Smuzhiyun 		return -EIO;
1311*4882a593Smuzhiyun 	}
1312*4882a593Smuzhiyun 
1313*4882a593Smuzhiyun 	qdio_setup_ssqd_info(irq_ptr);
1314*4882a593Smuzhiyun 
1315*4882a593Smuzhiyun 	qdio_detect_hsicq(irq_ptr);
1316*4882a593Smuzhiyun 
1317*4882a593Smuzhiyun 	/* qebsm is now setup if available, initialize buffer states */
1318*4882a593Smuzhiyun 	qdio_init_buf_states(irq_ptr);
1319*4882a593Smuzhiyun 
1320*4882a593Smuzhiyun 	mutex_unlock(&irq_ptr->setup_mutex);
1321*4882a593Smuzhiyun 	qdio_print_subchannel_info(irq_ptr);
1322*4882a593Smuzhiyun 	qdio_setup_debug_entries(irq_ptr);
1323*4882a593Smuzhiyun 	return 0;
1324*4882a593Smuzhiyun 
1325*4882a593Smuzhiyun err_ccw_timeout:
1326*4882a593Smuzhiyun 	qdio_cancel_ccw(irq_ptr, QDIO_FLAG_CLEANUP_USING_CLEAR);
1327*4882a593Smuzhiyun err_ccw_start:
1328*4882a593Smuzhiyun 	qdio_shutdown_thinint(irq_ptr);
1329*4882a593Smuzhiyun err_thinint:
1330*4882a593Smuzhiyun 	qdio_shutdown_irq(irq_ptr);
1331*4882a593Smuzhiyun 	qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1332*4882a593Smuzhiyun 	mutex_unlock(&irq_ptr->setup_mutex);
1333*4882a593Smuzhiyun 	return rc;
1334*4882a593Smuzhiyun }
1335*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(qdio_establish);
1336*4882a593Smuzhiyun 
1337*4882a593Smuzhiyun /**
1338*4882a593Smuzhiyun  * qdio_activate - activate queues on a qdio subchannel
1339*4882a593Smuzhiyun  * @cdev: associated cdev
1340*4882a593Smuzhiyun  */
qdio_activate(struct ccw_device * cdev)1341*4882a593Smuzhiyun int qdio_activate(struct ccw_device *cdev)
1342*4882a593Smuzhiyun {
1343*4882a593Smuzhiyun 	struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1344*4882a593Smuzhiyun 	struct subchannel_id schid;
1345*4882a593Smuzhiyun 	int rc;
1346*4882a593Smuzhiyun 
1347*4882a593Smuzhiyun 	ccw_device_get_schid(cdev, &schid);
1348*4882a593Smuzhiyun 	DBF_EVENT("qactivate:%4x", schid.sch_no);
1349*4882a593Smuzhiyun 
1350*4882a593Smuzhiyun 	if (!irq_ptr)
1351*4882a593Smuzhiyun 		return -ENODEV;
1352*4882a593Smuzhiyun 
1353*4882a593Smuzhiyun 	mutex_lock(&irq_ptr->setup_mutex);
1354*4882a593Smuzhiyun 	if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
1355*4882a593Smuzhiyun 		rc = -EBUSY;
1356*4882a593Smuzhiyun 		goto out;
1357*4882a593Smuzhiyun 	}
1358*4882a593Smuzhiyun 
1359*4882a593Smuzhiyun 	irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd;
1360*4882a593Smuzhiyun 	irq_ptr->ccw.flags = CCW_FLAG_SLI;
1361*4882a593Smuzhiyun 	irq_ptr->ccw.count = irq_ptr->aqueue.count;
1362*4882a593Smuzhiyun 	irq_ptr->ccw.cda = 0;
1363*4882a593Smuzhiyun 
1364*4882a593Smuzhiyun 	spin_lock_irq(get_ccwdev_lock(cdev));
1365*4882a593Smuzhiyun 	ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
1366*4882a593Smuzhiyun 
1367*4882a593Smuzhiyun 	rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE,
1368*4882a593Smuzhiyun 			      0, DOIO_DENY_PREFETCH);
1369*4882a593Smuzhiyun 	spin_unlock_irq(get_ccwdev_lock(cdev));
1370*4882a593Smuzhiyun 	if (rc) {
1371*4882a593Smuzhiyun 		DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no);
1372*4882a593Smuzhiyun 		DBF_ERROR("rc:%4x", rc);
1373*4882a593Smuzhiyun 		goto out;
1374*4882a593Smuzhiyun 	}
1375*4882a593Smuzhiyun 
1376*4882a593Smuzhiyun 	if (is_thinint_irq(irq_ptr))
1377*4882a593Smuzhiyun 		tiqdio_add_device(irq_ptr);
1378*4882a593Smuzhiyun 
1379*4882a593Smuzhiyun 	/* wait for subchannel to become active */
1380*4882a593Smuzhiyun 	msleep(5);
1381*4882a593Smuzhiyun 
1382*4882a593Smuzhiyun 	switch (irq_ptr->state) {
1383*4882a593Smuzhiyun 	case QDIO_IRQ_STATE_STOPPED:
1384*4882a593Smuzhiyun 	case QDIO_IRQ_STATE_ERR:
1385*4882a593Smuzhiyun 		rc = -EIO;
1386*4882a593Smuzhiyun 		break;
1387*4882a593Smuzhiyun 	default:
1388*4882a593Smuzhiyun 		qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
1389*4882a593Smuzhiyun 		rc = 0;
1390*4882a593Smuzhiyun 	}
1391*4882a593Smuzhiyun out:
1392*4882a593Smuzhiyun 	mutex_unlock(&irq_ptr->setup_mutex);
1393*4882a593Smuzhiyun 	return rc;
1394*4882a593Smuzhiyun }
1395*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(qdio_activate);
1396*4882a593Smuzhiyun 
1397*4882a593Smuzhiyun /**
1398*4882a593Smuzhiyun  * handle_inbound - reset processed input buffers
1399*4882a593Smuzhiyun  * @q: queue containing the buffers
1400*4882a593Smuzhiyun  * @callflags: flags
1401*4882a593Smuzhiyun  * @bufnr: first buffer to process
1402*4882a593Smuzhiyun  * @count: how many buffers are emptied
1403*4882a593Smuzhiyun  */
handle_inbound(struct qdio_q * q,unsigned int callflags,int bufnr,int count)1404*4882a593Smuzhiyun static int handle_inbound(struct qdio_q *q, unsigned int callflags,
1405*4882a593Smuzhiyun 			  int bufnr, int count)
1406*4882a593Smuzhiyun {
1407*4882a593Smuzhiyun 	int overlap;
1408*4882a593Smuzhiyun 
1409*4882a593Smuzhiyun 	qperf_inc(q, inbound_call);
1410*4882a593Smuzhiyun 
1411*4882a593Smuzhiyun 	/* If any processed SBALs are returned to HW, adjust our tracking: */
1412*4882a593Smuzhiyun 	overlap = min_t(int, count - sub_buf(q->u.in.batch_start, bufnr),
1413*4882a593Smuzhiyun 			     q->u.in.batch_count);
1414*4882a593Smuzhiyun 	if (overlap > 0) {
1415*4882a593Smuzhiyun 		q->u.in.batch_start = add_buf(q->u.in.batch_start, overlap);
1416*4882a593Smuzhiyun 		q->u.in.batch_count -= overlap;
1417*4882a593Smuzhiyun 	}
1418*4882a593Smuzhiyun 
1419*4882a593Smuzhiyun 	count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count);
1420*4882a593Smuzhiyun 	atomic_add(count, &q->nr_buf_used);
1421*4882a593Smuzhiyun 
1422*4882a593Smuzhiyun 	if (need_siga_in(q))
1423*4882a593Smuzhiyun 		return qdio_siga_input(q);
1424*4882a593Smuzhiyun 
1425*4882a593Smuzhiyun 	return 0;
1426*4882a593Smuzhiyun }
1427*4882a593Smuzhiyun 
1428*4882a593Smuzhiyun /**
1429*4882a593Smuzhiyun  * handle_outbound - process filled outbound buffers
1430*4882a593Smuzhiyun  * @q: queue containing the buffers
1431*4882a593Smuzhiyun  * @callflags: flags
1432*4882a593Smuzhiyun  * @bufnr: first buffer to process
1433*4882a593Smuzhiyun  * @count: how many buffers are filled
1434*4882a593Smuzhiyun  */
handle_outbound(struct qdio_q * q,unsigned int callflags,unsigned int bufnr,unsigned int count)1435*4882a593Smuzhiyun static int handle_outbound(struct qdio_q *q, unsigned int callflags,
1436*4882a593Smuzhiyun 			   unsigned int bufnr, unsigned int count)
1437*4882a593Smuzhiyun {
1438*4882a593Smuzhiyun 	const unsigned int scan_threshold = q->irq_ptr->scan_threshold;
1439*4882a593Smuzhiyun 	unsigned char state = 0;
1440*4882a593Smuzhiyun 	int used, rc = 0;
1441*4882a593Smuzhiyun 
1442*4882a593Smuzhiyun 	qperf_inc(q, outbound_call);
1443*4882a593Smuzhiyun 
1444*4882a593Smuzhiyun 	count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count);
1445*4882a593Smuzhiyun 	used = atomic_add_return(count, &q->nr_buf_used);
1446*4882a593Smuzhiyun 
1447*4882a593Smuzhiyun 	if (used == QDIO_MAX_BUFFERS_PER_Q)
1448*4882a593Smuzhiyun 		qperf_inc(q, outbound_queue_full);
1449*4882a593Smuzhiyun 
1450*4882a593Smuzhiyun 	if (callflags & QDIO_FLAG_PCI_OUT) {
1451*4882a593Smuzhiyun 		q->u.out.pci_out_enabled = 1;
1452*4882a593Smuzhiyun 		qperf_inc(q, pci_request_int);
1453*4882a593Smuzhiyun 	} else
1454*4882a593Smuzhiyun 		q->u.out.pci_out_enabled = 0;
1455*4882a593Smuzhiyun 
1456*4882a593Smuzhiyun 	if (queue_type(q) == QDIO_IQDIO_QFMT) {
1457*4882a593Smuzhiyun 		unsigned long phys_aob = 0;
1458*4882a593Smuzhiyun 
1459*4882a593Smuzhiyun 		if (q->u.out.use_cq && count == 1)
1460*4882a593Smuzhiyun 			phys_aob = qdio_aob_for_buffer(&q->u.out, bufnr);
1461*4882a593Smuzhiyun 
1462*4882a593Smuzhiyun 		rc = qdio_kick_outbound_q(q, count, phys_aob);
1463*4882a593Smuzhiyun 	} else if (need_siga_sync(q)) {
1464*4882a593Smuzhiyun 		rc = qdio_siga_sync_q(q);
1465*4882a593Smuzhiyun 	} else if (count < QDIO_MAX_BUFFERS_PER_Q &&
1466*4882a593Smuzhiyun 		   get_buf_state(q, prev_buf(bufnr), &state, 0) > 0 &&
1467*4882a593Smuzhiyun 		   state == SLSB_CU_OUTPUT_PRIMED) {
1468*4882a593Smuzhiyun 		/* The previous buffer is not processed yet, tack on. */
1469*4882a593Smuzhiyun 		qperf_inc(q, fast_requeue);
1470*4882a593Smuzhiyun 	} else {
1471*4882a593Smuzhiyun 		rc = qdio_kick_outbound_q(q, count, 0);
1472*4882a593Smuzhiyun 	}
1473*4882a593Smuzhiyun 
1474*4882a593Smuzhiyun 	/* Let drivers implement their own completion scanning: */
1475*4882a593Smuzhiyun 	if (!scan_threshold)
1476*4882a593Smuzhiyun 		return rc;
1477*4882a593Smuzhiyun 
1478*4882a593Smuzhiyun 	/* in case of SIGA errors we must process the error immediately */
1479*4882a593Smuzhiyun 	if (used >= scan_threshold || rc)
1480*4882a593Smuzhiyun 		qdio_tasklet_schedule(q);
1481*4882a593Smuzhiyun 	else
1482*4882a593Smuzhiyun 		/* free the SBALs in case of no further traffic */
1483*4882a593Smuzhiyun 		if (!timer_pending(&q->u.out.timer) &&
1484*4882a593Smuzhiyun 		    likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE))
1485*4882a593Smuzhiyun 			mod_timer(&q->u.out.timer, jiffies + HZ);
1486*4882a593Smuzhiyun 	return rc;
1487*4882a593Smuzhiyun }
1488*4882a593Smuzhiyun 
1489*4882a593Smuzhiyun /**
1490*4882a593Smuzhiyun  * do_QDIO - process input or output buffers
1491*4882a593Smuzhiyun  * @cdev: associated ccw_device for the qdio subchannel
1492*4882a593Smuzhiyun  * @callflags: input or output and special flags from the program
1493*4882a593Smuzhiyun  * @q_nr: queue number
1494*4882a593Smuzhiyun  * @bufnr: buffer number
1495*4882a593Smuzhiyun  * @count: how many buffers to process
1496*4882a593Smuzhiyun  */
do_QDIO(struct ccw_device * cdev,unsigned int callflags,int q_nr,unsigned int bufnr,unsigned int count)1497*4882a593Smuzhiyun int do_QDIO(struct ccw_device *cdev, unsigned int callflags,
1498*4882a593Smuzhiyun 	    int q_nr, unsigned int bufnr, unsigned int count)
1499*4882a593Smuzhiyun {
1500*4882a593Smuzhiyun 	struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1501*4882a593Smuzhiyun 
1502*4882a593Smuzhiyun 	if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q)
1503*4882a593Smuzhiyun 		return -EINVAL;
1504*4882a593Smuzhiyun 
1505*4882a593Smuzhiyun 	if (!irq_ptr)
1506*4882a593Smuzhiyun 		return -ENODEV;
1507*4882a593Smuzhiyun 
1508*4882a593Smuzhiyun 	DBF_DEV_EVENT(DBF_INFO, irq_ptr,
1509*4882a593Smuzhiyun 		      "do%02x b:%02x c:%02x", callflags, bufnr, count);
1510*4882a593Smuzhiyun 
1511*4882a593Smuzhiyun 	if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)
1512*4882a593Smuzhiyun 		return -EIO;
1513*4882a593Smuzhiyun 	if (!count)
1514*4882a593Smuzhiyun 		return 0;
1515*4882a593Smuzhiyun 	if (callflags & QDIO_FLAG_SYNC_INPUT)
1516*4882a593Smuzhiyun 		return handle_inbound(irq_ptr->input_qs[q_nr],
1517*4882a593Smuzhiyun 				      callflags, bufnr, count);
1518*4882a593Smuzhiyun 	else if (callflags & QDIO_FLAG_SYNC_OUTPUT)
1519*4882a593Smuzhiyun 		return handle_outbound(irq_ptr->output_qs[q_nr],
1520*4882a593Smuzhiyun 				       callflags, bufnr, count);
1521*4882a593Smuzhiyun 	return -EINVAL;
1522*4882a593Smuzhiyun }
1523*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(do_QDIO);
1524*4882a593Smuzhiyun 
1525*4882a593Smuzhiyun /**
1526*4882a593Smuzhiyun  * qdio_start_irq - enable interrupt processing for the device
1527*4882a593Smuzhiyun  * @cdev: associated ccw_device for the qdio subchannel
1528*4882a593Smuzhiyun  *
1529*4882a593Smuzhiyun  * Return codes
1530*4882a593Smuzhiyun  *   0 - success
1531*4882a593Smuzhiyun  *   1 - irqs not started since new data is available
1532*4882a593Smuzhiyun  */
qdio_start_irq(struct ccw_device * cdev)1533*4882a593Smuzhiyun int qdio_start_irq(struct ccw_device *cdev)
1534*4882a593Smuzhiyun {
1535*4882a593Smuzhiyun 	struct qdio_q *q;
1536*4882a593Smuzhiyun 	struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1537*4882a593Smuzhiyun 	unsigned int i;
1538*4882a593Smuzhiyun 
1539*4882a593Smuzhiyun 	if (!irq_ptr)
1540*4882a593Smuzhiyun 		return -ENODEV;
1541*4882a593Smuzhiyun 
1542*4882a593Smuzhiyun 	for_each_input_queue(irq_ptr, q, i)
1543*4882a593Smuzhiyun 		qdio_stop_polling(q);
1544*4882a593Smuzhiyun 
1545*4882a593Smuzhiyun 	clear_bit(QDIO_IRQ_DISABLED, &irq_ptr->poll_state);
1546*4882a593Smuzhiyun 
1547*4882a593Smuzhiyun 	/*
1548*4882a593Smuzhiyun 	 * We need to check again to not lose initiative after
1549*4882a593Smuzhiyun 	 * resetting the ACK state.
1550*4882a593Smuzhiyun 	 */
1551*4882a593Smuzhiyun 	if (test_nonshared_ind(irq_ptr))
1552*4882a593Smuzhiyun 		goto rescan;
1553*4882a593Smuzhiyun 
1554*4882a593Smuzhiyun 	for_each_input_queue(irq_ptr, q, i) {
1555*4882a593Smuzhiyun 		if (!qdio_inbound_q_done(q, q->first_to_check))
1556*4882a593Smuzhiyun 			goto rescan;
1557*4882a593Smuzhiyun 	}
1558*4882a593Smuzhiyun 
1559*4882a593Smuzhiyun 	return 0;
1560*4882a593Smuzhiyun 
1561*4882a593Smuzhiyun rescan:
1562*4882a593Smuzhiyun 	if (test_and_set_bit(QDIO_IRQ_DISABLED, &irq_ptr->poll_state))
1563*4882a593Smuzhiyun 		return 0;
1564*4882a593Smuzhiyun 	else
1565*4882a593Smuzhiyun 		return 1;
1566*4882a593Smuzhiyun 
1567*4882a593Smuzhiyun }
1568*4882a593Smuzhiyun EXPORT_SYMBOL(qdio_start_irq);
1569*4882a593Smuzhiyun 
__qdio_inspect_queue(struct qdio_q * q,unsigned int * bufnr,unsigned int * error)1570*4882a593Smuzhiyun static int __qdio_inspect_queue(struct qdio_q *q, unsigned int *bufnr,
1571*4882a593Smuzhiyun 				unsigned int *error)
1572*4882a593Smuzhiyun {
1573*4882a593Smuzhiyun 	unsigned int start = q->first_to_check;
1574*4882a593Smuzhiyun 	int count;
1575*4882a593Smuzhiyun 
1576*4882a593Smuzhiyun 	count = q->is_input_q ? qdio_inbound_q_moved(q, start) :
1577*4882a593Smuzhiyun 				qdio_outbound_q_moved(q, start);
1578*4882a593Smuzhiyun 	if (count == 0)
1579*4882a593Smuzhiyun 		return 0;
1580*4882a593Smuzhiyun 
1581*4882a593Smuzhiyun 	*bufnr = start;
1582*4882a593Smuzhiyun 	*error = q->qdio_error;
1583*4882a593Smuzhiyun 
1584*4882a593Smuzhiyun 	/* for the next time */
1585*4882a593Smuzhiyun 	q->first_to_check = add_buf(start, count);
1586*4882a593Smuzhiyun 	q->qdio_error = 0;
1587*4882a593Smuzhiyun 
1588*4882a593Smuzhiyun 	return count;
1589*4882a593Smuzhiyun }
1590*4882a593Smuzhiyun 
qdio_inspect_queue(struct ccw_device * cdev,unsigned int nr,bool is_input,unsigned int * bufnr,unsigned int * error)1591*4882a593Smuzhiyun int qdio_inspect_queue(struct ccw_device *cdev, unsigned int nr, bool is_input,
1592*4882a593Smuzhiyun 		       unsigned int *bufnr, unsigned int *error)
1593*4882a593Smuzhiyun {
1594*4882a593Smuzhiyun 	struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1595*4882a593Smuzhiyun 	struct qdio_q *q;
1596*4882a593Smuzhiyun 
1597*4882a593Smuzhiyun 	if (!irq_ptr)
1598*4882a593Smuzhiyun 		return -ENODEV;
1599*4882a593Smuzhiyun 	q = is_input ? irq_ptr->input_qs[nr] : irq_ptr->output_qs[nr];
1600*4882a593Smuzhiyun 
1601*4882a593Smuzhiyun 	if (need_siga_sync(q))
1602*4882a593Smuzhiyun 		qdio_siga_sync_q(q);
1603*4882a593Smuzhiyun 
1604*4882a593Smuzhiyun 	return __qdio_inspect_queue(q, bufnr, error);
1605*4882a593Smuzhiyun }
1606*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(qdio_inspect_queue);
1607*4882a593Smuzhiyun 
1608*4882a593Smuzhiyun /**
1609*4882a593Smuzhiyun  * qdio_get_next_buffers - process input buffers
1610*4882a593Smuzhiyun  * @cdev: associated ccw_device for the qdio subchannel
1611*4882a593Smuzhiyun  * @nr: input queue number
1612*4882a593Smuzhiyun  * @bufnr: first filled buffer number
1613*4882a593Smuzhiyun  * @error: buffers are in error state
1614*4882a593Smuzhiyun  *
1615*4882a593Smuzhiyun  * Return codes
1616*4882a593Smuzhiyun  *   < 0 - error
1617*4882a593Smuzhiyun  *   = 0 - no new buffers found
1618*4882a593Smuzhiyun  *   > 0 - number of processed buffers
1619*4882a593Smuzhiyun  */
qdio_get_next_buffers(struct ccw_device * cdev,int nr,int * bufnr,int * error)1620*4882a593Smuzhiyun int qdio_get_next_buffers(struct ccw_device *cdev, int nr, int *bufnr,
1621*4882a593Smuzhiyun 			  int *error)
1622*4882a593Smuzhiyun {
1623*4882a593Smuzhiyun 	struct qdio_q *q;
1624*4882a593Smuzhiyun 	struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1625*4882a593Smuzhiyun 
1626*4882a593Smuzhiyun 	if (!irq_ptr)
1627*4882a593Smuzhiyun 		return -ENODEV;
1628*4882a593Smuzhiyun 	q = irq_ptr->input_qs[nr];
1629*4882a593Smuzhiyun 
1630*4882a593Smuzhiyun 	/*
1631*4882a593Smuzhiyun 	 * Cannot rely on automatic sync after interrupt since queues may
1632*4882a593Smuzhiyun 	 * also be examined without interrupt.
1633*4882a593Smuzhiyun 	 */
1634*4882a593Smuzhiyun 	if (need_siga_sync(q))
1635*4882a593Smuzhiyun 		qdio_sync_queues(q);
1636*4882a593Smuzhiyun 
1637*4882a593Smuzhiyun 	qdio_check_outbound_pci_queues(irq_ptr);
1638*4882a593Smuzhiyun 
1639*4882a593Smuzhiyun 	/* Note: upper-layer MUST stop processing immediately here ... */
1640*4882a593Smuzhiyun 	if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
1641*4882a593Smuzhiyun 		return -EIO;
1642*4882a593Smuzhiyun 
1643*4882a593Smuzhiyun 	return __qdio_inspect_queue(q, bufnr, error);
1644*4882a593Smuzhiyun }
1645*4882a593Smuzhiyun EXPORT_SYMBOL(qdio_get_next_buffers);
1646*4882a593Smuzhiyun 
1647*4882a593Smuzhiyun /**
1648*4882a593Smuzhiyun  * qdio_stop_irq - disable interrupt processing for the device
1649*4882a593Smuzhiyun  * @cdev: associated ccw_device for the qdio subchannel
1650*4882a593Smuzhiyun  *
1651*4882a593Smuzhiyun  * Return codes
1652*4882a593Smuzhiyun  *   0 - interrupts were already disabled
1653*4882a593Smuzhiyun  *   1 - interrupts successfully disabled
1654*4882a593Smuzhiyun  */
qdio_stop_irq(struct ccw_device * cdev)1655*4882a593Smuzhiyun int qdio_stop_irq(struct ccw_device *cdev)
1656*4882a593Smuzhiyun {
1657*4882a593Smuzhiyun 	struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1658*4882a593Smuzhiyun 
1659*4882a593Smuzhiyun 	if (!irq_ptr)
1660*4882a593Smuzhiyun 		return -ENODEV;
1661*4882a593Smuzhiyun 
1662*4882a593Smuzhiyun 	if (test_and_set_bit(QDIO_IRQ_DISABLED, &irq_ptr->poll_state))
1663*4882a593Smuzhiyun 		return 0;
1664*4882a593Smuzhiyun 	else
1665*4882a593Smuzhiyun 		return 1;
1666*4882a593Smuzhiyun }
1667*4882a593Smuzhiyun EXPORT_SYMBOL(qdio_stop_irq);
1668*4882a593Smuzhiyun 
init_QDIO(void)1669*4882a593Smuzhiyun static int __init init_QDIO(void)
1670*4882a593Smuzhiyun {
1671*4882a593Smuzhiyun 	int rc;
1672*4882a593Smuzhiyun 
1673*4882a593Smuzhiyun 	rc = qdio_debug_init();
1674*4882a593Smuzhiyun 	if (rc)
1675*4882a593Smuzhiyun 		return rc;
1676*4882a593Smuzhiyun 	rc = qdio_setup_init();
1677*4882a593Smuzhiyun 	if (rc)
1678*4882a593Smuzhiyun 		goto out_debug;
1679*4882a593Smuzhiyun 	rc = qdio_thinint_init();
1680*4882a593Smuzhiyun 	if (rc)
1681*4882a593Smuzhiyun 		goto out_cache;
1682*4882a593Smuzhiyun 	return 0;
1683*4882a593Smuzhiyun 
1684*4882a593Smuzhiyun out_cache:
1685*4882a593Smuzhiyun 	qdio_setup_exit();
1686*4882a593Smuzhiyun out_debug:
1687*4882a593Smuzhiyun 	qdio_debug_exit();
1688*4882a593Smuzhiyun 	return rc;
1689*4882a593Smuzhiyun }
1690*4882a593Smuzhiyun 
exit_QDIO(void)1691*4882a593Smuzhiyun static void __exit exit_QDIO(void)
1692*4882a593Smuzhiyun {
1693*4882a593Smuzhiyun 	qdio_thinint_exit();
1694*4882a593Smuzhiyun 	qdio_setup_exit();
1695*4882a593Smuzhiyun 	qdio_debug_exit();
1696*4882a593Smuzhiyun }
1697*4882a593Smuzhiyun 
1698*4882a593Smuzhiyun module_init(init_QDIO);
1699*4882a593Smuzhiyun module_exit(exit_QDIO);
1700