1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun #ifndef S390_CIO_H
3*4882a593Smuzhiyun #define S390_CIO_H
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun #include <linux/mutex.h>
6*4882a593Smuzhiyun #include <linux/device.h>
7*4882a593Smuzhiyun #include <linux/mod_devicetable.h>
8*4882a593Smuzhiyun #include <asm/chpid.h>
9*4882a593Smuzhiyun #include <asm/cio.h>
10*4882a593Smuzhiyun #include <asm/fcx.h>
11*4882a593Smuzhiyun #include <asm/schid.h>
12*4882a593Smuzhiyun #include "chsc.h"
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun /*
15*4882a593Smuzhiyun * path management control word
16*4882a593Smuzhiyun */
17*4882a593Smuzhiyun struct pmcw {
18*4882a593Smuzhiyun u32 intparm; /* interruption parameter */
19*4882a593Smuzhiyun u32 qf : 1; /* qdio facility */
20*4882a593Smuzhiyun u32 w : 1;
21*4882a593Smuzhiyun u32 isc : 3; /* interruption sublass */
22*4882a593Smuzhiyun u32 res5 : 3; /* reserved zeros */
23*4882a593Smuzhiyun u32 ena : 1; /* enabled */
24*4882a593Smuzhiyun u32 lm : 2; /* limit mode */
25*4882a593Smuzhiyun u32 mme : 2; /* measurement-mode enable */
26*4882a593Smuzhiyun u32 mp : 1; /* multipath mode */
27*4882a593Smuzhiyun u32 tf : 1; /* timing facility */
28*4882a593Smuzhiyun u32 dnv : 1; /* device number valid */
29*4882a593Smuzhiyun u32 dev : 16; /* device number */
30*4882a593Smuzhiyun u8 lpm; /* logical path mask */
31*4882a593Smuzhiyun u8 pnom; /* path not operational mask */
32*4882a593Smuzhiyun u8 lpum; /* last path used mask */
33*4882a593Smuzhiyun u8 pim; /* path installed mask */
34*4882a593Smuzhiyun u16 mbi; /* measurement-block index */
35*4882a593Smuzhiyun u8 pom; /* path operational mask */
36*4882a593Smuzhiyun u8 pam; /* path available mask */
37*4882a593Smuzhiyun u8 chpid[8]; /* CHPID 0-7 (if available) */
38*4882a593Smuzhiyun u32 unused1 : 8; /* reserved zeros */
39*4882a593Smuzhiyun u32 st : 3; /* subchannel type */
40*4882a593Smuzhiyun u32 unused2 : 18; /* reserved zeros */
41*4882a593Smuzhiyun u32 mbfc : 1; /* measurement block format control */
42*4882a593Smuzhiyun u32 xmwme : 1; /* extended measurement word mode enable */
43*4882a593Smuzhiyun u32 csense : 1; /* concurrent sense; can be enabled ...*/
44*4882a593Smuzhiyun /* ... per MSCH, however, if facility */
45*4882a593Smuzhiyun /* ... is not installed, this results */
46*4882a593Smuzhiyun /* ... in an operand exception. */
47*4882a593Smuzhiyun } __attribute__ ((packed));
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun /* I/O-Interruption Code as stored by TEST PENDING INTERRUPTION (TPI). */
50*4882a593Smuzhiyun struct tpi_info {
51*4882a593Smuzhiyun struct subchannel_id schid;
52*4882a593Smuzhiyun u32 intparm;
53*4882a593Smuzhiyun u32 adapter_IO:1;
54*4882a593Smuzhiyun u32 directed_irq:1;
55*4882a593Smuzhiyun u32 isc:3;
56*4882a593Smuzhiyun u32 :27;
57*4882a593Smuzhiyun u32 type:3;
58*4882a593Smuzhiyun u32 :12;
59*4882a593Smuzhiyun } __packed __aligned(4);
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun /* Target SCHIB configuration. */
62*4882a593Smuzhiyun struct schib_config {
63*4882a593Smuzhiyun u64 mba;
64*4882a593Smuzhiyun u32 intparm;
65*4882a593Smuzhiyun u16 mbi;
66*4882a593Smuzhiyun u32 isc:3;
67*4882a593Smuzhiyun u32 ena:1;
68*4882a593Smuzhiyun u32 mme:2;
69*4882a593Smuzhiyun u32 mp:1;
70*4882a593Smuzhiyun u32 csense:1;
71*4882a593Smuzhiyun u32 mbfc:1;
72*4882a593Smuzhiyun } __attribute__ ((packed));
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun /*
75*4882a593Smuzhiyun * subchannel information block
76*4882a593Smuzhiyun */
77*4882a593Smuzhiyun struct schib {
78*4882a593Smuzhiyun struct pmcw pmcw; /* path management control word */
79*4882a593Smuzhiyun union scsw scsw; /* subchannel status word */
80*4882a593Smuzhiyun __u64 mba; /* measurement block address */
81*4882a593Smuzhiyun __u8 mda[4]; /* model dependent area */
82*4882a593Smuzhiyun } __attribute__ ((packed,aligned(4)));
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun /*
85*4882a593Smuzhiyun * When rescheduled, todo's with higher values will overwrite those
86*4882a593Smuzhiyun * with lower values.
87*4882a593Smuzhiyun */
88*4882a593Smuzhiyun enum sch_todo {
89*4882a593Smuzhiyun SCH_TODO_NOTHING,
90*4882a593Smuzhiyun SCH_TODO_EVAL,
91*4882a593Smuzhiyun SCH_TODO_UNREG,
92*4882a593Smuzhiyun };
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun /* subchannel data structure used by I/O subroutines */
95*4882a593Smuzhiyun struct subchannel {
96*4882a593Smuzhiyun struct subchannel_id schid;
97*4882a593Smuzhiyun spinlock_t *lock; /* subchannel lock */
98*4882a593Smuzhiyun struct mutex reg_mutex;
99*4882a593Smuzhiyun enum {
100*4882a593Smuzhiyun SUBCHANNEL_TYPE_IO = 0,
101*4882a593Smuzhiyun SUBCHANNEL_TYPE_CHSC = 1,
102*4882a593Smuzhiyun SUBCHANNEL_TYPE_MSG = 2,
103*4882a593Smuzhiyun SUBCHANNEL_TYPE_ADM = 3,
104*4882a593Smuzhiyun } st; /* subchannel type */
105*4882a593Smuzhiyun __u8 vpm; /* verified path mask */
106*4882a593Smuzhiyun __u8 lpm; /* logical path mask */
107*4882a593Smuzhiyun __u8 opm; /* operational path mask */
108*4882a593Smuzhiyun struct schib schib; /* subchannel information block */
109*4882a593Smuzhiyun int isc; /* desired interruption subclass */
110*4882a593Smuzhiyun struct chsc_ssd_info ssd_info; /* subchannel description */
111*4882a593Smuzhiyun struct device dev; /* entry in device tree */
112*4882a593Smuzhiyun struct css_driver *driver;
113*4882a593Smuzhiyun enum sch_todo todo;
114*4882a593Smuzhiyun struct work_struct todo_work;
115*4882a593Smuzhiyun struct schib_config config;
116*4882a593Smuzhiyun u64 dma_mask;
117*4882a593Smuzhiyun char *driver_override; /* Driver name to force a match */
118*4882a593Smuzhiyun } __attribute__ ((aligned(8)));
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun DECLARE_PER_CPU_ALIGNED(struct irb, cio_irb);
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun #define to_subchannel(n) container_of(n, struct subchannel, dev)
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun extern int cio_enable_subchannel(struct subchannel *, u32);
125*4882a593Smuzhiyun extern int cio_disable_subchannel (struct subchannel *);
126*4882a593Smuzhiyun extern int cio_cancel (struct subchannel *);
127*4882a593Smuzhiyun extern int cio_clear (struct subchannel *);
128*4882a593Smuzhiyun extern int cio_cancel_halt_clear(struct subchannel *, int *);
129*4882a593Smuzhiyun extern int cio_resume (struct subchannel *);
130*4882a593Smuzhiyun extern int cio_halt (struct subchannel *);
131*4882a593Smuzhiyun extern int cio_start (struct subchannel *, struct ccw1 *, __u8);
132*4882a593Smuzhiyun extern int cio_start_key (struct subchannel *, struct ccw1 *, __u8, __u8);
133*4882a593Smuzhiyun extern int cio_set_options (struct subchannel *, int);
134*4882a593Smuzhiyun extern int cio_update_schib(struct subchannel *sch);
135*4882a593Smuzhiyun extern int cio_commit_config(struct subchannel *sch);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun int cio_tm_start_key(struct subchannel *sch, struct tcw *tcw, u8 lpm, u8 key);
138*4882a593Smuzhiyun int cio_tm_intrg(struct subchannel *sch);
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun extern int __init airq_init(void);
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun /* Use with care. */
143*4882a593Smuzhiyun #ifdef CONFIG_CCW_CONSOLE
144*4882a593Smuzhiyun extern struct subchannel *cio_probe_console(void);
145*4882a593Smuzhiyun extern int cio_is_console(struct subchannel_id);
146*4882a593Smuzhiyun extern void cio_register_early_subchannels(void);
147*4882a593Smuzhiyun extern void cio_tsch(struct subchannel *sch);
148*4882a593Smuzhiyun #else
149*4882a593Smuzhiyun #define cio_is_console(schid) 0
cio_register_early_subchannels(void)150*4882a593Smuzhiyun static inline void cio_register_early_subchannels(void) {}
151*4882a593Smuzhiyun #endif
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun #endif
154