1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * drivers/rtc/rtc-vt8500.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Based on rtc-pxa.c
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/rtc.h>
12*4882a593Smuzhiyun #include <linux/init.h>
13*4882a593Smuzhiyun #include <linux/interrupt.h>
14*4882a593Smuzhiyun #include <linux/io.h>
15*4882a593Smuzhiyun #include <linux/bcd.h>
16*4882a593Smuzhiyun #include <linux/platform_device.h>
17*4882a593Smuzhiyun #include <linux/slab.h>
18*4882a593Smuzhiyun #include <linux/of.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun /*
21*4882a593Smuzhiyun * Register definitions
22*4882a593Smuzhiyun */
23*4882a593Smuzhiyun #define VT8500_RTC_TS 0x00 /* Time set */
24*4882a593Smuzhiyun #define VT8500_RTC_DS 0x04 /* Date set */
25*4882a593Smuzhiyun #define VT8500_RTC_AS 0x08 /* Alarm set */
26*4882a593Smuzhiyun #define VT8500_RTC_CR 0x0c /* Control */
27*4882a593Smuzhiyun #define VT8500_RTC_TR 0x10 /* Time read */
28*4882a593Smuzhiyun #define VT8500_RTC_DR 0x14 /* Date read */
29*4882a593Smuzhiyun #define VT8500_RTC_WS 0x18 /* Write status */
30*4882a593Smuzhiyun #define VT8500_RTC_CL 0x20 /* Calibration */
31*4882a593Smuzhiyun #define VT8500_RTC_IS 0x24 /* Interrupt status */
32*4882a593Smuzhiyun #define VT8500_RTC_ST 0x28 /* Status */
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #define INVALID_TIME_BIT (1 << 31)
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun #define DATE_CENTURY_S 19
37*4882a593Smuzhiyun #define DATE_YEAR_S 11
38*4882a593Smuzhiyun #define DATE_YEAR_MASK (0xff << DATE_YEAR_S)
39*4882a593Smuzhiyun #define DATE_MONTH_S 6
40*4882a593Smuzhiyun #define DATE_MONTH_MASK (0x1f << DATE_MONTH_S)
41*4882a593Smuzhiyun #define DATE_DAY_MASK 0x3f
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun #define TIME_DOW_S 20
44*4882a593Smuzhiyun #define TIME_DOW_MASK (0x07 << TIME_DOW_S)
45*4882a593Smuzhiyun #define TIME_HOUR_S 14
46*4882a593Smuzhiyun #define TIME_HOUR_MASK (0x3f << TIME_HOUR_S)
47*4882a593Smuzhiyun #define TIME_MIN_S 7
48*4882a593Smuzhiyun #define TIME_MIN_MASK (0x7f << TIME_MIN_S)
49*4882a593Smuzhiyun #define TIME_SEC_MASK 0x7f
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun #define ALARM_DAY_S 20
52*4882a593Smuzhiyun #define ALARM_DAY_MASK (0x3f << ALARM_DAY_S)
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun #define ALARM_DAY_BIT (1 << 29)
55*4882a593Smuzhiyun #define ALARM_HOUR_BIT (1 << 28)
56*4882a593Smuzhiyun #define ALARM_MIN_BIT (1 << 27)
57*4882a593Smuzhiyun #define ALARM_SEC_BIT (1 << 26)
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun #define ALARM_ENABLE_MASK (ALARM_DAY_BIT \
60*4882a593Smuzhiyun | ALARM_HOUR_BIT \
61*4882a593Smuzhiyun | ALARM_MIN_BIT \
62*4882a593Smuzhiyun | ALARM_SEC_BIT)
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun #define VT8500_RTC_CR_ENABLE (1 << 0) /* Enable RTC */
65*4882a593Smuzhiyun #define VT8500_RTC_CR_12H (1 << 1) /* 12h time format */
66*4882a593Smuzhiyun #define VT8500_RTC_CR_SM_ENABLE (1 << 2) /* Enable periodic irqs */
67*4882a593Smuzhiyun #define VT8500_RTC_CR_SM_SEC (1 << 3) /* 0: 1Hz/60, 1: 1Hz */
68*4882a593Smuzhiyun #define VT8500_RTC_CR_CALIB (1 << 4) /* Enable calibration */
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun #define VT8500_RTC_IS_ALARM (1 << 0) /* Alarm interrupt status */
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun struct vt8500_rtc {
73*4882a593Smuzhiyun void __iomem *regbase;
74*4882a593Smuzhiyun int irq_alarm;
75*4882a593Smuzhiyun struct rtc_device *rtc;
76*4882a593Smuzhiyun spinlock_t lock; /* Protects this structure */
77*4882a593Smuzhiyun };
78*4882a593Smuzhiyun
vt8500_rtc_irq(int irq,void * dev_id)79*4882a593Smuzhiyun static irqreturn_t vt8500_rtc_irq(int irq, void *dev_id)
80*4882a593Smuzhiyun {
81*4882a593Smuzhiyun struct vt8500_rtc *vt8500_rtc = dev_id;
82*4882a593Smuzhiyun u32 isr;
83*4882a593Smuzhiyun unsigned long events = 0;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun spin_lock(&vt8500_rtc->lock);
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun /* clear interrupt sources */
88*4882a593Smuzhiyun isr = readl(vt8500_rtc->regbase + VT8500_RTC_IS);
89*4882a593Smuzhiyun writel(isr, vt8500_rtc->regbase + VT8500_RTC_IS);
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun spin_unlock(&vt8500_rtc->lock);
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun if (isr & VT8500_RTC_IS_ALARM)
94*4882a593Smuzhiyun events |= RTC_AF | RTC_IRQF;
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun rtc_update_irq(vt8500_rtc->rtc, 1, events);
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun return IRQ_HANDLED;
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun
vt8500_rtc_read_time(struct device * dev,struct rtc_time * tm)101*4882a593Smuzhiyun static int vt8500_rtc_read_time(struct device *dev, struct rtc_time *tm)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun struct vt8500_rtc *vt8500_rtc = dev_get_drvdata(dev);
104*4882a593Smuzhiyun u32 date, time;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun date = readl(vt8500_rtc->regbase + VT8500_RTC_DR);
107*4882a593Smuzhiyun time = readl(vt8500_rtc->regbase + VT8500_RTC_TR);
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun tm->tm_sec = bcd2bin(time & TIME_SEC_MASK);
110*4882a593Smuzhiyun tm->tm_min = bcd2bin((time & TIME_MIN_MASK) >> TIME_MIN_S);
111*4882a593Smuzhiyun tm->tm_hour = bcd2bin((time & TIME_HOUR_MASK) >> TIME_HOUR_S);
112*4882a593Smuzhiyun tm->tm_mday = bcd2bin(date & DATE_DAY_MASK);
113*4882a593Smuzhiyun tm->tm_mon = bcd2bin((date & DATE_MONTH_MASK) >> DATE_MONTH_S) - 1;
114*4882a593Smuzhiyun tm->tm_year = bcd2bin((date & DATE_YEAR_MASK) >> DATE_YEAR_S)
115*4882a593Smuzhiyun + ((date >> DATE_CENTURY_S) & 1 ? 200 : 100);
116*4882a593Smuzhiyun tm->tm_wday = (time & TIME_DOW_MASK) >> TIME_DOW_S;
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun return 0;
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun
vt8500_rtc_set_time(struct device * dev,struct rtc_time * tm)121*4882a593Smuzhiyun static int vt8500_rtc_set_time(struct device *dev, struct rtc_time *tm)
122*4882a593Smuzhiyun {
123*4882a593Smuzhiyun struct vt8500_rtc *vt8500_rtc = dev_get_drvdata(dev);
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun writel((bin2bcd(tm->tm_year % 100) << DATE_YEAR_S)
126*4882a593Smuzhiyun | (bin2bcd(tm->tm_mon + 1) << DATE_MONTH_S)
127*4882a593Smuzhiyun | (bin2bcd(tm->tm_mday))
128*4882a593Smuzhiyun | ((tm->tm_year >= 200) << DATE_CENTURY_S),
129*4882a593Smuzhiyun vt8500_rtc->regbase + VT8500_RTC_DS);
130*4882a593Smuzhiyun writel((bin2bcd(tm->tm_wday) << TIME_DOW_S)
131*4882a593Smuzhiyun | (bin2bcd(tm->tm_hour) << TIME_HOUR_S)
132*4882a593Smuzhiyun | (bin2bcd(tm->tm_min) << TIME_MIN_S)
133*4882a593Smuzhiyun | (bin2bcd(tm->tm_sec)),
134*4882a593Smuzhiyun vt8500_rtc->regbase + VT8500_RTC_TS);
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun return 0;
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun
vt8500_rtc_read_alarm(struct device * dev,struct rtc_wkalrm * alrm)139*4882a593Smuzhiyun static int vt8500_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun struct vt8500_rtc *vt8500_rtc = dev_get_drvdata(dev);
142*4882a593Smuzhiyun u32 isr, alarm;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun alarm = readl(vt8500_rtc->regbase + VT8500_RTC_AS);
145*4882a593Smuzhiyun isr = readl(vt8500_rtc->regbase + VT8500_RTC_IS);
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun alrm->time.tm_mday = bcd2bin((alarm & ALARM_DAY_MASK) >> ALARM_DAY_S);
148*4882a593Smuzhiyun alrm->time.tm_hour = bcd2bin((alarm & TIME_HOUR_MASK) >> TIME_HOUR_S);
149*4882a593Smuzhiyun alrm->time.tm_min = bcd2bin((alarm & TIME_MIN_MASK) >> TIME_MIN_S);
150*4882a593Smuzhiyun alrm->time.tm_sec = bcd2bin((alarm & TIME_SEC_MASK));
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun alrm->enabled = (alarm & ALARM_ENABLE_MASK) ? 1 : 0;
153*4882a593Smuzhiyun alrm->pending = (isr & VT8500_RTC_IS_ALARM) ? 1 : 0;
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun return rtc_valid_tm(&alrm->time);
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun
vt8500_rtc_set_alarm(struct device * dev,struct rtc_wkalrm * alrm)158*4882a593Smuzhiyun static int vt8500_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
159*4882a593Smuzhiyun {
160*4882a593Smuzhiyun struct vt8500_rtc *vt8500_rtc = dev_get_drvdata(dev);
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun writel((alrm->enabled ? ALARM_ENABLE_MASK : 0)
163*4882a593Smuzhiyun | (bin2bcd(alrm->time.tm_mday) << ALARM_DAY_S)
164*4882a593Smuzhiyun | (bin2bcd(alrm->time.tm_hour) << TIME_HOUR_S)
165*4882a593Smuzhiyun | (bin2bcd(alrm->time.tm_min) << TIME_MIN_S)
166*4882a593Smuzhiyun | (bin2bcd(alrm->time.tm_sec)),
167*4882a593Smuzhiyun vt8500_rtc->regbase + VT8500_RTC_AS);
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun return 0;
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun
vt8500_alarm_irq_enable(struct device * dev,unsigned int enabled)172*4882a593Smuzhiyun static int vt8500_alarm_irq_enable(struct device *dev, unsigned int enabled)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun struct vt8500_rtc *vt8500_rtc = dev_get_drvdata(dev);
175*4882a593Smuzhiyun unsigned long tmp = readl(vt8500_rtc->regbase + VT8500_RTC_AS);
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun if (enabled)
178*4882a593Smuzhiyun tmp |= ALARM_ENABLE_MASK;
179*4882a593Smuzhiyun else
180*4882a593Smuzhiyun tmp &= ~ALARM_ENABLE_MASK;
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun writel(tmp, vt8500_rtc->regbase + VT8500_RTC_AS);
183*4882a593Smuzhiyun return 0;
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun static const struct rtc_class_ops vt8500_rtc_ops = {
187*4882a593Smuzhiyun .read_time = vt8500_rtc_read_time,
188*4882a593Smuzhiyun .set_time = vt8500_rtc_set_time,
189*4882a593Smuzhiyun .read_alarm = vt8500_rtc_read_alarm,
190*4882a593Smuzhiyun .set_alarm = vt8500_rtc_set_alarm,
191*4882a593Smuzhiyun .alarm_irq_enable = vt8500_alarm_irq_enable,
192*4882a593Smuzhiyun };
193*4882a593Smuzhiyun
vt8500_rtc_probe(struct platform_device * pdev)194*4882a593Smuzhiyun static int vt8500_rtc_probe(struct platform_device *pdev)
195*4882a593Smuzhiyun {
196*4882a593Smuzhiyun struct vt8500_rtc *vt8500_rtc;
197*4882a593Smuzhiyun int ret;
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun vt8500_rtc = devm_kzalloc(&pdev->dev,
200*4882a593Smuzhiyun sizeof(struct vt8500_rtc), GFP_KERNEL);
201*4882a593Smuzhiyun if (!vt8500_rtc)
202*4882a593Smuzhiyun return -ENOMEM;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun spin_lock_init(&vt8500_rtc->lock);
205*4882a593Smuzhiyun platform_set_drvdata(pdev, vt8500_rtc);
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun vt8500_rtc->irq_alarm = platform_get_irq(pdev, 0);
208*4882a593Smuzhiyun if (vt8500_rtc->irq_alarm < 0)
209*4882a593Smuzhiyun return vt8500_rtc->irq_alarm;
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun vt8500_rtc->regbase = devm_platform_ioremap_resource(pdev, 0);
212*4882a593Smuzhiyun if (IS_ERR(vt8500_rtc->regbase))
213*4882a593Smuzhiyun return PTR_ERR(vt8500_rtc->regbase);
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun /* Enable RTC and set it to 24-hour mode */
216*4882a593Smuzhiyun writel(VT8500_RTC_CR_ENABLE,
217*4882a593Smuzhiyun vt8500_rtc->regbase + VT8500_RTC_CR);
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun vt8500_rtc->rtc = devm_rtc_allocate_device(&pdev->dev);
220*4882a593Smuzhiyun if (IS_ERR(vt8500_rtc->rtc))
221*4882a593Smuzhiyun return PTR_ERR(vt8500_rtc->rtc);
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun vt8500_rtc->rtc->ops = &vt8500_rtc_ops;
224*4882a593Smuzhiyun vt8500_rtc->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
225*4882a593Smuzhiyun vt8500_rtc->rtc->range_max = RTC_TIMESTAMP_END_2199;
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun ret = devm_request_irq(&pdev->dev, vt8500_rtc->irq_alarm,
228*4882a593Smuzhiyun vt8500_rtc_irq, 0, "rtc alarm", vt8500_rtc);
229*4882a593Smuzhiyun if (ret < 0) {
230*4882a593Smuzhiyun dev_err(&pdev->dev, "can't get irq %i, err %d\n",
231*4882a593Smuzhiyun vt8500_rtc->irq_alarm, ret);
232*4882a593Smuzhiyun return ret;
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun return rtc_register_device(vt8500_rtc->rtc);
236*4882a593Smuzhiyun }
237*4882a593Smuzhiyun
vt8500_rtc_remove(struct platform_device * pdev)238*4882a593Smuzhiyun static int vt8500_rtc_remove(struct platform_device *pdev)
239*4882a593Smuzhiyun {
240*4882a593Smuzhiyun struct vt8500_rtc *vt8500_rtc = platform_get_drvdata(pdev);
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun /* Disable alarm matching */
243*4882a593Smuzhiyun writel(0, vt8500_rtc->regbase + VT8500_RTC_IS);
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun return 0;
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun static const struct of_device_id wmt_dt_ids[] = {
249*4882a593Smuzhiyun { .compatible = "via,vt8500-rtc", },
250*4882a593Smuzhiyun {}
251*4882a593Smuzhiyun };
252*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, wmt_dt_ids);
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun static struct platform_driver vt8500_rtc_driver = {
255*4882a593Smuzhiyun .probe = vt8500_rtc_probe,
256*4882a593Smuzhiyun .remove = vt8500_rtc_remove,
257*4882a593Smuzhiyun .driver = {
258*4882a593Smuzhiyun .name = "vt8500-rtc",
259*4882a593Smuzhiyun .of_match_table = wmt_dt_ids,
260*4882a593Smuzhiyun },
261*4882a593Smuzhiyun };
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun module_platform_driver(vt8500_rtc_driver);
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun MODULE_AUTHOR("Alexey Charkov <alchark@gmail.com>");
266*4882a593Smuzhiyun MODULE_DESCRIPTION("VIA VT8500 SoC Realtime Clock Driver (RTC)");
267*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
268*4882a593Smuzhiyun MODULE_ALIAS("platform:vt8500-rtc");
269