1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * rtc-tps6586x.c: RTC driver for TI PMIC TPS6586X
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (c) 2012, NVIDIA Corporation.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Author: Laxman Dewangan <ldewangan@nvidia.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or
9*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License as
10*4882a593Smuzhiyun * published by the Free Software Foundation version 2.
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
13*4882a593Smuzhiyun * whether express or implied; without even the implied warranty of
14*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15*4882a593Smuzhiyun * General Public License for more details.
16*4882a593Smuzhiyun *
17*4882a593Smuzhiyun * You should have received a copy of the GNU General Public License
18*4882a593Smuzhiyun * along with this program; if not, write to the Free Software
19*4882a593Smuzhiyun * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
20*4882a593Smuzhiyun * 02111-1307, USA
21*4882a593Smuzhiyun */
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #include <linux/device.h>
24*4882a593Smuzhiyun #include <linux/err.h>
25*4882a593Smuzhiyun #include <linux/init.h>
26*4882a593Smuzhiyun #include <linux/irq.h>
27*4882a593Smuzhiyun #include <linux/kernel.h>
28*4882a593Smuzhiyun #include <linux/mfd/tps6586x.h>
29*4882a593Smuzhiyun #include <linux/module.h>
30*4882a593Smuzhiyun #include <linux/platform_device.h>
31*4882a593Smuzhiyun #include <linux/pm_runtime.h>
32*4882a593Smuzhiyun #include <linux/rtc.h>
33*4882a593Smuzhiyun #include <linux/slab.h>
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #define RTC_CTRL 0xc0
36*4882a593Smuzhiyun #define POR_RESET_N BIT(7)
37*4882a593Smuzhiyun #define OSC_SRC_SEL BIT(6)
38*4882a593Smuzhiyun #define RTC_ENABLE BIT(5) /* enables alarm */
39*4882a593Smuzhiyun #define RTC_BUF_ENABLE BIT(4) /* 32 KHz buffer enable */
40*4882a593Smuzhiyun #define PRE_BYPASS BIT(3) /* 0=1KHz or 1=32KHz updates */
41*4882a593Smuzhiyun #define CL_SEL_MASK (BIT(2)|BIT(1))
42*4882a593Smuzhiyun #define CL_SEL_POS 1
43*4882a593Smuzhiyun #define RTC_ALARM1_HI 0xc1
44*4882a593Smuzhiyun #define RTC_COUNT4 0xc6
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun /* start a PMU RTC access by reading the register prior to the RTC_COUNT4 */
47*4882a593Smuzhiyun #define RTC_COUNT4_DUMMYREAD 0xc5
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun /*only 14-bits width in second*/
50*4882a593Smuzhiyun #define ALM1_VALID_RANGE_IN_SEC 0x3FFF
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun #define TPS6586X_RTC_CL_SEL_1_5PF 0x0
53*4882a593Smuzhiyun #define TPS6586X_RTC_CL_SEL_6_5PF 0x1
54*4882a593Smuzhiyun #define TPS6586X_RTC_CL_SEL_7_5PF 0x2
55*4882a593Smuzhiyun #define TPS6586X_RTC_CL_SEL_12_5PF 0x3
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun struct tps6586x_rtc {
58*4882a593Smuzhiyun struct device *dev;
59*4882a593Smuzhiyun struct rtc_device *rtc;
60*4882a593Smuzhiyun int irq;
61*4882a593Smuzhiyun bool irq_en;
62*4882a593Smuzhiyun };
63*4882a593Smuzhiyun
to_tps6586x_dev(struct device * dev)64*4882a593Smuzhiyun static inline struct device *to_tps6586x_dev(struct device *dev)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun return dev->parent;
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun
tps6586x_rtc_read_time(struct device * dev,struct rtc_time * tm)69*4882a593Smuzhiyun static int tps6586x_rtc_read_time(struct device *dev, struct rtc_time *tm)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun struct device *tps_dev = to_tps6586x_dev(dev);
72*4882a593Smuzhiyun unsigned long long ticks = 0;
73*4882a593Smuzhiyun time64_t seconds;
74*4882a593Smuzhiyun u8 buff[6];
75*4882a593Smuzhiyun int ret;
76*4882a593Smuzhiyun int i;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun ret = tps6586x_reads(tps_dev, RTC_COUNT4_DUMMYREAD, sizeof(buff), buff);
79*4882a593Smuzhiyun if (ret < 0) {
80*4882a593Smuzhiyun dev_err(dev, "read counter failed with err %d\n", ret);
81*4882a593Smuzhiyun return ret;
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun for (i = 1; i < sizeof(buff); i++) {
85*4882a593Smuzhiyun ticks <<= 8;
86*4882a593Smuzhiyun ticks |= buff[i];
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun seconds = ticks >> 10;
90*4882a593Smuzhiyun rtc_time64_to_tm(seconds, tm);
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun return 0;
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
tps6586x_rtc_set_time(struct device * dev,struct rtc_time * tm)95*4882a593Smuzhiyun static int tps6586x_rtc_set_time(struct device *dev, struct rtc_time *tm)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun struct device *tps_dev = to_tps6586x_dev(dev);
98*4882a593Smuzhiyun unsigned long long ticks;
99*4882a593Smuzhiyun time64_t seconds;
100*4882a593Smuzhiyun u8 buff[5];
101*4882a593Smuzhiyun int ret;
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun seconds = rtc_tm_to_time64(tm);
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun ticks = (unsigned long long)seconds << 10;
106*4882a593Smuzhiyun buff[0] = (ticks >> 32) & 0xff;
107*4882a593Smuzhiyun buff[1] = (ticks >> 24) & 0xff;
108*4882a593Smuzhiyun buff[2] = (ticks >> 16) & 0xff;
109*4882a593Smuzhiyun buff[3] = (ticks >> 8) & 0xff;
110*4882a593Smuzhiyun buff[4] = ticks & 0xff;
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun /* Disable RTC before changing time */
113*4882a593Smuzhiyun ret = tps6586x_clr_bits(tps_dev, RTC_CTRL, RTC_ENABLE);
114*4882a593Smuzhiyun if (ret < 0) {
115*4882a593Smuzhiyun dev_err(dev, "failed to clear RTC_ENABLE\n");
116*4882a593Smuzhiyun return ret;
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun ret = tps6586x_writes(tps_dev, RTC_COUNT4, sizeof(buff), buff);
120*4882a593Smuzhiyun if (ret < 0) {
121*4882a593Smuzhiyun dev_err(dev, "failed to program new time\n");
122*4882a593Smuzhiyun return ret;
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun /* Enable RTC */
126*4882a593Smuzhiyun ret = tps6586x_set_bits(tps_dev, RTC_CTRL, RTC_ENABLE);
127*4882a593Smuzhiyun if (ret < 0) {
128*4882a593Smuzhiyun dev_err(dev, "failed to set RTC_ENABLE\n");
129*4882a593Smuzhiyun return ret;
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun return 0;
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun
tps6586x_rtc_alarm_irq_enable(struct device * dev,unsigned int enabled)134*4882a593Smuzhiyun static int tps6586x_rtc_alarm_irq_enable(struct device *dev,
135*4882a593Smuzhiyun unsigned int enabled)
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun struct tps6586x_rtc *rtc = dev_get_drvdata(dev);
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun if (enabled && !rtc->irq_en) {
140*4882a593Smuzhiyun enable_irq(rtc->irq);
141*4882a593Smuzhiyun rtc->irq_en = true;
142*4882a593Smuzhiyun } else if (!enabled && rtc->irq_en) {
143*4882a593Smuzhiyun disable_irq(rtc->irq);
144*4882a593Smuzhiyun rtc->irq_en = false;
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun return 0;
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun
tps6586x_rtc_set_alarm(struct device * dev,struct rtc_wkalrm * alrm)149*4882a593Smuzhiyun static int tps6586x_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
150*4882a593Smuzhiyun {
151*4882a593Smuzhiyun struct device *tps_dev = to_tps6586x_dev(dev);
152*4882a593Smuzhiyun time64_t seconds;
153*4882a593Smuzhiyun unsigned long ticks;
154*4882a593Smuzhiyun unsigned long rtc_current_time;
155*4882a593Smuzhiyun unsigned long long rticks = 0;
156*4882a593Smuzhiyun u8 buff[3];
157*4882a593Smuzhiyun u8 rbuff[6];
158*4882a593Smuzhiyun int ret;
159*4882a593Smuzhiyun int i;
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun seconds = rtc_tm_to_time64(&alrm->time);
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun ret = tps6586x_rtc_alarm_irq_enable(dev, alrm->enabled);
164*4882a593Smuzhiyun if (ret < 0) {
165*4882a593Smuzhiyun dev_err(dev, "can't set alarm irq, err %d\n", ret);
166*4882a593Smuzhiyun return ret;
167*4882a593Smuzhiyun }
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun ret = tps6586x_reads(tps_dev, RTC_COUNT4_DUMMYREAD,
170*4882a593Smuzhiyun sizeof(rbuff), rbuff);
171*4882a593Smuzhiyun if (ret < 0) {
172*4882a593Smuzhiyun dev_err(dev, "read counter failed with err %d\n", ret);
173*4882a593Smuzhiyun return ret;
174*4882a593Smuzhiyun }
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun for (i = 1; i < sizeof(rbuff); i++) {
177*4882a593Smuzhiyun rticks <<= 8;
178*4882a593Smuzhiyun rticks |= rbuff[i];
179*4882a593Smuzhiyun }
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun rtc_current_time = rticks >> 10;
182*4882a593Smuzhiyun if ((seconds - rtc_current_time) > ALM1_VALID_RANGE_IN_SEC)
183*4882a593Smuzhiyun seconds = rtc_current_time - 1;
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun ticks = (unsigned long long)seconds << 10;
186*4882a593Smuzhiyun buff[0] = (ticks >> 16) & 0xff;
187*4882a593Smuzhiyun buff[1] = (ticks >> 8) & 0xff;
188*4882a593Smuzhiyun buff[2] = ticks & 0xff;
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun ret = tps6586x_writes(tps_dev, RTC_ALARM1_HI, sizeof(buff), buff);
191*4882a593Smuzhiyun if (ret)
192*4882a593Smuzhiyun dev_err(dev, "programming alarm failed with err %d\n", ret);
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun return ret;
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun
tps6586x_rtc_read_alarm(struct device * dev,struct rtc_wkalrm * alrm)197*4882a593Smuzhiyun static int tps6586x_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
198*4882a593Smuzhiyun {
199*4882a593Smuzhiyun struct device *tps_dev = to_tps6586x_dev(dev);
200*4882a593Smuzhiyun unsigned long ticks;
201*4882a593Smuzhiyun time64_t seconds;
202*4882a593Smuzhiyun u8 buff[3];
203*4882a593Smuzhiyun int ret;
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun ret = tps6586x_reads(tps_dev, RTC_ALARM1_HI, sizeof(buff), buff);
206*4882a593Smuzhiyun if (ret) {
207*4882a593Smuzhiyun dev_err(dev, "read RTC_ALARM1_HI failed with err %d\n", ret);
208*4882a593Smuzhiyun return ret;
209*4882a593Smuzhiyun }
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun ticks = (buff[0] << 16) | (buff[1] << 8) | buff[2];
212*4882a593Smuzhiyun seconds = ticks >> 10;
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun rtc_time64_to_tm(seconds, &alrm->time);
215*4882a593Smuzhiyun return 0;
216*4882a593Smuzhiyun }
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun static const struct rtc_class_ops tps6586x_rtc_ops = {
219*4882a593Smuzhiyun .read_time = tps6586x_rtc_read_time,
220*4882a593Smuzhiyun .set_time = tps6586x_rtc_set_time,
221*4882a593Smuzhiyun .set_alarm = tps6586x_rtc_set_alarm,
222*4882a593Smuzhiyun .read_alarm = tps6586x_rtc_read_alarm,
223*4882a593Smuzhiyun .alarm_irq_enable = tps6586x_rtc_alarm_irq_enable,
224*4882a593Smuzhiyun };
225*4882a593Smuzhiyun
tps6586x_rtc_irq(int irq,void * data)226*4882a593Smuzhiyun static irqreturn_t tps6586x_rtc_irq(int irq, void *data)
227*4882a593Smuzhiyun {
228*4882a593Smuzhiyun struct tps6586x_rtc *rtc = data;
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun rtc_update_irq(rtc->rtc, 1, RTC_IRQF | RTC_AF);
231*4882a593Smuzhiyun return IRQ_HANDLED;
232*4882a593Smuzhiyun }
233*4882a593Smuzhiyun
tps6586x_rtc_probe(struct platform_device * pdev)234*4882a593Smuzhiyun static int tps6586x_rtc_probe(struct platform_device *pdev)
235*4882a593Smuzhiyun {
236*4882a593Smuzhiyun struct device *tps_dev = to_tps6586x_dev(&pdev->dev);
237*4882a593Smuzhiyun struct tps6586x_rtc *rtc;
238*4882a593Smuzhiyun int ret;
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
241*4882a593Smuzhiyun if (!rtc)
242*4882a593Smuzhiyun return -ENOMEM;
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun rtc->dev = &pdev->dev;
245*4882a593Smuzhiyun rtc->irq = platform_get_irq(pdev, 0);
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun /* 1 kHz tick mode, enable tick counting */
248*4882a593Smuzhiyun ret = tps6586x_update(tps_dev, RTC_CTRL,
249*4882a593Smuzhiyun RTC_ENABLE | OSC_SRC_SEL |
250*4882a593Smuzhiyun ((TPS6586X_RTC_CL_SEL_1_5PF << CL_SEL_POS) & CL_SEL_MASK),
251*4882a593Smuzhiyun RTC_ENABLE | OSC_SRC_SEL | PRE_BYPASS | CL_SEL_MASK);
252*4882a593Smuzhiyun if (ret < 0) {
253*4882a593Smuzhiyun dev_err(&pdev->dev, "unable to start counter\n");
254*4882a593Smuzhiyun return ret;
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun device_init_wakeup(&pdev->dev, 1);
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun platform_set_drvdata(pdev, rtc);
260*4882a593Smuzhiyun rtc->rtc = devm_rtc_allocate_device(&pdev->dev);
261*4882a593Smuzhiyun if (IS_ERR(rtc->rtc)) {
262*4882a593Smuzhiyun ret = PTR_ERR(rtc->rtc);
263*4882a593Smuzhiyun goto fail_rtc_register;
264*4882a593Smuzhiyun }
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun rtc->rtc->ops = &tps6586x_rtc_ops;
267*4882a593Smuzhiyun rtc->rtc->range_max = (1ULL << 30) - 1; /* 30-bit seconds */
268*4882a593Smuzhiyun rtc->rtc->start_secs = mktime64(2009, 1, 1, 0, 0, 0);
269*4882a593Smuzhiyun rtc->rtc->set_start_time = true;
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun irq_set_status_flags(rtc->irq, IRQ_NOAUTOEN);
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
274*4882a593Smuzhiyun tps6586x_rtc_irq,
275*4882a593Smuzhiyun IRQF_ONESHOT,
276*4882a593Smuzhiyun dev_name(&pdev->dev), rtc);
277*4882a593Smuzhiyun if (ret < 0) {
278*4882a593Smuzhiyun dev_err(&pdev->dev, "request IRQ(%d) failed with ret %d\n",
279*4882a593Smuzhiyun rtc->irq, ret);
280*4882a593Smuzhiyun goto fail_rtc_register;
281*4882a593Smuzhiyun }
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun ret = rtc_register_device(rtc->rtc);
284*4882a593Smuzhiyun if (ret)
285*4882a593Smuzhiyun goto fail_rtc_register;
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun return 0;
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun fail_rtc_register:
290*4882a593Smuzhiyun tps6586x_update(tps_dev, RTC_CTRL, 0,
291*4882a593Smuzhiyun RTC_ENABLE | OSC_SRC_SEL | PRE_BYPASS | CL_SEL_MASK);
292*4882a593Smuzhiyun return ret;
293*4882a593Smuzhiyun };
294*4882a593Smuzhiyun
tps6586x_rtc_remove(struct platform_device * pdev)295*4882a593Smuzhiyun static int tps6586x_rtc_remove(struct platform_device *pdev)
296*4882a593Smuzhiyun {
297*4882a593Smuzhiyun struct device *tps_dev = to_tps6586x_dev(&pdev->dev);
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun tps6586x_update(tps_dev, RTC_CTRL, 0,
300*4882a593Smuzhiyun RTC_ENABLE | OSC_SRC_SEL | PRE_BYPASS | CL_SEL_MASK);
301*4882a593Smuzhiyun return 0;
302*4882a593Smuzhiyun }
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
tps6586x_rtc_suspend(struct device * dev)305*4882a593Smuzhiyun static int tps6586x_rtc_suspend(struct device *dev)
306*4882a593Smuzhiyun {
307*4882a593Smuzhiyun struct tps6586x_rtc *rtc = dev_get_drvdata(dev);
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun if (device_may_wakeup(dev))
310*4882a593Smuzhiyun enable_irq_wake(rtc->irq);
311*4882a593Smuzhiyun return 0;
312*4882a593Smuzhiyun }
313*4882a593Smuzhiyun
tps6586x_rtc_resume(struct device * dev)314*4882a593Smuzhiyun static int tps6586x_rtc_resume(struct device *dev)
315*4882a593Smuzhiyun {
316*4882a593Smuzhiyun struct tps6586x_rtc *rtc = dev_get_drvdata(dev);
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun if (device_may_wakeup(dev))
319*4882a593Smuzhiyun disable_irq_wake(rtc->irq);
320*4882a593Smuzhiyun return 0;
321*4882a593Smuzhiyun }
322*4882a593Smuzhiyun #endif
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(tps6586x_pm_ops, tps6586x_rtc_suspend,
325*4882a593Smuzhiyun tps6586x_rtc_resume);
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun static struct platform_driver tps6586x_rtc_driver = {
328*4882a593Smuzhiyun .driver = {
329*4882a593Smuzhiyun .name = "tps6586x-rtc",
330*4882a593Smuzhiyun .pm = &tps6586x_pm_ops,
331*4882a593Smuzhiyun },
332*4882a593Smuzhiyun .probe = tps6586x_rtc_probe,
333*4882a593Smuzhiyun .remove = tps6586x_rtc_remove,
334*4882a593Smuzhiyun };
335*4882a593Smuzhiyun module_platform_driver(tps6586x_rtc_driver);
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun MODULE_ALIAS("platform:tps6586x-rtc");
338*4882a593Smuzhiyun MODULE_DESCRIPTION("TI TPS6586x RTC driver");
339*4882a593Smuzhiyun MODULE_AUTHOR("Laxman dewangan <ldewangan@nvidia.com>");
340*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
341