xref: /OK3568_Linux_fs/kernel/drivers/rtc/rtc-stk17ta8.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * A RTC driver for the Simtek STK17TA8
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * By Thomas Hommel <thomas.hommel@ge.com>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Based on the DS1553 driver from
8*4882a593Smuzhiyun  * Atsushi Nemoto <anemo@mba.ocn.ne.jp>
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include <linux/bcd.h>
12*4882a593Smuzhiyun #include <linux/init.h>
13*4882a593Smuzhiyun #include <linux/kernel.h>
14*4882a593Smuzhiyun #include <linux/gfp.h>
15*4882a593Smuzhiyun #include <linux/delay.h>
16*4882a593Smuzhiyun #include <linux/jiffies.h>
17*4882a593Smuzhiyun #include <linux/interrupt.h>
18*4882a593Smuzhiyun #include <linux/rtc.h>
19*4882a593Smuzhiyun #include <linux/platform_device.h>
20*4882a593Smuzhiyun #include <linux/io.h>
21*4882a593Smuzhiyun #include <linux/module.h>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #define RTC_REG_SIZE		0x20000
24*4882a593Smuzhiyun #define RTC_OFFSET		0x1fff0
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #define RTC_FLAGS		(RTC_OFFSET + 0)
27*4882a593Smuzhiyun #define RTC_CENTURY		(RTC_OFFSET + 1)
28*4882a593Smuzhiyun #define RTC_SECONDS_ALARM	(RTC_OFFSET + 2)
29*4882a593Smuzhiyun #define RTC_MINUTES_ALARM	(RTC_OFFSET + 3)
30*4882a593Smuzhiyun #define RTC_HOURS_ALARM		(RTC_OFFSET + 4)
31*4882a593Smuzhiyun #define RTC_DATE_ALARM		(RTC_OFFSET + 5)
32*4882a593Smuzhiyun #define RTC_INTERRUPTS		(RTC_OFFSET + 6)
33*4882a593Smuzhiyun #define RTC_WATCHDOG		(RTC_OFFSET + 7)
34*4882a593Smuzhiyun #define RTC_CALIBRATION		(RTC_OFFSET + 8)
35*4882a593Smuzhiyun #define RTC_SECONDS		(RTC_OFFSET + 9)
36*4882a593Smuzhiyun #define RTC_MINUTES		(RTC_OFFSET + 10)
37*4882a593Smuzhiyun #define RTC_HOURS		(RTC_OFFSET + 11)
38*4882a593Smuzhiyun #define RTC_DAY			(RTC_OFFSET + 12)
39*4882a593Smuzhiyun #define RTC_DATE		(RTC_OFFSET + 13)
40*4882a593Smuzhiyun #define RTC_MONTH		(RTC_OFFSET + 14)
41*4882a593Smuzhiyun #define RTC_YEAR		(RTC_OFFSET + 15)
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun #define RTC_SECONDS_MASK	0x7f
44*4882a593Smuzhiyun #define RTC_DAY_MASK		0x07
45*4882a593Smuzhiyun #define RTC_CAL_MASK		0x3f
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun /* Bits in the Calibration register */
48*4882a593Smuzhiyun #define RTC_STOP		0x80
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun /* Bits in the Flags register */
51*4882a593Smuzhiyun #define RTC_FLAGS_AF		0x40
52*4882a593Smuzhiyun #define RTC_FLAGS_PF		0x20
53*4882a593Smuzhiyun #define RTC_WRITE		0x02
54*4882a593Smuzhiyun #define RTC_READ		0x01
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun /* Bits in the Interrupts register */
57*4882a593Smuzhiyun #define RTC_INTS_AIE		0x40
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun struct rtc_plat_data {
60*4882a593Smuzhiyun 	struct rtc_device *rtc;
61*4882a593Smuzhiyun 	void __iomem *ioaddr;
62*4882a593Smuzhiyun 	unsigned long last_jiffies;
63*4882a593Smuzhiyun 	int irq;
64*4882a593Smuzhiyun 	unsigned int irqen;
65*4882a593Smuzhiyun 	int alrm_sec;
66*4882a593Smuzhiyun 	int alrm_min;
67*4882a593Smuzhiyun 	int alrm_hour;
68*4882a593Smuzhiyun 	int alrm_mday;
69*4882a593Smuzhiyun 	spinlock_t lock;
70*4882a593Smuzhiyun };
71*4882a593Smuzhiyun 
stk17ta8_rtc_set_time(struct device * dev,struct rtc_time * tm)72*4882a593Smuzhiyun static int stk17ta8_rtc_set_time(struct device *dev, struct rtc_time *tm)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun 	struct rtc_plat_data *pdata = dev_get_drvdata(dev);
75*4882a593Smuzhiyun 	void __iomem *ioaddr = pdata->ioaddr;
76*4882a593Smuzhiyun 	u8 flags;
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 	flags = readb(pdata->ioaddr + RTC_FLAGS);
79*4882a593Smuzhiyun 	writeb(flags | RTC_WRITE, pdata->ioaddr + RTC_FLAGS);
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun 	writeb(bin2bcd(tm->tm_year % 100), ioaddr + RTC_YEAR);
82*4882a593Smuzhiyun 	writeb(bin2bcd(tm->tm_mon + 1), ioaddr + RTC_MONTH);
83*4882a593Smuzhiyun 	writeb(bin2bcd(tm->tm_wday) & RTC_DAY_MASK, ioaddr + RTC_DAY);
84*4882a593Smuzhiyun 	writeb(bin2bcd(tm->tm_mday), ioaddr + RTC_DATE);
85*4882a593Smuzhiyun 	writeb(bin2bcd(tm->tm_hour), ioaddr + RTC_HOURS);
86*4882a593Smuzhiyun 	writeb(bin2bcd(tm->tm_min), ioaddr + RTC_MINUTES);
87*4882a593Smuzhiyun 	writeb(bin2bcd(tm->tm_sec) & RTC_SECONDS_MASK, ioaddr + RTC_SECONDS);
88*4882a593Smuzhiyun 	writeb(bin2bcd((tm->tm_year + 1900) / 100), ioaddr + RTC_CENTURY);
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 	writeb(flags & ~RTC_WRITE, pdata->ioaddr + RTC_FLAGS);
91*4882a593Smuzhiyun 	return 0;
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun 
stk17ta8_rtc_read_time(struct device * dev,struct rtc_time * tm)94*4882a593Smuzhiyun static int stk17ta8_rtc_read_time(struct device *dev, struct rtc_time *tm)
95*4882a593Smuzhiyun {
96*4882a593Smuzhiyun 	struct rtc_plat_data *pdata = dev_get_drvdata(dev);
97*4882a593Smuzhiyun 	void __iomem *ioaddr = pdata->ioaddr;
98*4882a593Smuzhiyun 	unsigned int year, month, day, hour, minute, second, week;
99*4882a593Smuzhiyun 	unsigned int century;
100*4882a593Smuzhiyun 	u8 flags;
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	/* give enough time to update RTC in case of continuous read */
103*4882a593Smuzhiyun 	if (pdata->last_jiffies == jiffies)
104*4882a593Smuzhiyun 		msleep(1);
105*4882a593Smuzhiyun 	pdata->last_jiffies = jiffies;
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun 	flags = readb(pdata->ioaddr + RTC_FLAGS);
108*4882a593Smuzhiyun 	writeb(flags | RTC_READ, ioaddr + RTC_FLAGS);
109*4882a593Smuzhiyun 	second = readb(ioaddr + RTC_SECONDS) & RTC_SECONDS_MASK;
110*4882a593Smuzhiyun 	minute = readb(ioaddr + RTC_MINUTES);
111*4882a593Smuzhiyun 	hour = readb(ioaddr + RTC_HOURS);
112*4882a593Smuzhiyun 	day = readb(ioaddr + RTC_DATE);
113*4882a593Smuzhiyun 	week = readb(ioaddr + RTC_DAY) & RTC_DAY_MASK;
114*4882a593Smuzhiyun 	month = readb(ioaddr + RTC_MONTH);
115*4882a593Smuzhiyun 	year = readb(ioaddr + RTC_YEAR);
116*4882a593Smuzhiyun 	century = readb(ioaddr + RTC_CENTURY);
117*4882a593Smuzhiyun 	writeb(flags & ~RTC_READ, ioaddr + RTC_FLAGS);
118*4882a593Smuzhiyun 	tm->tm_sec = bcd2bin(second);
119*4882a593Smuzhiyun 	tm->tm_min = bcd2bin(minute);
120*4882a593Smuzhiyun 	tm->tm_hour = bcd2bin(hour);
121*4882a593Smuzhiyun 	tm->tm_mday = bcd2bin(day);
122*4882a593Smuzhiyun 	tm->tm_wday = bcd2bin(week);
123*4882a593Smuzhiyun 	tm->tm_mon = bcd2bin(month) - 1;
124*4882a593Smuzhiyun 	/* year is 1900 + tm->tm_year */
125*4882a593Smuzhiyun 	tm->tm_year = bcd2bin(year) + bcd2bin(century) * 100 - 1900;
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	return 0;
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun 
stk17ta8_rtc_update_alarm(struct rtc_plat_data * pdata)130*4882a593Smuzhiyun static void stk17ta8_rtc_update_alarm(struct rtc_plat_data *pdata)
131*4882a593Smuzhiyun {
132*4882a593Smuzhiyun 	void __iomem *ioaddr = pdata->ioaddr;
133*4882a593Smuzhiyun 	unsigned long irqflags;
134*4882a593Smuzhiyun 	u8 flags;
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 	spin_lock_irqsave(&pdata->lock, irqflags);
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 	flags = readb(ioaddr + RTC_FLAGS);
139*4882a593Smuzhiyun 	writeb(flags | RTC_WRITE, ioaddr + RTC_FLAGS);
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun 	writeb(pdata->alrm_mday < 0 || (pdata->irqen & RTC_UF) ?
142*4882a593Smuzhiyun 	       0x80 : bin2bcd(pdata->alrm_mday),
143*4882a593Smuzhiyun 	       ioaddr + RTC_DATE_ALARM);
144*4882a593Smuzhiyun 	writeb(pdata->alrm_hour < 0 || (pdata->irqen & RTC_UF) ?
145*4882a593Smuzhiyun 	       0x80 : bin2bcd(pdata->alrm_hour),
146*4882a593Smuzhiyun 	       ioaddr + RTC_HOURS_ALARM);
147*4882a593Smuzhiyun 	writeb(pdata->alrm_min < 0 || (pdata->irqen & RTC_UF) ?
148*4882a593Smuzhiyun 	       0x80 : bin2bcd(pdata->alrm_min),
149*4882a593Smuzhiyun 	       ioaddr + RTC_MINUTES_ALARM);
150*4882a593Smuzhiyun 	writeb(pdata->alrm_sec < 0 || (pdata->irqen & RTC_UF) ?
151*4882a593Smuzhiyun 	       0x80 : bin2bcd(pdata->alrm_sec),
152*4882a593Smuzhiyun 	       ioaddr + RTC_SECONDS_ALARM);
153*4882a593Smuzhiyun 	writeb(pdata->irqen ? RTC_INTS_AIE : 0, ioaddr + RTC_INTERRUPTS);
154*4882a593Smuzhiyun 	readb(ioaddr + RTC_FLAGS);	/* clear interrupts */
155*4882a593Smuzhiyun 	writeb(flags & ~RTC_WRITE, ioaddr + RTC_FLAGS);
156*4882a593Smuzhiyun 	spin_unlock_irqrestore(&pdata->lock, irqflags);
157*4882a593Smuzhiyun }
158*4882a593Smuzhiyun 
stk17ta8_rtc_set_alarm(struct device * dev,struct rtc_wkalrm * alrm)159*4882a593Smuzhiyun static int stk17ta8_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
160*4882a593Smuzhiyun {
161*4882a593Smuzhiyun 	struct rtc_plat_data *pdata = dev_get_drvdata(dev);
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	if (pdata->irq <= 0)
164*4882a593Smuzhiyun 		return -EINVAL;
165*4882a593Smuzhiyun 	pdata->alrm_mday = alrm->time.tm_mday;
166*4882a593Smuzhiyun 	pdata->alrm_hour = alrm->time.tm_hour;
167*4882a593Smuzhiyun 	pdata->alrm_min = alrm->time.tm_min;
168*4882a593Smuzhiyun 	pdata->alrm_sec = alrm->time.tm_sec;
169*4882a593Smuzhiyun 	if (alrm->enabled)
170*4882a593Smuzhiyun 		pdata->irqen |= RTC_AF;
171*4882a593Smuzhiyun 	stk17ta8_rtc_update_alarm(pdata);
172*4882a593Smuzhiyun 	return 0;
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun 
stk17ta8_rtc_read_alarm(struct device * dev,struct rtc_wkalrm * alrm)175*4882a593Smuzhiyun static int stk17ta8_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
176*4882a593Smuzhiyun {
177*4882a593Smuzhiyun 	struct rtc_plat_data *pdata = dev_get_drvdata(dev);
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun 	if (pdata->irq <= 0)
180*4882a593Smuzhiyun 		return -EINVAL;
181*4882a593Smuzhiyun 	alrm->time.tm_mday = pdata->alrm_mday < 0 ? 0 : pdata->alrm_mday;
182*4882a593Smuzhiyun 	alrm->time.tm_hour = pdata->alrm_hour < 0 ? 0 : pdata->alrm_hour;
183*4882a593Smuzhiyun 	alrm->time.tm_min = pdata->alrm_min < 0 ? 0 : pdata->alrm_min;
184*4882a593Smuzhiyun 	alrm->time.tm_sec = pdata->alrm_sec < 0 ? 0 : pdata->alrm_sec;
185*4882a593Smuzhiyun 	alrm->enabled = (pdata->irqen & RTC_AF) ? 1 : 0;
186*4882a593Smuzhiyun 	return 0;
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun 
stk17ta8_rtc_interrupt(int irq,void * dev_id)189*4882a593Smuzhiyun static irqreturn_t stk17ta8_rtc_interrupt(int irq, void *dev_id)
190*4882a593Smuzhiyun {
191*4882a593Smuzhiyun 	struct platform_device *pdev = dev_id;
192*4882a593Smuzhiyun 	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
193*4882a593Smuzhiyun 	void __iomem *ioaddr = pdata->ioaddr;
194*4882a593Smuzhiyun 	unsigned long events = 0;
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun 	spin_lock(&pdata->lock);
197*4882a593Smuzhiyun 	/* read and clear interrupt */
198*4882a593Smuzhiyun 	if (readb(ioaddr + RTC_FLAGS) & RTC_FLAGS_AF) {
199*4882a593Smuzhiyun 		events = RTC_IRQF;
200*4882a593Smuzhiyun 		if (readb(ioaddr + RTC_SECONDS_ALARM) & 0x80)
201*4882a593Smuzhiyun 			events |= RTC_UF;
202*4882a593Smuzhiyun 		else
203*4882a593Smuzhiyun 			events |= RTC_AF;
204*4882a593Smuzhiyun 		rtc_update_irq(pdata->rtc, 1, events);
205*4882a593Smuzhiyun 	}
206*4882a593Smuzhiyun 	spin_unlock(&pdata->lock);
207*4882a593Smuzhiyun 	return events ? IRQ_HANDLED : IRQ_NONE;
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun 
stk17ta8_rtc_alarm_irq_enable(struct device * dev,unsigned int enabled)210*4882a593Smuzhiyun static int stk17ta8_rtc_alarm_irq_enable(struct device *dev,
211*4882a593Smuzhiyun 	unsigned int enabled)
212*4882a593Smuzhiyun {
213*4882a593Smuzhiyun 	struct rtc_plat_data *pdata = dev_get_drvdata(dev);
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 	if (pdata->irq <= 0)
216*4882a593Smuzhiyun 		return -EINVAL;
217*4882a593Smuzhiyun 	if (enabled)
218*4882a593Smuzhiyun 		pdata->irqen |= RTC_AF;
219*4882a593Smuzhiyun 	else
220*4882a593Smuzhiyun 		pdata->irqen &= ~RTC_AF;
221*4882a593Smuzhiyun 	stk17ta8_rtc_update_alarm(pdata);
222*4882a593Smuzhiyun 	return 0;
223*4882a593Smuzhiyun }
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun static const struct rtc_class_ops stk17ta8_rtc_ops = {
226*4882a593Smuzhiyun 	.read_time		= stk17ta8_rtc_read_time,
227*4882a593Smuzhiyun 	.set_time		= stk17ta8_rtc_set_time,
228*4882a593Smuzhiyun 	.read_alarm		= stk17ta8_rtc_read_alarm,
229*4882a593Smuzhiyun 	.set_alarm		= stk17ta8_rtc_set_alarm,
230*4882a593Smuzhiyun 	.alarm_irq_enable	= stk17ta8_rtc_alarm_irq_enable,
231*4882a593Smuzhiyun };
232*4882a593Smuzhiyun 
stk17ta8_nvram_read(void * priv,unsigned int pos,void * val,size_t bytes)233*4882a593Smuzhiyun static int stk17ta8_nvram_read(void *priv, unsigned int pos, void *val,
234*4882a593Smuzhiyun 			       size_t bytes)
235*4882a593Smuzhiyun {
236*4882a593Smuzhiyun 	struct rtc_plat_data *pdata = priv;
237*4882a593Smuzhiyun 	void __iomem *ioaddr = pdata->ioaddr;
238*4882a593Smuzhiyun 	u8 *buf = val;
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun 	for (; bytes; bytes--)
241*4882a593Smuzhiyun 		*buf++ = readb(ioaddr + pos++);
242*4882a593Smuzhiyun 	return 0;
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun 
stk17ta8_nvram_write(void * priv,unsigned int pos,void * val,size_t bytes)245*4882a593Smuzhiyun static int stk17ta8_nvram_write(void *priv, unsigned int pos, void *val,
246*4882a593Smuzhiyun 				size_t bytes)
247*4882a593Smuzhiyun {
248*4882a593Smuzhiyun 	struct rtc_plat_data *pdata = priv;
249*4882a593Smuzhiyun 	void __iomem *ioaddr = pdata->ioaddr;
250*4882a593Smuzhiyun 	u8 *buf = val;
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun 	for (; bytes; bytes--)
253*4882a593Smuzhiyun 		writeb(*buf++, ioaddr + pos++);
254*4882a593Smuzhiyun 	return 0;
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun 
stk17ta8_rtc_probe(struct platform_device * pdev)257*4882a593Smuzhiyun static int stk17ta8_rtc_probe(struct platform_device *pdev)
258*4882a593Smuzhiyun {
259*4882a593Smuzhiyun 	unsigned int cal;
260*4882a593Smuzhiyun 	unsigned int flags;
261*4882a593Smuzhiyun 	struct rtc_plat_data *pdata;
262*4882a593Smuzhiyun 	void __iomem *ioaddr;
263*4882a593Smuzhiyun 	int ret = 0;
264*4882a593Smuzhiyun 	struct nvmem_config nvmem_cfg = {
265*4882a593Smuzhiyun 		.name = "stk17ta8_nvram",
266*4882a593Smuzhiyun 		.word_size = 1,
267*4882a593Smuzhiyun 		.stride = 1,
268*4882a593Smuzhiyun 		.size = RTC_OFFSET,
269*4882a593Smuzhiyun 		.reg_read = stk17ta8_nvram_read,
270*4882a593Smuzhiyun 		.reg_write = stk17ta8_nvram_write,
271*4882a593Smuzhiyun 	};
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun 	pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
274*4882a593Smuzhiyun 	if (!pdata)
275*4882a593Smuzhiyun 		return -ENOMEM;
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun 	ioaddr = devm_platform_ioremap_resource(pdev, 0);
278*4882a593Smuzhiyun 	if (IS_ERR(ioaddr))
279*4882a593Smuzhiyun 		return PTR_ERR(ioaddr);
280*4882a593Smuzhiyun 	pdata->ioaddr = ioaddr;
281*4882a593Smuzhiyun 	pdata->irq = platform_get_irq(pdev, 0);
282*4882a593Smuzhiyun 
283*4882a593Smuzhiyun 	/* turn RTC on if it was not on */
284*4882a593Smuzhiyun 	cal = readb(ioaddr + RTC_CALIBRATION);
285*4882a593Smuzhiyun 	if (cal & RTC_STOP) {
286*4882a593Smuzhiyun 		cal &= RTC_CAL_MASK;
287*4882a593Smuzhiyun 		flags = readb(ioaddr + RTC_FLAGS);
288*4882a593Smuzhiyun 		writeb(flags | RTC_WRITE, ioaddr + RTC_FLAGS);
289*4882a593Smuzhiyun 		writeb(cal, ioaddr + RTC_CALIBRATION);
290*4882a593Smuzhiyun 		writeb(flags & ~RTC_WRITE, ioaddr + RTC_FLAGS);
291*4882a593Smuzhiyun 	}
292*4882a593Smuzhiyun 	if (readb(ioaddr + RTC_FLAGS) & RTC_FLAGS_PF)
293*4882a593Smuzhiyun 		dev_warn(&pdev->dev, "voltage-low detected.\n");
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	spin_lock_init(&pdata->lock);
296*4882a593Smuzhiyun 	pdata->last_jiffies = jiffies;
297*4882a593Smuzhiyun 	platform_set_drvdata(pdev, pdata);
298*4882a593Smuzhiyun 	if (pdata->irq > 0) {
299*4882a593Smuzhiyun 		writeb(0, ioaddr + RTC_INTERRUPTS);
300*4882a593Smuzhiyun 		if (devm_request_irq(&pdev->dev, pdata->irq,
301*4882a593Smuzhiyun 				stk17ta8_rtc_interrupt,
302*4882a593Smuzhiyun 				IRQF_SHARED,
303*4882a593Smuzhiyun 				pdev->name, pdev) < 0) {
304*4882a593Smuzhiyun 			dev_warn(&pdev->dev, "interrupt not available.\n");
305*4882a593Smuzhiyun 			pdata->irq = 0;
306*4882a593Smuzhiyun 		}
307*4882a593Smuzhiyun 	}
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 	pdata->rtc = devm_rtc_allocate_device(&pdev->dev);
310*4882a593Smuzhiyun 	if (IS_ERR(pdata->rtc))
311*4882a593Smuzhiyun 		return PTR_ERR(pdata->rtc);
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	pdata->rtc->ops = &stk17ta8_rtc_ops;
314*4882a593Smuzhiyun 	pdata->rtc->nvram_old_abi = true;
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun 	nvmem_cfg.priv = pdata;
317*4882a593Smuzhiyun 	ret = rtc_nvmem_register(pdata->rtc, &nvmem_cfg);
318*4882a593Smuzhiyun 	if (ret)
319*4882a593Smuzhiyun 		return ret;
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun 	return rtc_register_device(pdata->rtc);
322*4882a593Smuzhiyun }
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun /* work with hotplug and coldplug */
325*4882a593Smuzhiyun MODULE_ALIAS("platform:stk17ta8");
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun static struct platform_driver stk17ta8_rtc_driver = {
328*4882a593Smuzhiyun 	.probe		= stk17ta8_rtc_probe,
329*4882a593Smuzhiyun 	.driver		= {
330*4882a593Smuzhiyun 		.name	= "stk17ta8",
331*4882a593Smuzhiyun 	},
332*4882a593Smuzhiyun };
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun module_platform_driver(stk17ta8_rtc_driver);
335*4882a593Smuzhiyun 
336*4882a593Smuzhiyun MODULE_AUTHOR("Thomas Hommel <thomas.hommel@ge.com>");
337*4882a593Smuzhiyun MODULE_DESCRIPTION("Simtek STK17TA8 RTC driver");
338*4882a593Smuzhiyun MODULE_LICENSE("GPL");
339