xref: /OK3568_Linux_fs/kernel/drivers/rtc/rtc-spear.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * drivers/rtc/rtc-spear.c
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Copyright (C) 2010 ST Microelectronics
5*4882a593Smuzhiyun  * Rajeev Kumar<rajeev-dlh.kumar@st.com>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * This file is licensed under the terms of the GNU General Public
8*4882a593Smuzhiyun  * License version 2. This program is licensed "as is" without any
9*4882a593Smuzhiyun  * warranty of any kind, whether express or implied.
10*4882a593Smuzhiyun  */
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <linux/bcd.h>
13*4882a593Smuzhiyun #include <linux/clk.h>
14*4882a593Smuzhiyun #include <linux/delay.h>
15*4882a593Smuzhiyun #include <linux/init.h>
16*4882a593Smuzhiyun #include <linux/io.h>
17*4882a593Smuzhiyun #include <linux/irq.h>
18*4882a593Smuzhiyun #include <linux/module.h>
19*4882a593Smuzhiyun #include <linux/of.h>
20*4882a593Smuzhiyun #include <linux/platform_device.h>
21*4882a593Smuzhiyun #include <linux/rtc.h>
22*4882a593Smuzhiyun #include <linux/slab.h>
23*4882a593Smuzhiyun #include <linux/spinlock.h>
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun /* RTC registers */
26*4882a593Smuzhiyun #define TIME_REG		0x00
27*4882a593Smuzhiyun #define DATE_REG		0x04
28*4882a593Smuzhiyun #define ALARM_TIME_REG		0x08
29*4882a593Smuzhiyun #define ALARM_DATE_REG		0x0C
30*4882a593Smuzhiyun #define CTRL_REG		0x10
31*4882a593Smuzhiyun #define STATUS_REG		0x14
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun /* TIME_REG & ALARM_TIME_REG */
34*4882a593Smuzhiyun #define SECONDS_UNITS		(0xf<<0)	/* seconds units position */
35*4882a593Smuzhiyun #define SECONDS_TENS		(0x7<<4)	/* seconds tens position */
36*4882a593Smuzhiyun #define MINUTES_UNITS		(0xf<<8)	/* minutes units position */
37*4882a593Smuzhiyun #define MINUTES_TENS		(0x7<<12)	/* minutes tens position */
38*4882a593Smuzhiyun #define HOURS_UNITS		(0xf<<16)	/* hours units position */
39*4882a593Smuzhiyun #define HOURS_TENS		(0x3<<20)	/* hours tens position */
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun /* DATE_REG & ALARM_DATE_REG */
42*4882a593Smuzhiyun #define DAYS_UNITS		(0xf<<0)	/* days units position */
43*4882a593Smuzhiyun #define DAYS_TENS		(0x3<<4)	/* days tens position */
44*4882a593Smuzhiyun #define MONTHS_UNITS		(0xf<<8)	/* months units position */
45*4882a593Smuzhiyun #define MONTHS_TENS		(0x1<<12)	/* months tens position */
46*4882a593Smuzhiyun #define YEARS_UNITS		(0xf<<16)	/* years units position */
47*4882a593Smuzhiyun #define YEARS_TENS		(0xf<<20)	/* years tens position */
48*4882a593Smuzhiyun #define YEARS_HUNDREDS		(0xf<<24)	/* years hundereds position */
49*4882a593Smuzhiyun #define YEARS_MILLENIUMS	(0xf<<28)	/* years millenium position */
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun /* MASK SHIFT TIME_REG & ALARM_TIME_REG*/
52*4882a593Smuzhiyun #define SECOND_SHIFT		0x00		/* seconds units */
53*4882a593Smuzhiyun #define MINUTE_SHIFT		0x08		/* minutes units position */
54*4882a593Smuzhiyun #define HOUR_SHIFT		0x10		/* hours units position */
55*4882a593Smuzhiyun #define MDAY_SHIFT		0x00		/* Month day shift */
56*4882a593Smuzhiyun #define MONTH_SHIFT		0x08		/* Month shift */
57*4882a593Smuzhiyun #define YEAR_SHIFT		0x10		/* Year shift */
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun #define SECOND_MASK		0x7F
60*4882a593Smuzhiyun #define MIN_MASK		0x7F
61*4882a593Smuzhiyun #define HOUR_MASK		0x3F
62*4882a593Smuzhiyun #define DAY_MASK		0x3F
63*4882a593Smuzhiyun #define MONTH_MASK		0x7F
64*4882a593Smuzhiyun #define YEAR_MASK		0xFFFF
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun /* date reg equal to time reg, for debug only */
67*4882a593Smuzhiyun #define TIME_BYP		(1<<9)
68*4882a593Smuzhiyun #define INT_ENABLE		(1<<31)		/* interrupt enable */
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun /* STATUS_REG */
71*4882a593Smuzhiyun #define CLK_UNCONNECTED		(1<<0)
72*4882a593Smuzhiyun #define PEND_WR_TIME		(1<<2)
73*4882a593Smuzhiyun #define PEND_WR_DATE		(1<<3)
74*4882a593Smuzhiyun #define LOST_WR_TIME		(1<<4)
75*4882a593Smuzhiyun #define LOST_WR_DATE		(1<<5)
76*4882a593Smuzhiyun #define RTC_INT_MASK		(1<<31)
77*4882a593Smuzhiyun #define STATUS_BUSY		(PEND_WR_TIME | PEND_WR_DATE)
78*4882a593Smuzhiyun #define STATUS_FAIL		(LOST_WR_TIME | LOST_WR_DATE)
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun struct spear_rtc_config {
81*4882a593Smuzhiyun 	struct rtc_device *rtc;
82*4882a593Smuzhiyun 	struct clk *clk;
83*4882a593Smuzhiyun 	spinlock_t lock;
84*4882a593Smuzhiyun 	void __iomem *ioaddr;
85*4882a593Smuzhiyun 	unsigned int irq_wake;
86*4882a593Smuzhiyun };
87*4882a593Smuzhiyun 
spear_rtc_clear_interrupt(struct spear_rtc_config * config)88*4882a593Smuzhiyun static inline void spear_rtc_clear_interrupt(struct spear_rtc_config *config)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun 	unsigned int val;
91*4882a593Smuzhiyun 	unsigned long flags;
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 	spin_lock_irqsave(&config->lock, flags);
94*4882a593Smuzhiyun 	val = readl(config->ioaddr + STATUS_REG);
95*4882a593Smuzhiyun 	val |= RTC_INT_MASK;
96*4882a593Smuzhiyun 	writel(val, config->ioaddr + STATUS_REG);
97*4882a593Smuzhiyun 	spin_unlock_irqrestore(&config->lock, flags);
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun 
spear_rtc_enable_interrupt(struct spear_rtc_config * config)100*4882a593Smuzhiyun static inline void spear_rtc_enable_interrupt(struct spear_rtc_config *config)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun 	unsigned int val;
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	val = readl(config->ioaddr + CTRL_REG);
105*4882a593Smuzhiyun 	if (!(val & INT_ENABLE)) {
106*4882a593Smuzhiyun 		spear_rtc_clear_interrupt(config);
107*4882a593Smuzhiyun 		val |= INT_ENABLE;
108*4882a593Smuzhiyun 		writel(val, config->ioaddr + CTRL_REG);
109*4882a593Smuzhiyun 	}
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun 
spear_rtc_disable_interrupt(struct spear_rtc_config * config)112*4882a593Smuzhiyun static inline void spear_rtc_disable_interrupt(struct spear_rtc_config *config)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun 	unsigned int val;
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	val = readl(config->ioaddr + CTRL_REG);
117*4882a593Smuzhiyun 	if (val & INT_ENABLE) {
118*4882a593Smuzhiyun 		val &= ~INT_ENABLE;
119*4882a593Smuzhiyun 		writel(val, config->ioaddr + CTRL_REG);
120*4882a593Smuzhiyun 	}
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun 
is_write_complete(struct spear_rtc_config * config)123*4882a593Smuzhiyun static inline int is_write_complete(struct spear_rtc_config *config)
124*4882a593Smuzhiyun {
125*4882a593Smuzhiyun 	int ret = 0;
126*4882a593Smuzhiyun 	unsigned long flags;
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	spin_lock_irqsave(&config->lock, flags);
129*4882a593Smuzhiyun 	if ((readl(config->ioaddr + STATUS_REG)) & STATUS_FAIL)
130*4882a593Smuzhiyun 		ret = -EIO;
131*4882a593Smuzhiyun 	spin_unlock_irqrestore(&config->lock, flags);
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	return ret;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun 
rtc_wait_not_busy(struct spear_rtc_config * config)136*4882a593Smuzhiyun static void rtc_wait_not_busy(struct spear_rtc_config *config)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun 	int status, count = 0;
139*4882a593Smuzhiyun 	unsigned long flags;
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun 	/* Assuming BUSY may stay active for 80 msec) */
142*4882a593Smuzhiyun 	for (count = 0; count < 80; count++) {
143*4882a593Smuzhiyun 		spin_lock_irqsave(&config->lock, flags);
144*4882a593Smuzhiyun 		status = readl(config->ioaddr + STATUS_REG);
145*4882a593Smuzhiyun 		spin_unlock_irqrestore(&config->lock, flags);
146*4882a593Smuzhiyun 		if ((status & STATUS_BUSY) == 0)
147*4882a593Smuzhiyun 			break;
148*4882a593Smuzhiyun 		/* check status busy, after each msec */
149*4882a593Smuzhiyun 		msleep(1);
150*4882a593Smuzhiyun 	}
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun 
spear_rtc_irq(int irq,void * dev_id)153*4882a593Smuzhiyun static irqreturn_t spear_rtc_irq(int irq, void *dev_id)
154*4882a593Smuzhiyun {
155*4882a593Smuzhiyun 	struct spear_rtc_config *config = dev_id;
156*4882a593Smuzhiyun 	unsigned long flags, events = 0;
157*4882a593Smuzhiyun 	unsigned int irq_data;
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	spin_lock_irqsave(&config->lock, flags);
160*4882a593Smuzhiyun 	irq_data = readl(config->ioaddr + STATUS_REG);
161*4882a593Smuzhiyun 	spin_unlock_irqrestore(&config->lock, flags);
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	if ((irq_data & RTC_INT_MASK)) {
164*4882a593Smuzhiyun 		spear_rtc_clear_interrupt(config);
165*4882a593Smuzhiyun 		events = RTC_IRQF | RTC_AF;
166*4882a593Smuzhiyun 		rtc_update_irq(config->rtc, 1, events);
167*4882a593Smuzhiyun 		return IRQ_HANDLED;
168*4882a593Smuzhiyun 	} else
169*4882a593Smuzhiyun 		return IRQ_NONE;
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun 
tm2bcd(struct rtc_time * tm)173*4882a593Smuzhiyun static void tm2bcd(struct rtc_time *tm)
174*4882a593Smuzhiyun {
175*4882a593Smuzhiyun 	tm->tm_sec = bin2bcd(tm->tm_sec);
176*4882a593Smuzhiyun 	tm->tm_min = bin2bcd(tm->tm_min);
177*4882a593Smuzhiyun 	tm->tm_hour = bin2bcd(tm->tm_hour);
178*4882a593Smuzhiyun 	tm->tm_mday = bin2bcd(tm->tm_mday);
179*4882a593Smuzhiyun 	tm->tm_mon = bin2bcd(tm->tm_mon + 1);
180*4882a593Smuzhiyun 	tm->tm_year = bin2bcd(tm->tm_year);
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun 
bcd2tm(struct rtc_time * tm)183*4882a593Smuzhiyun static void bcd2tm(struct rtc_time *tm)
184*4882a593Smuzhiyun {
185*4882a593Smuzhiyun 	tm->tm_sec = bcd2bin(tm->tm_sec);
186*4882a593Smuzhiyun 	tm->tm_min = bcd2bin(tm->tm_min);
187*4882a593Smuzhiyun 	tm->tm_hour = bcd2bin(tm->tm_hour);
188*4882a593Smuzhiyun 	tm->tm_mday = bcd2bin(tm->tm_mday);
189*4882a593Smuzhiyun 	tm->tm_mon = bcd2bin(tm->tm_mon) - 1;
190*4882a593Smuzhiyun 	/* epoch == 1900 */
191*4882a593Smuzhiyun 	tm->tm_year = bcd2bin(tm->tm_year);
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun /*
195*4882a593Smuzhiyun  * spear_rtc_read_time - set the time
196*4882a593Smuzhiyun  * @dev: rtc device in use
197*4882a593Smuzhiyun  * @tm: holds date and time
198*4882a593Smuzhiyun  *
199*4882a593Smuzhiyun  * This function read time and date. On success it will return 0
200*4882a593Smuzhiyun  * otherwise -ve error is returned.
201*4882a593Smuzhiyun  */
spear_rtc_read_time(struct device * dev,struct rtc_time * tm)202*4882a593Smuzhiyun static int spear_rtc_read_time(struct device *dev, struct rtc_time *tm)
203*4882a593Smuzhiyun {
204*4882a593Smuzhiyun 	struct spear_rtc_config *config = dev_get_drvdata(dev);
205*4882a593Smuzhiyun 	unsigned int time, date;
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	/* we don't report wday/yday/isdst ... */
208*4882a593Smuzhiyun 	rtc_wait_not_busy(config);
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun 	time = readl(config->ioaddr + TIME_REG);
211*4882a593Smuzhiyun 	date = readl(config->ioaddr + DATE_REG);
212*4882a593Smuzhiyun 	tm->tm_sec = (time >> SECOND_SHIFT) & SECOND_MASK;
213*4882a593Smuzhiyun 	tm->tm_min = (time >> MINUTE_SHIFT) & MIN_MASK;
214*4882a593Smuzhiyun 	tm->tm_hour = (time >> HOUR_SHIFT) & HOUR_MASK;
215*4882a593Smuzhiyun 	tm->tm_mday = (date >> MDAY_SHIFT) & DAY_MASK;
216*4882a593Smuzhiyun 	tm->tm_mon = (date >> MONTH_SHIFT) & MONTH_MASK;
217*4882a593Smuzhiyun 	tm->tm_year = (date >> YEAR_SHIFT) & YEAR_MASK;
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun 	bcd2tm(tm);
220*4882a593Smuzhiyun 	return 0;
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun /*
224*4882a593Smuzhiyun  * spear_rtc_set_time - set the time
225*4882a593Smuzhiyun  * @dev: rtc device in use
226*4882a593Smuzhiyun  * @tm: holds date and time
227*4882a593Smuzhiyun  *
228*4882a593Smuzhiyun  * This function set time and date. On success it will return 0
229*4882a593Smuzhiyun  * otherwise -ve error is returned.
230*4882a593Smuzhiyun  */
spear_rtc_set_time(struct device * dev,struct rtc_time * tm)231*4882a593Smuzhiyun static int spear_rtc_set_time(struct device *dev, struct rtc_time *tm)
232*4882a593Smuzhiyun {
233*4882a593Smuzhiyun 	struct spear_rtc_config *config = dev_get_drvdata(dev);
234*4882a593Smuzhiyun 	unsigned int time, date;
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 	tm2bcd(tm);
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun 	rtc_wait_not_busy(config);
239*4882a593Smuzhiyun 	time = (tm->tm_sec << SECOND_SHIFT) | (tm->tm_min << MINUTE_SHIFT) |
240*4882a593Smuzhiyun 		(tm->tm_hour << HOUR_SHIFT);
241*4882a593Smuzhiyun 	date = (tm->tm_mday << MDAY_SHIFT) | (tm->tm_mon << MONTH_SHIFT) |
242*4882a593Smuzhiyun 		(tm->tm_year << YEAR_SHIFT);
243*4882a593Smuzhiyun 	writel(time, config->ioaddr + TIME_REG);
244*4882a593Smuzhiyun 	writel(date, config->ioaddr + DATE_REG);
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	return is_write_complete(config);
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun /*
250*4882a593Smuzhiyun  * spear_rtc_read_alarm - read the alarm time
251*4882a593Smuzhiyun  * @dev: rtc device in use
252*4882a593Smuzhiyun  * @alm: holds alarm date and time
253*4882a593Smuzhiyun  *
254*4882a593Smuzhiyun  * This function read alarm time and date. On success it will return 0
255*4882a593Smuzhiyun  * otherwise -ve error is returned.
256*4882a593Smuzhiyun  */
spear_rtc_read_alarm(struct device * dev,struct rtc_wkalrm * alm)257*4882a593Smuzhiyun static int spear_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
258*4882a593Smuzhiyun {
259*4882a593Smuzhiyun 	struct spear_rtc_config *config = dev_get_drvdata(dev);
260*4882a593Smuzhiyun 	unsigned int time, date;
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun 	rtc_wait_not_busy(config);
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun 	time = readl(config->ioaddr + ALARM_TIME_REG);
265*4882a593Smuzhiyun 	date = readl(config->ioaddr + ALARM_DATE_REG);
266*4882a593Smuzhiyun 	alm->time.tm_sec = (time >> SECOND_SHIFT) & SECOND_MASK;
267*4882a593Smuzhiyun 	alm->time.tm_min = (time >> MINUTE_SHIFT) & MIN_MASK;
268*4882a593Smuzhiyun 	alm->time.tm_hour = (time >> HOUR_SHIFT) & HOUR_MASK;
269*4882a593Smuzhiyun 	alm->time.tm_mday = (date >> MDAY_SHIFT) & DAY_MASK;
270*4882a593Smuzhiyun 	alm->time.tm_mon = (date >> MONTH_SHIFT) & MONTH_MASK;
271*4882a593Smuzhiyun 	alm->time.tm_year = (date >> YEAR_SHIFT) & YEAR_MASK;
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun 	bcd2tm(&alm->time);
274*4882a593Smuzhiyun 	alm->enabled = readl(config->ioaddr + CTRL_REG) & INT_ENABLE;
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun 	return 0;
277*4882a593Smuzhiyun }
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun /*
280*4882a593Smuzhiyun  * spear_rtc_set_alarm - set the alarm time
281*4882a593Smuzhiyun  * @dev: rtc device in use
282*4882a593Smuzhiyun  * @alm: holds alarm date and time
283*4882a593Smuzhiyun  *
284*4882a593Smuzhiyun  * This function set alarm time and date. On success it will return 0
285*4882a593Smuzhiyun  * otherwise -ve error is returned.
286*4882a593Smuzhiyun  */
spear_rtc_set_alarm(struct device * dev,struct rtc_wkalrm * alm)287*4882a593Smuzhiyun static int spear_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
288*4882a593Smuzhiyun {
289*4882a593Smuzhiyun 	struct spear_rtc_config *config = dev_get_drvdata(dev);
290*4882a593Smuzhiyun 	unsigned int time, date;
291*4882a593Smuzhiyun 	int err;
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun 	tm2bcd(&alm->time);
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	rtc_wait_not_busy(config);
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 	time = (alm->time.tm_sec << SECOND_SHIFT) | (alm->time.tm_min <<
298*4882a593Smuzhiyun 			MINUTE_SHIFT) |	(alm->time.tm_hour << HOUR_SHIFT);
299*4882a593Smuzhiyun 	date = (alm->time.tm_mday << MDAY_SHIFT) | (alm->time.tm_mon <<
300*4882a593Smuzhiyun 			MONTH_SHIFT) | (alm->time.tm_year << YEAR_SHIFT);
301*4882a593Smuzhiyun 
302*4882a593Smuzhiyun 	writel(time, config->ioaddr + ALARM_TIME_REG);
303*4882a593Smuzhiyun 	writel(date, config->ioaddr + ALARM_DATE_REG);
304*4882a593Smuzhiyun 	err = is_write_complete(config);
305*4882a593Smuzhiyun 	if (err < 0)
306*4882a593Smuzhiyun 		return err;
307*4882a593Smuzhiyun 
308*4882a593Smuzhiyun 	if (alm->enabled)
309*4882a593Smuzhiyun 		spear_rtc_enable_interrupt(config);
310*4882a593Smuzhiyun 	else
311*4882a593Smuzhiyun 		spear_rtc_disable_interrupt(config);
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	return 0;
314*4882a593Smuzhiyun }
315*4882a593Smuzhiyun 
spear_alarm_irq_enable(struct device * dev,unsigned int enabled)316*4882a593Smuzhiyun static int spear_alarm_irq_enable(struct device *dev, unsigned int enabled)
317*4882a593Smuzhiyun {
318*4882a593Smuzhiyun 	struct spear_rtc_config *config = dev_get_drvdata(dev);
319*4882a593Smuzhiyun 	int ret = 0;
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun 	spear_rtc_clear_interrupt(config);
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun 	switch (enabled) {
324*4882a593Smuzhiyun 	case 0:
325*4882a593Smuzhiyun 		/* alarm off */
326*4882a593Smuzhiyun 		spear_rtc_disable_interrupt(config);
327*4882a593Smuzhiyun 		break;
328*4882a593Smuzhiyun 	case 1:
329*4882a593Smuzhiyun 		/* alarm on */
330*4882a593Smuzhiyun 		spear_rtc_enable_interrupt(config);
331*4882a593Smuzhiyun 		break;
332*4882a593Smuzhiyun 	default:
333*4882a593Smuzhiyun 		ret = -EINVAL;
334*4882a593Smuzhiyun 		break;
335*4882a593Smuzhiyun 	}
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun 	return ret;
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun static const struct rtc_class_ops spear_rtc_ops = {
341*4882a593Smuzhiyun 	.read_time = spear_rtc_read_time,
342*4882a593Smuzhiyun 	.set_time = spear_rtc_set_time,
343*4882a593Smuzhiyun 	.read_alarm = spear_rtc_read_alarm,
344*4882a593Smuzhiyun 	.set_alarm = spear_rtc_set_alarm,
345*4882a593Smuzhiyun 	.alarm_irq_enable = spear_alarm_irq_enable,
346*4882a593Smuzhiyun };
347*4882a593Smuzhiyun 
spear_rtc_probe(struct platform_device * pdev)348*4882a593Smuzhiyun static int spear_rtc_probe(struct platform_device *pdev)
349*4882a593Smuzhiyun {
350*4882a593Smuzhiyun 	struct spear_rtc_config *config;
351*4882a593Smuzhiyun 	int status = 0;
352*4882a593Smuzhiyun 	int irq;
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun 	config = devm_kzalloc(&pdev->dev, sizeof(*config), GFP_KERNEL);
355*4882a593Smuzhiyun 	if (!config)
356*4882a593Smuzhiyun 		return -ENOMEM;
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun 	/* alarm irqs */
359*4882a593Smuzhiyun 	irq = platform_get_irq(pdev, 0);
360*4882a593Smuzhiyun 	if (irq < 0)
361*4882a593Smuzhiyun 		return irq;
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	status = devm_request_irq(&pdev->dev, irq, spear_rtc_irq, 0, pdev->name,
364*4882a593Smuzhiyun 			config);
365*4882a593Smuzhiyun 	if (status) {
366*4882a593Smuzhiyun 		dev_err(&pdev->dev, "Alarm interrupt IRQ%d already claimed\n",
367*4882a593Smuzhiyun 				irq);
368*4882a593Smuzhiyun 		return status;
369*4882a593Smuzhiyun 	}
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun 	config->ioaddr = devm_platform_ioremap_resource(pdev, 0);
372*4882a593Smuzhiyun 	if (IS_ERR(config->ioaddr))
373*4882a593Smuzhiyun 		return PTR_ERR(config->ioaddr);
374*4882a593Smuzhiyun 
375*4882a593Smuzhiyun 	config->clk = devm_clk_get(&pdev->dev, NULL);
376*4882a593Smuzhiyun 	if (IS_ERR(config->clk))
377*4882a593Smuzhiyun 		return PTR_ERR(config->clk);
378*4882a593Smuzhiyun 
379*4882a593Smuzhiyun 	status = clk_prepare_enable(config->clk);
380*4882a593Smuzhiyun 	if (status < 0)
381*4882a593Smuzhiyun 		return status;
382*4882a593Smuzhiyun 
383*4882a593Smuzhiyun 	spin_lock_init(&config->lock);
384*4882a593Smuzhiyun 	platform_set_drvdata(pdev, config);
385*4882a593Smuzhiyun 
386*4882a593Smuzhiyun 	config->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
387*4882a593Smuzhiyun 					&spear_rtc_ops, THIS_MODULE);
388*4882a593Smuzhiyun 	if (IS_ERR(config->rtc)) {
389*4882a593Smuzhiyun 		dev_err(&pdev->dev, "can't register RTC device, err %ld\n",
390*4882a593Smuzhiyun 				PTR_ERR(config->rtc));
391*4882a593Smuzhiyun 		status = PTR_ERR(config->rtc);
392*4882a593Smuzhiyun 		goto err_disable_clock;
393*4882a593Smuzhiyun 	}
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun 	config->rtc->uie_unsupported = 1;
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun 	if (!device_can_wakeup(&pdev->dev))
398*4882a593Smuzhiyun 		device_init_wakeup(&pdev->dev, 1);
399*4882a593Smuzhiyun 
400*4882a593Smuzhiyun 	return 0;
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun err_disable_clock:
403*4882a593Smuzhiyun 	clk_disable_unprepare(config->clk);
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun 	return status;
406*4882a593Smuzhiyun }
407*4882a593Smuzhiyun 
spear_rtc_remove(struct platform_device * pdev)408*4882a593Smuzhiyun static int spear_rtc_remove(struct platform_device *pdev)
409*4882a593Smuzhiyun {
410*4882a593Smuzhiyun 	struct spear_rtc_config *config = platform_get_drvdata(pdev);
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun 	spear_rtc_disable_interrupt(config);
413*4882a593Smuzhiyun 	clk_disable_unprepare(config->clk);
414*4882a593Smuzhiyun 	device_init_wakeup(&pdev->dev, 0);
415*4882a593Smuzhiyun 
416*4882a593Smuzhiyun 	return 0;
417*4882a593Smuzhiyun }
418*4882a593Smuzhiyun 
419*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
spear_rtc_suspend(struct device * dev)420*4882a593Smuzhiyun static int spear_rtc_suspend(struct device *dev)
421*4882a593Smuzhiyun {
422*4882a593Smuzhiyun 	struct platform_device *pdev = to_platform_device(dev);
423*4882a593Smuzhiyun 	struct spear_rtc_config *config = platform_get_drvdata(pdev);
424*4882a593Smuzhiyun 	int irq;
425*4882a593Smuzhiyun 
426*4882a593Smuzhiyun 	irq = platform_get_irq(pdev, 0);
427*4882a593Smuzhiyun 	if (device_may_wakeup(&pdev->dev)) {
428*4882a593Smuzhiyun 		if (!enable_irq_wake(irq))
429*4882a593Smuzhiyun 			config->irq_wake = 1;
430*4882a593Smuzhiyun 	} else {
431*4882a593Smuzhiyun 		spear_rtc_disable_interrupt(config);
432*4882a593Smuzhiyun 		clk_disable(config->clk);
433*4882a593Smuzhiyun 	}
434*4882a593Smuzhiyun 
435*4882a593Smuzhiyun 	return 0;
436*4882a593Smuzhiyun }
437*4882a593Smuzhiyun 
spear_rtc_resume(struct device * dev)438*4882a593Smuzhiyun static int spear_rtc_resume(struct device *dev)
439*4882a593Smuzhiyun {
440*4882a593Smuzhiyun 	struct platform_device *pdev = to_platform_device(dev);
441*4882a593Smuzhiyun 	struct spear_rtc_config *config = platform_get_drvdata(pdev);
442*4882a593Smuzhiyun 	int irq;
443*4882a593Smuzhiyun 
444*4882a593Smuzhiyun 	irq = platform_get_irq(pdev, 0);
445*4882a593Smuzhiyun 
446*4882a593Smuzhiyun 	if (device_may_wakeup(&pdev->dev)) {
447*4882a593Smuzhiyun 		if (config->irq_wake) {
448*4882a593Smuzhiyun 			disable_irq_wake(irq);
449*4882a593Smuzhiyun 			config->irq_wake = 0;
450*4882a593Smuzhiyun 		}
451*4882a593Smuzhiyun 	} else {
452*4882a593Smuzhiyun 		clk_enable(config->clk);
453*4882a593Smuzhiyun 		spear_rtc_enable_interrupt(config);
454*4882a593Smuzhiyun 	}
455*4882a593Smuzhiyun 
456*4882a593Smuzhiyun 	return 0;
457*4882a593Smuzhiyun }
458*4882a593Smuzhiyun #endif
459*4882a593Smuzhiyun 
460*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(spear_rtc_pm_ops, spear_rtc_suspend, spear_rtc_resume);
461*4882a593Smuzhiyun 
spear_rtc_shutdown(struct platform_device * pdev)462*4882a593Smuzhiyun static void spear_rtc_shutdown(struct platform_device *pdev)
463*4882a593Smuzhiyun {
464*4882a593Smuzhiyun 	struct spear_rtc_config *config = platform_get_drvdata(pdev);
465*4882a593Smuzhiyun 
466*4882a593Smuzhiyun 	spear_rtc_disable_interrupt(config);
467*4882a593Smuzhiyun 	clk_disable(config->clk);
468*4882a593Smuzhiyun }
469*4882a593Smuzhiyun 
470*4882a593Smuzhiyun #ifdef CONFIG_OF
471*4882a593Smuzhiyun static const struct of_device_id spear_rtc_id_table[] = {
472*4882a593Smuzhiyun 	{ .compatible = "st,spear600-rtc" },
473*4882a593Smuzhiyun 	{}
474*4882a593Smuzhiyun };
475*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, spear_rtc_id_table);
476*4882a593Smuzhiyun #endif
477*4882a593Smuzhiyun 
478*4882a593Smuzhiyun static struct platform_driver spear_rtc_driver = {
479*4882a593Smuzhiyun 	.probe = spear_rtc_probe,
480*4882a593Smuzhiyun 	.remove = spear_rtc_remove,
481*4882a593Smuzhiyun 	.shutdown = spear_rtc_shutdown,
482*4882a593Smuzhiyun 	.driver = {
483*4882a593Smuzhiyun 		.name = "rtc-spear",
484*4882a593Smuzhiyun 		.pm = &spear_rtc_pm_ops,
485*4882a593Smuzhiyun 		.of_match_table = of_match_ptr(spear_rtc_id_table),
486*4882a593Smuzhiyun 	},
487*4882a593Smuzhiyun };
488*4882a593Smuzhiyun 
489*4882a593Smuzhiyun module_platform_driver(spear_rtc_driver);
490*4882a593Smuzhiyun 
491*4882a593Smuzhiyun MODULE_ALIAS("platform:rtc-spear");
492*4882a593Smuzhiyun MODULE_AUTHOR("Rajeev Kumar <rajeev-dlh.kumar@st.com>");
493*4882a593Smuzhiyun MODULE_DESCRIPTION("ST SPEAr Realtime Clock Driver (RTC)");
494*4882a593Smuzhiyun MODULE_LICENSE("GPL");
495