1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Driver for the Epson RTC module RX-8010 SJ
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright(C) Timesys Corporation 2015
6*4882a593Smuzhiyun * Copyright(C) General Electric Company 2015
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/bcd.h>
10*4882a593Smuzhiyun #include <linux/bitops.h>
11*4882a593Smuzhiyun #include <linux/i2c.h>
12*4882a593Smuzhiyun #include <linux/kernel.h>
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/regmap.h>
15*4882a593Smuzhiyun #include <linux/rtc.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #define RX8010_SEC 0x10
18*4882a593Smuzhiyun #define RX8010_MIN 0x11
19*4882a593Smuzhiyun #define RX8010_HOUR 0x12
20*4882a593Smuzhiyun #define RX8010_WDAY 0x13
21*4882a593Smuzhiyun #define RX8010_MDAY 0x14
22*4882a593Smuzhiyun #define RX8010_MONTH 0x15
23*4882a593Smuzhiyun #define RX8010_YEAR 0x16
24*4882a593Smuzhiyun #define RX8010_RESV17 0x17
25*4882a593Smuzhiyun #define RX8010_ALMIN 0x18
26*4882a593Smuzhiyun #define RX8010_ALHOUR 0x19
27*4882a593Smuzhiyun #define RX8010_ALWDAY 0x1A
28*4882a593Smuzhiyun #define RX8010_TCOUNT0 0x1B
29*4882a593Smuzhiyun #define RX8010_TCOUNT1 0x1C
30*4882a593Smuzhiyun #define RX8010_EXT 0x1D
31*4882a593Smuzhiyun #define RX8010_FLAG 0x1E
32*4882a593Smuzhiyun #define RX8010_CTRL 0x1F
33*4882a593Smuzhiyun /* 0x20 to 0x2F are user registers */
34*4882a593Smuzhiyun #define RX8010_RESV30 0x30
35*4882a593Smuzhiyun #define RX8010_RESV31 0x31
36*4882a593Smuzhiyun #define RX8010_IRQ 0x32
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun #define RX8010_EXT_WADA BIT(3)
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #define RX8010_FLAG_VLF BIT(1)
41*4882a593Smuzhiyun #define RX8010_FLAG_AF BIT(3)
42*4882a593Smuzhiyun #define RX8010_FLAG_TF BIT(4)
43*4882a593Smuzhiyun #define RX8010_FLAG_UF BIT(5)
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun #define RX8010_CTRL_AIE BIT(3)
46*4882a593Smuzhiyun #define RX8010_CTRL_UIE BIT(5)
47*4882a593Smuzhiyun #define RX8010_CTRL_STOP BIT(6)
48*4882a593Smuzhiyun #define RX8010_CTRL_TEST BIT(7)
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun #define RX8010_ALARM_AE BIT(7)
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun static const struct i2c_device_id rx8010_id[] = {
53*4882a593Smuzhiyun { "rx8010", 0 },
54*4882a593Smuzhiyun { }
55*4882a593Smuzhiyun };
56*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, rx8010_id);
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun static const struct of_device_id rx8010_of_match[] = {
59*4882a593Smuzhiyun { .compatible = "epson,rx8010" },
60*4882a593Smuzhiyun { }
61*4882a593Smuzhiyun };
62*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, rx8010_of_match);
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun struct rx8010_data {
65*4882a593Smuzhiyun struct regmap *regs;
66*4882a593Smuzhiyun struct rtc_device *rtc;
67*4882a593Smuzhiyun u8 ctrlreg;
68*4882a593Smuzhiyun };
69*4882a593Smuzhiyun
rx8010_irq_1_handler(int irq,void * dev_id)70*4882a593Smuzhiyun static irqreturn_t rx8010_irq_1_handler(int irq, void *dev_id)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun struct i2c_client *client = dev_id;
73*4882a593Smuzhiyun struct rx8010_data *rx8010 = i2c_get_clientdata(client);
74*4882a593Smuzhiyun int flagreg, err;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun mutex_lock(&rx8010->rtc->ops_lock);
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun err = regmap_read(rx8010->regs, RX8010_FLAG, &flagreg);
79*4882a593Smuzhiyun if (err) {
80*4882a593Smuzhiyun mutex_unlock(&rx8010->rtc->ops_lock);
81*4882a593Smuzhiyun return IRQ_NONE;
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun if (flagreg & RX8010_FLAG_VLF)
85*4882a593Smuzhiyun dev_warn(&client->dev, "Frequency stop detected\n");
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun if (flagreg & RX8010_FLAG_TF) {
88*4882a593Smuzhiyun flagreg &= ~RX8010_FLAG_TF;
89*4882a593Smuzhiyun rtc_update_irq(rx8010->rtc, 1, RTC_PF | RTC_IRQF);
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun if (flagreg & RX8010_FLAG_AF) {
93*4882a593Smuzhiyun flagreg &= ~RX8010_FLAG_AF;
94*4882a593Smuzhiyun rtc_update_irq(rx8010->rtc, 1, RTC_AF | RTC_IRQF);
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun if (flagreg & RX8010_FLAG_UF) {
98*4882a593Smuzhiyun flagreg &= ~RX8010_FLAG_UF;
99*4882a593Smuzhiyun rtc_update_irq(rx8010->rtc, 1, RTC_UF | RTC_IRQF);
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun err = regmap_write(rx8010->regs, RX8010_FLAG, flagreg);
103*4882a593Smuzhiyun mutex_unlock(&rx8010->rtc->ops_lock);
104*4882a593Smuzhiyun return err ? IRQ_NONE : IRQ_HANDLED;
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun
rx8010_get_time(struct device * dev,struct rtc_time * dt)107*4882a593Smuzhiyun static int rx8010_get_time(struct device *dev, struct rtc_time *dt)
108*4882a593Smuzhiyun {
109*4882a593Smuzhiyun struct rx8010_data *rx8010 = dev_get_drvdata(dev);
110*4882a593Smuzhiyun u8 date[RX8010_YEAR - RX8010_SEC + 1];
111*4882a593Smuzhiyun int flagreg, err;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun err = regmap_read(rx8010->regs, RX8010_FLAG, &flagreg);
114*4882a593Smuzhiyun if (err)
115*4882a593Smuzhiyun return err;
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun if (flagreg & RX8010_FLAG_VLF) {
118*4882a593Smuzhiyun dev_warn(dev, "Frequency stop detected\n");
119*4882a593Smuzhiyun return -EINVAL;
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun err = regmap_bulk_read(rx8010->regs, RX8010_SEC, date, sizeof(date));
123*4882a593Smuzhiyun if (err)
124*4882a593Smuzhiyun return err;
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun dt->tm_sec = bcd2bin(date[RX8010_SEC - RX8010_SEC] & 0x7f);
127*4882a593Smuzhiyun dt->tm_min = bcd2bin(date[RX8010_MIN - RX8010_SEC] & 0x7f);
128*4882a593Smuzhiyun dt->tm_hour = bcd2bin(date[RX8010_HOUR - RX8010_SEC] & 0x3f);
129*4882a593Smuzhiyun dt->tm_mday = bcd2bin(date[RX8010_MDAY - RX8010_SEC] & 0x3f);
130*4882a593Smuzhiyun dt->tm_mon = bcd2bin(date[RX8010_MONTH - RX8010_SEC] & 0x1f) - 1;
131*4882a593Smuzhiyun dt->tm_year = bcd2bin(date[RX8010_YEAR - RX8010_SEC]) + 100;
132*4882a593Smuzhiyun dt->tm_wday = ffs(date[RX8010_WDAY - RX8010_SEC] & 0x7f);
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun return 0;
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun
rx8010_set_time(struct device * dev,struct rtc_time * dt)137*4882a593Smuzhiyun static int rx8010_set_time(struct device *dev, struct rtc_time *dt)
138*4882a593Smuzhiyun {
139*4882a593Smuzhiyun struct rx8010_data *rx8010 = dev_get_drvdata(dev);
140*4882a593Smuzhiyun u8 date[RX8010_YEAR - RX8010_SEC + 1];
141*4882a593Smuzhiyun int err;
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun /* set STOP bit before changing clock/calendar */
144*4882a593Smuzhiyun err = regmap_set_bits(rx8010->regs, RX8010_CTRL, RX8010_CTRL_STOP);
145*4882a593Smuzhiyun if (err)
146*4882a593Smuzhiyun return err;
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun date[RX8010_SEC - RX8010_SEC] = bin2bcd(dt->tm_sec);
149*4882a593Smuzhiyun date[RX8010_MIN - RX8010_SEC] = bin2bcd(dt->tm_min);
150*4882a593Smuzhiyun date[RX8010_HOUR - RX8010_SEC] = bin2bcd(dt->tm_hour);
151*4882a593Smuzhiyun date[RX8010_MDAY - RX8010_SEC] = bin2bcd(dt->tm_mday);
152*4882a593Smuzhiyun date[RX8010_MONTH - RX8010_SEC] = bin2bcd(dt->tm_mon + 1);
153*4882a593Smuzhiyun date[RX8010_YEAR - RX8010_SEC] = bin2bcd(dt->tm_year - 100);
154*4882a593Smuzhiyun date[RX8010_WDAY - RX8010_SEC] = bin2bcd(1 << dt->tm_wday);
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun err = regmap_bulk_write(rx8010->regs, RX8010_SEC, date, sizeof(date));
157*4882a593Smuzhiyun if (err)
158*4882a593Smuzhiyun return err;
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun /* clear STOP bit after changing clock/calendar */
161*4882a593Smuzhiyun err = regmap_clear_bits(rx8010->regs, RX8010_CTRL, RX8010_CTRL_STOP);
162*4882a593Smuzhiyun if (err)
163*4882a593Smuzhiyun return err;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun err = regmap_clear_bits(rx8010->regs, RX8010_FLAG, RX8010_FLAG_VLF);
166*4882a593Smuzhiyun if (err)
167*4882a593Smuzhiyun return err;
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun return 0;
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun
rx8010_init(struct device * dev)172*4882a593Smuzhiyun static int rx8010_init(struct device *dev)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun struct rx8010_data *rx8010 = dev_get_drvdata(dev);
175*4882a593Smuzhiyun u8 ctrl[2];
176*4882a593Smuzhiyun int need_clear = 0, err;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun /* Initialize reserved registers as specified in datasheet */
179*4882a593Smuzhiyun err = regmap_write(rx8010->regs, RX8010_RESV17, 0xD8);
180*4882a593Smuzhiyun if (err)
181*4882a593Smuzhiyun return err;
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun err = regmap_write(rx8010->regs, RX8010_RESV30, 0x00);
184*4882a593Smuzhiyun if (err)
185*4882a593Smuzhiyun return err;
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun err = regmap_write(rx8010->regs, RX8010_RESV31, 0x08);
188*4882a593Smuzhiyun if (err)
189*4882a593Smuzhiyun return err;
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun err = regmap_write(rx8010->regs, RX8010_IRQ, 0x00);
192*4882a593Smuzhiyun if (err)
193*4882a593Smuzhiyun return err;
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun err = regmap_bulk_read(rx8010->regs, RX8010_FLAG, ctrl, 2);
196*4882a593Smuzhiyun if (err)
197*4882a593Smuzhiyun return err;
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun if (ctrl[0] & RX8010_FLAG_VLF)
200*4882a593Smuzhiyun dev_warn(dev, "Frequency stop was detected\n");
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun if (ctrl[0] & RX8010_FLAG_AF) {
203*4882a593Smuzhiyun dev_warn(dev, "Alarm was detected\n");
204*4882a593Smuzhiyun need_clear = 1;
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun if (ctrl[0] & RX8010_FLAG_TF)
208*4882a593Smuzhiyun need_clear = 1;
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun if (ctrl[0] & RX8010_FLAG_UF)
211*4882a593Smuzhiyun need_clear = 1;
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun if (need_clear) {
214*4882a593Smuzhiyun ctrl[0] &= ~(RX8010_FLAG_AF | RX8010_FLAG_TF | RX8010_FLAG_UF);
215*4882a593Smuzhiyun err = regmap_write(rx8010->regs, RX8010_FLAG, ctrl[0]);
216*4882a593Smuzhiyun if (err)
217*4882a593Smuzhiyun return err;
218*4882a593Smuzhiyun }
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun rx8010->ctrlreg = (ctrl[1] & ~RX8010_CTRL_TEST);
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun return 0;
223*4882a593Smuzhiyun }
224*4882a593Smuzhiyun
rx8010_read_alarm(struct device * dev,struct rtc_wkalrm * t)225*4882a593Smuzhiyun static int rx8010_read_alarm(struct device *dev, struct rtc_wkalrm *t)
226*4882a593Smuzhiyun {
227*4882a593Smuzhiyun struct rx8010_data *rx8010 = dev_get_drvdata(dev);
228*4882a593Smuzhiyun u8 alarmvals[3];
229*4882a593Smuzhiyun int flagreg, err;
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun err = regmap_bulk_read(rx8010->regs, RX8010_ALMIN, alarmvals, 3);
232*4882a593Smuzhiyun if (err)
233*4882a593Smuzhiyun return err;
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun err = regmap_read(rx8010->regs, RX8010_FLAG, &flagreg);
236*4882a593Smuzhiyun if (err)
237*4882a593Smuzhiyun return err;
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun t->time.tm_sec = 0;
240*4882a593Smuzhiyun t->time.tm_min = bcd2bin(alarmvals[0] & 0x7f);
241*4882a593Smuzhiyun t->time.tm_hour = bcd2bin(alarmvals[1] & 0x3f);
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun if (!(alarmvals[2] & RX8010_ALARM_AE))
244*4882a593Smuzhiyun t->time.tm_mday = bcd2bin(alarmvals[2] & 0x7f);
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun t->enabled = !!(rx8010->ctrlreg & RX8010_CTRL_AIE);
247*4882a593Smuzhiyun t->pending = (flagreg & RX8010_FLAG_AF) && t->enabled;
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun return 0;
250*4882a593Smuzhiyun }
251*4882a593Smuzhiyun
rx8010_set_alarm(struct device * dev,struct rtc_wkalrm * t)252*4882a593Smuzhiyun static int rx8010_set_alarm(struct device *dev, struct rtc_wkalrm *t)
253*4882a593Smuzhiyun {
254*4882a593Smuzhiyun struct rx8010_data *rx8010 = dev_get_drvdata(dev);
255*4882a593Smuzhiyun u8 alarmvals[3];
256*4882a593Smuzhiyun int err;
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun if (rx8010->ctrlreg & (RX8010_CTRL_AIE | RX8010_CTRL_UIE)) {
259*4882a593Smuzhiyun rx8010->ctrlreg &= ~(RX8010_CTRL_AIE | RX8010_CTRL_UIE);
260*4882a593Smuzhiyun err = regmap_write(rx8010->regs, RX8010_CTRL, rx8010->ctrlreg);
261*4882a593Smuzhiyun if (err)
262*4882a593Smuzhiyun return err;
263*4882a593Smuzhiyun }
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun err = regmap_clear_bits(rx8010->regs, RX8010_FLAG, RX8010_FLAG_AF);
266*4882a593Smuzhiyun if (err)
267*4882a593Smuzhiyun return err;
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun alarmvals[0] = bin2bcd(t->time.tm_min);
270*4882a593Smuzhiyun alarmvals[1] = bin2bcd(t->time.tm_hour);
271*4882a593Smuzhiyun alarmvals[2] = bin2bcd(t->time.tm_mday);
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun err = regmap_bulk_write(rx8010->regs, RX8010_ALMIN, alarmvals, 2);
274*4882a593Smuzhiyun if (err)
275*4882a593Smuzhiyun return err;
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun err = regmap_clear_bits(rx8010->regs, RX8010_EXT, RX8010_EXT_WADA);
278*4882a593Smuzhiyun if (err)
279*4882a593Smuzhiyun return err;
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun if (alarmvals[2] == 0)
282*4882a593Smuzhiyun alarmvals[2] |= RX8010_ALARM_AE;
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun err = regmap_write(rx8010->regs, RX8010_ALWDAY, alarmvals[2]);
285*4882a593Smuzhiyun if (err)
286*4882a593Smuzhiyun return err;
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun if (t->enabled) {
289*4882a593Smuzhiyun if (rx8010->rtc->uie_rtctimer.enabled)
290*4882a593Smuzhiyun rx8010->ctrlreg |= RX8010_CTRL_UIE;
291*4882a593Smuzhiyun if (rx8010->rtc->aie_timer.enabled)
292*4882a593Smuzhiyun rx8010->ctrlreg |=
293*4882a593Smuzhiyun (RX8010_CTRL_AIE | RX8010_CTRL_UIE);
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun err = regmap_write(rx8010->regs, RX8010_CTRL, rx8010->ctrlreg);
296*4882a593Smuzhiyun if (err)
297*4882a593Smuzhiyun return err;
298*4882a593Smuzhiyun }
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun return 0;
301*4882a593Smuzhiyun }
302*4882a593Smuzhiyun
rx8010_alarm_irq_enable(struct device * dev,unsigned int enabled)303*4882a593Smuzhiyun static int rx8010_alarm_irq_enable(struct device *dev,
304*4882a593Smuzhiyun unsigned int enabled)
305*4882a593Smuzhiyun {
306*4882a593Smuzhiyun struct rx8010_data *rx8010 = dev_get_drvdata(dev);
307*4882a593Smuzhiyun int err;
308*4882a593Smuzhiyun u8 ctrl;
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun ctrl = rx8010->ctrlreg;
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun if (enabled) {
313*4882a593Smuzhiyun if (rx8010->rtc->uie_rtctimer.enabled)
314*4882a593Smuzhiyun ctrl |= RX8010_CTRL_UIE;
315*4882a593Smuzhiyun if (rx8010->rtc->aie_timer.enabled)
316*4882a593Smuzhiyun ctrl |= (RX8010_CTRL_AIE | RX8010_CTRL_UIE);
317*4882a593Smuzhiyun } else {
318*4882a593Smuzhiyun if (!rx8010->rtc->uie_rtctimer.enabled)
319*4882a593Smuzhiyun ctrl &= ~RX8010_CTRL_UIE;
320*4882a593Smuzhiyun if (!rx8010->rtc->aie_timer.enabled)
321*4882a593Smuzhiyun ctrl &= ~RX8010_CTRL_AIE;
322*4882a593Smuzhiyun }
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun err = regmap_clear_bits(rx8010->regs, RX8010_FLAG, RX8010_FLAG_AF);
325*4882a593Smuzhiyun if (err)
326*4882a593Smuzhiyun return err;
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun if (ctrl != rx8010->ctrlreg) {
329*4882a593Smuzhiyun rx8010->ctrlreg = ctrl;
330*4882a593Smuzhiyun err = regmap_write(rx8010->regs, RX8010_CTRL, rx8010->ctrlreg);
331*4882a593Smuzhiyun if (err)
332*4882a593Smuzhiyun return err;
333*4882a593Smuzhiyun }
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun return 0;
336*4882a593Smuzhiyun }
337*4882a593Smuzhiyun
rx8010_ioctl(struct device * dev,unsigned int cmd,unsigned long arg)338*4882a593Smuzhiyun static int rx8010_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
339*4882a593Smuzhiyun {
340*4882a593Smuzhiyun struct rx8010_data *rx8010 = dev_get_drvdata(dev);
341*4882a593Smuzhiyun int tmp, flagreg, err;
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun switch (cmd) {
344*4882a593Smuzhiyun case RTC_VL_READ:
345*4882a593Smuzhiyun err = regmap_read(rx8010->regs, RX8010_FLAG, &flagreg);
346*4882a593Smuzhiyun if (err)
347*4882a593Smuzhiyun return err;
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun tmp = flagreg & RX8010_FLAG_VLF ? RTC_VL_DATA_INVALID : 0;
350*4882a593Smuzhiyun return put_user(tmp, (unsigned int __user *)arg);
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun default:
353*4882a593Smuzhiyun return -ENOIOCTLCMD;
354*4882a593Smuzhiyun }
355*4882a593Smuzhiyun }
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun static const struct rtc_class_ops rx8010_rtc_ops_default = {
358*4882a593Smuzhiyun .read_time = rx8010_get_time,
359*4882a593Smuzhiyun .set_time = rx8010_set_time,
360*4882a593Smuzhiyun .ioctl = rx8010_ioctl,
361*4882a593Smuzhiyun };
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun static const struct rtc_class_ops rx8010_rtc_ops_alarm = {
364*4882a593Smuzhiyun .read_time = rx8010_get_time,
365*4882a593Smuzhiyun .set_time = rx8010_set_time,
366*4882a593Smuzhiyun .ioctl = rx8010_ioctl,
367*4882a593Smuzhiyun .read_alarm = rx8010_read_alarm,
368*4882a593Smuzhiyun .set_alarm = rx8010_set_alarm,
369*4882a593Smuzhiyun .alarm_irq_enable = rx8010_alarm_irq_enable,
370*4882a593Smuzhiyun };
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun static const struct regmap_config rx8010_regmap_config = {
373*4882a593Smuzhiyun .name = "rx8010-rtc",
374*4882a593Smuzhiyun .reg_bits = 8,
375*4882a593Smuzhiyun .val_bits = 8,
376*4882a593Smuzhiyun };
377*4882a593Smuzhiyun
rx8010_probe(struct i2c_client * client)378*4882a593Smuzhiyun static int rx8010_probe(struct i2c_client *client)
379*4882a593Smuzhiyun {
380*4882a593Smuzhiyun struct device *dev = &client->dev;
381*4882a593Smuzhiyun struct rx8010_data *rx8010;
382*4882a593Smuzhiyun int err = 0;
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun rx8010 = devm_kzalloc(dev, sizeof(*rx8010), GFP_KERNEL);
385*4882a593Smuzhiyun if (!rx8010)
386*4882a593Smuzhiyun return -ENOMEM;
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun i2c_set_clientdata(client, rx8010);
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun rx8010->regs = devm_regmap_init_i2c(client, &rx8010_regmap_config);
391*4882a593Smuzhiyun if (IS_ERR(rx8010->regs))
392*4882a593Smuzhiyun return PTR_ERR(rx8010->regs);
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun err = rx8010_init(dev);
395*4882a593Smuzhiyun if (err)
396*4882a593Smuzhiyun return err;
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun rx8010->rtc = devm_rtc_allocate_device(dev);
399*4882a593Smuzhiyun if (IS_ERR(rx8010->rtc))
400*4882a593Smuzhiyun return PTR_ERR(rx8010->rtc);
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun if (client->irq > 0) {
403*4882a593Smuzhiyun dev_info(dev, "IRQ %d supplied\n", client->irq);
404*4882a593Smuzhiyun err = devm_request_threaded_irq(dev, client->irq, NULL,
405*4882a593Smuzhiyun rx8010_irq_1_handler,
406*4882a593Smuzhiyun IRQF_TRIGGER_LOW | IRQF_ONESHOT,
407*4882a593Smuzhiyun "rx8010", client);
408*4882a593Smuzhiyun if (err) {
409*4882a593Smuzhiyun dev_err(dev, "unable to request IRQ\n");
410*4882a593Smuzhiyun return err;
411*4882a593Smuzhiyun }
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun rx8010->rtc->ops = &rx8010_rtc_ops_alarm;
414*4882a593Smuzhiyun } else {
415*4882a593Smuzhiyun rx8010->rtc->ops = &rx8010_rtc_ops_default;
416*4882a593Smuzhiyun }
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun rx8010->rtc->max_user_freq = 1;
419*4882a593Smuzhiyun rx8010->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
420*4882a593Smuzhiyun rx8010->rtc->range_max = RTC_TIMESTAMP_END_2099;
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun return rtc_register_device(rx8010->rtc);
423*4882a593Smuzhiyun }
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun static struct i2c_driver rx8010_driver = {
426*4882a593Smuzhiyun .driver = {
427*4882a593Smuzhiyun .name = "rtc-rx8010",
428*4882a593Smuzhiyun .of_match_table = of_match_ptr(rx8010_of_match),
429*4882a593Smuzhiyun },
430*4882a593Smuzhiyun .probe_new = rx8010_probe,
431*4882a593Smuzhiyun .id_table = rx8010_id,
432*4882a593Smuzhiyun };
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun module_i2c_driver(rx8010_driver);
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun MODULE_AUTHOR("Akshay Bhat <akshay.bhat@timesys.com>");
437*4882a593Smuzhiyun MODULE_DESCRIPTION("Epson RX8010SJ RTC driver");
438*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
439