1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * RTC driver for Rockchip RK808
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Author: Chris Zhong <zyw@rock-chips.com>
8*4882a593Smuzhiyun * Author: Zhang Qing <zhangqing@rock-chips.com>
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/kernel.h>
13*4882a593Smuzhiyun #include <linux/rtc.h>
14*4882a593Smuzhiyun #include <linux/bcd.h>
15*4882a593Smuzhiyun #include <linux/mfd/rk808.h>
16*4882a593Smuzhiyun #include <linux/platform_device.h>
17*4882a593Smuzhiyun #include <linux/i2c.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun /* RTC_CTRL_REG bitfields */
20*4882a593Smuzhiyun #define BIT_RTC_CTRL_REG_STOP_RTC_M BIT(0)
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun /* RK808 has a shadowed register for saving a "frozen" RTC time.
23*4882a593Smuzhiyun * When user setting "GET_TIME" to 1, the time will save in this shadowed
24*4882a593Smuzhiyun * register. If set "READSEL" to 1, user read rtc time register, actually
25*4882a593Smuzhiyun * get the time of that moment. If we need the real time, clr this bit.
26*4882a593Smuzhiyun */
27*4882a593Smuzhiyun #define BIT_RTC_CTRL_REG_RTC_GET_TIME BIT(6)
28*4882a593Smuzhiyun #define BIT_RTC_CTRL_REG_RTC_READSEL_M BIT(7)
29*4882a593Smuzhiyun #define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M BIT(3)
30*4882a593Smuzhiyun #define RTC_STATUS_MASK 0xFE
31*4882a593Smuzhiyun #define RTC_ALARM_STATUS BIT(6)
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #define SECONDS_REG_MSK 0x7F
34*4882a593Smuzhiyun #define MINUTES_REG_MAK 0x7F
35*4882a593Smuzhiyun #define HOURS_REG_MSK 0x3F
36*4882a593Smuzhiyun #define DAYS_REG_MSK 0x3F
37*4882a593Smuzhiyun #define MONTHS_REG_MSK 0x1F
38*4882a593Smuzhiyun #define YEARS_REG_MSK 0xFF
39*4882a593Smuzhiyun #define WEEKS_REG_MSK 0x7
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun #define RTC_NEED_TRANSITIONS BIT(0)
42*4882a593Smuzhiyun /* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun #define NUM_TIME_REGS (RK808_WEEKS_REG - RK808_SECONDS_REG + 1)
45*4882a593Smuzhiyun #define NUM_ALARM_REGS (RK808_ALARM_YEARS_REG - RK808_ALARM_SECONDS_REG + 1)
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun struct rk_rtc_compat_reg {
48*4882a593Smuzhiyun unsigned int ctrl_reg;
49*4882a593Smuzhiyun unsigned int status_reg;
50*4882a593Smuzhiyun unsigned int alarm_seconds_reg;
51*4882a593Smuzhiyun unsigned int int_reg;
52*4882a593Smuzhiyun unsigned int seconds_reg;
53*4882a593Smuzhiyun };
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun struct rk808_rtc {
56*4882a593Smuzhiyun struct rk808 *rk808;
57*4882a593Smuzhiyun struct rtc_device *rtc;
58*4882a593Smuzhiyun struct rk_rtc_compat_reg *creg;
59*4882a593Smuzhiyun int irq;
60*4882a593Smuzhiyun unsigned int flag;
61*4882a593Smuzhiyun };
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun /*
64*4882a593Smuzhiyun * The Rockchip calendar used by the RK808 counts November with 31 days. We use
65*4882a593Smuzhiyun * these translation functions to convert its dates to/from the Gregorian
66*4882a593Smuzhiyun * calendar used by the rest of the world. We arbitrarily define Jan 1st, 2016
67*4882a593Smuzhiyun * as the day when both calendars were in sync, and treat all other dates
68*4882a593Smuzhiyun * relative to that.
69*4882a593Smuzhiyun * NOTE: Other system software (e.g. firmware) that reads the same hardware must
70*4882a593Smuzhiyun * implement this exact same conversion algorithm, with the same anchor date.
71*4882a593Smuzhiyun */
nov2dec_transitions(struct rtc_time * tm)72*4882a593Smuzhiyun static time64_t nov2dec_transitions(struct rtc_time *tm)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun return (tm->tm_year + 1900) - 2016 + (tm->tm_mon + 1 > 11 ? 1 : 0);
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun
rockchip_to_gregorian(struct rtc_time * tm)77*4882a593Smuzhiyun static void rockchip_to_gregorian(struct rtc_time *tm)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun /* If it's Nov 31st, rtc_tm_to_time64() will count that like Dec 1st */
80*4882a593Smuzhiyun time64_t time = rtc_tm_to_time64(tm);
81*4882a593Smuzhiyun rtc_time64_to_tm(time + nov2dec_transitions(tm) * 86400, tm);
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun
gregorian_to_rockchip(struct rtc_time * tm)84*4882a593Smuzhiyun static void gregorian_to_rockchip(struct rtc_time *tm)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun time64_t extra_days = nov2dec_transitions(tm);
87*4882a593Smuzhiyun time64_t time = rtc_tm_to_time64(tm);
88*4882a593Smuzhiyun rtc_time64_to_tm(time - extra_days * 86400, tm);
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun /* Compensate if we went back over Nov 31st (will work up to 2381) */
91*4882a593Smuzhiyun if (nov2dec_transitions(tm) < extra_days) {
92*4882a593Smuzhiyun if (tm->tm_mon + 1 == 11)
93*4882a593Smuzhiyun tm->tm_mday++; /* This may result in 31! */
94*4882a593Smuzhiyun else
95*4882a593Smuzhiyun rtc_time64_to_tm(time - (extra_days - 1) * 86400, tm);
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun /* Read current time and date in RTC */
rk808_rtc_readtime(struct device * dev,struct rtc_time * tm)100*4882a593Smuzhiyun static int rk808_rtc_readtime(struct device *dev, struct rtc_time *tm)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun struct rk808_rtc *rk808_rtc = dev_get_drvdata(dev);
103*4882a593Smuzhiyun struct rk808 *rk808 = rk808_rtc->rk808;
104*4882a593Smuzhiyun u8 rtc_data[NUM_TIME_REGS];
105*4882a593Smuzhiyun int ret;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun /* Force an update of the shadowed registers right now */
108*4882a593Smuzhiyun ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg,
109*4882a593Smuzhiyun BIT_RTC_CTRL_REG_RTC_GET_TIME,
110*4882a593Smuzhiyun BIT_RTC_CTRL_REG_RTC_GET_TIME);
111*4882a593Smuzhiyun if (ret) {
112*4882a593Smuzhiyun dev_err(dev, "Failed to update bits rtc_ctrl: %d\n", ret);
113*4882a593Smuzhiyun return ret;
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun /*
117*4882a593Smuzhiyun * After we set the GET_TIME bit, the rtc time can't be read
118*4882a593Smuzhiyun * immediately. So we should wait up to 31.25 us, about one cycle of
119*4882a593Smuzhiyun * 32khz. If we clear the GET_TIME bit here, the time of i2c transfer
120*4882a593Smuzhiyun * certainly more than 31.25us: 16 * 2.5us at 400kHz bus frequency.
121*4882a593Smuzhiyun */
122*4882a593Smuzhiyun ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg,
123*4882a593Smuzhiyun BIT_RTC_CTRL_REG_RTC_GET_TIME,
124*4882a593Smuzhiyun 0);
125*4882a593Smuzhiyun if (ret) {
126*4882a593Smuzhiyun dev_err(dev, "Failed to update bits rtc_ctrl: %d\n", ret);
127*4882a593Smuzhiyun return ret;
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun ret = regmap_bulk_read(rk808->regmap, rk808_rtc->creg->seconds_reg,
131*4882a593Smuzhiyun rtc_data, NUM_TIME_REGS);
132*4882a593Smuzhiyun if (ret) {
133*4882a593Smuzhiyun dev_err(dev, "Failed to bulk read rtc_data: %d\n", ret);
134*4882a593Smuzhiyun return ret;
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun tm->tm_sec = bcd2bin(rtc_data[0] & SECONDS_REG_MSK);
138*4882a593Smuzhiyun tm->tm_min = bcd2bin(rtc_data[1] & MINUTES_REG_MAK);
139*4882a593Smuzhiyun tm->tm_hour = bcd2bin(rtc_data[2] & HOURS_REG_MSK);
140*4882a593Smuzhiyun tm->tm_mday = bcd2bin(rtc_data[3] & DAYS_REG_MSK);
141*4882a593Smuzhiyun tm->tm_mon = (bcd2bin(rtc_data[4] & MONTHS_REG_MSK)) - 1;
142*4882a593Smuzhiyun tm->tm_year = (bcd2bin(rtc_data[5] & YEARS_REG_MSK)) + 100;
143*4882a593Smuzhiyun tm->tm_wday = bcd2bin(rtc_data[6] & WEEKS_REG_MSK);
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun if (rk808_rtc->flag & RTC_NEED_TRANSITIONS)
146*4882a593Smuzhiyun rockchip_to_gregorian(tm);
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun dev_dbg(dev, "RTC date/time %4d-%02d-%02d(%d) %02d:%02d:%02d\n",
149*4882a593Smuzhiyun 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
150*4882a593Smuzhiyun tm->tm_wday, tm->tm_hour, tm->tm_min, tm->tm_sec);
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun return ret;
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun /* Set current time and date in RTC */
rk808_rtc_set_time(struct device * dev,struct rtc_time * tm)156*4882a593Smuzhiyun static int rk808_rtc_set_time(struct device *dev, struct rtc_time *tm)
157*4882a593Smuzhiyun {
158*4882a593Smuzhiyun struct rk808_rtc *rk808_rtc = dev_get_drvdata(dev);
159*4882a593Smuzhiyun struct rk808 *rk808 = rk808_rtc->rk808;
160*4882a593Smuzhiyun u8 rtc_data[NUM_TIME_REGS];
161*4882a593Smuzhiyun int ret;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun dev_dbg(dev, "set RTC date/time %4d-%02d-%02d(%d) %02d:%02d:%02d\n",
164*4882a593Smuzhiyun 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
165*4882a593Smuzhiyun tm->tm_wday, tm->tm_hour, tm->tm_min, tm->tm_sec);
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun if (rk808_rtc->flag & RTC_NEED_TRANSITIONS)
168*4882a593Smuzhiyun gregorian_to_rockchip(tm);
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun rtc_data[0] = bin2bcd(tm->tm_sec);
171*4882a593Smuzhiyun rtc_data[1] = bin2bcd(tm->tm_min);
172*4882a593Smuzhiyun rtc_data[2] = bin2bcd(tm->tm_hour);
173*4882a593Smuzhiyun rtc_data[3] = bin2bcd(tm->tm_mday);
174*4882a593Smuzhiyun rtc_data[4] = bin2bcd(tm->tm_mon + 1);
175*4882a593Smuzhiyun rtc_data[5] = bin2bcd(tm->tm_year - 100);
176*4882a593Smuzhiyun rtc_data[6] = bin2bcd(tm->tm_wday);
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun /* Stop RTC while updating the RTC registers */
179*4882a593Smuzhiyun ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg,
180*4882a593Smuzhiyun BIT_RTC_CTRL_REG_STOP_RTC_M,
181*4882a593Smuzhiyun BIT_RTC_CTRL_REG_STOP_RTC_M);
182*4882a593Smuzhiyun if (ret) {
183*4882a593Smuzhiyun dev_err(dev, "Failed to update RTC control: %d\n", ret);
184*4882a593Smuzhiyun return ret;
185*4882a593Smuzhiyun }
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun ret = regmap_bulk_write(rk808->regmap, rk808_rtc->creg->seconds_reg,
188*4882a593Smuzhiyun rtc_data, NUM_TIME_REGS);
189*4882a593Smuzhiyun if (ret) {
190*4882a593Smuzhiyun dev_err(dev, "Failed to bull write rtc_data: %d\n", ret);
191*4882a593Smuzhiyun return ret;
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun /* Start RTC again */
194*4882a593Smuzhiyun ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg,
195*4882a593Smuzhiyun BIT_RTC_CTRL_REG_STOP_RTC_M, 0);
196*4882a593Smuzhiyun if (ret) {
197*4882a593Smuzhiyun dev_err(dev, "Failed to update RTC control: %d\n", ret);
198*4882a593Smuzhiyun return ret;
199*4882a593Smuzhiyun }
200*4882a593Smuzhiyun return 0;
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun /* Read alarm time and date in RTC */
rk808_rtc_readalarm(struct device * dev,struct rtc_wkalrm * alrm)204*4882a593Smuzhiyun static int rk808_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
205*4882a593Smuzhiyun {
206*4882a593Smuzhiyun struct rk808_rtc *rk808_rtc = dev_get_drvdata(dev);
207*4882a593Smuzhiyun struct rk808 *rk808 = rk808_rtc->rk808;
208*4882a593Smuzhiyun u8 alrm_data[NUM_ALARM_REGS];
209*4882a593Smuzhiyun uint32_t int_reg;
210*4882a593Smuzhiyun int ret;
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun ret = regmap_bulk_read(rk808->regmap,
213*4882a593Smuzhiyun rk808_rtc->creg->alarm_seconds_reg,
214*4882a593Smuzhiyun alrm_data, NUM_ALARM_REGS);
215*4882a593Smuzhiyun if (ret) {
216*4882a593Smuzhiyun dev_err(dev, "Failed to read RTC alarm date REG: %d\n", ret);
217*4882a593Smuzhiyun return ret;
218*4882a593Smuzhiyun }
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun alrm->time.tm_sec = bcd2bin(alrm_data[0] & SECONDS_REG_MSK);
221*4882a593Smuzhiyun alrm->time.tm_min = bcd2bin(alrm_data[1] & MINUTES_REG_MAK);
222*4882a593Smuzhiyun alrm->time.tm_hour = bcd2bin(alrm_data[2] & HOURS_REG_MSK);
223*4882a593Smuzhiyun alrm->time.tm_mday = bcd2bin(alrm_data[3] & DAYS_REG_MSK);
224*4882a593Smuzhiyun alrm->time.tm_mon = (bcd2bin(alrm_data[4] & MONTHS_REG_MSK)) - 1;
225*4882a593Smuzhiyun alrm->time.tm_year = (bcd2bin(alrm_data[5] & YEARS_REG_MSK)) + 100;
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun if (rk808_rtc->flag & RTC_NEED_TRANSITIONS)
228*4882a593Smuzhiyun rockchip_to_gregorian(&alrm->time);
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun ret = regmap_read(rk808->regmap, rk808_rtc->creg->int_reg, &int_reg);
231*4882a593Smuzhiyun if (ret) {
232*4882a593Smuzhiyun dev_err(dev, "Failed to read RTC INT REG: %d\n", ret);
233*4882a593Smuzhiyun return ret;
234*4882a593Smuzhiyun }
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun dev_dbg(dev, "alrm read RTC date/time %ptRd(%d) %ptRt\n",
237*4882a593Smuzhiyun &alrm->time, alrm->time.tm_wday, &alrm->time);
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun alrm->enabled = (int_reg & BIT_RTC_INTERRUPTS_REG_IT_ALARM_M) ? 1 : 0;
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun return 0;
242*4882a593Smuzhiyun }
243*4882a593Smuzhiyun
rk808_rtc_stop_alarm(struct rk808_rtc * rk808_rtc)244*4882a593Smuzhiyun static int rk808_rtc_stop_alarm(struct rk808_rtc *rk808_rtc)
245*4882a593Smuzhiyun {
246*4882a593Smuzhiyun struct rk808 *rk808 = rk808_rtc->rk808;
247*4882a593Smuzhiyun int ret;
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->int_reg,
250*4882a593Smuzhiyun BIT_RTC_INTERRUPTS_REG_IT_ALARM_M, 0);
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun /*
253*4882a593Smuzhiyun * The rtc alarm status(BIT(6)) must be cleared after alarm 1s or
254*4882a593Smuzhiyun * after the alarm is disabled.
255*4882a593Smuzhiyun */
256*4882a593Smuzhiyun ret = regmap_write(rk808->regmap, rk808_rtc->creg->status_reg,
257*4882a593Smuzhiyun RTC_ALARM_STATUS);
258*4882a593Smuzhiyun return ret;
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun
rk808_rtc_start_alarm(struct rk808_rtc * rk808_rtc)261*4882a593Smuzhiyun static int rk808_rtc_start_alarm(struct rk808_rtc *rk808_rtc)
262*4882a593Smuzhiyun {
263*4882a593Smuzhiyun struct rk808 *rk808 = rk808_rtc->rk808;
264*4882a593Smuzhiyun int ret;
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->int_reg,
267*4882a593Smuzhiyun BIT_RTC_INTERRUPTS_REG_IT_ALARM_M,
268*4882a593Smuzhiyun BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun return ret;
271*4882a593Smuzhiyun }
272*4882a593Smuzhiyun
rk808_rtc_setalarm(struct device * dev,struct rtc_wkalrm * alrm)273*4882a593Smuzhiyun static int rk808_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
274*4882a593Smuzhiyun {
275*4882a593Smuzhiyun struct rk808_rtc *rk808_rtc = dev_get_drvdata(dev);
276*4882a593Smuzhiyun struct rk808 *rk808 = rk808_rtc->rk808;
277*4882a593Smuzhiyun u8 alrm_data[NUM_ALARM_REGS];
278*4882a593Smuzhiyun int ret;
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun ret = rk808_rtc_stop_alarm(rk808_rtc);
281*4882a593Smuzhiyun if (ret) {
282*4882a593Smuzhiyun dev_err(dev, "Failed to stop alarm: %d\n", ret);
283*4882a593Smuzhiyun return ret;
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun dev_dbg(dev, "alrm set RTC date/time %ptRd(%d) %ptRt\n",
286*4882a593Smuzhiyun &alrm->time, alrm->time.tm_wday, &alrm->time);
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun if (rk808_rtc->flag & RTC_NEED_TRANSITIONS)
289*4882a593Smuzhiyun gregorian_to_rockchip(&alrm->time);
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun alrm_data[0] = bin2bcd(alrm->time.tm_sec);
292*4882a593Smuzhiyun alrm_data[1] = bin2bcd(alrm->time.tm_min);
293*4882a593Smuzhiyun alrm_data[2] = bin2bcd(alrm->time.tm_hour);
294*4882a593Smuzhiyun alrm_data[3] = bin2bcd(alrm->time.tm_mday);
295*4882a593Smuzhiyun alrm_data[4] = bin2bcd(alrm->time.tm_mon + 1);
296*4882a593Smuzhiyun alrm_data[5] = bin2bcd(alrm->time.tm_year - 100);
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun ret = regmap_bulk_write(rk808->regmap,
299*4882a593Smuzhiyun rk808_rtc->creg->alarm_seconds_reg,
300*4882a593Smuzhiyun alrm_data, NUM_ALARM_REGS);
301*4882a593Smuzhiyun if (ret) {
302*4882a593Smuzhiyun dev_err(dev, "Failed to bulk write: %d\n", ret);
303*4882a593Smuzhiyun return ret;
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun if (alrm->enabled) {
306*4882a593Smuzhiyun ret = rk808_rtc_start_alarm(rk808_rtc);
307*4882a593Smuzhiyun if (ret) {
308*4882a593Smuzhiyun dev_err(dev, "Failed to start alarm: %d\n", ret);
309*4882a593Smuzhiyun return ret;
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun }
312*4882a593Smuzhiyun return 0;
313*4882a593Smuzhiyun }
314*4882a593Smuzhiyun
rk808_rtc_alarm_irq_enable(struct device * dev,unsigned int enabled)315*4882a593Smuzhiyun static int rk808_rtc_alarm_irq_enable(struct device *dev,
316*4882a593Smuzhiyun unsigned int enabled)
317*4882a593Smuzhiyun {
318*4882a593Smuzhiyun struct rk808_rtc *rk808_rtc = dev_get_drvdata(dev);
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun if (enabled)
321*4882a593Smuzhiyun return rk808_rtc_start_alarm(rk808_rtc);
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun return rk808_rtc_stop_alarm(rk808_rtc);
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun /*
327*4882a593Smuzhiyun * We will just handle setting the frequency and make use the framework for
328*4882a593Smuzhiyun * reading the periodic interupts.
329*4882a593Smuzhiyun *
330*4882a593Smuzhiyun * @freq: Current periodic IRQ freq:
331*4882a593Smuzhiyun * bit 0: every second
332*4882a593Smuzhiyun * bit 1: every minute
333*4882a593Smuzhiyun * bit 2: every hour
334*4882a593Smuzhiyun * bit 3: every day
335*4882a593Smuzhiyun */
rk808_alarm_irq(int irq,void * data)336*4882a593Smuzhiyun static irqreturn_t rk808_alarm_irq(int irq, void *data)
337*4882a593Smuzhiyun {
338*4882a593Smuzhiyun struct rk808_rtc *rk808_rtc = data;
339*4882a593Smuzhiyun struct rk808 *rk808 = rk808_rtc->rk808;
340*4882a593Smuzhiyun struct i2c_client *client = rk808->i2c;
341*4882a593Smuzhiyun int ret;
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun ret = regmap_write(rk808->regmap, rk808_rtc->creg->status_reg,
344*4882a593Smuzhiyun RTC_STATUS_MASK);
345*4882a593Smuzhiyun if (ret) {
346*4882a593Smuzhiyun dev_err(&client->dev,
347*4882a593Smuzhiyun "%s:Failed to update RTC status: %d\n", __func__, ret);
348*4882a593Smuzhiyun return ret;
349*4882a593Smuzhiyun }
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun rtc_update_irq(rk808_rtc->rtc, 1, RTC_IRQF | RTC_AF);
352*4882a593Smuzhiyun dev_dbg(&client->dev,
353*4882a593Smuzhiyun "%s:irq=%d\n", __func__, irq);
354*4882a593Smuzhiyun return IRQ_HANDLED;
355*4882a593Smuzhiyun }
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun static const struct rtc_class_ops rk808_rtc_ops = {
358*4882a593Smuzhiyun .read_time = rk808_rtc_readtime,
359*4882a593Smuzhiyun .set_time = rk808_rtc_set_time,
360*4882a593Smuzhiyun .read_alarm = rk808_rtc_readalarm,
361*4882a593Smuzhiyun .set_alarm = rk808_rtc_setalarm,
362*4882a593Smuzhiyun .alarm_irq_enable = rk808_rtc_alarm_irq_enable,
363*4882a593Smuzhiyun };
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
366*4882a593Smuzhiyun /* Turn off the alarm if it should not be a wake source. */
rk808_rtc_suspend(struct device * dev)367*4882a593Smuzhiyun static int rk808_rtc_suspend(struct device *dev)
368*4882a593Smuzhiyun {
369*4882a593Smuzhiyun struct rk808_rtc *rk808_rtc = dev_get_drvdata(dev);
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun if (device_may_wakeup(dev))
372*4882a593Smuzhiyun enable_irq_wake(rk808_rtc->irq);
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun return 0;
375*4882a593Smuzhiyun }
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun /* Enable the alarm if it should be enabled (in case it was disabled to
378*4882a593Smuzhiyun * prevent use as a wake source).
379*4882a593Smuzhiyun */
rk808_rtc_resume(struct device * dev)380*4882a593Smuzhiyun static int rk808_rtc_resume(struct device *dev)
381*4882a593Smuzhiyun {
382*4882a593Smuzhiyun struct rk808_rtc *rk808_rtc = dev_get_drvdata(dev);
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun if (device_may_wakeup(dev))
385*4882a593Smuzhiyun disable_irq_wake(rk808_rtc->irq);
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun return 0;
388*4882a593Smuzhiyun }
389*4882a593Smuzhiyun #endif
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(rk808_rtc_pm_ops,
392*4882a593Smuzhiyun rk808_rtc_suspend, rk808_rtc_resume);
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun static struct rk_rtc_compat_reg rk808_creg = {
395*4882a593Smuzhiyun .ctrl_reg = RK808_RTC_CTRL_REG,
396*4882a593Smuzhiyun .status_reg = RK808_RTC_STATUS_REG,
397*4882a593Smuzhiyun .alarm_seconds_reg = RK808_ALARM_SECONDS_REG,
398*4882a593Smuzhiyun .int_reg = RK808_RTC_INT_REG,
399*4882a593Smuzhiyun .seconds_reg = RK808_SECONDS_REG,
400*4882a593Smuzhiyun };
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun static struct rk_rtc_compat_reg rk817_creg = {
403*4882a593Smuzhiyun .ctrl_reg = RK817_RTC_CTRL_REG,
404*4882a593Smuzhiyun .status_reg = RK817_RTC_STATUS_REG,
405*4882a593Smuzhiyun .alarm_seconds_reg = RK817_ALARM_SECONDS_REG,
406*4882a593Smuzhiyun .int_reg = RK817_RTC_INT_REG,
407*4882a593Smuzhiyun .seconds_reg = RK817_SECONDS_REG,
408*4882a593Smuzhiyun };
409*4882a593Smuzhiyun
rk808_rtc_probe(struct platform_device * pdev)410*4882a593Smuzhiyun static int rk808_rtc_probe(struct platform_device *pdev)
411*4882a593Smuzhiyun {
412*4882a593Smuzhiyun struct rk808 *rk808 = dev_get_drvdata(pdev->dev.parent);
413*4882a593Smuzhiyun struct rk808_rtc *rk808_rtc;
414*4882a593Smuzhiyun struct device_node *np;
415*4882a593Smuzhiyun int ret;
416*4882a593Smuzhiyun
417*4882a593Smuzhiyun switch (rk808->variant) {
418*4882a593Smuzhiyun case RK805_ID:
419*4882a593Smuzhiyun case RK808_ID:
420*4882a593Smuzhiyun case RK816_ID:
421*4882a593Smuzhiyun case RK818_ID:
422*4882a593Smuzhiyun np = of_get_child_by_name(pdev->dev.parent->of_node, "rtc");
423*4882a593Smuzhiyun if (np && !of_device_is_available(np)) {
424*4882a593Smuzhiyun dev_info(&pdev->dev, "device is disabled\n");
425*4882a593Smuzhiyun return -EINVAL;
426*4882a593Smuzhiyun }
427*4882a593Smuzhiyun break;
428*4882a593Smuzhiyun default:
429*4882a593Smuzhiyun break;
430*4882a593Smuzhiyun }
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun rk808_rtc = devm_kzalloc(&pdev->dev, sizeof(*rk808_rtc), GFP_KERNEL);
433*4882a593Smuzhiyun if (rk808_rtc == NULL)
434*4882a593Smuzhiyun return -ENOMEM;
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun switch (rk808->variant) {
437*4882a593Smuzhiyun case RK808_ID:
438*4882a593Smuzhiyun case RK818_ID:
439*4882a593Smuzhiyun rk808_rtc->creg = &rk808_creg;
440*4882a593Smuzhiyun rk808_rtc->flag |= RTC_NEED_TRANSITIONS;
441*4882a593Smuzhiyun break;
442*4882a593Smuzhiyun case RK805_ID:
443*4882a593Smuzhiyun case RK816_ID:
444*4882a593Smuzhiyun rk808_rtc->creg = &rk808_creg;
445*4882a593Smuzhiyun break;
446*4882a593Smuzhiyun case RK809_ID:
447*4882a593Smuzhiyun case RK817_ID:
448*4882a593Smuzhiyun rk808_rtc->creg = &rk817_creg;
449*4882a593Smuzhiyun break;
450*4882a593Smuzhiyun default:
451*4882a593Smuzhiyun rk808_rtc->creg = &rk808_creg;
452*4882a593Smuzhiyun break;
453*4882a593Smuzhiyun }
454*4882a593Smuzhiyun platform_set_drvdata(pdev, rk808_rtc);
455*4882a593Smuzhiyun rk808_rtc->rk808 = rk808;
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun /* start rtc running by default, and use shadowed timer. */
458*4882a593Smuzhiyun ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg,
459*4882a593Smuzhiyun BIT_RTC_CTRL_REG_STOP_RTC_M |
460*4882a593Smuzhiyun BIT_RTC_CTRL_REG_RTC_READSEL_M,
461*4882a593Smuzhiyun BIT_RTC_CTRL_REG_RTC_READSEL_M);
462*4882a593Smuzhiyun if (ret) {
463*4882a593Smuzhiyun dev_err(&pdev->dev,
464*4882a593Smuzhiyun "Failed to update RTC control: %d\n", ret);
465*4882a593Smuzhiyun return ret;
466*4882a593Smuzhiyun }
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun ret = regmap_write(rk808->regmap, rk808_rtc->creg->status_reg,
469*4882a593Smuzhiyun RTC_STATUS_MASK);
470*4882a593Smuzhiyun if (ret) {
471*4882a593Smuzhiyun dev_err(&pdev->dev,
472*4882a593Smuzhiyun "Failed to write RTC status: %d\n", ret);
473*4882a593Smuzhiyun return ret;
474*4882a593Smuzhiyun }
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun device_init_wakeup(&pdev->dev, 1);
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun rk808_rtc->rtc = devm_rtc_allocate_device(&pdev->dev);
479*4882a593Smuzhiyun if (IS_ERR(rk808_rtc->rtc))
480*4882a593Smuzhiyun return PTR_ERR(rk808_rtc->rtc);
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun rk808_rtc->rtc->ops = &rk808_rtc_ops;
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun rk808_rtc->irq = platform_get_irq(pdev, 0);
485*4882a593Smuzhiyun if (rk808_rtc->irq < 0)
486*4882a593Smuzhiyun return rk808_rtc->irq;
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun /* request alarm irq of rk808 */
489*4882a593Smuzhiyun ret = devm_request_threaded_irq(&pdev->dev, rk808_rtc->irq, NULL,
490*4882a593Smuzhiyun rk808_alarm_irq, 0,
491*4882a593Smuzhiyun "RTC alarm", rk808_rtc);
492*4882a593Smuzhiyun if (ret) {
493*4882a593Smuzhiyun dev_err(&pdev->dev, "Failed to request alarm IRQ %d: %d\n",
494*4882a593Smuzhiyun rk808_rtc->irq, ret);
495*4882a593Smuzhiyun return ret;
496*4882a593Smuzhiyun }
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun return rtc_register_device(rk808_rtc->rtc);
499*4882a593Smuzhiyun }
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun static struct platform_driver rk808_rtc_driver = {
502*4882a593Smuzhiyun .probe = rk808_rtc_probe,
503*4882a593Smuzhiyun .driver = {
504*4882a593Smuzhiyun .name = "rk808-rtc",
505*4882a593Smuzhiyun .pm = &rk808_rtc_pm_ops,
506*4882a593Smuzhiyun },
507*4882a593Smuzhiyun };
508*4882a593Smuzhiyun
509*4882a593Smuzhiyun module_platform_driver(rk808_rtc_driver);
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun MODULE_DESCRIPTION("RTC driver for the rk808 series PMICs");
512*4882a593Smuzhiyun MODULE_AUTHOR("Chris Zhong <zyw@rock-chips.com>");
513*4882a593Smuzhiyun MODULE_AUTHOR("Zhang Qing <zhangqing@rock-chips.com>");
514*4882a593Smuzhiyun MODULE_LICENSE("GPL");
515*4882a593Smuzhiyun MODULE_ALIAS("platform:rk808-rtc");
516