1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * rtc-rc5t583.c -- RICOH RC5T583 Real Time Clock
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
6*4882a593Smuzhiyun * Author: Venu Byravarasu <vbyravarasu@nvidia.com>
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/kernel.h>
10*4882a593Smuzhiyun #include <linux/errno.h>
11*4882a593Smuzhiyun #include <linux/init.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/types.h>
14*4882a593Smuzhiyun #include <linux/rtc.h>
15*4882a593Smuzhiyun #include <linux/bcd.h>
16*4882a593Smuzhiyun #include <linux/platform_device.h>
17*4882a593Smuzhiyun #include <linux/interrupt.h>
18*4882a593Smuzhiyun #include <linux/mfd/rc5t583.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun struct rc5t583_rtc {
21*4882a593Smuzhiyun struct rtc_device *rtc;
22*4882a593Smuzhiyun /* To store the list of enabled interrupts, during system suspend */
23*4882a593Smuzhiyun u32 irqen;
24*4882a593Smuzhiyun };
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun /* Total number of RTC registers needed to set time*/
27*4882a593Smuzhiyun #define NUM_TIME_REGS (RC5T583_RTC_YEAR - RC5T583_RTC_SEC + 1)
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun /* Total number of RTC registers needed to set Y-Alarm*/
30*4882a593Smuzhiyun #define NUM_YAL_REGS (RC5T583_RTC_AY_YEAR - RC5T583_RTC_AY_MIN + 1)
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun /* Set Y-Alarm interrupt */
33*4882a593Smuzhiyun #define SET_YAL BIT(5)
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun /* Get Y-Alarm interrupt status*/
36*4882a593Smuzhiyun #define GET_YAL_STATUS BIT(3)
37*4882a593Smuzhiyun
rc5t583_rtc_alarm_irq_enable(struct device * dev,unsigned enabled)38*4882a593Smuzhiyun static int rc5t583_rtc_alarm_irq_enable(struct device *dev, unsigned enabled)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun struct rc5t583 *rc5t583 = dev_get_drvdata(dev->parent);
41*4882a593Smuzhiyun u8 val;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun /* Set Y-Alarm, based on 'enabled' */
44*4882a593Smuzhiyun val = enabled ? SET_YAL : 0;
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun return regmap_update_bits(rc5t583->regmap, RC5T583_RTC_CTL1, SET_YAL,
47*4882a593Smuzhiyun val);
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun /*
51*4882a593Smuzhiyun * Gets current rc5t583 RTC time and date parameters.
52*4882a593Smuzhiyun *
53*4882a593Smuzhiyun * The RTC's time/alarm representation is not what gmtime(3) requires
54*4882a593Smuzhiyun * Linux to use:
55*4882a593Smuzhiyun *
56*4882a593Smuzhiyun * - Months are 1..12 vs Linux 0-11
57*4882a593Smuzhiyun * - Years are 0..99 vs Linux 1900..N (we assume 21st century)
58*4882a593Smuzhiyun */
rc5t583_rtc_read_time(struct device * dev,struct rtc_time * tm)59*4882a593Smuzhiyun static int rc5t583_rtc_read_time(struct device *dev, struct rtc_time *tm)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun struct rc5t583 *rc5t583 = dev_get_drvdata(dev->parent);
62*4882a593Smuzhiyun u8 rtc_data[NUM_TIME_REGS];
63*4882a593Smuzhiyun int ret;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun ret = regmap_bulk_read(rc5t583->regmap, RC5T583_RTC_SEC, rtc_data,
66*4882a593Smuzhiyun NUM_TIME_REGS);
67*4882a593Smuzhiyun if (ret < 0) {
68*4882a593Smuzhiyun dev_err(dev, "RTC read time failed with err:%d\n", ret);
69*4882a593Smuzhiyun return ret;
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun tm->tm_sec = bcd2bin(rtc_data[0]);
73*4882a593Smuzhiyun tm->tm_min = bcd2bin(rtc_data[1]);
74*4882a593Smuzhiyun tm->tm_hour = bcd2bin(rtc_data[2]);
75*4882a593Smuzhiyun tm->tm_wday = bcd2bin(rtc_data[3]);
76*4882a593Smuzhiyun tm->tm_mday = bcd2bin(rtc_data[4]);
77*4882a593Smuzhiyun tm->tm_mon = bcd2bin(rtc_data[5]) - 1;
78*4882a593Smuzhiyun tm->tm_year = bcd2bin(rtc_data[6]) + 100;
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun return ret;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
rc5t583_rtc_set_time(struct device * dev,struct rtc_time * tm)83*4882a593Smuzhiyun static int rc5t583_rtc_set_time(struct device *dev, struct rtc_time *tm)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun struct rc5t583 *rc5t583 = dev_get_drvdata(dev->parent);
86*4882a593Smuzhiyun unsigned char rtc_data[NUM_TIME_REGS];
87*4882a593Smuzhiyun int ret;
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun rtc_data[0] = bin2bcd(tm->tm_sec);
90*4882a593Smuzhiyun rtc_data[1] = bin2bcd(tm->tm_min);
91*4882a593Smuzhiyun rtc_data[2] = bin2bcd(tm->tm_hour);
92*4882a593Smuzhiyun rtc_data[3] = bin2bcd(tm->tm_wday);
93*4882a593Smuzhiyun rtc_data[4] = bin2bcd(tm->tm_mday);
94*4882a593Smuzhiyun rtc_data[5] = bin2bcd(tm->tm_mon + 1);
95*4882a593Smuzhiyun rtc_data[6] = bin2bcd(tm->tm_year - 100);
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun ret = regmap_bulk_write(rc5t583->regmap, RC5T583_RTC_SEC, rtc_data,
98*4882a593Smuzhiyun NUM_TIME_REGS);
99*4882a593Smuzhiyun if (ret < 0) {
100*4882a593Smuzhiyun dev_err(dev, "RTC set time failed with error %d\n", ret);
101*4882a593Smuzhiyun return ret;
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun return ret;
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun
rc5t583_rtc_read_alarm(struct device * dev,struct rtc_wkalrm * alm)107*4882a593Smuzhiyun static int rc5t583_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
108*4882a593Smuzhiyun {
109*4882a593Smuzhiyun struct rc5t583 *rc5t583 = dev_get_drvdata(dev->parent);
110*4882a593Smuzhiyun unsigned char alarm_data[NUM_YAL_REGS];
111*4882a593Smuzhiyun u32 interrupt_enable;
112*4882a593Smuzhiyun int ret;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun ret = regmap_bulk_read(rc5t583->regmap, RC5T583_RTC_AY_MIN, alarm_data,
115*4882a593Smuzhiyun NUM_YAL_REGS);
116*4882a593Smuzhiyun if (ret < 0) {
117*4882a593Smuzhiyun dev_err(dev, "rtc_read_alarm error %d\n", ret);
118*4882a593Smuzhiyun return ret;
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun alm->time.tm_sec = 0;
122*4882a593Smuzhiyun alm->time.tm_min = bcd2bin(alarm_data[0]);
123*4882a593Smuzhiyun alm->time.tm_hour = bcd2bin(alarm_data[1]);
124*4882a593Smuzhiyun alm->time.tm_mday = bcd2bin(alarm_data[2]);
125*4882a593Smuzhiyun alm->time.tm_mon = bcd2bin(alarm_data[3]) - 1;
126*4882a593Smuzhiyun alm->time.tm_year = bcd2bin(alarm_data[4]) + 100;
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun ret = regmap_read(rc5t583->regmap, RC5T583_RTC_CTL1, &interrupt_enable);
129*4882a593Smuzhiyun if (ret < 0)
130*4882a593Smuzhiyun return ret;
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun /* check if YALE is set */
133*4882a593Smuzhiyun if (interrupt_enable & SET_YAL)
134*4882a593Smuzhiyun alm->enabled = 1;
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun return ret;
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun
rc5t583_rtc_set_alarm(struct device * dev,struct rtc_wkalrm * alm)139*4882a593Smuzhiyun static int rc5t583_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun struct rc5t583 *rc5t583 = dev_get_drvdata(dev->parent);
142*4882a593Smuzhiyun unsigned char alarm_data[NUM_YAL_REGS];
143*4882a593Smuzhiyun int ret;
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun ret = rc5t583_rtc_alarm_irq_enable(dev, 0);
146*4882a593Smuzhiyun if (ret)
147*4882a593Smuzhiyun return ret;
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun alarm_data[0] = bin2bcd(alm->time.tm_min);
150*4882a593Smuzhiyun alarm_data[1] = bin2bcd(alm->time.tm_hour);
151*4882a593Smuzhiyun alarm_data[2] = bin2bcd(alm->time.tm_mday);
152*4882a593Smuzhiyun alarm_data[3] = bin2bcd(alm->time.tm_mon + 1);
153*4882a593Smuzhiyun alarm_data[4] = bin2bcd(alm->time.tm_year - 100);
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun ret = regmap_bulk_write(rc5t583->regmap, RC5T583_RTC_AY_MIN, alarm_data,
156*4882a593Smuzhiyun NUM_YAL_REGS);
157*4882a593Smuzhiyun if (ret) {
158*4882a593Smuzhiyun dev_err(dev, "rtc_set_alarm error %d\n", ret);
159*4882a593Smuzhiyun return ret;
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun if (alm->enabled)
163*4882a593Smuzhiyun ret = rc5t583_rtc_alarm_irq_enable(dev, 1);
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun return ret;
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
rc5t583_rtc_interrupt(int irq,void * rtc)168*4882a593Smuzhiyun static irqreturn_t rc5t583_rtc_interrupt(int irq, void *rtc)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun struct device *dev = rtc;
171*4882a593Smuzhiyun struct rc5t583 *rc5t583 = dev_get_drvdata(dev->parent);
172*4882a593Smuzhiyun struct rc5t583_rtc *rc5t583_rtc = dev_get_drvdata(dev);
173*4882a593Smuzhiyun unsigned long events = 0;
174*4882a593Smuzhiyun int ret;
175*4882a593Smuzhiyun u32 rtc_reg;
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun ret = regmap_read(rc5t583->regmap, RC5T583_RTC_CTL2, &rtc_reg);
178*4882a593Smuzhiyun if (ret < 0)
179*4882a593Smuzhiyun return IRQ_NONE;
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun if (rtc_reg & GET_YAL_STATUS) {
182*4882a593Smuzhiyun events = RTC_IRQF | RTC_AF;
183*4882a593Smuzhiyun /* clear pending Y-alarm interrupt bit */
184*4882a593Smuzhiyun rtc_reg &= ~GET_YAL_STATUS;
185*4882a593Smuzhiyun }
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun ret = regmap_write(rc5t583->regmap, RC5T583_RTC_CTL2, rtc_reg);
188*4882a593Smuzhiyun if (ret)
189*4882a593Smuzhiyun return IRQ_NONE;
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun /* Notify RTC core on event */
192*4882a593Smuzhiyun rtc_update_irq(rc5t583_rtc->rtc, 1, events);
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun return IRQ_HANDLED;
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun static const struct rtc_class_ops rc5t583_rtc_ops = {
198*4882a593Smuzhiyun .read_time = rc5t583_rtc_read_time,
199*4882a593Smuzhiyun .set_time = rc5t583_rtc_set_time,
200*4882a593Smuzhiyun .read_alarm = rc5t583_rtc_read_alarm,
201*4882a593Smuzhiyun .set_alarm = rc5t583_rtc_set_alarm,
202*4882a593Smuzhiyun .alarm_irq_enable = rc5t583_rtc_alarm_irq_enable,
203*4882a593Smuzhiyun };
204*4882a593Smuzhiyun
rc5t583_rtc_probe(struct platform_device * pdev)205*4882a593Smuzhiyun static int rc5t583_rtc_probe(struct platform_device *pdev)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun struct rc5t583 *rc5t583 = dev_get_drvdata(pdev->dev.parent);
208*4882a593Smuzhiyun struct rc5t583_rtc *ricoh_rtc;
209*4882a593Smuzhiyun struct rc5t583_platform_data *pmic_plat_data;
210*4882a593Smuzhiyun int ret;
211*4882a593Smuzhiyun int irq;
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun ricoh_rtc = devm_kzalloc(&pdev->dev, sizeof(struct rc5t583_rtc),
214*4882a593Smuzhiyun GFP_KERNEL);
215*4882a593Smuzhiyun if (!ricoh_rtc)
216*4882a593Smuzhiyun return -ENOMEM;
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun platform_set_drvdata(pdev, ricoh_rtc);
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun /* Clear pending interrupts */
221*4882a593Smuzhiyun ret = regmap_write(rc5t583->regmap, RC5T583_RTC_CTL2, 0);
222*4882a593Smuzhiyun if (ret < 0)
223*4882a593Smuzhiyun return ret;
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun /* clear RTC Adjust register */
226*4882a593Smuzhiyun ret = regmap_write(rc5t583->regmap, RC5T583_RTC_ADJ, 0);
227*4882a593Smuzhiyun if (ret < 0) {
228*4882a593Smuzhiyun dev_err(&pdev->dev, "unable to program rtc_adjust reg\n");
229*4882a593Smuzhiyun return -EBUSY;
230*4882a593Smuzhiyun }
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun pmic_plat_data = dev_get_platdata(rc5t583->dev);
233*4882a593Smuzhiyun irq = pmic_plat_data->irq_base;
234*4882a593Smuzhiyun if (irq <= 0) {
235*4882a593Smuzhiyun dev_warn(&pdev->dev, "Wake up is not possible as irq = %d\n",
236*4882a593Smuzhiyun irq);
237*4882a593Smuzhiyun return ret;
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun irq += RC5T583_IRQ_YALE;
241*4882a593Smuzhiyun ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
242*4882a593Smuzhiyun rc5t583_rtc_interrupt, IRQF_TRIGGER_LOW,
243*4882a593Smuzhiyun "rtc-rc5t583", &pdev->dev);
244*4882a593Smuzhiyun if (ret < 0) {
245*4882a593Smuzhiyun dev_err(&pdev->dev, "IRQ is not free.\n");
246*4882a593Smuzhiyun return ret;
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun device_init_wakeup(&pdev->dev, 1);
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun ricoh_rtc->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
251*4882a593Smuzhiyun &rc5t583_rtc_ops, THIS_MODULE);
252*4882a593Smuzhiyun if (IS_ERR(ricoh_rtc->rtc)) {
253*4882a593Smuzhiyun ret = PTR_ERR(ricoh_rtc->rtc);
254*4882a593Smuzhiyun dev_err(&pdev->dev, "RTC device register: err %d\n", ret);
255*4882a593Smuzhiyun return ret;
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun return 0;
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun /*
262*4882a593Smuzhiyun * Disable rc5t583 RTC interrupts.
263*4882a593Smuzhiyun * Sets status flag to free.
264*4882a593Smuzhiyun */
rc5t583_rtc_remove(struct platform_device * pdev)265*4882a593Smuzhiyun static int rc5t583_rtc_remove(struct platform_device *pdev)
266*4882a593Smuzhiyun {
267*4882a593Smuzhiyun struct rc5t583_rtc *rc5t583_rtc = platform_get_drvdata(pdev);
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun rc5t583_rtc_alarm_irq_enable(&rc5t583_rtc->rtc->dev, 0);
270*4882a593Smuzhiyun return 0;
271*4882a593Smuzhiyun }
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
rc5t583_rtc_suspend(struct device * dev)274*4882a593Smuzhiyun static int rc5t583_rtc_suspend(struct device *dev)
275*4882a593Smuzhiyun {
276*4882a593Smuzhiyun struct rc5t583 *rc5t583 = dev_get_drvdata(dev->parent);
277*4882a593Smuzhiyun struct rc5t583_rtc *rc5t583_rtc = dev_get_drvdata(dev);
278*4882a593Smuzhiyun int ret;
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun /* Store current list of enabled interrupts*/
281*4882a593Smuzhiyun ret = regmap_read(rc5t583->regmap, RC5T583_RTC_CTL1,
282*4882a593Smuzhiyun &rc5t583_rtc->irqen);
283*4882a593Smuzhiyun return ret;
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun
rc5t583_rtc_resume(struct device * dev)286*4882a593Smuzhiyun static int rc5t583_rtc_resume(struct device *dev)
287*4882a593Smuzhiyun {
288*4882a593Smuzhiyun struct rc5t583 *rc5t583 = dev_get_drvdata(dev->parent);
289*4882a593Smuzhiyun struct rc5t583_rtc *rc5t583_rtc = dev_get_drvdata(dev);
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun /* Restore list of enabled interrupts before suspend */
292*4882a593Smuzhiyun return regmap_write(rc5t583->regmap, RC5T583_RTC_CTL1,
293*4882a593Smuzhiyun rc5t583_rtc->irqen);
294*4882a593Smuzhiyun }
295*4882a593Smuzhiyun #endif
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(rc5t583_rtc_pm_ops, rc5t583_rtc_suspend,
298*4882a593Smuzhiyun rc5t583_rtc_resume);
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun static struct platform_driver rc5t583_rtc_driver = {
301*4882a593Smuzhiyun .probe = rc5t583_rtc_probe,
302*4882a593Smuzhiyun .remove = rc5t583_rtc_remove,
303*4882a593Smuzhiyun .driver = {
304*4882a593Smuzhiyun .name = "rtc-rc5t583",
305*4882a593Smuzhiyun .pm = &rc5t583_rtc_pm_ops,
306*4882a593Smuzhiyun },
307*4882a593Smuzhiyun };
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun module_platform_driver(rc5t583_rtc_driver);
310*4882a593Smuzhiyun MODULE_ALIAS("platform:rtc-rc5t583");
311*4882a593Smuzhiyun MODULE_AUTHOR("Venu Byravarasu <vbyravarasu@nvidia.com>");
312*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
313