1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * rtc-palmas.c -- Palmas Real Time Clock driver.
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun * RTC driver for TI Palma series devices like TPS65913,
5*4882a593Smuzhiyun * TPS65914 power management IC.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright (c) 2012, NVIDIA Corporation.
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * Author: Laxman Dewangan <ldewangan@nvidia.com>
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or
12*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License as
13*4882a593Smuzhiyun * published by the Free Software Foundation version 2.
14*4882a593Smuzhiyun *
15*4882a593Smuzhiyun * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
16*4882a593Smuzhiyun * whether express or implied; without even the implied warranty of
17*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18*4882a593Smuzhiyun * General Public License for more details.
19*4882a593Smuzhiyun *
20*4882a593Smuzhiyun * You should have received a copy of the GNU General Public License
21*4882a593Smuzhiyun * along with this program; if not, write to the Free Software
22*4882a593Smuzhiyun * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
23*4882a593Smuzhiyun * 02111-1307, USA
24*4882a593Smuzhiyun */
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #include <linux/bcd.h>
27*4882a593Smuzhiyun #include <linux/errno.h>
28*4882a593Smuzhiyun #include <linux/init.h>
29*4882a593Smuzhiyun #include <linux/interrupt.h>
30*4882a593Smuzhiyun #include <linux/kernel.h>
31*4882a593Smuzhiyun #include <linux/mfd/palmas.h>
32*4882a593Smuzhiyun #include <linux/module.h>
33*4882a593Smuzhiyun #include <linux/of.h>
34*4882a593Smuzhiyun #include <linux/rtc.h>
35*4882a593Smuzhiyun #include <linux/types.h>
36*4882a593Smuzhiyun #include <linux/platform_device.h>
37*4882a593Smuzhiyun #include <linux/pm.h>
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun struct palmas_rtc {
40*4882a593Smuzhiyun struct rtc_device *rtc;
41*4882a593Smuzhiyun struct device *dev;
42*4882a593Smuzhiyun unsigned int irq;
43*4882a593Smuzhiyun };
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun /* Total number of RTC registers needed to set time*/
46*4882a593Smuzhiyun #define PALMAS_NUM_TIME_REGS (PALMAS_YEARS_REG - PALMAS_SECONDS_REG + 1)
47*4882a593Smuzhiyun
palmas_rtc_read_time(struct device * dev,struct rtc_time * tm)48*4882a593Smuzhiyun static int palmas_rtc_read_time(struct device *dev, struct rtc_time *tm)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun unsigned char rtc_data[PALMAS_NUM_TIME_REGS];
51*4882a593Smuzhiyun struct palmas *palmas = dev_get_drvdata(dev->parent);
52*4882a593Smuzhiyun int ret;
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun /* Copy RTC counting registers to static registers or latches */
55*4882a593Smuzhiyun ret = palmas_update_bits(palmas, PALMAS_RTC_BASE, PALMAS_RTC_CTRL_REG,
56*4882a593Smuzhiyun PALMAS_RTC_CTRL_REG_GET_TIME, PALMAS_RTC_CTRL_REG_GET_TIME);
57*4882a593Smuzhiyun if (ret < 0) {
58*4882a593Smuzhiyun dev_err(dev, "RTC CTRL reg update failed, err: %d\n", ret);
59*4882a593Smuzhiyun return ret;
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun ret = palmas_bulk_read(palmas, PALMAS_RTC_BASE, PALMAS_SECONDS_REG,
63*4882a593Smuzhiyun rtc_data, PALMAS_NUM_TIME_REGS);
64*4882a593Smuzhiyun if (ret < 0) {
65*4882a593Smuzhiyun dev_err(dev, "RTC_SECONDS reg read failed, err = %d\n", ret);
66*4882a593Smuzhiyun return ret;
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun tm->tm_sec = bcd2bin(rtc_data[0]);
70*4882a593Smuzhiyun tm->tm_min = bcd2bin(rtc_data[1]);
71*4882a593Smuzhiyun tm->tm_hour = bcd2bin(rtc_data[2]);
72*4882a593Smuzhiyun tm->tm_mday = bcd2bin(rtc_data[3]);
73*4882a593Smuzhiyun tm->tm_mon = bcd2bin(rtc_data[4]) - 1;
74*4882a593Smuzhiyun tm->tm_year = bcd2bin(rtc_data[5]) + 100;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun return ret;
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun
palmas_rtc_set_time(struct device * dev,struct rtc_time * tm)79*4882a593Smuzhiyun static int palmas_rtc_set_time(struct device *dev, struct rtc_time *tm)
80*4882a593Smuzhiyun {
81*4882a593Smuzhiyun unsigned char rtc_data[PALMAS_NUM_TIME_REGS];
82*4882a593Smuzhiyun struct palmas *palmas = dev_get_drvdata(dev->parent);
83*4882a593Smuzhiyun int ret;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun rtc_data[0] = bin2bcd(tm->tm_sec);
86*4882a593Smuzhiyun rtc_data[1] = bin2bcd(tm->tm_min);
87*4882a593Smuzhiyun rtc_data[2] = bin2bcd(tm->tm_hour);
88*4882a593Smuzhiyun rtc_data[3] = bin2bcd(tm->tm_mday);
89*4882a593Smuzhiyun rtc_data[4] = bin2bcd(tm->tm_mon + 1);
90*4882a593Smuzhiyun rtc_data[5] = bin2bcd(tm->tm_year - 100);
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun /* Stop RTC while updating the RTC time registers */
93*4882a593Smuzhiyun ret = palmas_update_bits(palmas, PALMAS_RTC_BASE, PALMAS_RTC_CTRL_REG,
94*4882a593Smuzhiyun PALMAS_RTC_CTRL_REG_STOP_RTC, 0);
95*4882a593Smuzhiyun if (ret < 0) {
96*4882a593Smuzhiyun dev_err(dev, "RTC stop failed, err = %d\n", ret);
97*4882a593Smuzhiyun return ret;
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun ret = palmas_bulk_write(palmas, PALMAS_RTC_BASE, PALMAS_SECONDS_REG,
101*4882a593Smuzhiyun rtc_data, PALMAS_NUM_TIME_REGS);
102*4882a593Smuzhiyun if (ret < 0) {
103*4882a593Smuzhiyun dev_err(dev, "RTC_SECONDS reg write failed, err = %d\n", ret);
104*4882a593Smuzhiyun return ret;
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun /* Start back RTC */
108*4882a593Smuzhiyun ret = palmas_update_bits(palmas, PALMAS_RTC_BASE, PALMAS_RTC_CTRL_REG,
109*4882a593Smuzhiyun PALMAS_RTC_CTRL_REG_STOP_RTC, PALMAS_RTC_CTRL_REG_STOP_RTC);
110*4882a593Smuzhiyun if (ret < 0)
111*4882a593Smuzhiyun dev_err(dev, "RTC start failed, err = %d\n", ret);
112*4882a593Smuzhiyun return ret;
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun
palmas_rtc_alarm_irq_enable(struct device * dev,unsigned enabled)115*4882a593Smuzhiyun static int palmas_rtc_alarm_irq_enable(struct device *dev, unsigned enabled)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun struct palmas *palmas = dev_get_drvdata(dev->parent);
118*4882a593Smuzhiyun u8 val;
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun val = enabled ? PALMAS_RTC_INTERRUPTS_REG_IT_ALARM : 0;
121*4882a593Smuzhiyun return palmas_write(palmas, PALMAS_RTC_BASE,
122*4882a593Smuzhiyun PALMAS_RTC_INTERRUPTS_REG, val);
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun
palmas_rtc_read_alarm(struct device * dev,struct rtc_wkalrm * alm)125*4882a593Smuzhiyun static int palmas_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
126*4882a593Smuzhiyun {
127*4882a593Smuzhiyun unsigned char alarm_data[PALMAS_NUM_TIME_REGS];
128*4882a593Smuzhiyun u32 int_val;
129*4882a593Smuzhiyun struct palmas *palmas = dev_get_drvdata(dev->parent);
130*4882a593Smuzhiyun int ret;
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun ret = palmas_bulk_read(palmas, PALMAS_RTC_BASE,
133*4882a593Smuzhiyun PALMAS_ALARM_SECONDS_REG,
134*4882a593Smuzhiyun alarm_data, PALMAS_NUM_TIME_REGS);
135*4882a593Smuzhiyun if (ret < 0) {
136*4882a593Smuzhiyun dev_err(dev, "RTC_ALARM_SECONDS read failed, err = %d\n", ret);
137*4882a593Smuzhiyun return ret;
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun alm->time.tm_sec = bcd2bin(alarm_data[0]);
141*4882a593Smuzhiyun alm->time.tm_min = bcd2bin(alarm_data[1]);
142*4882a593Smuzhiyun alm->time.tm_hour = bcd2bin(alarm_data[2]);
143*4882a593Smuzhiyun alm->time.tm_mday = bcd2bin(alarm_data[3]);
144*4882a593Smuzhiyun alm->time.tm_mon = bcd2bin(alarm_data[4]) - 1;
145*4882a593Smuzhiyun alm->time.tm_year = bcd2bin(alarm_data[5]) + 100;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun ret = palmas_read(palmas, PALMAS_RTC_BASE, PALMAS_RTC_INTERRUPTS_REG,
148*4882a593Smuzhiyun &int_val);
149*4882a593Smuzhiyun if (ret < 0) {
150*4882a593Smuzhiyun dev_err(dev, "RTC_INTERRUPTS reg read failed, err = %d\n", ret);
151*4882a593Smuzhiyun return ret;
152*4882a593Smuzhiyun }
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun if (int_val & PALMAS_RTC_INTERRUPTS_REG_IT_ALARM)
155*4882a593Smuzhiyun alm->enabled = 1;
156*4882a593Smuzhiyun return ret;
157*4882a593Smuzhiyun }
158*4882a593Smuzhiyun
palmas_rtc_set_alarm(struct device * dev,struct rtc_wkalrm * alm)159*4882a593Smuzhiyun static int palmas_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
160*4882a593Smuzhiyun {
161*4882a593Smuzhiyun unsigned char alarm_data[PALMAS_NUM_TIME_REGS];
162*4882a593Smuzhiyun struct palmas *palmas = dev_get_drvdata(dev->parent);
163*4882a593Smuzhiyun int ret;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun ret = palmas_rtc_alarm_irq_enable(dev, 0);
166*4882a593Smuzhiyun if (ret < 0) {
167*4882a593Smuzhiyun dev_err(dev, "Disable RTC alarm failed\n");
168*4882a593Smuzhiyun return ret;
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun alarm_data[0] = bin2bcd(alm->time.tm_sec);
172*4882a593Smuzhiyun alarm_data[1] = bin2bcd(alm->time.tm_min);
173*4882a593Smuzhiyun alarm_data[2] = bin2bcd(alm->time.tm_hour);
174*4882a593Smuzhiyun alarm_data[3] = bin2bcd(alm->time.tm_mday);
175*4882a593Smuzhiyun alarm_data[4] = bin2bcd(alm->time.tm_mon + 1);
176*4882a593Smuzhiyun alarm_data[5] = bin2bcd(alm->time.tm_year - 100);
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun ret = palmas_bulk_write(palmas, PALMAS_RTC_BASE,
179*4882a593Smuzhiyun PALMAS_ALARM_SECONDS_REG, alarm_data, PALMAS_NUM_TIME_REGS);
180*4882a593Smuzhiyun if (ret < 0) {
181*4882a593Smuzhiyun dev_err(dev, "ALARM_SECONDS_REG write failed, err = %d\n", ret);
182*4882a593Smuzhiyun return ret;
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun if (alm->enabled)
186*4882a593Smuzhiyun ret = palmas_rtc_alarm_irq_enable(dev, 1);
187*4882a593Smuzhiyun return ret;
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun
palmas_clear_interrupts(struct device * dev)190*4882a593Smuzhiyun static int palmas_clear_interrupts(struct device *dev)
191*4882a593Smuzhiyun {
192*4882a593Smuzhiyun struct palmas *palmas = dev_get_drvdata(dev->parent);
193*4882a593Smuzhiyun unsigned int rtc_reg;
194*4882a593Smuzhiyun int ret;
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun ret = palmas_read(palmas, PALMAS_RTC_BASE, PALMAS_RTC_STATUS_REG,
197*4882a593Smuzhiyun &rtc_reg);
198*4882a593Smuzhiyun if (ret < 0) {
199*4882a593Smuzhiyun dev_err(dev, "RTC_STATUS read failed, err = %d\n", ret);
200*4882a593Smuzhiyun return ret;
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun ret = palmas_write(palmas, PALMAS_RTC_BASE, PALMAS_RTC_STATUS_REG,
204*4882a593Smuzhiyun rtc_reg);
205*4882a593Smuzhiyun if (ret < 0) {
206*4882a593Smuzhiyun dev_err(dev, "RTC_STATUS write failed, err = %d\n", ret);
207*4882a593Smuzhiyun return ret;
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun return 0;
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun
palmas_rtc_interrupt(int irq,void * context)212*4882a593Smuzhiyun static irqreturn_t palmas_rtc_interrupt(int irq, void *context)
213*4882a593Smuzhiyun {
214*4882a593Smuzhiyun struct palmas_rtc *palmas_rtc = context;
215*4882a593Smuzhiyun struct device *dev = palmas_rtc->dev;
216*4882a593Smuzhiyun int ret;
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun ret = palmas_clear_interrupts(dev);
219*4882a593Smuzhiyun if (ret < 0) {
220*4882a593Smuzhiyun dev_err(dev, "RTC interrupt clear failed, err = %d\n", ret);
221*4882a593Smuzhiyun return IRQ_NONE;
222*4882a593Smuzhiyun }
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun rtc_update_irq(palmas_rtc->rtc, 1, RTC_IRQF | RTC_AF);
225*4882a593Smuzhiyun return IRQ_HANDLED;
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun static const struct rtc_class_ops palmas_rtc_ops = {
229*4882a593Smuzhiyun .read_time = palmas_rtc_read_time,
230*4882a593Smuzhiyun .set_time = palmas_rtc_set_time,
231*4882a593Smuzhiyun .read_alarm = palmas_rtc_read_alarm,
232*4882a593Smuzhiyun .set_alarm = palmas_rtc_set_alarm,
233*4882a593Smuzhiyun .alarm_irq_enable = palmas_rtc_alarm_irq_enable,
234*4882a593Smuzhiyun };
235*4882a593Smuzhiyun
palmas_rtc_probe(struct platform_device * pdev)236*4882a593Smuzhiyun static int palmas_rtc_probe(struct platform_device *pdev)
237*4882a593Smuzhiyun {
238*4882a593Smuzhiyun struct palmas *palmas = dev_get_drvdata(pdev->dev.parent);
239*4882a593Smuzhiyun struct palmas_rtc *palmas_rtc = NULL;
240*4882a593Smuzhiyun int ret;
241*4882a593Smuzhiyun bool enable_bb_charging = false;
242*4882a593Smuzhiyun bool high_bb_charging = false;
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun if (pdev->dev.of_node) {
245*4882a593Smuzhiyun enable_bb_charging = of_property_read_bool(pdev->dev.of_node,
246*4882a593Smuzhiyun "ti,backup-battery-chargeable");
247*4882a593Smuzhiyun high_bb_charging = of_property_read_bool(pdev->dev.of_node,
248*4882a593Smuzhiyun "ti,backup-battery-charge-high-current");
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun palmas_rtc = devm_kzalloc(&pdev->dev, sizeof(struct palmas_rtc),
252*4882a593Smuzhiyun GFP_KERNEL);
253*4882a593Smuzhiyun if (!palmas_rtc)
254*4882a593Smuzhiyun return -ENOMEM;
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun /* Clear pending interrupts */
257*4882a593Smuzhiyun ret = palmas_clear_interrupts(&pdev->dev);
258*4882a593Smuzhiyun if (ret < 0) {
259*4882a593Smuzhiyun dev_err(&pdev->dev, "clear RTC int failed, err = %d\n", ret);
260*4882a593Smuzhiyun return ret;
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun palmas_rtc->dev = &pdev->dev;
264*4882a593Smuzhiyun platform_set_drvdata(pdev, palmas_rtc);
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun if (enable_bb_charging) {
267*4882a593Smuzhiyun unsigned reg = PALMAS_BACKUP_BATTERY_CTRL_BBS_BBC_LOW_ICHRG;
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun if (high_bb_charging)
270*4882a593Smuzhiyun reg = 0;
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun ret = palmas_update_bits(palmas, PALMAS_PMU_CONTROL_BASE,
273*4882a593Smuzhiyun PALMAS_BACKUP_BATTERY_CTRL,
274*4882a593Smuzhiyun PALMAS_BACKUP_BATTERY_CTRL_BBS_BBC_LOW_ICHRG, reg);
275*4882a593Smuzhiyun if (ret < 0) {
276*4882a593Smuzhiyun dev_err(&pdev->dev,
277*4882a593Smuzhiyun "BACKUP_BATTERY_CTRL update failed, %d\n", ret);
278*4882a593Smuzhiyun return ret;
279*4882a593Smuzhiyun }
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun ret = palmas_update_bits(palmas, PALMAS_PMU_CONTROL_BASE,
282*4882a593Smuzhiyun PALMAS_BACKUP_BATTERY_CTRL,
283*4882a593Smuzhiyun PALMAS_BACKUP_BATTERY_CTRL_BB_CHG_EN,
284*4882a593Smuzhiyun PALMAS_BACKUP_BATTERY_CTRL_BB_CHG_EN);
285*4882a593Smuzhiyun if (ret < 0) {
286*4882a593Smuzhiyun dev_err(&pdev->dev,
287*4882a593Smuzhiyun "BACKUP_BATTERY_CTRL update failed, %d\n", ret);
288*4882a593Smuzhiyun return ret;
289*4882a593Smuzhiyun }
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun /* Start RTC */
293*4882a593Smuzhiyun ret = palmas_update_bits(palmas, PALMAS_RTC_BASE, PALMAS_RTC_CTRL_REG,
294*4882a593Smuzhiyun PALMAS_RTC_CTRL_REG_STOP_RTC,
295*4882a593Smuzhiyun PALMAS_RTC_CTRL_REG_STOP_RTC);
296*4882a593Smuzhiyun if (ret < 0) {
297*4882a593Smuzhiyun dev_err(&pdev->dev, "RTC_CTRL write failed, err = %d\n", ret);
298*4882a593Smuzhiyun return ret;
299*4882a593Smuzhiyun }
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun palmas_rtc->irq = platform_get_irq(pdev, 0);
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun device_init_wakeup(&pdev->dev, 1);
304*4882a593Smuzhiyun palmas_rtc->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
305*4882a593Smuzhiyun &palmas_rtc_ops, THIS_MODULE);
306*4882a593Smuzhiyun if (IS_ERR(palmas_rtc->rtc)) {
307*4882a593Smuzhiyun ret = PTR_ERR(palmas_rtc->rtc);
308*4882a593Smuzhiyun dev_err(&pdev->dev, "RTC register failed, err = %d\n", ret);
309*4882a593Smuzhiyun return ret;
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun ret = devm_request_threaded_irq(&pdev->dev, palmas_rtc->irq, NULL,
313*4882a593Smuzhiyun palmas_rtc_interrupt,
314*4882a593Smuzhiyun IRQF_TRIGGER_LOW | IRQF_ONESHOT,
315*4882a593Smuzhiyun dev_name(&pdev->dev), palmas_rtc);
316*4882a593Smuzhiyun if (ret < 0) {
317*4882a593Smuzhiyun dev_err(&pdev->dev, "IRQ request failed, err = %d\n", ret);
318*4882a593Smuzhiyun return ret;
319*4882a593Smuzhiyun }
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun return 0;
322*4882a593Smuzhiyun }
323*4882a593Smuzhiyun
palmas_rtc_remove(struct platform_device * pdev)324*4882a593Smuzhiyun static int palmas_rtc_remove(struct platform_device *pdev)
325*4882a593Smuzhiyun {
326*4882a593Smuzhiyun palmas_rtc_alarm_irq_enable(&pdev->dev, 0);
327*4882a593Smuzhiyun return 0;
328*4882a593Smuzhiyun }
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
palmas_rtc_suspend(struct device * dev)331*4882a593Smuzhiyun static int palmas_rtc_suspend(struct device *dev)
332*4882a593Smuzhiyun {
333*4882a593Smuzhiyun struct palmas_rtc *palmas_rtc = dev_get_drvdata(dev);
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun if (device_may_wakeup(dev))
336*4882a593Smuzhiyun enable_irq_wake(palmas_rtc->irq);
337*4882a593Smuzhiyun return 0;
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun
palmas_rtc_resume(struct device * dev)340*4882a593Smuzhiyun static int palmas_rtc_resume(struct device *dev)
341*4882a593Smuzhiyun {
342*4882a593Smuzhiyun struct palmas_rtc *palmas_rtc = dev_get_drvdata(dev);
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun if (device_may_wakeup(dev))
345*4882a593Smuzhiyun disable_irq_wake(palmas_rtc->irq);
346*4882a593Smuzhiyun return 0;
347*4882a593Smuzhiyun }
348*4882a593Smuzhiyun #endif
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(palmas_rtc_pm_ops, palmas_rtc_suspend,
351*4882a593Smuzhiyun palmas_rtc_resume);
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun #ifdef CONFIG_OF
354*4882a593Smuzhiyun static const struct of_device_id of_palmas_rtc_match[] = {
355*4882a593Smuzhiyun { .compatible = "ti,palmas-rtc"},
356*4882a593Smuzhiyun { },
357*4882a593Smuzhiyun };
358*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, of_palmas_rtc_match);
359*4882a593Smuzhiyun #endif
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun static struct platform_driver palmas_rtc_driver = {
362*4882a593Smuzhiyun .probe = palmas_rtc_probe,
363*4882a593Smuzhiyun .remove = palmas_rtc_remove,
364*4882a593Smuzhiyun .driver = {
365*4882a593Smuzhiyun .name = "palmas-rtc",
366*4882a593Smuzhiyun .pm = &palmas_rtc_pm_ops,
367*4882a593Smuzhiyun .of_match_table = of_match_ptr(of_palmas_rtc_match),
368*4882a593Smuzhiyun },
369*4882a593Smuzhiyun };
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun module_platform_driver(palmas_rtc_driver);
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun MODULE_ALIAS("platform:palmas_rtc");
374*4882a593Smuzhiyun MODULE_DESCRIPTION("TI PALMAS series RTC driver");
375*4882a593Smuzhiyun MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
376*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
377