1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * MOXA ART RTC driver.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2013 Jonas Jensen
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Jonas Jensen <jonas.jensen@gmail.com>
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * Based on code from
10*4882a593Smuzhiyun * Moxa Technology Co., Ltd. <www.moxa.com>
11*4882a593Smuzhiyun */
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <linux/init.h>
14*4882a593Smuzhiyun #include <linux/kernel.h>
15*4882a593Smuzhiyun #include <linux/delay.h>
16*4882a593Smuzhiyun #include <linux/rtc.h>
17*4882a593Smuzhiyun #include <linux/platform_device.h>
18*4882a593Smuzhiyun #include <linux/module.h>
19*4882a593Smuzhiyun #include <linux/gpio.h>
20*4882a593Smuzhiyun #include <linux/of_gpio.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #define GPIO_RTC_RESERVED 0x0C
23*4882a593Smuzhiyun #define GPIO_RTC_DATA_SET 0x10
24*4882a593Smuzhiyun #define GPIO_RTC_DATA_CLEAR 0x14
25*4882a593Smuzhiyun #define GPIO_RTC_PIN_PULL_ENABLE 0x18
26*4882a593Smuzhiyun #define GPIO_RTC_PIN_PULL_TYPE 0x1C
27*4882a593Smuzhiyun #define GPIO_RTC_INT_ENABLE 0x20
28*4882a593Smuzhiyun #define GPIO_RTC_INT_RAW_STATE 0x24
29*4882a593Smuzhiyun #define GPIO_RTC_INT_MASKED_STATE 0x28
30*4882a593Smuzhiyun #define GPIO_RTC_INT_MASK 0x2C
31*4882a593Smuzhiyun #define GPIO_RTC_INT_CLEAR 0x30
32*4882a593Smuzhiyun #define GPIO_RTC_INT_TRIGGER 0x34
33*4882a593Smuzhiyun #define GPIO_RTC_INT_BOTH 0x38
34*4882a593Smuzhiyun #define GPIO_RTC_INT_RISE_NEG 0x3C
35*4882a593Smuzhiyun #define GPIO_RTC_BOUNCE_ENABLE 0x40
36*4882a593Smuzhiyun #define GPIO_RTC_BOUNCE_PRE_SCALE 0x44
37*4882a593Smuzhiyun #define GPIO_RTC_PROTECT_W 0x8E
38*4882a593Smuzhiyun #define GPIO_RTC_PROTECT_R 0x8F
39*4882a593Smuzhiyun #define GPIO_RTC_YEAR_W 0x8C
40*4882a593Smuzhiyun #define GPIO_RTC_YEAR_R 0x8D
41*4882a593Smuzhiyun #define GPIO_RTC_DAY_W 0x8A
42*4882a593Smuzhiyun #define GPIO_RTC_DAY_R 0x8B
43*4882a593Smuzhiyun #define GPIO_RTC_MONTH_W 0x88
44*4882a593Smuzhiyun #define GPIO_RTC_MONTH_R 0x89
45*4882a593Smuzhiyun #define GPIO_RTC_DATE_W 0x86
46*4882a593Smuzhiyun #define GPIO_RTC_DATE_R 0x87
47*4882a593Smuzhiyun #define GPIO_RTC_HOURS_W 0x84
48*4882a593Smuzhiyun #define GPIO_RTC_HOURS_R 0x85
49*4882a593Smuzhiyun #define GPIO_RTC_MINUTES_W 0x82
50*4882a593Smuzhiyun #define GPIO_RTC_MINUTES_R 0x83
51*4882a593Smuzhiyun #define GPIO_RTC_SECONDS_W 0x80
52*4882a593Smuzhiyun #define GPIO_RTC_SECONDS_R 0x81
53*4882a593Smuzhiyun #define GPIO_RTC_DELAY_TIME 8
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun struct moxart_rtc {
56*4882a593Smuzhiyun struct rtc_device *rtc;
57*4882a593Smuzhiyun spinlock_t rtc_lock;
58*4882a593Smuzhiyun int gpio_data, gpio_sclk, gpio_reset;
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun static int day_of_year[12] = { 0, 31, 59, 90, 120, 151, 181,
62*4882a593Smuzhiyun 212, 243, 273, 304, 334 };
63*4882a593Smuzhiyun
moxart_rtc_write_byte(struct device * dev,u8 data)64*4882a593Smuzhiyun static void moxart_rtc_write_byte(struct device *dev, u8 data)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun struct moxart_rtc *moxart_rtc = dev_get_drvdata(dev);
67*4882a593Smuzhiyun int i;
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun for (i = 0; i < 8; i++, data >>= 1) {
70*4882a593Smuzhiyun gpio_set_value(moxart_rtc->gpio_sclk, 0);
71*4882a593Smuzhiyun gpio_set_value(moxart_rtc->gpio_data, ((data & 1) == 1));
72*4882a593Smuzhiyun udelay(GPIO_RTC_DELAY_TIME);
73*4882a593Smuzhiyun gpio_set_value(moxart_rtc->gpio_sclk, 1);
74*4882a593Smuzhiyun udelay(GPIO_RTC_DELAY_TIME);
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
moxart_rtc_read_byte(struct device * dev)78*4882a593Smuzhiyun static u8 moxart_rtc_read_byte(struct device *dev)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun struct moxart_rtc *moxart_rtc = dev_get_drvdata(dev);
81*4882a593Smuzhiyun int i;
82*4882a593Smuzhiyun u8 data = 0;
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun for (i = 0; i < 8; i++) {
85*4882a593Smuzhiyun gpio_set_value(moxart_rtc->gpio_sclk, 0);
86*4882a593Smuzhiyun udelay(GPIO_RTC_DELAY_TIME);
87*4882a593Smuzhiyun gpio_set_value(moxart_rtc->gpio_sclk, 1);
88*4882a593Smuzhiyun udelay(GPIO_RTC_DELAY_TIME);
89*4882a593Smuzhiyun if (gpio_get_value(moxart_rtc->gpio_data))
90*4882a593Smuzhiyun data |= (1 << i);
91*4882a593Smuzhiyun udelay(GPIO_RTC_DELAY_TIME);
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun return data;
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun
moxart_rtc_read_register(struct device * dev,u8 cmd)96*4882a593Smuzhiyun static u8 moxart_rtc_read_register(struct device *dev, u8 cmd)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun struct moxart_rtc *moxart_rtc = dev_get_drvdata(dev);
99*4882a593Smuzhiyun u8 data;
100*4882a593Smuzhiyun unsigned long flags;
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun local_irq_save(flags);
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun gpio_direction_output(moxart_rtc->gpio_data, 0);
105*4882a593Smuzhiyun gpio_set_value(moxart_rtc->gpio_reset, 1);
106*4882a593Smuzhiyun udelay(GPIO_RTC_DELAY_TIME);
107*4882a593Smuzhiyun moxart_rtc_write_byte(dev, cmd);
108*4882a593Smuzhiyun gpio_direction_input(moxart_rtc->gpio_data);
109*4882a593Smuzhiyun udelay(GPIO_RTC_DELAY_TIME);
110*4882a593Smuzhiyun data = moxart_rtc_read_byte(dev);
111*4882a593Smuzhiyun gpio_set_value(moxart_rtc->gpio_sclk, 0);
112*4882a593Smuzhiyun gpio_set_value(moxart_rtc->gpio_reset, 0);
113*4882a593Smuzhiyun udelay(GPIO_RTC_DELAY_TIME);
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun local_irq_restore(flags);
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun return data;
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun
moxart_rtc_write_register(struct device * dev,u8 cmd,u8 data)120*4882a593Smuzhiyun static void moxart_rtc_write_register(struct device *dev, u8 cmd, u8 data)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun struct moxart_rtc *moxart_rtc = dev_get_drvdata(dev);
123*4882a593Smuzhiyun unsigned long flags;
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun local_irq_save(flags);
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun gpio_direction_output(moxart_rtc->gpio_data, 0);
128*4882a593Smuzhiyun gpio_set_value(moxart_rtc->gpio_reset, 1);
129*4882a593Smuzhiyun udelay(GPIO_RTC_DELAY_TIME);
130*4882a593Smuzhiyun moxart_rtc_write_byte(dev, cmd);
131*4882a593Smuzhiyun moxart_rtc_write_byte(dev, data);
132*4882a593Smuzhiyun gpio_set_value(moxart_rtc->gpio_sclk, 0);
133*4882a593Smuzhiyun gpio_set_value(moxart_rtc->gpio_reset, 0);
134*4882a593Smuzhiyun udelay(GPIO_RTC_DELAY_TIME);
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun local_irq_restore(flags);
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun
moxart_rtc_set_time(struct device * dev,struct rtc_time * tm)139*4882a593Smuzhiyun static int moxart_rtc_set_time(struct device *dev, struct rtc_time *tm)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun struct moxart_rtc *moxart_rtc = dev_get_drvdata(dev);
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun spin_lock_irq(&moxart_rtc->rtc_lock);
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun moxart_rtc_write_register(dev, GPIO_RTC_PROTECT_W, 0);
146*4882a593Smuzhiyun moxart_rtc_write_register(dev, GPIO_RTC_YEAR_W,
147*4882a593Smuzhiyun (((tm->tm_year - 100) / 10) << 4) |
148*4882a593Smuzhiyun ((tm->tm_year - 100) % 10));
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun moxart_rtc_write_register(dev, GPIO_RTC_MONTH_W,
151*4882a593Smuzhiyun (((tm->tm_mon + 1) / 10) << 4) |
152*4882a593Smuzhiyun ((tm->tm_mon + 1) % 10));
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun moxart_rtc_write_register(dev, GPIO_RTC_DATE_W,
155*4882a593Smuzhiyun ((tm->tm_mday / 10) << 4) |
156*4882a593Smuzhiyun (tm->tm_mday % 10));
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun moxart_rtc_write_register(dev, GPIO_RTC_HOURS_W,
159*4882a593Smuzhiyun ((tm->tm_hour / 10) << 4) |
160*4882a593Smuzhiyun (tm->tm_hour % 10));
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun moxart_rtc_write_register(dev, GPIO_RTC_MINUTES_W,
163*4882a593Smuzhiyun ((tm->tm_min / 10) << 4) |
164*4882a593Smuzhiyun (tm->tm_min % 10));
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun moxart_rtc_write_register(dev, GPIO_RTC_SECONDS_W,
167*4882a593Smuzhiyun ((tm->tm_sec / 10) << 4) |
168*4882a593Smuzhiyun (tm->tm_sec % 10));
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun moxart_rtc_write_register(dev, GPIO_RTC_PROTECT_W, 0x80);
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun spin_unlock_irq(&moxart_rtc->rtc_lock);
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun dev_dbg(dev, "%s: success tm_year=%d tm_mon=%d\n"
175*4882a593Smuzhiyun "tm_mday=%d tm_hour=%d tm_min=%d tm_sec=%d\n",
176*4882a593Smuzhiyun __func__, tm->tm_year, tm->tm_mon, tm->tm_mday,
177*4882a593Smuzhiyun tm->tm_hour, tm->tm_min, tm->tm_sec);
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun return 0;
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun
moxart_rtc_read_time(struct device * dev,struct rtc_time * tm)182*4882a593Smuzhiyun static int moxart_rtc_read_time(struct device *dev, struct rtc_time *tm)
183*4882a593Smuzhiyun {
184*4882a593Smuzhiyun struct moxart_rtc *moxart_rtc = dev_get_drvdata(dev);
185*4882a593Smuzhiyun unsigned char v;
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun spin_lock_irq(&moxart_rtc->rtc_lock);
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun v = moxart_rtc_read_register(dev, GPIO_RTC_SECONDS_R);
190*4882a593Smuzhiyun tm->tm_sec = (((v & 0x70) >> 4) * 10) + (v & 0x0F);
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun v = moxart_rtc_read_register(dev, GPIO_RTC_MINUTES_R);
193*4882a593Smuzhiyun tm->tm_min = (((v & 0x70) >> 4) * 10) + (v & 0x0F);
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun v = moxart_rtc_read_register(dev, GPIO_RTC_HOURS_R);
196*4882a593Smuzhiyun if (v & 0x80) { /* 12-hour mode */
197*4882a593Smuzhiyun tm->tm_hour = (((v & 0x10) >> 4) * 10) + (v & 0x0F);
198*4882a593Smuzhiyun if (v & 0x20) { /* PM mode */
199*4882a593Smuzhiyun tm->tm_hour += 12;
200*4882a593Smuzhiyun if (tm->tm_hour >= 24)
201*4882a593Smuzhiyun tm->tm_hour = 0;
202*4882a593Smuzhiyun }
203*4882a593Smuzhiyun } else { /* 24-hour mode */
204*4882a593Smuzhiyun tm->tm_hour = (((v & 0x30) >> 4) * 10) + (v & 0x0F);
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun v = moxart_rtc_read_register(dev, GPIO_RTC_DATE_R);
208*4882a593Smuzhiyun tm->tm_mday = (((v & 0x30) >> 4) * 10) + (v & 0x0F);
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun v = moxart_rtc_read_register(dev, GPIO_RTC_MONTH_R);
211*4882a593Smuzhiyun tm->tm_mon = (((v & 0x10) >> 4) * 10) + (v & 0x0F);
212*4882a593Smuzhiyun tm->tm_mon--;
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun v = moxart_rtc_read_register(dev, GPIO_RTC_YEAR_R);
215*4882a593Smuzhiyun tm->tm_year = (((v & 0xF0) >> 4) * 10) + (v & 0x0F);
216*4882a593Smuzhiyun tm->tm_year += 100;
217*4882a593Smuzhiyun if (tm->tm_year <= 69)
218*4882a593Smuzhiyun tm->tm_year += 100;
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun v = moxart_rtc_read_register(dev, GPIO_RTC_DAY_R);
221*4882a593Smuzhiyun tm->tm_wday = (v & 0x0f) - 1;
222*4882a593Smuzhiyun tm->tm_yday = day_of_year[tm->tm_mon];
223*4882a593Smuzhiyun tm->tm_yday += (tm->tm_mday - 1);
224*4882a593Smuzhiyun if (tm->tm_mon >= 2) {
225*4882a593Smuzhiyun if (!(tm->tm_year % 4) && (tm->tm_year % 100))
226*4882a593Smuzhiyun tm->tm_yday++;
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun tm->tm_isdst = 0;
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun spin_unlock_irq(&moxart_rtc->rtc_lock);
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun return 0;
234*4882a593Smuzhiyun }
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun static const struct rtc_class_ops moxart_rtc_ops = {
237*4882a593Smuzhiyun .read_time = moxart_rtc_read_time,
238*4882a593Smuzhiyun .set_time = moxart_rtc_set_time,
239*4882a593Smuzhiyun };
240*4882a593Smuzhiyun
moxart_rtc_probe(struct platform_device * pdev)241*4882a593Smuzhiyun static int moxart_rtc_probe(struct platform_device *pdev)
242*4882a593Smuzhiyun {
243*4882a593Smuzhiyun struct moxart_rtc *moxart_rtc;
244*4882a593Smuzhiyun int ret = 0;
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun moxart_rtc = devm_kzalloc(&pdev->dev, sizeof(*moxart_rtc), GFP_KERNEL);
247*4882a593Smuzhiyun if (!moxart_rtc)
248*4882a593Smuzhiyun return -ENOMEM;
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun moxart_rtc->gpio_data = of_get_named_gpio(pdev->dev.of_node,
251*4882a593Smuzhiyun "gpio-rtc-data", 0);
252*4882a593Smuzhiyun if (!gpio_is_valid(moxart_rtc->gpio_data)) {
253*4882a593Smuzhiyun dev_err(&pdev->dev, "invalid gpio (data): %d\n",
254*4882a593Smuzhiyun moxart_rtc->gpio_data);
255*4882a593Smuzhiyun return moxart_rtc->gpio_data;
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun moxart_rtc->gpio_sclk = of_get_named_gpio(pdev->dev.of_node,
259*4882a593Smuzhiyun "gpio-rtc-sclk", 0);
260*4882a593Smuzhiyun if (!gpio_is_valid(moxart_rtc->gpio_sclk)) {
261*4882a593Smuzhiyun dev_err(&pdev->dev, "invalid gpio (sclk): %d\n",
262*4882a593Smuzhiyun moxart_rtc->gpio_sclk);
263*4882a593Smuzhiyun return moxart_rtc->gpio_sclk;
264*4882a593Smuzhiyun }
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun moxart_rtc->gpio_reset = of_get_named_gpio(pdev->dev.of_node,
267*4882a593Smuzhiyun "gpio-rtc-reset", 0);
268*4882a593Smuzhiyun if (!gpio_is_valid(moxart_rtc->gpio_reset)) {
269*4882a593Smuzhiyun dev_err(&pdev->dev, "invalid gpio (reset): %d\n",
270*4882a593Smuzhiyun moxart_rtc->gpio_reset);
271*4882a593Smuzhiyun return moxart_rtc->gpio_reset;
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun spin_lock_init(&moxart_rtc->rtc_lock);
275*4882a593Smuzhiyun platform_set_drvdata(pdev, moxart_rtc);
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun ret = devm_gpio_request(&pdev->dev, moxart_rtc->gpio_data, "rtc_data");
278*4882a593Smuzhiyun if (ret) {
279*4882a593Smuzhiyun dev_err(&pdev->dev, "can't get rtc_data gpio\n");
280*4882a593Smuzhiyun return ret;
281*4882a593Smuzhiyun }
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun ret = devm_gpio_request_one(&pdev->dev, moxart_rtc->gpio_sclk,
284*4882a593Smuzhiyun GPIOF_DIR_OUT, "rtc_sclk");
285*4882a593Smuzhiyun if (ret) {
286*4882a593Smuzhiyun dev_err(&pdev->dev, "can't get rtc_sclk gpio\n");
287*4882a593Smuzhiyun return ret;
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun ret = devm_gpio_request_one(&pdev->dev, moxart_rtc->gpio_reset,
291*4882a593Smuzhiyun GPIOF_DIR_OUT, "rtc_reset");
292*4882a593Smuzhiyun if (ret) {
293*4882a593Smuzhiyun dev_err(&pdev->dev, "can't get rtc_reset gpio\n");
294*4882a593Smuzhiyun return ret;
295*4882a593Smuzhiyun }
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun moxart_rtc->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
298*4882a593Smuzhiyun &moxart_rtc_ops,
299*4882a593Smuzhiyun THIS_MODULE);
300*4882a593Smuzhiyun if (IS_ERR(moxart_rtc->rtc)) {
301*4882a593Smuzhiyun dev_err(&pdev->dev, "devm_rtc_device_register failed\n");
302*4882a593Smuzhiyun return PTR_ERR(moxart_rtc->rtc);
303*4882a593Smuzhiyun }
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun return 0;
306*4882a593Smuzhiyun }
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun static const struct of_device_id moxart_rtc_match[] = {
309*4882a593Smuzhiyun { .compatible = "moxa,moxart-rtc" },
310*4882a593Smuzhiyun { },
311*4882a593Smuzhiyun };
312*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, moxart_rtc_match);
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun static struct platform_driver moxart_rtc_driver = {
315*4882a593Smuzhiyun .probe = moxart_rtc_probe,
316*4882a593Smuzhiyun .driver = {
317*4882a593Smuzhiyun .name = "moxart-rtc",
318*4882a593Smuzhiyun .of_match_table = moxart_rtc_match,
319*4882a593Smuzhiyun },
320*4882a593Smuzhiyun };
321*4882a593Smuzhiyun module_platform_driver(moxart_rtc_driver);
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun MODULE_DESCRIPTION("MOXART RTC driver");
324*4882a593Smuzhiyun MODULE_LICENSE("GPL");
325*4882a593Smuzhiyun MODULE_AUTHOR("Jonas Jensen <jonas.jensen@gmail.com>");
326