1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /* rtc-max6916.c
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Driver for MAXIM max6916 Low Current, SPI Compatible
5*4882a593Smuzhiyun * Real Time Clock
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Author : Venkat Prashanth B U <venkat.prashanth2498@gmail.com>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/init.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/device.h>
13*4882a593Smuzhiyun #include <linux/platform_device.h>
14*4882a593Smuzhiyun #include <linux/rtc.h>
15*4882a593Smuzhiyun #include <linux/spi/spi.h>
16*4882a593Smuzhiyun #include <linux/bcd.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun /* Registers in max6916 rtc */
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #define MAX6916_SECONDS_REG 0x01
21*4882a593Smuzhiyun #define MAX6916_MINUTES_REG 0x02
22*4882a593Smuzhiyun #define MAX6916_HOURS_REG 0x03
23*4882a593Smuzhiyun #define MAX6916_DATE_REG 0x04
24*4882a593Smuzhiyun #define MAX6916_MONTH_REG 0x05
25*4882a593Smuzhiyun #define MAX6916_DAY_REG 0x06
26*4882a593Smuzhiyun #define MAX6916_YEAR_REG 0x07
27*4882a593Smuzhiyun #define MAX6916_CONTROL_REG 0x08
28*4882a593Smuzhiyun #define MAX6916_STATUS_REG 0x0C
29*4882a593Smuzhiyun #define MAX6916_CLOCK_BURST 0x3F
30*4882a593Smuzhiyun
max6916_read_reg(struct device * dev,unsigned char address,unsigned char * data)31*4882a593Smuzhiyun static int max6916_read_reg(struct device *dev, unsigned char address,
32*4882a593Smuzhiyun unsigned char *data)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun struct spi_device *spi = to_spi_device(dev);
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun *data = address | 0x80;
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun return spi_write_then_read(spi, data, 1, data, 1);
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun
max6916_write_reg(struct device * dev,unsigned char address,unsigned char data)41*4882a593Smuzhiyun static int max6916_write_reg(struct device *dev, unsigned char address,
42*4882a593Smuzhiyun unsigned char data)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun struct spi_device *spi = to_spi_device(dev);
45*4882a593Smuzhiyun unsigned char buf[2];
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun buf[0] = address & 0x7F;
48*4882a593Smuzhiyun buf[1] = data;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun return spi_write_then_read(spi, buf, 2, NULL, 0);
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun
max6916_read_time(struct device * dev,struct rtc_time * dt)53*4882a593Smuzhiyun static int max6916_read_time(struct device *dev, struct rtc_time *dt)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun struct spi_device *spi = to_spi_device(dev);
56*4882a593Smuzhiyun int err;
57*4882a593Smuzhiyun unsigned char buf[8];
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun buf[0] = MAX6916_CLOCK_BURST | 0x80;
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun err = spi_write_then_read(spi, buf, 1, buf, 8);
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun if (err)
64*4882a593Smuzhiyun return err;
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun dt->tm_sec = bcd2bin(buf[0]);
67*4882a593Smuzhiyun dt->tm_min = bcd2bin(buf[1]);
68*4882a593Smuzhiyun dt->tm_hour = bcd2bin(buf[2] & 0x3F);
69*4882a593Smuzhiyun dt->tm_mday = bcd2bin(buf[3]);
70*4882a593Smuzhiyun dt->tm_mon = bcd2bin(buf[4]) - 1;
71*4882a593Smuzhiyun dt->tm_wday = bcd2bin(buf[5]) - 1;
72*4882a593Smuzhiyun dt->tm_year = bcd2bin(buf[6]) + 100;
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun return 0;
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun
max6916_set_time(struct device * dev,struct rtc_time * dt)77*4882a593Smuzhiyun static int max6916_set_time(struct device *dev, struct rtc_time *dt)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun struct spi_device *spi = to_spi_device(dev);
80*4882a593Smuzhiyun unsigned char buf[9];
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun if (dt->tm_year < 100 || dt->tm_year > 199) {
83*4882a593Smuzhiyun dev_err(&spi->dev, "Year must be between 2000 and 2099. It's %d.\n",
84*4882a593Smuzhiyun dt->tm_year + 1900);
85*4882a593Smuzhiyun return -EINVAL;
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun buf[0] = MAX6916_CLOCK_BURST & 0x7F;
89*4882a593Smuzhiyun buf[1] = bin2bcd(dt->tm_sec);
90*4882a593Smuzhiyun buf[2] = bin2bcd(dt->tm_min);
91*4882a593Smuzhiyun buf[3] = (bin2bcd(dt->tm_hour) & 0X3F);
92*4882a593Smuzhiyun buf[4] = bin2bcd(dt->tm_mday);
93*4882a593Smuzhiyun buf[5] = bin2bcd(dt->tm_mon + 1);
94*4882a593Smuzhiyun buf[6] = bin2bcd(dt->tm_wday + 1);
95*4882a593Smuzhiyun buf[7] = bin2bcd(dt->tm_year % 100);
96*4882a593Smuzhiyun buf[8] = bin2bcd(0x00);
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun /* write the rtc settings */
99*4882a593Smuzhiyun return spi_write_then_read(spi, buf, 9, NULL, 0);
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun static const struct rtc_class_ops max6916_rtc_ops = {
103*4882a593Smuzhiyun .read_time = max6916_read_time,
104*4882a593Smuzhiyun .set_time = max6916_set_time,
105*4882a593Smuzhiyun };
106*4882a593Smuzhiyun
max6916_probe(struct spi_device * spi)107*4882a593Smuzhiyun static int max6916_probe(struct spi_device *spi)
108*4882a593Smuzhiyun {
109*4882a593Smuzhiyun struct rtc_device *rtc;
110*4882a593Smuzhiyun unsigned char data;
111*4882a593Smuzhiyun int res;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun /* spi setup with max6916 in mode 3 and bits per word as 8 */
114*4882a593Smuzhiyun spi->mode = SPI_MODE_3;
115*4882a593Smuzhiyun spi->bits_per_word = 8;
116*4882a593Smuzhiyun spi_setup(spi);
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun /* RTC Settings */
119*4882a593Smuzhiyun res = max6916_read_reg(&spi->dev, MAX6916_SECONDS_REG, &data);
120*4882a593Smuzhiyun if (res)
121*4882a593Smuzhiyun return res;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun /* Disable the write protect of rtc */
124*4882a593Smuzhiyun max6916_read_reg(&spi->dev, MAX6916_CONTROL_REG, &data);
125*4882a593Smuzhiyun data = data & ~(1 << 7);
126*4882a593Smuzhiyun max6916_write_reg(&spi->dev, MAX6916_CONTROL_REG, data);
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun /*Enable oscillator,disable oscillator stop flag, glitch filter*/
129*4882a593Smuzhiyun max6916_read_reg(&spi->dev, MAX6916_STATUS_REG, &data);
130*4882a593Smuzhiyun data = data & 0x1B;
131*4882a593Smuzhiyun max6916_write_reg(&spi->dev, MAX6916_STATUS_REG, data);
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun /* display the settings */
134*4882a593Smuzhiyun max6916_read_reg(&spi->dev, MAX6916_CONTROL_REG, &data);
135*4882a593Smuzhiyun dev_info(&spi->dev, "MAX6916 RTC CTRL Reg = 0x%02x\n", data);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun max6916_read_reg(&spi->dev, MAX6916_STATUS_REG, &data);
138*4882a593Smuzhiyun dev_info(&spi->dev, "MAX6916 RTC Status Reg = 0x%02x\n", data);
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun rtc = devm_rtc_device_register(&spi->dev, "max6916",
141*4882a593Smuzhiyun &max6916_rtc_ops, THIS_MODULE);
142*4882a593Smuzhiyun if (IS_ERR(rtc))
143*4882a593Smuzhiyun return PTR_ERR(rtc);
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun spi_set_drvdata(spi, rtc);
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun return 0;
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun static struct spi_driver max6916_driver = {
151*4882a593Smuzhiyun .driver = {
152*4882a593Smuzhiyun .name = "max6916",
153*4882a593Smuzhiyun },
154*4882a593Smuzhiyun .probe = max6916_probe,
155*4882a593Smuzhiyun };
156*4882a593Smuzhiyun module_spi_driver(max6916_driver);
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun MODULE_DESCRIPTION("MAX6916 SPI RTC DRIVER");
159*4882a593Smuzhiyun MODULE_AUTHOR("Venkat Prashanth B U <venkat.prashanth2498@gmail.com>");
160*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
161