1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Driver for ST M41T94 SPI RTC
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2008 Kim B. Heino
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/kernel.h>
10*4882a593Smuzhiyun #include <linux/platform_device.h>
11*4882a593Smuzhiyun #include <linux/rtc.h>
12*4882a593Smuzhiyun #include <linux/spi/spi.h>
13*4882a593Smuzhiyun #include <linux/bcd.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #define M41T94_REG_SECONDS 0x01
16*4882a593Smuzhiyun #define M41T94_REG_MINUTES 0x02
17*4882a593Smuzhiyun #define M41T94_REG_HOURS 0x03
18*4882a593Smuzhiyun #define M41T94_REG_WDAY 0x04
19*4882a593Smuzhiyun #define M41T94_REG_DAY 0x05
20*4882a593Smuzhiyun #define M41T94_REG_MONTH 0x06
21*4882a593Smuzhiyun #define M41T94_REG_YEAR 0x07
22*4882a593Smuzhiyun #define M41T94_REG_HT 0x0c
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #define M41T94_BIT_HALT 0x40
25*4882a593Smuzhiyun #define M41T94_BIT_STOP 0x80
26*4882a593Smuzhiyun #define M41T94_BIT_CB 0x40
27*4882a593Smuzhiyun #define M41T94_BIT_CEB 0x80
28*4882a593Smuzhiyun
m41t94_set_time(struct device * dev,struct rtc_time * tm)29*4882a593Smuzhiyun static int m41t94_set_time(struct device *dev, struct rtc_time *tm)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun struct spi_device *spi = to_spi_device(dev);
32*4882a593Smuzhiyun u8 buf[8]; /* write cmd + 7 registers */
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun dev_dbg(dev, "%s secs=%d, mins=%d, "
35*4882a593Smuzhiyun "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
36*4882a593Smuzhiyun "write", tm->tm_sec, tm->tm_min,
37*4882a593Smuzhiyun tm->tm_hour, tm->tm_mday,
38*4882a593Smuzhiyun tm->tm_mon, tm->tm_year, tm->tm_wday);
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun buf[0] = 0x80 | M41T94_REG_SECONDS; /* write time + date */
41*4882a593Smuzhiyun buf[M41T94_REG_SECONDS] = bin2bcd(tm->tm_sec);
42*4882a593Smuzhiyun buf[M41T94_REG_MINUTES] = bin2bcd(tm->tm_min);
43*4882a593Smuzhiyun buf[M41T94_REG_HOURS] = bin2bcd(tm->tm_hour);
44*4882a593Smuzhiyun buf[M41T94_REG_WDAY] = bin2bcd(tm->tm_wday + 1);
45*4882a593Smuzhiyun buf[M41T94_REG_DAY] = bin2bcd(tm->tm_mday);
46*4882a593Smuzhiyun buf[M41T94_REG_MONTH] = bin2bcd(tm->tm_mon + 1);
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun buf[M41T94_REG_HOURS] |= M41T94_BIT_CEB;
49*4882a593Smuzhiyun if (tm->tm_year >= 100)
50*4882a593Smuzhiyun buf[M41T94_REG_HOURS] |= M41T94_BIT_CB;
51*4882a593Smuzhiyun buf[M41T94_REG_YEAR] = bin2bcd(tm->tm_year % 100);
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun return spi_write(spi, buf, 8);
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
m41t94_read_time(struct device * dev,struct rtc_time * tm)56*4882a593Smuzhiyun static int m41t94_read_time(struct device *dev, struct rtc_time *tm)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun struct spi_device *spi = to_spi_device(dev);
59*4882a593Smuzhiyun u8 buf[2];
60*4882a593Smuzhiyun int ret, hour;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun /* clear halt update bit */
63*4882a593Smuzhiyun ret = spi_w8r8(spi, M41T94_REG_HT);
64*4882a593Smuzhiyun if (ret < 0)
65*4882a593Smuzhiyun return ret;
66*4882a593Smuzhiyun if (ret & M41T94_BIT_HALT) {
67*4882a593Smuzhiyun buf[0] = 0x80 | M41T94_REG_HT;
68*4882a593Smuzhiyun buf[1] = ret & ~M41T94_BIT_HALT;
69*4882a593Smuzhiyun spi_write(spi, buf, 2);
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun /* clear stop bit */
73*4882a593Smuzhiyun ret = spi_w8r8(spi, M41T94_REG_SECONDS);
74*4882a593Smuzhiyun if (ret < 0)
75*4882a593Smuzhiyun return ret;
76*4882a593Smuzhiyun if (ret & M41T94_BIT_STOP) {
77*4882a593Smuzhiyun buf[0] = 0x80 | M41T94_REG_SECONDS;
78*4882a593Smuzhiyun buf[1] = ret & ~M41T94_BIT_STOP;
79*4882a593Smuzhiyun spi_write(spi, buf, 2);
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun tm->tm_sec = bcd2bin(spi_w8r8(spi, M41T94_REG_SECONDS));
83*4882a593Smuzhiyun tm->tm_min = bcd2bin(spi_w8r8(spi, M41T94_REG_MINUTES));
84*4882a593Smuzhiyun hour = spi_w8r8(spi, M41T94_REG_HOURS);
85*4882a593Smuzhiyun tm->tm_hour = bcd2bin(hour & 0x3f);
86*4882a593Smuzhiyun tm->tm_wday = bcd2bin(spi_w8r8(spi, M41T94_REG_WDAY)) - 1;
87*4882a593Smuzhiyun tm->tm_mday = bcd2bin(spi_w8r8(spi, M41T94_REG_DAY));
88*4882a593Smuzhiyun tm->tm_mon = bcd2bin(spi_w8r8(spi, M41T94_REG_MONTH)) - 1;
89*4882a593Smuzhiyun tm->tm_year = bcd2bin(spi_w8r8(spi, M41T94_REG_YEAR));
90*4882a593Smuzhiyun if ((hour & M41T94_BIT_CB) || !(hour & M41T94_BIT_CEB))
91*4882a593Smuzhiyun tm->tm_year += 100;
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun dev_dbg(dev, "%s secs=%d, mins=%d, "
94*4882a593Smuzhiyun "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
95*4882a593Smuzhiyun "read", tm->tm_sec, tm->tm_min,
96*4882a593Smuzhiyun tm->tm_hour, tm->tm_mday,
97*4882a593Smuzhiyun tm->tm_mon, tm->tm_year, tm->tm_wday);
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun return 0;
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun static const struct rtc_class_ops m41t94_rtc_ops = {
103*4882a593Smuzhiyun .read_time = m41t94_read_time,
104*4882a593Smuzhiyun .set_time = m41t94_set_time,
105*4882a593Smuzhiyun };
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun static struct spi_driver m41t94_driver;
108*4882a593Smuzhiyun
m41t94_probe(struct spi_device * spi)109*4882a593Smuzhiyun static int m41t94_probe(struct spi_device *spi)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun struct rtc_device *rtc;
112*4882a593Smuzhiyun int res;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun spi->bits_per_word = 8;
115*4882a593Smuzhiyun spi_setup(spi);
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun res = spi_w8r8(spi, M41T94_REG_SECONDS);
118*4882a593Smuzhiyun if (res < 0) {
119*4882a593Smuzhiyun dev_err(&spi->dev, "not found.\n");
120*4882a593Smuzhiyun return res;
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun rtc = devm_rtc_device_register(&spi->dev, m41t94_driver.driver.name,
124*4882a593Smuzhiyun &m41t94_rtc_ops, THIS_MODULE);
125*4882a593Smuzhiyun if (IS_ERR(rtc))
126*4882a593Smuzhiyun return PTR_ERR(rtc);
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun spi_set_drvdata(spi, rtc);
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun return 0;
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun static struct spi_driver m41t94_driver = {
134*4882a593Smuzhiyun .driver = {
135*4882a593Smuzhiyun .name = "rtc-m41t94",
136*4882a593Smuzhiyun },
137*4882a593Smuzhiyun .probe = m41t94_probe,
138*4882a593Smuzhiyun };
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun module_spi_driver(m41t94_driver);
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun MODULE_AUTHOR("Kim B. Heino <Kim.Heino@bluegiga.com>");
143*4882a593Smuzhiyun MODULE_DESCRIPTION("Driver for ST M41T94 SPI RTC");
144*4882a593Smuzhiyun MODULE_LICENSE("GPL");
145*4882a593Smuzhiyun MODULE_ALIAS("spi:rtc-m41t94");
146