1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * An I2C driver for the Intersil ISL 12022
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Author: Roman Fietze <roman.fietze@telemotive.de>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Based on the Philips PCF8563 RTC
8*4882a593Smuzhiyun * by Alessandro Zummo <a.zummo@towertech.it>.
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/i2c.h>
12*4882a593Smuzhiyun #include <linux/bcd.h>
13*4882a593Smuzhiyun #include <linux/rtc.h>
14*4882a593Smuzhiyun #include <linux/slab.h>
15*4882a593Smuzhiyun #include <linux/module.h>
16*4882a593Smuzhiyun #include <linux/err.h>
17*4882a593Smuzhiyun #include <linux/of.h>
18*4882a593Smuzhiyun #include <linux/of_device.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun /* ISL register offsets */
21*4882a593Smuzhiyun #define ISL12022_REG_SC 0x00
22*4882a593Smuzhiyun #define ISL12022_REG_MN 0x01
23*4882a593Smuzhiyun #define ISL12022_REG_HR 0x02
24*4882a593Smuzhiyun #define ISL12022_REG_DT 0x03
25*4882a593Smuzhiyun #define ISL12022_REG_MO 0x04
26*4882a593Smuzhiyun #define ISL12022_REG_YR 0x05
27*4882a593Smuzhiyun #define ISL12022_REG_DW 0x06
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #define ISL12022_REG_SR 0x07
30*4882a593Smuzhiyun #define ISL12022_REG_INT 0x08
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun /* ISL register bits */
33*4882a593Smuzhiyun #define ISL12022_HR_MIL (1 << 7) /* military or 24 hour time */
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #define ISL12022_SR_LBAT85 (1 << 2)
36*4882a593Smuzhiyun #define ISL12022_SR_LBAT75 (1 << 1)
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun #define ISL12022_INT_WRTC (1 << 6)
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun static struct i2c_driver isl12022_driver;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun struct isl12022 {
44*4882a593Smuzhiyun struct rtc_device *rtc;
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun bool write_enabled; /* true if write enable is set */
47*4882a593Smuzhiyun };
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun
isl12022_read_regs(struct i2c_client * client,uint8_t reg,uint8_t * data,size_t n)50*4882a593Smuzhiyun static int isl12022_read_regs(struct i2c_client *client, uint8_t reg,
51*4882a593Smuzhiyun uint8_t *data, size_t n)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun struct i2c_msg msgs[] = {
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun .addr = client->addr,
56*4882a593Smuzhiyun .flags = 0,
57*4882a593Smuzhiyun .len = 1,
58*4882a593Smuzhiyun .buf = data
59*4882a593Smuzhiyun }, /* setup read ptr */
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun .addr = client->addr,
62*4882a593Smuzhiyun .flags = I2C_M_RD,
63*4882a593Smuzhiyun .len = n,
64*4882a593Smuzhiyun .buf = data
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun };
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun int ret;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun data[0] = reg;
71*4882a593Smuzhiyun ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
72*4882a593Smuzhiyun if (ret != ARRAY_SIZE(msgs)) {
73*4882a593Smuzhiyun dev_err(&client->dev, "%s: read error, ret=%d\n",
74*4882a593Smuzhiyun __func__, ret);
75*4882a593Smuzhiyun return -EIO;
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun return 0;
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun
isl12022_write_reg(struct i2c_client * client,uint8_t reg,uint8_t val)82*4882a593Smuzhiyun static int isl12022_write_reg(struct i2c_client *client,
83*4882a593Smuzhiyun uint8_t reg, uint8_t val)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun uint8_t data[2] = { reg, val };
86*4882a593Smuzhiyun int err;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun err = i2c_master_send(client, data, sizeof(data));
89*4882a593Smuzhiyun if (err != sizeof(data)) {
90*4882a593Smuzhiyun dev_err(&client->dev,
91*4882a593Smuzhiyun "%s: err=%d addr=%02x, data=%02x\n",
92*4882a593Smuzhiyun __func__, err, data[0], data[1]);
93*4882a593Smuzhiyun return -EIO;
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun return 0;
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun /*
101*4882a593Smuzhiyun * In the routines that deal directly with the isl12022 hardware, we use
102*4882a593Smuzhiyun * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch.
103*4882a593Smuzhiyun */
isl12022_rtc_read_time(struct device * dev,struct rtc_time * tm)104*4882a593Smuzhiyun static int isl12022_rtc_read_time(struct device *dev, struct rtc_time *tm)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun struct i2c_client *client = to_i2c_client(dev);
107*4882a593Smuzhiyun uint8_t buf[ISL12022_REG_INT + 1];
108*4882a593Smuzhiyun int ret;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun ret = isl12022_read_regs(client, ISL12022_REG_SC, buf, sizeof(buf));
111*4882a593Smuzhiyun if (ret)
112*4882a593Smuzhiyun return ret;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun if (buf[ISL12022_REG_SR] & (ISL12022_SR_LBAT85 | ISL12022_SR_LBAT75)) {
115*4882a593Smuzhiyun dev_warn(&client->dev,
116*4882a593Smuzhiyun "voltage dropped below %u%%, "
117*4882a593Smuzhiyun "date and time is not reliable.\n",
118*4882a593Smuzhiyun buf[ISL12022_REG_SR] & ISL12022_SR_LBAT85 ? 85 : 75);
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun dev_dbg(&client->dev,
122*4882a593Smuzhiyun "%s: raw data is sec=%02x, min=%02x, hr=%02x, "
123*4882a593Smuzhiyun "mday=%02x, mon=%02x, year=%02x, wday=%02x, "
124*4882a593Smuzhiyun "sr=%02x, int=%02x",
125*4882a593Smuzhiyun __func__,
126*4882a593Smuzhiyun buf[ISL12022_REG_SC],
127*4882a593Smuzhiyun buf[ISL12022_REG_MN],
128*4882a593Smuzhiyun buf[ISL12022_REG_HR],
129*4882a593Smuzhiyun buf[ISL12022_REG_DT],
130*4882a593Smuzhiyun buf[ISL12022_REG_MO],
131*4882a593Smuzhiyun buf[ISL12022_REG_YR],
132*4882a593Smuzhiyun buf[ISL12022_REG_DW],
133*4882a593Smuzhiyun buf[ISL12022_REG_SR],
134*4882a593Smuzhiyun buf[ISL12022_REG_INT]);
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun tm->tm_sec = bcd2bin(buf[ISL12022_REG_SC] & 0x7F);
137*4882a593Smuzhiyun tm->tm_min = bcd2bin(buf[ISL12022_REG_MN] & 0x7F);
138*4882a593Smuzhiyun tm->tm_hour = bcd2bin(buf[ISL12022_REG_HR] & 0x3F);
139*4882a593Smuzhiyun tm->tm_mday = bcd2bin(buf[ISL12022_REG_DT] & 0x3F);
140*4882a593Smuzhiyun tm->tm_wday = buf[ISL12022_REG_DW] & 0x07;
141*4882a593Smuzhiyun tm->tm_mon = bcd2bin(buf[ISL12022_REG_MO] & 0x1F) - 1;
142*4882a593Smuzhiyun tm->tm_year = bcd2bin(buf[ISL12022_REG_YR]) + 100;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun dev_dbg(&client->dev, "%s: secs=%d, mins=%d, hours=%d, "
145*4882a593Smuzhiyun "mday=%d, mon=%d, year=%d, wday=%d\n",
146*4882a593Smuzhiyun __func__,
147*4882a593Smuzhiyun tm->tm_sec, tm->tm_min, tm->tm_hour,
148*4882a593Smuzhiyun tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun return 0;
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun
isl12022_rtc_set_time(struct device * dev,struct rtc_time * tm)153*4882a593Smuzhiyun static int isl12022_rtc_set_time(struct device *dev, struct rtc_time *tm)
154*4882a593Smuzhiyun {
155*4882a593Smuzhiyun struct i2c_client *client = to_i2c_client(dev);
156*4882a593Smuzhiyun struct isl12022 *isl12022 = i2c_get_clientdata(client);
157*4882a593Smuzhiyun size_t i;
158*4882a593Smuzhiyun int ret;
159*4882a593Smuzhiyun uint8_t buf[ISL12022_REG_DW + 1];
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun dev_dbg(&client->dev, "%s: secs=%d, mins=%d, hours=%d, "
162*4882a593Smuzhiyun "mday=%d, mon=%d, year=%d, wday=%d\n",
163*4882a593Smuzhiyun __func__,
164*4882a593Smuzhiyun tm->tm_sec, tm->tm_min, tm->tm_hour,
165*4882a593Smuzhiyun tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun if (!isl12022->write_enabled) {
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun ret = isl12022_read_regs(client, ISL12022_REG_INT, buf, 1);
170*4882a593Smuzhiyun if (ret)
171*4882a593Smuzhiyun return ret;
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun /* Check if WRTC (write rtc enable) is set factory default is
174*4882a593Smuzhiyun * 0 (not set) */
175*4882a593Smuzhiyun if (!(buf[0] & ISL12022_INT_WRTC)) {
176*4882a593Smuzhiyun dev_info(&client->dev,
177*4882a593Smuzhiyun "init write enable and 24 hour format\n");
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun /* Set the write enable bit. */
180*4882a593Smuzhiyun ret = isl12022_write_reg(client,
181*4882a593Smuzhiyun ISL12022_REG_INT,
182*4882a593Smuzhiyun buf[0] | ISL12022_INT_WRTC);
183*4882a593Smuzhiyun if (ret)
184*4882a593Smuzhiyun return ret;
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun /* Write to any RTC register to start RTC, we use the
187*4882a593Smuzhiyun * HR register, setting the MIL bit to use the 24 hour
188*4882a593Smuzhiyun * format. */
189*4882a593Smuzhiyun ret = isl12022_read_regs(client, ISL12022_REG_HR,
190*4882a593Smuzhiyun buf, 1);
191*4882a593Smuzhiyun if (ret)
192*4882a593Smuzhiyun return ret;
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun ret = isl12022_write_reg(client,
195*4882a593Smuzhiyun ISL12022_REG_HR,
196*4882a593Smuzhiyun buf[0] | ISL12022_HR_MIL);
197*4882a593Smuzhiyun if (ret)
198*4882a593Smuzhiyun return ret;
199*4882a593Smuzhiyun }
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun isl12022->write_enabled = true;
202*4882a593Smuzhiyun }
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun /* hours, minutes and seconds */
205*4882a593Smuzhiyun buf[ISL12022_REG_SC] = bin2bcd(tm->tm_sec);
206*4882a593Smuzhiyun buf[ISL12022_REG_MN] = bin2bcd(tm->tm_min);
207*4882a593Smuzhiyun buf[ISL12022_REG_HR] = bin2bcd(tm->tm_hour) | ISL12022_HR_MIL;
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun buf[ISL12022_REG_DT] = bin2bcd(tm->tm_mday);
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun /* month, 1 - 12 */
212*4882a593Smuzhiyun buf[ISL12022_REG_MO] = bin2bcd(tm->tm_mon + 1);
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun /* year and century */
215*4882a593Smuzhiyun buf[ISL12022_REG_YR] = bin2bcd(tm->tm_year % 100);
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun buf[ISL12022_REG_DW] = tm->tm_wday & 0x07;
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun /* write register's data */
220*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(buf); i++) {
221*4882a593Smuzhiyun ret = isl12022_write_reg(client, ISL12022_REG_SC + i,
222*4882a593Smuzhiyun buf[ISL12022_REG_SC + i]);
223*4882a593Smuzhiyun if (ret)
224*4882a593Smuzhiyun return -EIO;
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun return 0;
228*4882a593Smuzhiyun }
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun static const struct rtc_class_ops isl12022_rtc_ops = {
231*4882a593Smuzhiyun .read_time = isl12022_rtc_read_time,
232*4882a593Smuzhiyun .set_time = isl12022_rtc_set_time,
233*4882a593Smuzhiyun };
234*4882a593Smuzhiyun
isl12022_probe(struct i2c_client * client,const struct i2c_device_id * id)235*4882a593Smuzhiyun static int isl12022_probe(struct i2c_client *client,
236*4882a593Smuzhiyun const struct i2c_device_id *id)
237*4882a593Smuzhiyun {
238*4882a593Smuzhiyun struct isl12022 *isl12022;
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
241*4882a593Smuzhiyun return -ENODEV;
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun isl12022 = devm_kzalloc(&client->dev, sizeof(struct isl12022),
244*4882a593Smuzhiyun GFP_KERNEL);
245*4882a593Smuzhiyun if (!isl12022)
246*4882a593Smuzhiyun return -ENOMEM;
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun i2c_set_clientdata(client, isl12022);
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun isl12022->rtc = devm_rtc_device_register(&client->dev,
251*4882a593Smuzhiyun isl12022_driver.driver.name,
252*4882a593Smuzhiyun &isl12022_rtc_ops, THIS_MODULE);
253*4882a593Smuzhiyun return PTR_ERR_OR_ZERO(isl12022->rtc);
254*4882a593Smuzhiyun }
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun #ifdef CONFIG_OF
257*4882a593Smuzhiyun static const struct of_device_id isl12022_dt_match[] = {
258*4882a593Smuzhiyun { .compatible = "isl,isl12022" }, /* for backward compat., don't use */
259*4882a593Smuzhiyun { .compatible = "isil,isl12022" },
260*4882a593Smuzhiyun { },
261*4882a593Smuzhiyun };
262*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, isl12022_dt_match);
263*4882a593Smuzhiyun #endif
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun static const struct i2c_device_id isl12022_id[] = {
266*4882a593Smuzhiyun { "isl12022", 0 },
267*4882a593Smuzhiyun { }
268*4882a593Smuzhiyun };
269*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, isl12022_id);
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun static struct i2c_driver isl12022_driver = {
272*4882a593Smuzhiyun .driver = {
273*4882a593Smuzhiyun .name = "rtc-isl12022",
274*4882a593Smuzhiyun #ifdef CONFIG_OF
275*4882a593Smuzhiyun .of_match_table = of_match_ptr(isl12022_dt_match),
276*4882a593Smuzhiyun #endif
277*4882a593Smuzhiyun },
278*4882a593Smuzhiyun .probe = isl12022_probe,
279*4882a593Smuzhiyun .id_table = isl12022_id,
280*4882a593Smuzhiyun };
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun module_i2c_driver(isl12022_driver);
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun MODULE_AUTHOR("roman.fietze@telemotive.de");
285*4882a593Smuzhiyun MODULE_DESCRIPTION("ISL 12022 RTC driver");
286*4882a593Smuzhiyun MODULE_LICENSE("GPL");
287