1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright 2018 NXP.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <dt-bindings/firmware/imx/rsrc.h>
7*4882a593Smuzhiyun #include <linux/arm-smccc.h>
8*4882a593Smuzhiyun #include <linux/firmware/imx/sci.h>
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/of.h>
11*4882a593Smuzhiyun #include <linux/platform_device.h>
12*4882a593Smuzhiyun #include <linux/rtc.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #define IMX_SC_TIMER_FUNC_GET_RTC_SEC1970 9
15*4882a593Smuzhiyun #define IMX_SC_TIMER_FUNC_SET_RTC_ALARM 8
16*4882a593Smuzhiyun #define IMX_SC_TIMER_FUNC_SET_RTC_TIME 6
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #define IMX_SIP_SRTC 0xC2000002
19*4882a593Smuzhiyun #define IMX_SIP_SRTC_SET_TIME 0x0
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #define SC_IRQ_GROUP_RTC 2
22*4882a593Smuzhiyun #define SC_IRQ_RTC 1
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun static struct imx_sc_ipc *rtc_ipc_handle;
25*4882a593Smuzhiyun static struct rtc_device *imx_sc_rtc;
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun struct imx_sc_msg_timer_get_rtc_time {
28*4882a593Smuzhiyun struct imx_sc_rpc_msg hdr;
29*4882a593Smuzhiyun u32 time;
30*4882a593Smuzhiyun } __packed;
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun struct imx_sc_msg_timer_rtc_set_alarm {
33*4882a593Smuzhiyun struct imx_sc_rpc_msg hdr;
34*4882a593Smuzhiyun u16 year;
35*4882a593Smuzhiyun u8 mon;
36*4882a593Smuzhiyun u8 day;
37*4882a593Smuzhiyun u8 hour;
38*4882a593Smuzhiyun u8 min;
39*4882a593Smuzhiyun u8 sec;
40*4882a593Smuzhiyun } __packed __aligned(4);
41*4882a593Smuzhiyun
imx_sc_rtc_read_time(struct device * dev,struct rtc_time * tm)42*4882a593Smuzhiyun static int imx_sc_rtc_read_time(struct device *dev, struct rtc_time *tm)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun struct imx_sc_msg_timer_get_rtc_time msg;
45*4882a593Smuzhiyun struct imx_sc_rpc_msg *hdr = &msg.hdr;
46*4882a593Smuzhiyun int ret;
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun hdr->ver = IMX_SC_RPC_VERSION;
49*4882a593Smuzhiyun hdr->svc = IMX_SC_RPC_SVC_TIMER;
50*4882a593Smuzhiyun hdr->func = IMX_SC_TIMER_FUNC_GET_RTC_SEC1970;
51*4882a593Smuzhiyun hdr->size = 1;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun ret = imx_scu_call_rpc(rtc_ipc_handle, &msg, true);
54*4882a593Smuzhiyun if (ret) {
55*4882a593Smuzhiyun dev_err(dev, "read rtc time failed, ret %d\n", ret);
56*4882a593Smuzhiyun return ret;
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun rtc_time64_to_tm(msg.time, tm);
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun return 0;
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun
imx_sc_rtc_set_time(struct device * dev,struct rtc_time * tm)64*4882a593Smuzhiyun static int imx_sc_rtc_set_time(struct device *dev, struct rtc_time *tm)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun struct arm_smccc_res res;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun /* pack 2 time parameters into 1 register, 16 bits for each */
69*4882a593Smuzhiyun arm_smccc_smc(IMX_SIP_SRTC, IMX_SIP_SRTC_SET_TIME,
70*4882a593Smuzhiyun ((tm->tm_year + 1900) << 16) | (tm->tm_mon + 1),
71*4882a593Smuzhiyun (tm->tm_mday << 16) | tm->tm_hour,
72*4882a593Smuzhiyun (tm->tm_min << 16) | tm->tm_sec,
73*4882a593Smuzhiyun 0, 0, 0, &res);
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun return res.a0;
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
imx_sc_rtc_alarm_irq_enable(struct device * dev,unsigned int enable)78*4882a593Smuzhiyun static int imx_sc_rtc_alarm_irq_enable(struct device *dev, unsigned int enable)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun return imx_scu_irq_group_enable(SC_IRQ_GROUP_RTC, SC_IRQ_RTC, enable);
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
imx_sc_rtc_read_alarm(struct device * dev,struct rtc_wkalrm * alrm)83*4882a593Smuzhiyun static int imx_sc_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun /*
86*4882a593Smuzhiyun * SCU firmware does NOT provide read alarm API, but .read_alarm
87*4882a593Smuzhiyun * callback is required by RTC framework to support alarm function,
88*4882a593Smuzhiyun * so just return here.
89*4882a593Smuzhiyun */
90*4882a593Smuzhiyun return 0;
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun
imx_sc_rtc_set_alarm(struct device * dev,struct rtc_wkalrm * alrm)93*4882a593Smuzhiyun static int imx_sc_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
94*4882a593Smuzhiyun {
95*4882a593Smuzhiyun struct imx_sc_msg_timer_rtc_set_alarm msg;
96*4882a593Smuzhiyun struct imx_sc_rpc_msg *hdr = &msg.hdr;
97*4882a593Smuzhiyun int ret;
98*4882a593Smuzhiyun struct rtc_time *alrm_tm = &alrm->time;
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun hdr->ver = IMX_SC_RPC_VERSION;
101*4882a593Smuzhiyun hdr->svc = IMX_SC_RPC_SVC_TIMER;
102*4882a593Smuzhiyun hdr->func = IMX_SC_TIMER_FUNC_SET_RTC_ALARM;
103*4882a593Smuzhiyun hdr->size = 3;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun msg.year = alrm_tm->tm_year + 1900;
106*4882a593Smuzhiyun msg.mon = alrm_tm->tm_mon + 1;
107*4882a593Smuzhiyun msg.day = alrm_tm->tm_mday;
108*4882a593Smuzhiyun msg.hour = alrm_tm->tm_hour;
109*4882a593Smuzhiyun msg.min = alrm_tm->tm_min;
110*4882a593Smuzhiyun msg.sec = alrm_tm->tm_sec;
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun ret = imx_scu_call_rpc(rtc_ipc_handle, &msg, true);
113*4882a593Smuzhiyun if (ret) {
114*4882a593Smuzhiyun dev_err(dev, "set rtc alarm failed, ret %d\n", ret);
115*4882a593Smuzhiyun return ret;
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun ret = imx_sc_rtc_alarm_irq_enable(dev, alrm->enabled);
119*4882a593Smuzhiyun if (ret) {
120*4882a593Smuzhiyun dev_err(dev, "enable rtc alarm failed, ret %d\n", ret);
121*4882a593Smuzhiyun return ret;
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun return 0;
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun static const struct rtc_class_ops imx_sc_rtc_ops = {
128*4882a593Smuzhiyun .read_time = imx_sc_rtc_read_time,
129*4882a593Smuzhiyun .set_time = imx_sc_rtc_set_time,
130*4882a593Smuzhiyun .read_alarm = imx_sc_rtc_read_alarm,
131*4882a593Smuzhiyun .set_alarm = imx_sc_rtc_set_alarm,
132*4882a593Smuzhiyun .alarm_irq_enable = imx_sc_rtc_alarm_irq_enable,
133*4882a593Smuzhiyun };
134*4882a593Smuzhiyun
imx_sc_rtc_alarm_notify(struct notifier_block * nb,unsigned long event,void * group)135*4882a593Smuzhiyun static int imx_sc_rtc_alarm_notify(struct notifier_block *nb,
136*4882a593Smuzhiyun unsigned long event, void *group)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun /* ignore non-rtc irq */
139*4882a593Smuzhiyun if (!((event & SC_IRQ_RTC) && (*(u8 *)group == SC_IRQ_GROUP_RTC)))
140*4882a593Smuzhiyun return 0;
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun rtc_update_irq(imx_sc_rtc, 1, RTC_IRQF | RTC_AF);
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun return 0;
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun static struct notifier_block imx_sc_rtc_alarm_sc_notifier = {
148*4882a593Smuzhiyun .notifier_call = imx_sc_rtc_alarm_notify,
149*4882a593Smuzhiyun };
150*4882a593Smuzhiyun
imx_sc_rtc_probe(struct platform_device * pdev)151*4882a593Smuzhiyun static int imx_sc_rtc_probe(struct platform_device *pdev)
152*4882a593Smuzhiyun {
153*4882a593Smuzhiyun int ret;
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun ret = imx_scu_get_handle(&rtc_ipc_handle);
156*4882a593Smuzhiyun if (ret)
157*4882a593Smuzhiyun return ret;
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun device_init_wakeup(&pdev->dev, true);
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun imx_sc_rtc = devm_rtc_allocate_device(&pdev->dev);
162*4882a593Smuzhiyun if (IS_ERR(imx_sc_rtc))
163*4882a593Smuzhiyun return PTR_ERR(imx_sc_rtc);
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun imx_sc_rtc->ops = &imx_sc_rtc_ops;
166*4882a593Smuzhiyun imx_sc_rtc->range_min = 0;
167*4882a593Smuzhiyun imx_sc_rtc->range_max = U32_MAX;
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun ret = rtc_register_device(imx_sc_rtc);
170*4882a593Smuzhiyun if (ret)
171*4882a593Smuzhiyun return ret;
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun imx_scu_irq_register_notifier(&imx_sc_rtc_alarm_sc_notifier);
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun return 0;
176*4882a593Smuzhiyun }
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun static const struct of_device_id imx_sc_dt_ids[] = {
179*4882a593Smuzhiyun { .compatible = "fsl,imx8qxp-sc-rtc", },
180*4882a593Smuzhiyun {}
181*4882a593Smuzhiyun };
182*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, imx_sc_dt_ids);
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun static struct platform_driver imx_sc_rtc_driver = {
185*4882a593Smuzhiyun .driver = {
186*4882a593Smuzhiyun .name = "imx-sc-rtc",
187*4882a593Smuzhiyun .of_match_table = imx_sc_dt_ids,
188*4882a593Smuzhiyun },
189*4882a593Smuzhiyun .probe = imx_sc_rtc_probe,
190*4882a593Smuzhiyun };
191*4882a593Smuzhiyun module_platform_driver(imx_sc_rtc_driver);
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun MODULE_AUTHOR("Anson Huang <Anson.Huang@nxp.com>");
194*4882a593Smuzhiyun MODULE_DESCRIPTION("NXP i.MX System Controller RTC Driver");
195*4882a593Smuzhiyun MODULE_LICENSE("GPL");
196