1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Haoyu HYM8563 RTC driver
4 *
5 * Copyright (C) 2013 MundoReader S.L.
6 * Author: Heiko Stuebner <heiko@sntech.de>
7 *
8 * based on rtc-HYM8563
9 * Copyright (C) 2010 ROCKCHIP, Inc.
10 */
11
12 #include <linux/module.h>
13 #include <linux/clk-provider.h>
14 #include <linux/i2c.h>
15 #include <linux/bcd.h>
16 #include <linux/rtc.h>
17
18 #define HYM8563_CTL1 0x00
19 #define HYM8563_CTL1_TEST BIT(7)
20 #define HYM8563_CTL1_STOP BIT(5)
21 #define HYM8563_CTL1_TESTC BIT(3)
22
23 #define HYM8563_CTL2 0x01
24 #define HYM8563_CTL2_TI_TP BIT(4)
25 #define HYM8563_CTL2_AF BIT(3)
26 #define HYM8563_CTL2_TF BIT(2)
27 #define HYM8563_CTL2_AIE BIT(1)
28 #define HYM8563_CTL2_TIE BIT(0)
29
30 #define HYM8563_SEC 0x02
31 #define HYM8563_SEC_VL BIT(7)
32 #define HYM8563_SEC_MASK 0x7f
33
34 #define HYM8563_MIN 0x03
35 #define HYM8563_MIN_MASK 0x7f
36
37 #define HYM8563_HOUR 0x04
38 #define HYM8563_HOUR_MASK 0x3f
39
40 #define HYM8563_DAY 0x05
41 #define HYM8563_DAY_MASK 0x3f
42
43 #define HYM8563_WEEKDAY 0x06
44 #define HYM8563_WEEKDAY_MASK 0x07
45
46 #define HYM8563_MONTH 0x07
47 #define HYM8563_MONTH_CENTURY BIT(7)
48 #define HYM8563_MONTH_MASK 0x1f
49
50 #define HYM8563_YEAR 0x08
51
52 #define HYM8563_ALM_MIN 0x09
53 #define HYM8563_ALM_HOUR 0x0a
54 #define HYM8563_ALM_DAY 0x0b
55 #define HYM8563_ALM_WEEK 0x0c
56
57 /* Each alarm check can be disabled by setting this bit in the register */
58 #define HYM8563_ALM_BIT_DISABLE BIT(7)
59
60 #define HYM8563_CLKOUT 0x0d
61 #define HYM8563_CLKOUT_ENABLE BIT(7)
62 #define HYM8563_CLKOUT_32768 0
63 #define HYM8563_CLKOUT_1024 1
64 #define HYM8563_CLKOUT_32 2
65 #define HYM8563_CLKOUT_1 3
66 #define HYM8563_CLKOUT_MASK 3
67
68 #define HYM8563_TMR_CTL 0x0e
69 #define HYM8563_TMR_CTL_ENABLE BIT(7)
70 #define HYM8563_TMR_CTL_4096 0
71 #define HYM8563_TMR_CTL_64 1
72 #define HYM8563_TMR_CTL_1 2
73 #define HYM8563_TMR_CTL_1_60 3
74 #define HYM8563_TMR_CTL_MASK 3
75
76 #define HYM8563_TMR_CNT 0x0f
77
78 struct hym8563 {
79 struct i2c_client *client;
80 struct rtc_device *rtc;
81 #ifdef CONFIG_COMMON_CLK
82 struct clk_hw clkout_hw;
83 #endif
84 };
85
86 /*
87 * RTC handling
88 */
89
hym8563_rtc_read_time(struct device * dev,struct rtc_time * tm)90 static int hym8563_rtc_read_time(struct device *dev, struct rtc_time *tm)
91 {
92 struct i2c_client *client = to_i2c_client(dev);
93 u8 buf[7];
94 int ret;
95
96 ret = i2c_smbus_read_i2c_block_data(client, HYM8563_SEC, 7, buf);
97 if (ret < 0)
98 return ret;
99
100 tm->tm_sec = bcd2bin(buf[0] & HYM8563_SEC_MASK);
101 tm->tm_min = bcd2bin(buf[1] & HYM8563_MIN_MASK);
102 tm->tm_hour = bcd2bin(buf[2] & HYM8563_HOUR_MASK);
103 tm->tm_mday = bcd2bin(buf[3] & HYM8563_DAY_MASK);
104 tm->tm_wday = bcd2bin(buf[4] & HYM8563_WEEKDAY_MASK); /* 0 = Sun */
105 tm->tm_mon = bcd2bin(buf[5] & HYM8563_MONTH_MASK) - 1; /* 0 = Jan */
106 tm->tm_year = bcd2bin(buf[6]) + 100;
107
108 return 0;
109 }
110
hym8563_rtc_set_time(struct device * dev,struct rtc_time * tm)111 static int hym8563_rtc_set_time(struct device *dev, struct rtc_time *tm)
112 {
113 struct i2c_client *client = to_i2c_client(dev);
114 u8 buf[7];
115 int ret;
116
117 /* Years >= 2100 are to far in the future, 19XX is to early */
118 if (tm->tm_year < 100 || tm->tm_year >= 200)
119 return -EINVAL;
120
121 buf[0] = bin2bcd(tm->tm_sec);
122 buf[1] = bin2bcd(tm->tm_min);
123 buf[2] = bin2bcd(tm->tm_hour);
124 buf[3] = bin2bcd(tm->tm_mday);
125 buf[4] = bin2bcd(tm->tm_wday);
126 buf[5] = bin2bcd(tm->tm_mon + 1);
127
128 /*
129 * While the HYM8563 has a century flag in the month register,
130 * it does not seem to carry it over a subsequent write/read.
131 * So we'll limit ourself to 100 years, starting at 2000 for now.
132 */
133 buf[6] = bin2bcd(tm->tm_year - 100);
134
135 /*
136 * CTL1 only contains TEST-mode bits apart from stop,
137 * so no need to read the value first
138 */
139 ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1,
140 HYM8563_CTL1_STOP);
141 if (ret < 0)
142 return ret;
143
144 ret = i2c_smbus_write_i2c_block_data(client, HYM8563_SEC, 7, buf);
145 if (ret < 0)
146 return ret;
147
148 ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1, 0);
149 if (ret < 0)
150 return ret;
151
152 return 0;
153 }
154
hym8563_rtc_alarm_irq_enable(struct device * dev,unsigned int enabled)155 static int hym8563_rtc_alarm_irq_enable(struct device *dev,
156 unsigned int enabled)
157 {
158 struct i2c_client *client = to_i2c_client(dev);
159 int data;
160
161 data = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
162 if (data < 0)
163 return data;
164
165 if (enabled)
166 data |= HYM8563_CTL2_AIE;
167 else
168 data &= ~HYM8563_CTL2_AIE;
169
170 return i2c_smbus_write_byte_data(client, HYM8563_CTL2, data);
171 };
172
hym8563_rtc_read_alarm(struct device * dev,struct rtc_wkalrm * alm)173 static int hym8563_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
174 {
175 struct i2c_client *client = to_i2c_client(dev);
176 struct rtc_time *alm_tm = &alm->time;
177 u8 buf[4];
178 int ret;
179
180 ret = i2c_smbus_read_i2c_block_data(client, HYM8563_ALM_MIN, 4, buf);
181 if (ret < 0)
182 return ret;
183
184 /* The alarm only has a minute accuracy */
185 alm_tm->tm_sec = 0;
186
187 alm_tm->tm_min = (buf[0] & HYM8563_ALM_BIT_DISABLE) ?
188 -1 :
189 bcd2bin(buf[0] & HYM8563_MIN_MASK);
190 alm_tm->tm_hour = (buf[1] & HYM8563_ALM_BIT_DISABLE) ?
191 -1 :
192 bcd2bin(buf[1] & HYM8563_HOUR_MASK);
193 alm_tm->tm_mday = (buf[2] & HYM8563_ALM_BIT_DISABLE) ?
194 -1 :
195 bcd2bin(buf[2] & HYM8563_DAY_MASK);
196 alm_tm->tm_wday = (buf[3] & HYM8563_ALM_BIT_DISABLE) ?
197 -1 :
198 bcd2bin(buf[3] & HYM8563_WEEKDAY_MASK);
199
200 ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
201 if (ret < 0)
202 return ret;
203
204 if (ret & HYM8563_CTL2_AIE)
205 alm->enabled = 1;
206
207 return 0;
208 }
209
hym8563_rtc_set_alarm(struct device * dev,struct rtc_wkalrm * alm)210 static int hym8563_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
211 {
212 struct i2c_client *client = to_i2c_client(dev);
213 struct rtc_time *alm_tm = &alm->time;
214 u8 buf[4];
215 int ret;
216
217 /*
218 * The alarm has no seconds so deal with it
219 */
220 if (alm_tm->tm_sec) {
221 alm_tm->tm_sec = 0;
222 alm_tm->tm_min++;
223 if (alm_tm->tm_min >= 60) {
224 alm_tm->tm_min = 0;
225 alm_tm->tm_hour++;
226 if (alm_tm->tm_hour >= 24) {
227 alm_tm->tm_hour = 0;
228 alm_tm->tm_mday++;
229 alm_tm->tm_wday++;
230 if (alm_tm->tm_wday > 6)
231 alm_tm->tm_wday = 0;
232 switch (alm_tm->tm_mon + 1) {
233 case 1:
234 case 3:
235 case 5:
236 case 7:
237 case 8:
238 case 10:
239 case 12:
240 if (alm_tm->tm_mday > 31)
241 alm_tm->tm_mday = 1;
242 break;
243 case 4:
244 case 6:
245 case 9:
246 case 11:
247 if (alm_tm->tm_mday > 30)
248 alm_tm->tm_mday = 1;
249 break;
250 case 2:
251 if (alm_tm->tm_year / 4 == 0) {
252 if (alm_tm->tm_mday > 29)
253 alm_tm->tm_mday = 1;
254 } else if (alm_tm->tm_mday > 28) {
255 alm_tm->tm_mday = 1;
256 }
257 break;
258 }
259 }
260 }
261 }
262 ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
263 if (ret < 0)
264 return ret;
265
266 ret &= ~HYM8563_CTL2_AIE;
267
268 ret = i2c_smbus_write_byte_data(client, HYM8563_CTL2, ret);
269 if (ret < 0)
270 return ret;
271
272 buf[0] = (alm_tm->tm_min < 60 && alm_tm->tm_min >= 0) ?
273 bin2bcd(alm_tm->tm_min) : HYM8563_ALM_BIT_DISABLE;
274
275 buf[1] = (alm_tm->tm_hour < 24 && alm_tm->tm_hour >= 0) ?
276 bin2bcd(alm_tm->tm_hour) : HYM8563_ALM_BIT_DISABLE;
277
278 buf[2] = (alm_tm->tm_mday <= 31 && alm_tm->tm_mday >= 1) ?
279 bin2bcd(alm_tm->tm_mday) : HYM8563_ALM_BIT_DISABLE;
280
281 buf[3] = (alm_tm->tm_wday < 7 && alm_tm->tm_wday >= 0) ?
282 bin2bcd(alm_tm->tm_wday) : HYM8563_ALM_BIT_DISABLE;
283
284 ret = i2c_smbus_write_i2c_block_data(client, HYM8563_ALM_MIN, 4, buf);
285 if (ret < 0)
286 return ret;
287
288 return hym8563_rtc_alarm_irq_enable(dev, alm->enabled);
289 }
290
291 static const struct rtc_class_ops hym8563_rtc_ops = {
292 .read_time = hym8563_rtc_read_time,
293 .set_time = hym8563_rtc_set_time,
294 .alarm_irq_enable = hym8563_rtc_alarm_irq_enable,
295 .read_alarm = hym8563_rtc_read_alarm,
296 .set_alarm = hym8563_rtc_set_alarm,
297 };
298
299 /*
300 * Handling of the clkout
301 */
302
303 #ifdef CONFIG_COMMON_CLK
304 #define clkout_hw_to_hym8563(_hw) container_of(_hw, struct hym8563, clkout_hw)
305
306 static int clkout_rates[] = {
307 32768,
308 1024,
309 32,
310 1,
311 };
312
hym8563_clkout_recalc_rate(struct clk_hw * hw,unsigned long parent_rate)313 static unsigned long hym8563_clkout_recalc_rate(struct clk_hw *hw,
314 unsigned long parent_rate)
315 {
316 struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
317 struct i2c_client *client = hym8563->client;
318 int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
319
320 if (ret < 0)
321 return 0;
322
323 ret &= HYM8563_CLKOUT_MASK;
324 return clkout_rates[ret];
325 }
326
hym8563_clkout_round_rate(struct clk_hw * hw,unsigned long rate,unsigned long * prate)327 static long hym8563_clkout_round_rate(struct clk_hw *hw, unsigned long rate,
328 unsigned long *prate)
329 {
330 int i;
331
332 for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
333 if (clkout_rates[i] <= rate)
334 return clkout_rates[i];
335
336 return 0;
337 }
338
hym8563_clkout_set_rate(struct clk_hw * hw,unsigned long rate,unsigned long parent_rate)339 static int hym8563_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
340 unsigned long parent_rate)
341 {
342 struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
343 struct i2c_client *client = hym8563->client;
344 int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
345 int i;
346
347 if (ret < 0)
348 return ret;
349
350 for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
351 if (clkout_rates[i] == rate) {
352 ret &= ~HYM8563_CLKOUT_MASK;
353 ret |= i;
354 return i2c_smbus_write_byte_data(client,
355 HYM8563_CLKOUT, ret);
356 }
357
358 return -EINVAL;
359 }
360
hym8563_clkout_control(struct clk_hw * hw,bool enable)361 static int hym8563_clkout_control(struct clk_hw *hw, bool enable)
362 {
363 struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
364 struct i2c_client *client = hym8563->client;
365 int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
366
367 if (ret < 0)
368 return ret;
369
370 if (enable)
371 ret |= HYM8563_CLKOUT_ENABLE;
372 else
373 ret &= ~HYM8563_CLKOUT_ENABLE;
374
375 return i2c_smbus_write_byte_data(client, HYM8563_CLKOUT, ret);
376 }
377
hym8563_clkout_prepare(struct clk_hw * hw)378 static int hym8563_clkout_prepare(struct clk_hw *hw)
379 {
380 return hym8563_clkout_control(hw, 1);
381 }
382
hym8563_clkout_unprepare(struct clk_hw * hw)383 static void hym8563_clkout_unprepare(struct clk_hw *hw)
384 {
385 hym8563_clkout_control(hw, 0);
386 }
387
hym8563_clkout_is_prepared(struct clk_hw * hw)388 static int hym8563_clkout_is_prepared(struct clk_hw *hw)
389 {
390 struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
391 struct i2c_client *client = hym8563->client;
392 int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
393
394 if (ret < 0)
395 return ret;
396
397 return !!(ret & HYM8563_CLKOUT_ENABLE);
398 }
399
400 static const struct clk_ops hym8563_clkout_ops = {
401 .prepare = hym8563_clkout_prepare,
402 .unprepare = hym8563_clkout_unprepare,
403 .is_prepared = hym8563_clkout_is_prepared,
404 .recalc_rate = hym8563_clkout_recalc_rate,
405 .round_rate = hym8563_clkout_round_rate,
406 .set_rate = hym8563_clkout_set_rate,
407 };
408
hym8563_clkout_register_clk(struct hym8563 * hym8563)409 static struct clk *hym8563_clkout_register_clk(struct hym8563 *hym8563)
410 {
411 struct i2c_client *client = hym8563->client;
412 struct device_node *node = client->dev.of_node;
413 struct clk *clk;
414 struct clk_init_data init;
415
416 init.name = "hym8563-clkout";
417 init.ops = &hym8563_clkout_ops;
418 init.flags = CLK_IS_CRITICAL;
419 init.parent_names = NULL;
420 init.num_parents = 0;
421 hym8563->clkout_hw.init = &init;
422
423 /* optional override of the clockname */
424 of_property_read_string(node, "clock-output-names", &init.name);
425
426 /* register the clock */
427 clk = clk_register(&client->dev, &hym8563->clkout_hw);
428
429 if (!IS_ERR(clk))
430 of_clk_add_provider(node, of_clk_src_simple_get, clk);
431
432 return clk;
433 }
434 #endif
435
436 /*
437 * The alarm interrupt is implemented as a level-low interrupt in the
438 * hym8563, while the timer interrupt uses a falling edge.
439 * We don't use the timer at all, so the interrupt is requested to
440 * use the level-low trigger.
441 */
hym8563_irq(int irq,void * dev_id)442 static irqreturn_t hym8563_irq(int irq, void *dev_id)
443 {
444 struct hym8563 *hym8563 = (struct hym8563 *)dev_id;
445 struct i2c_client *client = hym8563->client;
446 struct mutex *lock = &hym8563->rtc->ops_lock;
447 int data, ret;
448
449 mutex_lock(lock);
450
451 /* Clear the alarm flag */
452
453 data = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
454 if (data < 0) {
455 dev_err(&client->dev, "%s: error reading i2c data %d\n",
456 __func__, data);
457 goto out;
458 }
459
460 data &= ~HYM8563_CTL2_AF;
461
462 ret = i2c_smbus_write_byte_data(client, HYM8563_CTL2, data);
463 if (ret < 0) {
464 dev_err(&client->dev, "%s: error writing i2c data %d\n",
465 __func__, ret);
466 }
467
468 out:
469 mutex_unlock(lock);
470 return IRQ_HANDLED;
471 }
472
hym8563_init_device(struct i2c_client * client)473 static int hym8563_init_device(struct i2c_client *client)
474 {
475 int ret;
476
477 /* Clear stop flag if present */
478 ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1, 0);
479 if (ret < 0)
480 return ret;
481
482 ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
483 if (ret < 0)
484 return ret;
485
486 /* Disable alarm and timer interrupts */
487 ret &= ~HYM8563_CTL2_AIE;
488 ret &= ~HYM8563_CTL2_TIE;
489
490 /* Clear any pending alarm and timer flags */
491 if (ret & HYM8563_CTL2_AF)
492 ret &= ~HYM8563_CTL2_AF;
493
494 if (ret & HYM8563_CTL2_TF)
495 ret &= ~HYM8563_CTL2_TF;
496
497 ret &= ~HYM8563_CTL2_TI_TP;
498
499 return i2c_smbus_write_byte_data(client, HYM8563_CTL2, ret);
500 }
501
502 #ifdef CONFIG_PM_SLEEP
hym8563_suspend(struct device * dev)503 static int hym8563_suspend(struct device *dev)
504 {
505 struct i2c_client *client = to_i2c_client(dev);
506 int ret;
507
508 if (device_may_wakeup(dev)) {
509 ret = enable_irq_wake(client->irq);
510 if (ret) {
511 dev_err(dev, "enable_irq_wake failed, %d\n", ret);
512 return ret;
513 }
514 }
515
516 return 0;
517 }
518
hym8563_resume(struct device * dev)519 static int hym8563_resume(struct device *dev)
520 {
521 struct i2c_client *client = to_i2c_client(dev);
522
523 if (device_may_wakeup(dev))
524 disable_irq_wake(client->irq);
525
526 return 0;
527 }
528 #endif
529
530 static SIMPLE_DEV_PM_OPS(hym8563_pm_ops, hym8563_suspend, hym8563_resume);
531
hym8563_probe(struct i2c_client * client,const struct i2c_device_id * id)532 static int hym8563_probe(struct i2c_client *client,
533 const struct i2c_device_id *id)
534 {
535 struct hym8563 *hym8563;
536 int ret;
537 /*
538 * hym8563 initial time(2021_1_1_12:00:00),
539 * avoid hym8563 read time error
540 */
541 struct rtc_time tm_read, tm = {
542 .tm_wday = 0,
543 .tm_year = 121,
544 .tm_mon = 0,
545 .tm_mday = 1,
546 .tm_hour = 12,
547 .tm_min = 0,
548 .tm_sec = 0,
549 };
550
551 hym8563 = devm_kzalloc(&client->dev, sizeof(*hym8563), GFP_KERNEL);
552 if (!hym8563)
553 return -ENOMEM;
554
555 hym8563->client = client;
556 i2c_set_clientdata(client, hym8563);
557
558 ret = hym8563_init_device(client);
559 if (ret) {
560 dev_err(&client->dev, "could not init device, %d\n", ret);
561 return ret;
562 }
563
564 if (client->irq > 0) {
565 ret = devm_request_threaded_irq(&client->dev, client->irq,
566 NULL, hym8563_irq,
567 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
568 client->name, hym8563);
569 if (ret < 0) {
570 dev_err(&client->dev, "irq %d request failed, %d\n",
571 client->irq, ret);
572 return ret;
573 }
574 }
575
576 if (client->irq > 0 ||
577 device_property_read_bool(&client->dev, "wakeup-source")) {
578 device_init_wakeup(&client->dev, true);
579 }
580
581 /* check state of calendar information */
582 ret = i2c_smbus_read_byte_data(client, HYM8563_SEC);
583 if (ret < 0)
584 return ret;
585
586 dev_info(&client->dev, "rtc information is %s\n",
587 (ret & HYM8563_SEC_VL) ? "invalid" : "valid");
588
589 hym8563_rtc_read_time(&client->dev, &tm_read);
590 if ((ret & HYM8563_SEC_VL) || (tm_read.tm_year < 70) || (tm_read.tm_year > 200) ||
591 (tm_read.tm_mon == -1) || (rtc_valid_tm(&tm_read) != 0))
592 hym8563_rtc_set_time(&client->dev, &tm);
593
594 hym8563->rtc = devm_rtc_device_register(&client->dev, client->name,
595 &hym8563_rtc_ops, THIS_MODULE);
596 if (IS_ERR(hym8563->rtc))
597 return PTR_ERR(hym8563->rtc);
598
599 /* the hym8563 alarm only supports a minute accuracy */
600 hym8563->rtc->uie_unsupported = 1;
601
602 #ifdef CONFIG_COMMON_CLK
603 hym8563_clkout_register_clk(hym8563);
604 #endif
605
606 return 0;
607 }
608
609 static const struct i2c_device_id hym8563_id[] = {
610 { "hym8563", 0 },
611 {},
612 };
613 MODULE_DEVICE_TABLE(i2c, hym8563_id);
614
615 static const struct of_device_id hym8563_dt_idtable[] = {
616 { .compatible = "haoyu,hym8563" },
617 {},
618 };
619 MODULE_DEVICE_TABLE(of, hym8563_dt_idtable);
620
621 static struct i2c_driver hym8563_driver = {
622 .driver = {
623 .name = "rtc-hym8563",
624 .pm = &hym8563_pm_ops,
625 .of_match_table = hym8563_dt_idtable,
626 },
627 .probe = hym8563_probe,
628 .id_table = hym8563_id,
629 };
630
631 module_i2c_driver(hym8563_driver);
632
633 MODULE_AUTHOR("Heiko Stuebner <heiko@sntech.de>");
634 MODULE_DESCRIPTION("HYM8563 RTC driver");
635 MODULE_LICENSE("GPL");
636