xref: /OK3568_Linux_fs/kernel/drivers/rtc/rtc-hym8563.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Haoyu HYM8563 RTC driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2013 MundoReader S.L.
6*4882a593Smuzhiyun  * Author: Heiko Stuebner <heiko@sntech.de>
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * based on rtc-HYM8563
9*4882a593Smuzhiyun  * Copyright (C) 2010 ROCKCHIP, Inc.
10*4882a593Smuzhiyun  */
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/clk-provider.h>
14*4882a593Smuzhiyun #include <linux/i2c.h>
15*4882a593Smuzhiyun #include <linux/bcd.h>
16*4882a593Smuzhiyun #include <linux/rtc.h>
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #define HYM8563_CTL1		0x00
19*4882a593Smuzhiyun #define HYM8563_CTL1_TEST	BIT(7)
20*4882a593Smuzhiyun #define HYM8563_CTL1_STOP	BIT(5)
21*4882a593Smuzhiyun #define HYM8563_CTL1_TESTC	BIT(3)
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #define HYM8563_CTL2		0x01
24*4882a593Smuzhiyun #define HYM8563_CTL2_TI_TP	BIT(4)
25*4882a593Smuzhiyun #define HYM8563_CTL2_AF		BIT(3)
26*4882a593Smuzhiyun #define HYM8563_CTL2_TF		BIT(2)
27*4882a593Smuzhiyun #define HYM8563_CTL2_AIE	BIT(1)
28*4882a593Smuzhiyun #define HYM8563_CTL2_TIE	BIT(0)
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #define HYM8563_SEC		0x02
31*4882a593Smuzhiyun #define HYM8563_SEC_VL		BIT(7)
32*4882a593Smuzhiyun #define HYM8563_SEC_MASK	0x7f
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #define HYM8563_MIN		0x03
35*4882a593Smuzhiyun #define HYM8563_MIN_MASK	0x7f
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun #define HYM8563_HOUR		0x04
38*4882a593Smuzhiyun #define HYM8563_HOUR_MASK	0x3f
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun #define HYM8563_DAY		0x05
41*4882a593Smuzhiyun #define HYM8563_DAY_MASK	0x3f
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun #define HYM8563_WEEKDAY		0x06
44*4882a593Smuzhiyun #define HYM8563_WEEKDAY_MASK	0x07
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun #define HYM8563_MONTH		0x07
47*4882a593Smuzhiyun #define HYM8563_MONTH_CENTURY	BIT(7)
48*4882a593Smuzhiyun #define HYM8563_MONTH_MASK	0x1f
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun #define HYM8563_YEAR		0x08
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun #define HYM8563_ALM_MIN		0x09
53*4882a593Smuzhiyun #define HYM8563_ALM_HOUR	0x0a
54*4882a593Smuzhiyun #define HYM8563_ALM_DAY		0x0b
55*4882a593Smuzhiyun #define HYM8563_ALM_WEEK	0x0c
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun /* Each alarm check can be disabled by setting this bit in the register */
58*4882a593Smuzhiyun #define HYM8563_ALM_BIT_DISABLE	BIT(7)
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun #define HYM8563_CLKOUT		0x0d
61*4882a593Smuzhiyun #define HYM8563_CLKOUT_ENABLE	BIT(7)
62*4882a593Smuzhiyun #define HYM8563_CLKOUT_32768	0
63*4882a593Smuzhiyun #define HYM8563_CLKOUT_1024	1
64*4882a593Smuzhiyun #define HYM8563_CLKOUT_32	2
65*4882a593Smuzhiyun #define HYM8563_CLKOUT_1	3
66*4882a593Smuzhiyun #define HYM8563_CLKOUT_MASK	3
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun #define HYM8563_TMR_CTL		0x0e
69*4882a593Smuzhiyun #define HYM8563_TMR_CTL_ENABLE	BIT(7)
70*4882a593Smuzhiyun #define HYM8563_TMR_CTL_4096	0
71*4882a593Smuzhiyun #define HYM8563_TMR_CTL_64	1
72*4882a593Smuzhiyun #define HYM8563_TMR_CTL_1	2
73*4882a593Smuzhiyun #define HYM8563_TMR_CTL_1_60	3
74*4882a593Smuzhiyun #define HYM8563_TMR_CTL_MASK	3
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun #define HYM8563_TMR_CNT		0x0f
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun struct hym8563 {
79*4882a593Smuzhiyun 	struct i2c_client	*client;
80*4882a593Smuzhiyun 	struct rtc_device	*rtc;
81*4882a593Smuzhiyun #ifdef CONFIG_COMMON_CLK
82*4882a593Smuzhiyun 	struct clk_hw		clkout_hw;
83*4882a593Smuzhiyun #endif
84*4882a593Smuzhiyun };
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun /*
87*4882a593Smuzhiyun  * RTC handling
88*4882a593Smuzhiyun  */
89*4882a593Smuzhiyun 
hym8563_rtc_read_time(struct device * dev,struct rtc_time * tm)90*4882a593Smuzhiyun static int hym8563_rtc_read_time(struct device *dev, struct rtc_time *tm)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun 	struct i2c_client *client = to_i2c_client(dev);
93*4882a593Smuzhiyun 	u8 buf[7];
94*4882a593Smuzhiyun 	int ret;
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	ret = i2c_smbus_read_i2c_block_data(client, HYM8563_SEC, 7, buf);
97*4882a593Smuzhiyun 	if (ret < 0)
98*4882a593Smuzhiyun 		return ret;
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	tm->tm_sec = bcd2bin(buf[0] & HYM8563_SEC_MASK);
101*4882a593Smuzhiyun 	tm->tm_min = bcd2bin(buf[1] & HYM8563_MIN_MASK);
102*4882a593Smuzhiyun 	tm->tm_hour = bcd2bin(buf[2] & HYM8563_HOUR_MASK);
103*4882a593Smuzhiyun 	tm->tm_mday = bcd2bin(buf[3] & HYM8563_DAY_MASK);
104*4882a593Smuzhiyun 	tm->tm_wday = bcd2bin(buf[4] & HYM8563_WEEKDAY_MASK); /* 0 = Sun */
105*4882a593Smuzhiyun 	tm->tm_mon = bcd2bin(buf[5] & HYM8563_MONTH_MASK) - 1; /* 0 = Jan */
106*4882a593Smuzhiyun 	tm->tm_year = bcd2bin(buf[6]) + 100;
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	return 0;
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun 
hym8563_rtc_set_time(struct device * dev,struct rtc_time * tm)111*4882a593Smuzhiyun static int hym8563_rtc_set_time(struct device *dev, struct rtc_time *tm)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun 	struct i2c_client *client = to_i2c_client(dev);
114*4882a593Smuzhiyun 	u8 buf[7];
115*4882a593Smuzhiyun 	int ret;
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun 	/* Years >= 2100 are to far in the future, 19XX is to early */
118*4882a593Smuzhiyun 	if (tm->tm_year < 100 || tm->tm_year >= 200)
119*4882a593Smuzhiyun 		return -EINVAL;
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	buf[0] = bin2bcd(tm->tm_sec);
122*4882a593Smuzhiyun 	buf[1] = bin2bcd(tm->tm_min);
123*4882a593Smuzhiyun 	buf[2] = bin2bcd(tm->tm_hour);
124*4882a593Smuzhiyun 	buf[3] = bin2bcd(tm->tm_mday);
125*4882a593Smuzhiyun 	buf[4] = bin2bcd(tm->tm_wday);
126*4882a593Smuzhiyun 	buf[5] = bin2bcd(tm->tm_mon + 1);
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	/*
129*4882a593Smuzhiyun 	 * While the HYM8563 has a century flag in the month register,
130*4882a593Smuzhiyun 	 * it does not seem to carry it over a subsequent write/read.
131*4882a593Smuzhiyun 	 * So we'll limit ourself to 100 years, starting at 2000 for now.
132*4882a593Smuzhiyun 	 */
133*4882a593Smuzhiyun 	buf[6] = bin2bcd(tm->tm_year - 100);
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	/*
136*4882a593Smuzhiyun 	 * CTL1 only contains TEST-mode bits apart from stop,
137*4882a593Smuzhiyun 	 * so no need to read the value first
138*4882a593Smuzhiyun 	 */
139*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1,
140*4882a593Smuzhiyun 						HYM8563_CTL1_STOP);
141*4882a593Smuzhiyun 	if (ret < 0)
142*4882a593Smuzhiyun 		return ret;
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	ret = i2c_smbus_write_i2c_block_data(client, HYM8563_SEC, 7, buf);
145*4882a593Smuzhiyun 	if (ret < 0)
146*4882a593Smuzhiyun 		return ret;
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1, 0);
149*4882a593Smuzhiyun 	if (ret < 0)
150*4882a593Smuzhiyun 		return ret;
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 	return 0;
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun 
hym8563_rtc_alarm_irq_enable(struct device * dev,unsigned int enabled)155*4882a593Smuzhiyun static int hym8563_rtc_alarm_irq_enable(struct device *dev,
156*4882a593Smuzhiyun 					unsigned int enabled)
157*4882a593Smuzhiyun {
158*4882a593Smuzhiyun 	struct i2c_client *client = to_i2c_client(dev);
159*4882a593Smuzhiyun 	int data;
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 	data = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
162*4882a593Smuzhiyun 	if (data < 0)
163*4882a593Smuzhiyun 		return data;
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	if (enabled)
166*4882a593Smuzhiyun 		data |= HYM8563_CTL2_AIE;
167*4882a593Smuzhiyun 	else
168*4882a593Smuzhiyun 		data &= ~HYM8563_CTL2_AIE;
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 	return i2c_smbus_write_byte_data(client, HYM8563_CTL2, data);
171*4882a593Smuzhiyun };
172*4882a593Smuzhiyun 
hym8563_rtc_read_alarm(struct device * dev,struct rtc_wkalrm * alm)173*4882a593Smuzhiyun static int hym8563_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
174*4882a593Smuzhiyun {
175*4882a593Smuzhiyun 	struct i2c_client *client = to_i2c_client(dev);
176*4882a593Smuzhiyun 	struct rtc_time *alm_tm = &alm->time;
177*4882a593Smuzhiyun 	u8 buf[4];
178*4882a593Smuzhiyun 	int ret;
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 	ret = i2c_smbus_read_i2c_block_data(client, HYM8563_ALM_MIN, 4, buf);
181*4882a593Smuzhiyun 	if (ret < 0)
182*4882a593Smuzhiyun 		return ret;
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun 	/* The alarm only has a minute accuracy */
185*4882a593Smuzhiyun 	alm_tm->tm_sec = 0;
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 	alm_tm->tm_min = (buf[0] & HYM8563_ALM_BIT_DISABLE) ?
188*4882a593Smuzhiyun 					-1 :
189*4882a593Smuzhiyun 					bcd2bin(buf[0] & HYM8563_MIN_MASK);
190*4882a593Smuzhiyun 	alm_tm->tm_hour = (buf[1] & HYM8563_ALM_BIT_DISABLE) ?
191*4882a593Smuzhiyun 					-1 :
192*4882a593Smuzhiyun 					bcd2bin(buf[1] & HYM8563_HOUR_MASK);
193*4882a593Smuzhiyun 	alm_tm->tm_mday = (buf[2] & HYM8563_ALM_BIT_DISABLE) ?
194*4882a593Smuzhiyun 					-1 :
195*4882a593Smuzhiyun 					bcd2bin(buf[2] & HYM8563_DAY_MASK);
196*4882a593Smuzhiyun 	alm_tm->tm_wday = (buf[3] & HYM8563_ALM_BIT_DISABLE) ?
197*4882a593Smuzhiyun 					-1 :
198*4882a593Smuzhiyun 					bcd2bin(buf[3] & HYM8563_WEEKDAY_MASK);
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
201*4882a593Smuzhiyun 	if (ret < 0)
202*4882a593Smuzhiyun 		return ret;
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 	if (ret & HYM8563_CTL2_AIE)
205*4882a593Smuzhiyun 		alm->enabled = 1;
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	return 0;
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun 
hym8563_rtc_set_alarm(struct device * dev,struct rtc_wkalrm * alm)210*4882a593Smuzhiyun static int hym8563_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
211*4882a593Smuzhiyun {
212*4882a593Smuzhiyun 	struct i2c_client *client = to_i2c_client(dev);
213*4882a593Smuzhiyun 	struct rtc_time *alm_tm = &alm->time;
214*4882a593Smuzhiyun 	u8 buf[4];
215*4882a593Smuzhiyun 	int ret;
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun 	/*
218*4882a593Smuzhiyun 	 * The alarm has no seconds so deal with it
219*4882a593Smuzhiyun 	 */
220*4882a593Smuzhiyun 	if (alm_tm->tm_sec) {
221*4882a593Smuzhiyun 		alm_tm->tm_sec = 0;
222*4882a593Smuzhiyun 		alm_tm->tm_min++;
223*4882a593Smuzhiyun 		if (alm_tm->tm_min >= 60) {
224*4882a593Smuzhiyun 			alm_tm->tm_min = 0;
225*4882a593Smuzhiyun 			alm_tm->tm_hour++;
226*4882a593Smuzhiyun 			if (alm_tm->tm_hour >= 24) {
227*4882a593Smuzhiyun 				alm_tm->tm_hour = 0;
228*4882a593Smuzhiyun 				alm_tm->tm_mday++;
229*4882a593Smuzhiyun 				alm_tm->tm_wday++;
230*4882a593Smuzhiyun 				if (alm_tm->tm_wday > 6)
231*4882a593Smuzhiyun 					alm_tm->tm_wday = 0;
232*4882a593Smuzhiyun 				switch (alm_tm->tm_mon + 1) {
233*4882a593Smuzhiyun 				case 1:
234*4882a593Smuzhiyun 				case 3:
235*4882a593Smuzhiyun 				case 5:
236*4882a593Smuzhiyun 				case 7:
237*4882a593Smuzhiyun 				case 8:
238*4882a593Smuzhiyun 				case 10:
239*4882a593Smuzhiyun 				case 12:
240*4882a593Smuzhiyun 					if (alm_tm->tm_mday > 31)
241*4882a593Smuzhiyun 						alm_tm->tm_mday = 1;
242*4882a593Smuzhiyun 					break;
243*4882a593Smuzhiyun 				case 4:
244*4882a593Smuzhiyun 				case 6:
245*4882a593Smuzhiyun 				case 9:
246*4882a593Smuzhiyun 				case 11:
247*4882a593Smuzhiyun 					if (alm_tm->tm_mday > 30)
248*4882a593Smuzhiyun 						alm_tm->tm_mday = 1;
249*4882a593Smuzhiyun 					break;
250*4882a593Smuzhiyun 				case 2:
251*4882a593Smuzhiyun 					if (alm_tm->tm_year / 4 == 0) {
252*4882a593Smuzhiyun 						if (alm_tm->tm_mday > 29)
253*4882a593Smuzhiyun 							alm_tm->tm_mday = 1;
254*4882a593Smuzhiyun 					} else if (alm_tm->tm_mday > 28) {
255*4882a593Smuzhiyun 						alm_tm->tm_mday = 1;
256*4882a593Smuzhiyun 					}
257*4882a593Smuzhiyun 					break;
258*4882a593Smuzhiyun 				}
259*4882a593Smuzhiyun 			}
260*4882a593Smuzhiyun 		}
261*4882a593Smuzhiyun 	}
262*4882a593Smuzhiyun 	ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
263*4882a593Smuzhiyun 	if (ret < 0)
264*4882a593Smuzhiyun 		return ret;
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 	ret &= ~HYM8563_CTL2_AIE;
267*4882a593Smuzhiyun 
268*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte_data(client, HYM8563_CTL2, ret);
269*4882a593Smuzhiyun 	if (ret < 0)
270*4882a593Smuzhiyun 		return ret;
271*4882a593Smuzhiyun 
272*4882a593Smuzhiyun 	buf[0] = (alm_tm->tm_min < 60 && alm_tm->tm_min >= 0) ?
273*4882a593Smuzhiyun 			bin2bcd(alm_tm->tm_min) : HYM8563_ALM_BIT_DISABLE;
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun 	buf[1] = (alm_tm->tm_hour < 24 && alm_tm->tm_hour >= 0) ?
276*4882a593Smuzhiyun 			bin2bcd(alm_tm->tm_hour) : HYM8563_ALM_BIT_DISABLE;
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 	buf[2] = (alm_tm->tm_mday <= 31 && alm_tm->tm_mday >= 1) ?
279*4882a593Smuzhiyun 			bin2bcd(alm_tm->tm_mday) : HYM8563_ALM_BIT_DISABLE;
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun 	buf[3] = (alm_tm->tm_wday < 7 && alm_tm->tm_wday >= 0) ?
282*4882a593Smuzhiyun 			bin2bcd(alm_tm->tm_wday) : HYM8563_ALM_BIT_DISABLE;
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun 	ret = i2c_smbus_write_i2c_block_data(client, HYM8563_ALM_MIN, 4, buf);
285*4882a593Smuzhiyun 	if (ret < 0)
286*4882a593Smuzhiyun 		return ret;
287*4882a593Smuzhiyun 
288*4882a593Smuzhiyun 	return hym8563_rtc_alarm_irq_enable(dev, alm->enabled);
289*4882a593Smuzhiyun }
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun static const struct rtc_class_ops hym8563_rtc_ops = {
292*4882a593Smuzhiyun 	.read_time		= hym8563_rtc_read_time,
293*4882a593Smuzhiyun 	.set_time		= hym8563_rtc_set_time,
294*4882a593Smuzhiyun 	.alarm_irq_enable	= hym8563_rtc_alarm_irq_enable,
295*4882a593Smuzhiyun 	.read_alarm		= hym8563_rtc_read_alarm,
296*4882a593Smuzhiyun 	.set_alarm		= hym8563_rtc_set_alarm,
297*4882a593Smuzhiyun };
298*4882a593Smuzhiyun 
299*4882a593Smuzhiyun /*
300*4882a593Smuzhiyun  * Handling of the clkout
301*4882a593Smuzhiyun  */
302*4882a593Smuzhiyun 
303*4882a593Smuzhiyun #ifdef CONFIG_COMMON_CLK
304*4882a593Smuzhiyun #define clkout_hw_to_hym8563(_hw) container_of(_hw, struct hym8563, clkout_hw)
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun static int clkout_rates[] = {
307*4882a593Smuzhiyun 	32768,
308*4882a593Smuzhiyun 	1024,
309*4882a593Smuzhiyun 	32,
310*4882a593Smuzhiyun 	1,
311*4882a593Smuzhiyun };
312*4882a593Smuzhiyun 
hym8563_clkout_recalc_rate(struct clk_hw * hw,unsigned long parent_rate)313*4882a593Smuzhiyun static unsigned long hym8563_clkout_recalc_rate(struct clk_hw *hw,
314*4882a593Smuzhiyun 						unsigned long parent_rate)
315*4882a593Smuzhiyun {
316*4882a593Smuzhiyun 	struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
317*4882a593Smuzhiyun 	struct i2c_client *client = hym8563->client;
318*4882a593Smuzhiyun 	int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun 	if (ret < 0)
321*4882a593Smuzhiyun 		return 0;
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun 	ret &= HYM8563_CLKOUT_MASK;
324*4882a593Smuzhiyun 	return clkout_rates[ret];
325*4882a593Smuzhiyun }
326*4882a593Smuzhiyun 
hym8563_clkout_round_rate(struct clk_hw * hw,unsigned long rate,unsigned long * prate)327*4882a593Smuzhiyun static long hym8563_clkout_round_rate(struct clk_hw *hw, unsigned long rate,
328*4882a593Smuzhiyun 				      unsigned long *prate)
329*4882a593Smuzhiyun {
330*4882a593Smuzhiyun 	int i;
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
333*4882a593Smuzhiyun 		if (clkout_rates[i] <= rate)
334*4882a593Smuzhiyun 			return clkout_rates[i];
335*4882a593Smuzhiyun 
336*4882a593Smuzhiyun 	return 0;
337*4882a593Smuzhiyun }
338*4882a593Smuzhiyun 
hym8563_clkout_set_rate(struct clk_hw * hw,unsigned long rate,unsigned long parent_rate)339*4882a593Smuzhiyun static int hym8563_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
340*4882a593Smuzhiyun 				   unsigned long parent_rate)
341*4882a593Smuzhiyun {
342*4882a593Smuzhiyun 	struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
343*4882a593Smuzhiyun 	struct i2c_client *client = hym8563->client;
344*4882a593Smuzhiyun 	int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
345*4882a593Smuzhiyun 	int i;
346*4882a593Smuzhiyun 
347*4882a593Smuzhiyun 	if (ret < 0)
348*4882a593Smuzhiyun 		return ret;
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
351*4882a593Smuzhiyun 		if (clkout_rates[i] == rate) {
352*4882a593Smuzhiyun 			ret &= ~HYM8563_CLKOUT_MASK;
353*4882a593Smuzhiyun 			ret |= i;
354*4882a593Smuzhiyun 			return i2c_smbus_write_byte_data(client,
355*4882a593Smuzhiyun 							 HYM8563_CLKOUT, ret);
356*4882a593Smuzhiyun 		}
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun 	return -EINVAL;
359*4882a593Smuzhiyun }
360*4882a593Smuzhiyun 
hym8563_clkout_control(struct clk_hw * hw,bool enable)361*4882a593Smuzhiyun static int hym8563_clkout_control(struct clk_hw *hw, bool enable)
362*4882a593Smuzhiyun {
363*4882a593Smuzhiyun 	struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
364*4882a593Smuzhiyun 	struct i2c_client *client = hym8563->client;
365*4882a593Smuzhiyun 	int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun 	if (ret < 0)
368*4882a593Smuzhiyun 		return ret;
369*4882a593Smuzhiyun 
370*4882a593Smuzhiyun 	if (enable)
371*4882a593Smuzhiyun 		ret |= HYM8563_CLKOUT_ENABLE;
372*4882a593Smuzhiyun 	else
373*4882a593Smuzhiyun 		ret &= ~HYM8563_CLKOUT_ENABLE;
374*4882a593Smuzhiyun 
375*4882a593Smuzhiyun 	return i2c_smbus_write_byte_data(client, HYM8563_CLKOUT, ret);
376*4882a593Smuzhiyun }
377*4882a593Smuzhiyun 
hym8563_clkout_prepare(struct clk_hw * hw)378*4882a593Smuzhiyun static int hym8563_clkout_prepare(struct clk_hw *hw)
379*4882a593Smuzhiyun {
380*4882a593Smuzhiyun 	return hym8563_clkout_control(hw, 1);
381*4882a593Smuzhiyun }
382*4882a593Smuzhiyun 
hym8563_clkout_unprepare(struct clk_hw * hw)383*4882a593Smuzhiyun static void hym8563_clkout_unprepare(struct clk_hw *hw)
384*4882a593Smuzhiyun {
385*4882a593Smuzhiyun 	hym8563_clkout_control(hw, 0);
386*4882a593Smuzhiyun }
387*4882a593Smuzhiyun 
hym8563_clkout_is_prepared(struct clk_hw * hw)388*4882a593Smuzhiyun static int hym8563_clkout_is_prepared(struct clk_hw *hw)
389*4882a593Smuzhiyun {
390*4882a593Smuzhiyun 	struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
391*4882a593Smuzhiyun 	struct i2c_client *client = hym8563->client;
392*4882a593Smuzhiyun 	int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
393*4882a593Smuzhiyun 
394*4882a593Smuzhiyun 	if (ret < 0)
395*4882a593Smuzhiyun 		return ret;
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun 	return !!(ret & HYM8563_CLKOUT_ENABLE);
398*4882a593Smuzhiyun }
399*4882a593Smuzhiyun 
400*4882a593Smuzhiyun static const struct clk_ops hym8563_clkout_ops = {
401*4882a593Smuzhiyun 	.prepare = hym8563_clkout_prepare,
402*4882a593Smuzhiyun 	.unprepare = hym8563_clkout_unprepare,
403*4882a593Smuzhiyun 	.is_prepared = hym8563_clkout_is_prepared,
404*4882a593Smuzhiyun 	.recalc_rate = hym8563_clkout_recalc_rate,
405*4882a593Smuzhiyun 	.round_rate = hym8563_clkout_round_rate,
406*4882a593Smuzhiyun 	.set_rate = hym8563_clkout_set_rate,
407*4882a593Smuzhiyun };
408*4882a593Smuzhiyun 
hym8563_clkout_register_clk(struct hym8563 * hym8563)409*4882a593Smuzhiyun static struct clk *hym8563_clkout_register_clk(struct hym8563 *hym8563)
410*4882a593Smuzhiyun {
411*4882a593Smuzhiyun 	struct i2c_client *client = hym8563->client;
412*4882a593Smuzhiyun 	struct device_node *node = client->dev.of_node;
413*4882a593Smuzhiyun 	struct clk *clk;
414*4882a593Smuzhiyun 	struct clk_init_data init;
415*4882a593Smuzhiyun 
416*4882a593Smuzhiyun 	init.name = "hym8563-clkout";
417*4882a593Smuzhiyun 	init.ops = &hym8563_clkout_ops;
418*4882a593Smuzhiyun 	init.flags = CLK_IS_CRITICAL;
419*4882a593Smuzhiyun 	init.parent_names = NULL;
420*4882a593Smuzhiyun 	init.num_parents = 0;
421*4882a593Smuzhiyun 	hym8563->clkout_hw.init = &init;
422*4882a593Smuzhiyun 
423*4882a593Smuzhiyun 	/* optional override of the clockname */
424*4882a593Smuzhiyun 	of_property_read_string(node, "clock-output-names", &init.name);
425*4882a593Smuzhiyun 
426*4882a593Smuzhiyun 	/* register the clock */
427*4882a593Smuzhiyun 	clk = clk_register(&client->dev, &hym8563->clkout_hw);
428*4882a593Smuzhiyun 
429*4882a593Smuzhiyun 	if (!IS_ERR(clk))
430*4882a593Smuzhiyun 		of_clk_add_provider(node, of_clk_src_simple_get, clk);
431*4882a593Smuzhiyun 
432*4882a593Smuzhiyun 	return clk;
433*4882a593Smuzhiyun }
434*4882a593Smuzhiyun #endif
435*4882a593Smuzhiyun 
436*4882a593Smuzhiyun /*
437*4882a593Smuzhiyun  * The alarm interrupt is implemented as a level-low interrupt in the
438*4882a593Smuzhiyun  * hym8563, while the timer interrupt uses a falling edge.
439*4882a593Smuzhiyun  * We don't use the timer at all, so the interrupt is requested to
440*4882a593Smuzhiyun  * use the level-low trigger.
441*4882a593Smuzhiyun  */
hym8563_irq(int irq,void * dev_id)442*4882a593Smuzhiyun static irqreturn_t hym8563_irq(int irq, void *dev_id)
443*4882a593Smuzhiyun {
444*4882a593Smuzhiyun 	struct hym8563 *hym8563 = (struct hym8563 *)dev_id;
445*4882a593Smuzhiyun 	struct i2c_client *client = hym8563->client;
446*4882a593Smuzhiyun 	struct mutex *lock = &hym8563->rtc->ops_lock;
447*4882a593Smuzhiyun 	int data, ret;
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun 	mutex_lock(lock);
450*4882a593Smuzhiyun 
451*4882a593Smuzhiyun 	/* Clear the alarm flag */
452*4882a593Smuzhiyun 
453*4882a593Smuzhiyun 	data = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
454*4882a593Smuzhiyun 	if (data < 0) {
455*4882a593Smuzhiyun 		dev_err(&client->dev, "%s: error reading i2c data %d\n",
456*4882a593Smuzhiyun 			__func__, data);
457*4882a593Smuzhiyun 		goto out;
458*4882a593Smuzhiyun 	}
459*4882a593Smuzhiyun 
460*4882a593Smuzhiyun 	data &= ~HYM8563_CTL2_AF;
461*4882a593Smuzhiyun 
462*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte_data(client, HYM8563_CTL2, data);
463*4882a593Smuzhiyun 	if (ret < 0) {
464*4882a593Smuzhiyun 		dev_err(&client->dev, "%s: error writing i2c data %d\n",
465*4882a593Smuzhiyun 			__func__, ret);
466*4882a593Smuzhiyun 	}
467*4882a593Smuzhiyun 
468*4882a593Smuzhiyun out:
469*4882a593Smuzhiyun 	mutex_unlock(lock);
470*4882a593Smuzhiyun 	return IRQ_HANDLED;
471*4882a593Smuzhiyun }
472*4882a593Smuzhiyun 
hym8563_init_device(struct i2c_client * client)473*4882a593Smuzhiyun static int hym8563_init_device(struct i2c_client *client)
474*4882a593Smuzhiyun {
475*4882a593Smuzhiyun 	int ret;
476*4882a593Smuzhiyun 
477*4882a593Smuzhiyun 	/* Clear stop flag if present */
478*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1, 0);
479*4882a593Smuzhiyun 	if (ret < 0)
480*4882a593Smuzhiyun 		return ret;
481*4882a593Smuzhiyun 
482*4882a593Smuzhiyun 	ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
483*4882a593Smuzhiyun 	if (ret < 0)
484*4882a593Smuzhiyun 		return ret;
485*4882a593Smuzhiyun 
486*4882a593Smuzhiyun 	/* Disable alarm and timer interrupts */
487*4882a593Smuzhiyun 	ret &= ~HYM8563_CTL2_AIE;
488*4882a593Smuzhiyun 	ret &= ~HYM8563_CTL2_TIE;
489*4882a593Smuzhiyun 
490*4882a593Smuzhiyun 	/* Clear any pending alarm and timer flags */
491*4882a593Smuzhiyun 	if (ret & HYM8563_CTL2_AF)
492*4882a593Smuzhiyun 		ret &= ~HYM8563_CTL2_AF;
493*4882a593Smuzhiyun 
494*4882a593Smuzhiyun 	if (ret & HYM8563_CTL2_TF)
495*4882a593Smuzhiyun 		ret &= ~HYM8563_CTL2_TF;
496*4882a593Smuzhiyun 
497*4882a593Smuzhiyun 	ret &= ~HYM8563_CTL2_TI_TP;
498*4882a593Smuzhiyun 
499*4882a593Smuzhiyun 	return i2c_smbus_write_byte_data(client, HYM8563_CTL2, ret);
500*4882a593Smuzhiyun }
501*4882a593Smuzhiyun 
502*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
hym8563_suspend(struct device * dev)503*4882a593Smuzhiyun static int hym8563_suspend(struct device *dev)
504*4882a593Smuzhiyun {
505*4882a593Smuzhiyun 	struct i2c_client *client = to_i2c_client(dev);
506*4882a593Smuzhiyun 	int ret;
507*4882a593Smuzhiyun 
508*4882a593Smuzhiyun 	if (device_may_wakeup(dev)) {
509*4882a593Smuzhiyun 		ret = enable_irq_wake(client->irq);
510*4882a593Smuzhiyun 		if (ret) {
511*4882a593Smuzhiyun 			dev_err(dev, "enable_irq_wake failed, %d\n", ret);
512*4882a593Smuzhiyun 			return ret;
513*4882a593Smuzhiyun 		}
514*4882a593Smuzhiyun 	}
515*4882a593Smuzhiyun 
516*4882a593Smuzhiyun 	return 0;
517*4882a593Smuzhiyun }
518*4882a593Smuzhiyun 
hym8563_resume(struct device * dev)519*4882a593Smuzhiyun static int hym8563_resume(struct device *dev)
520*4882a593Smuzhiyun {
521*4882a593Smuzhiyun 	struct i2c_client *client = to_i2c_client(dev);
522*4882a593Smuzhiyun 
523*4882a593Smuzhiyun 	if (device_may_wakeup(dev))
524*4882a593Smuzhiyun 		disable_irq_wake(client->irq);
525*4882a593Smuzhiyun 
526*4882a593Smuzhiyun 	return 0;
527*4882a593Smuzhiyun }
528*4882a593Smuzhiyun #endif
529*4882a593Smuzhiyun 
530*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(hym8563_pm_ops, hym8563_suspend, hym8563_resume);
531*4882a593Smuzhiyun 
hym8563_probe(struct i2c_client * client,const struct i2c_device_id * id)532*4882a593Smuzhiyun static int hym8563_probe(struct i2c_client *client,
533*4882a593Smuzhiyun 			 const struct i2c_device_id *id)
534*4882a593Smuzhiyun {
535*4882a593Smuzhiyun 	struct hym8563 *hym8563;
536*4882a593Smuzhiyun 	int ret;
537*4882a593Smuzhiyun 	/*
538*4882a593Smuzhiyun 	 * hym8563 initial time(2021_1_1_12:00:00),
539*4882a593Smuzhiyun 	 * avoid hym8563 read time error
540*4882a593Smuzhiyun 	 */
541*4882a593Smuzhiyun 	struct rtc_time tm_read, tm = {
542*4882a593Smuzhiyun 		.tm_wday = 0,
543*4882a593Smuzhiyun 		.tm_year = 121,
544*4882a593Smuzhiyun 		.tm_mon = 0,
545*4882a593Smuzhiyun 		.tm_mday = 1,
546*4882a593Smuzhiyun 		.tm_hour = 12,
547*4882a593Smuzhiyun 		.tm_min = 0,
548*4882a593Smuzhiyun 		.tm_sec = 0,
549*4882a593Smuzhiyun 	};
550*4882a593Smuzhiyun 
551*4882a593Smuzhiyun 	hym8563 = devm_kzalloc(&client->dev, sizeof(*hym8563), GFP_KERNEL);
552*4882a593Smuzhiyun 	if (!hym8563)
553*4882a593Smuzhiyun 		return -ENOMEM;
554*4882a593Smuzhiyun 
555*4882a593Smuzhiyun 	hym8563->client = client;
556*4882a593Smuzhiyun 	i2c_set_clientdata(client, hym8563);
557*4882a593Smuzhiyun 
558*4882a593Smuzhiyun 	ret = hym8563_init_device(client);
559*4882a593Smuzhiyun 	if (ret) {
560*4882a593Smuzhiyun 		dev_err(&client->dev, "could not init device, %d\n", ret);
561*4882a593Smuzhiyun 		return ret;
562*4882a593Smuzhiyun 	}
563*4882a593Smuzhiyun 
564*4882a593Smuzhiyun 	if (client->irq > 0) {
565*4882a593Smuzhiyun 		ret = devm_request_threaded_irq(&client->dev, client->irq,
566*4882a593Smuzhiyun 						NULL, hym8563_irq,
567*4882a593Smuzhiyun 						IRQF_TRIGGER_LOW | IRQF_ONESHOT,
568*4882a593Smuzhiyun 						client->name, hym8563);
569*4882a593Smuzhiyun 		if (ret < 0) {
570*4882a593Smuzhiyun 			dev_err(&client->dev, "irq %d request failed, %d\n",
571*4882a593Smuzhiyun 				client->irq, ret);
572*4882a593Smuzhiyun 			return ret;
573*4882a593Smuzhiyun 		}
574*4882a593Smuzhiyun 	}
575*4882a593Smuzhiyun 
576*4882a593Smuzhiyun 	if (client->irq > 0 ||
577*4882a593Smuzhiyun 	    device_property_read_bool(&client->dev, "wakeup-source")) {
578*4882a593Smuzhiyun 		device_init_wakeup(&client->dev, true);
579*4882a593Smuzhiyun 	}
580*4882a593Smuzhiyun 
581*4882a593Smuzhiyun 	/* check state of calendar information */
582*4882a593Smuzhiyun 	ret = i2c_smbus_read_byte_data(client, HYM8563_SEC);
583*4882a593Smuzhiyun 	if (ret < 0)
584*4882a593Smuzhiyun 		return ret;
585*4882a593Smuzhiyun 
586*4882a593Smuzhiyun 	dev_info(&client->dev, "rtc information is %s\n",
587*4882a593Smuzhiyun 		(ret & HYM8563_SEC_VL) ? "invalid" : "valid");
588*4882a593Smuzhiyun 
589*4882a593Smuzhiyun 	hym8563_rtc_read_time(&client->dev, &tm_read);
590*4882a593Smuzhiyun 	if ((ret & HYM8563_SEC_VL) || (tm_read.tm_year < 70) || (tm_read.tm_year > 200) ||
591*4882a593Smuzhiyun 	    (tm_read.tm_mon == -1) || (rtc_valid_tm(&tm_read) != 0))
592*4882a593Smuzhiyun 		hym8563_rtc_set_time(&client->dev, &tm);
593*4882a593Smuzhiyun 
594*4882a593Smuzhiyun 	hym8563->rtc = devm_rtc_device_register(&client->dev, client->name,
595*4882a593Smuzhiyun 						&hym8563_rtc_ops, THIS_MODULE);
596*4882a593Smuzhiyun 	if (IS_ERR(hym8563->rtc))
597*4882a593Smuzhiyun 		return PTR_ERR(hym8563->rtc);
598*4882a593Smuzhiyun 
599*4882a593Smuzhiyun 	/* the hym8563 alarm only supports a minute accuracy */
600*4882a593Smuzhiyun 	hym8563->rtc->uie_unsupported = 1;
601*4882a593Smuzhiyun 
602*4882a593Smuzhiyun #ifdef CONFIG_COMMON_CLK
603*4882a593Smuzhiyun 	hym8563_clkout_register_clk(hym8563);
604*4882a593Smuzhiyun #endif
605*4882a593Smuzhiyun 
606*4882a593Smuzhiyun 	return 0;
607*4882a593Smuzhiyun }
608*4882a593Smuzhiyun 
609*4882a593Smuzhiyun static const struct i2c_device_id hym8563_id[] = {
610*4882a593Smuzhiyun 	{ "hym8563", 0 },
611*4882a593Smuzhiyun 	{},
612*4882a593Smuzhiyun };
613*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, hym8563_id);
614*4882a593Smuzhiyun 
615*4882a593Smuzhiyun static const struct of_device_id hym8563_dt_idtable[] = {
616*4882a593Smuzhiyun 	{ .compatible = "haoyu,hym8563" },
617*4882a593Smuzhiyun 	{},
618*4882a593Smuzhiyun };
619*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, hym8563_dt_idtable);
620*4882a593Smuzhiyun 
621*4882a593Smuzhiyun static struct i2c_driver hym8563_driver = {
622*4882a593Smuzhiyun 	.driver		= {
623*4882a593Smuzhiyun 		.name	= "rtc-hym8563",
624*4882a593Smuzhiyun 		.pm	= &hym8563_pm_ops,
625*4882a593Smuzhiyun 		.of_match_table	= hym8563_dt_idtable,
626*4882a593Smuzhiyun 	},
627*4882a593Smuzhiyun 	.probe		= hym8563_probe,
628*4882a593Smuzhiyun 	.id_table	= hym8563_id,
629*4882a593Smuzhiyun };
630*4882a593Smuzhiyun 
631*4882a593Smuzhiyun module_i2c_driver(hym8563_driver);
632*4882a593Smuzhiyun 
633*4882a593Smuzhiyun MODULE_AUTHOR("Heiko Stuebner <heiko@sntech.de>");
634*4882a593Smuzhiyun MODULE_DESCRIPTION("HYM8563 RTC driver");
635*4882a593Smuzhiyun MODULE_LICENSE("GPL");
636