xref: /OK3568_Linux_fs/kernel/drivers/rtc/rtc-ds1742.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * An rtc driver for the Dallas DS1742
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Copyright (C) 2006 Torsten Ertbjerg Rasmussen <tr@newtec.dk>
8*4882a593Smuzhiyun  *  - nvram size determined from resource
9*4882a593Smuzhiyun  *  - this ds1742 driver now supports ds1743.
10*4882a593Smuzhiyun  */
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <linux/bcd.h>
13*4882a593Smuzhiyun #include <linux/kernel.h>
14*4882a593Smuzhiyun #include <linux/gfp.h>
15*4882a593Smuzhiyun #include <linux/delay.h>
16*4882a593Smuzhiyun #include <linux/jiffies.h>
17*4882a593Smuzhiyun #include <linux/rtc.h>
18*4882a593Smuzhiyun #include <linux/of.h>
19*4882a593Smuzhiyun #include <linux/of_device.h>
20*4882a593Smuzhiyun #include <linux/platform_device.h>
21*4882a593Smuzhiyun #include <linux/io.h>
22*4882a593Smuzhiyun #include <linux/module.h>
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #define RTC_SIZE		8
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #define RTC_CONTROL		0
27*4882a593Smuzhiyun #define RTC_CENTURY		0
28*4882a593Smuzhiyun #define RTC_SECONDS		1
29*4882a593Smuzhiyun #define RTC_MINUTES		2
30*4882a593Smuzhiyun #define RTC_HOURS		3
31*4882a593Smuzhiyun #define RTC_DAY			4
32*4882a593Smuzhiyun #define RTC_DATE		5
33*4882a593Smuzhiyun #define RTC_MONTH		6
34*4882a593Smuzhiyun #define RTC_YEAR		7
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun #define RTC_CENTURY_MASK	0x3f
37*4882a593Smuzhiyun #define RTC_SECONDS_MASK	0x7f
38*4882a593Smuzhiyun #define RTC_DAY_MASK		0x07
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun /* Bits in the Control/Century register */
41*4882a593Smuzhiyun #define RTC_WRITE		0x80
42*4882a593Smuzhiyun #define RTC_READ		0x40
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun /* Bits in the Seconds register */
45*4882a593Smuzhiyun #define RTC_STOP		0x80
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun /* Bits in the Day register */
48*4882a593Smuzhiyun #define RTC_BATT_FLAG		0x80
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun struct rtc_plat_data {
51*4882a593Smuzhiyun 	void __iomem *ioaddr_nvram;
52*4882a593Smuzhiyun 	void __iomem *ioaddr_rtc;
53*4882a593Smuzhiyun 	unsigned long last_jiffies;
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun 
ds1742_rtc_set_time(struct device * dev,struct rtc_time * tm)56*4882a593Smuzhiyun static int ds1742_rtc_set_time(struct device *dev, struct rtc_time *tm)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun 	struct rtc_plat_data *pdata = dev_get_drvdata(dev);
59*4882a593Smuzhiyun 	void __iomem *ioaddr = pdata->ioaddr_rtc;
60*4882a593Smuzhiyun 	u8 century;
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	century = bin2bcd((tm->tm_year + 1900) / 100);
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	writeb(RTC_WRITE, ioaddr + RTC_CONTROL);
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 	writeb(bin2bcd(tm->tm_year % 100), ioaddr + RTC_YEAR);
67*4882a593Smuzhiyun 	writeb(bin2bcd(tm->tm_mon + 1), ioaddr + RTC_MONTH);
68*4882a593Smuzhiyun 	writeb(bin2bcd(tm->tm_wday) & RTC_DAY_MASK, ioaddr + RTC_DAY);
69*4882a593Smuzhiyun 	writeb(bin2bcd(tm->tm_mday), ioaddr + RTC_DATE);
70*4882a593Smuzhiyun 	writeb(bin2bcd(tm->tm_hour), ioaddr + RTC_HOURS);
71*4882a593Smuzhiyun 	writeb(bin2bcd(tm->tm_min), ioaddr + RTC_MINUTES);
72*4882a593Smuzhiyun 	writeb(bin2bcd(tm->tm_sec) & RTC_SECONDS_MASK, ioaddr + RTC_SECONDS);
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	/* RTC_CENTURY and RTC_CONTROL share same register */
75*4882a593Smuzhiyun 	writeb(RTC_WRITE | (century & RTC_CENTURY_MASK), ioaddr + RTC_CENTURY);
76*4882a593Smuzhiyun 	writeb(century & RTC_CENTURY_MASK, ioaddr + RTC_CONTROL);
77*4882a593Smuzhiyun 	return 0;
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun 
ds1742_rtc_read_time(struct device * dev,struct rtc_time * tm)80*4882a593Smuzhiyun static int ds1742_rtc_read_time(struct device *dev, struct rtc_time *tm)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun 	struct rtc_plat_data *pdata = dev_get_drvdata(dev);
83*4882a593Smuzhiyun 	void __iomem *ioaddr = pdata->ioaddr_rtc;
84*4882a593Smuzhiyun 	unsigned int year, month, day, hour, minute, second, week;
85*4882a593Smuzhiyun 	unsigned int century;
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	/* give enough time to update RTC in case of continuous read */
88*4882a593Smuzhiyun 	if (pdata->last_jiffies == jiffies)
89*4882a593Smuzhiyun 		msleep(1);
90*4882a593Smuzhiyun 	pdata->last_jiffies = jiffies;
91*4882a593Smuzhiyun 	writeb(RTC_READ, ioaddr + RTC_CONTROL);
92*4882a593Smuzhiyun 	second = readb(ioaddr + RTC_SECONDS) & RTC_SECONDS_MASK;
93*4882a593Smuzhiyun 	minute = readb(ioaddr + RTC_MINUTES);
94*4882a593Smuzhiyun 	hour = readb(ioaddr + RTC_HOURS);
95*4882a593Smuzhiyun 	day = readb(ioaddr + RTC_DATE);
96*4882a593Smuzhiyun 	week = readb(ioaddr + RTC_DAY) & RTC_DAY_MASK;
97*4882a593Smuzhiyun 	month = readb(ioaddr + RTC_MONTH);
98*4882a593Smuzhiyun 	year = readb(ioaddr + RTC_YEAR);
99*4882a593Smuzhiyun 	century = readb(ioaddr + RTC_CENTURY) & RTC_CENTURY_MASK;
100*4882a593Smuzhiyun 	writeb(0, ioaddr + RTC_CONTROL);
101*4882a593Smuzhiyun 	tm->tm_sec = bcd2bin(second);
102*4882a593Smuzhiyun 	tm->tm_min = bcd2bin(minute);
103*4882a593Smuzhiyun 	tm->tm_hour = bcd2bin(hour);
104*4882a593Smuzhiyun 	tm->tm_mday = bcd2bin(day);
105*4882a593Smuzhiyun 	tm->tm_wday = bcd2bin(week);
106*4882a593Smuzhiyun 	tm->tm_mon = bcd2bin(month) - 1;
107*4882a593Smuzhiyun 	/* year is 1900 + tm->tm_year */
108*4882a593Smuzhiyun 	tm->tm_year = bcd2bin(year) + bcd2bin(century) * 100 - 1900;
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	return 0;
111*4882a593Smuzhiyun }
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun static const struct rtc_class_ops ds1742_rtc_ops = {
114*4882a593Smuzhiyun 	.read_time	= ds1742_rtc_read_time,
115*4882a593Smuzhiyun 	.set_time	= ds1742_rtc_set_time,
116*4882a593Smuzhiyun };
117*4882a593Smuzhiyun 
ds1742_nvram_read(void * priv,unsigned int pos,void * val,size_t bytes)118*4882a593Smuzhiyun static int ds1742_nvram_read(void *priv, unsigned int pos, void *val,
119*4882a593Smuzhiyun 			     size_t bytes)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun 	struct rtc_plat_data *pdata = priv;
122*4882a593Smuzhiyun 	void __iomem *ioaddr = pdata->ioaddr_nvram;
123*4882a593Smuzhiyun 	u8 *buf = val;
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 	for (; bytes; bytes--)
126*4882a593Smuzhiyun 		*buf++ = readb(ioaddr + pos++);
127*4882a593Smuzhiyun 	return 0;
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun 
ds1742_nvram_write(void * priv,unsigned int pos,void * val,size_t bytes)130*4882a593Smuzhiyun static int ds1742_nvram_write(void *priv, unsigned int pos, void *val,
131*4882a593Smuzhiyun 			      size_t bytes)
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun 	struct rtc_plat_data *pdata = priv;
134*4882a593Smuzhiyun 	void __iomem *ioaddr = pdata->ioaddr_nvram;
135*4882a593Smuzhiyun 	u8 *buf = val;
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	for (; bytes; bytes--)
138*4882a593Smuzhiyun 		writeb(*buf++, ioaddr + pos++);
139*4882a593Smuzhiyun 	return 0;
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun 
ds1742_rtc_probe(struct platform_device * pdev)142*4882a593Smuzhiyun static int ds1742_rtc_probe(struct platform_device *pdev)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun 	struct rtc_device *rtc;
145*4882a593Smuzhiyun 	struct resource *res;
146*4882a593Smuzhiyun 	unsigned int cen, sec;
147*4882a593Smuzhiyun 	struct rtc_plat_data *pdata;
148*4882a593Smuzhiyun 	void __iomem *ioaddr;
149*4882a593Smuzhiyun 	int ret = 0;
150*4882a593Smuzhiyun 	struct nvmem_config nvmem_cfg = {
151*4882a593Smuzhiyun 		.name = "ds1742_nvram",
152*4882a593Smuzhiyun 		.reg_read = ds1742_nvram_read,
153*4882a593Smuzhiyun 		.reg_write = ds1742_nvram_write,
154*4882a593Smuzhiyun 	};
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
158*4882a593Smuzhiyun 	if (!pdata)
159*4882a593Smuzhiyun 		return -ENOMEM;
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
162*4882a593Smuzhiyun 	ioaddr = devm_ioremap_resource(&pdev->dev, res);
163*4882a593Smuzhiyun 	if (IS_ERR(ioaddr))
164*4882a593Smuzhiyun 		return PTR_ERR(ioaddr);
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	pdata->ioaddr_nvram = ioaddr;
167*4882a593Smuzhiyun 	pdata->ioaddr_rtc = ioaddr + resource_size(res) - RTC_SIZE;
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 	nvmem_cfg.size = resource_size(res) - RTC_SIZE;
170*4882a593Smuzhiyun 	nvmem_cfg.priv = pdata;
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun 	/* turn RTC on if it was not on */
173*4882a593Smuzhiyun 	ioaddr = pdata->ioaddr_rtc;
174*4882a593Smuzhiyun 	sec = readb(ioaddr + RTC_SECONDS);
175*4882a593Smuzhiyun 	if (sec & RTC_STOP) {
176*4882a593Smuzhiyun 		sec &= RTC_SECONDS_MASK;
177*4882a593Smuzhiyun 		cen = readb(ioaddr + RTC_CENTURY) & RTC_CENTURY_MASK;
178*4882a593Smuzhiyun 		writeb(RTC_WRITE, ioaddr + RTC_CONTROL);
179*4882a593Smuzhiyun 		writeb(sec, ioaddr + RTC_SECONDS);
180*4882a593Smuzhiyun 		writeb(cen & RTC_CENTURY_MASK, ioaddr + RTC_CONTROL);
181*4882a593Smuzhiyun 	}
182*4882a593Smuzhiyun 	if (!(readb(ioaddr + RTC_DAY) & RTC_BATT_FLAG))
183*4882a593Smuzhiyun 		dev_warn(&pdev->dev, "voltage-low detected.\n");
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	pdata->last_jiffies = jiffies;
186*4882a593Smuzhiyun 	platform_set_drvdata(pdev, pdata);
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun 	rtc = devm_rtc_allocate_device(&pdev->dev);
189*4882a593Smuzhiyun 	if (IS_ERR(rtc))
190*4882a593Smuzhiyun 		return PTR_ERR(rtc);
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun 	rtc->ops = &ds1742_rtc_ops;
193*4882a593Smuzhiyun 	rtc->nvram_old_abi = true;
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	ret = rtc_register_device(rtc);
196*4882a593Smuzhiyun 	if (ret)
197*4882a593Smuzhiyun 		return ret;
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun 	if (rtc_nvmem_register(rtc, &nvmem_cfg))
200*4882a593Smuzhiyun 		dev_err(&pdev->dev, "Unable to register nvmem\n");
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun 	return 0;
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun static const struct of_device_id __maybe_unused ds1742_rtc_of_match[] = {
206*4882a593Smuzhiyun 	{ .compatible = "maxim,ds1742", },
207*4882a593Smuzhiyun 	{ }
208*4882a593Smuzhiyun };
209*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, ds1742_rtc_of_match);
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun static struct platform_driver ds1742_rtc_driver = {
212*4882a593Smuzhiyun 	.probe		= ds1742_rtc_probe,
213*4882a593Smuzhiyun 	.driver		= {
214*4882a593Smuzhiyun 		.name	= "rtc-ds1742",
215*4882a593Smuzhiyun 		.of_match_table = of_match_ptr(ds1742_rtc_of_match),
216*4882a593Smuzhiyun 	},
217*4882a593Smuzhiyun };
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun module_platform_driver(ds1742_rtc_driver);
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>");
222*4882a593Smuzhiyun MODULE_DESCRIPTION("Dallas DS1742 RTC driver");
223*4882a593Smuzhiyun MODULE_LICENSE("GPL");
224*4882a593Smuzhiyun MODULE_ALIAS("platform:rtc-ds1742");
225