1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * DS1286 Real Time Clock interface for Linux
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 1998, 1999, 2000 Ralf Baechle
6*4882a593Smuzhiyun * Copyright (C) 2008 Thomas Bogendoerfer
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Based on code written by Paul Gortmaker.
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/rtc.h>
13*4882a593Smuzhiyun #include <linux/platform_device.h>
14*4882a593Smuzhiyun #include <linux/bcd.h>
15*4882a593Smuzhiyun #include <linux/rtc/ds1286.h>
16*4882a593Smuzhiyun #include <linux/io.h>
17*4882a593Smuzhiyun #include <linux/slab.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun struct ds1286_priv {
20*4882a593Smuzhiyun struct rtc_device *rtc;
21*4882a593Smuzhiyun u32 __iomem *rtcregs;
22*4882a593Smuzhiyun spinlock_t lock;
23*4882a593Smuzhiyun };
24*4882a593Smuzhiyun
ds1286_rtc_read(struct ds1286_priv * priv,int reg)25*4882a593Smuzhiyun static inline u8 ds1286_rtc_read(struct ds1286_priv *priv, int reg)
26*4882a593Smuzhiyun {
27*4882a593Smuzhiyun return __raw_readl(&priv->rtcregs[reg]) & 0xff;
28*4882a593Smuzhiyun }
29*4882a593Smuzhiyun
ds1286_rtc_write(struct ds1286_priv * priv,u8 data,int reg)30*4882a593Smuzhiyun static inline void ds1286_rtc_write(struct ds1286_priv *priv, u8 data, int reg)
31*4882a593Smuzhiyun {
32*4882a593Smuzhiyun __raw_writel(data, &priv->rtcregs[reg]);
33*4882a593Smuzhiyun }
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun
ds1286_alarm_irq_enable(struct device * dev,unsigned int enabled)36*4882a593Smuzhiyun static int ds1286_alarm_irq_enable(struct device *dev, unsigned int enabled)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun struct ds1286_priv *priv = dev_get_drvdata(dev);
39*4882a593Smuzhiyun unsigned long flags;
40*4882a593Smuzhiyun unsigned char val;
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun /* Allow or mask alarm interrupts */
43*4882a593Smuzhiyun spin_lock_irqsave(&priv->lock, flags);
44*4882a593Smuzhiyun val = ds1286_rtc_read(priv, RTC_CMD);
45*4882a593Smuzhiyun if (enabled)
46*4882a593Smuzhiyun val &= ~RTC_TDM;
47*4882a593Smuzhiyun else
48*4882a593Smuzhiyun val |= RTC_TDM;
49*4882a593Smuzhiyun ds1286_rtc_write(priv, val, RTC_CMD);
50*4882a593Smuzhiyun spin_unlock_irqrestore(&priv->lock, flags);
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun return 0;
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun #ifdef CONFIG_RTC_INTF_DEV
56*4882a593Smuzhiyun
ds1286_ioctl(struct device * dev,unsigned int cmd,unsigned long arg)57*4882a593Smuzhiyun static int ds1286_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun struct ds1286_priv *priv = dev_get_drvdata(dev);
60*4882a593Smuzhiyun unsigned long flags;
61*4882a593Smuzhiyun unsigned char val;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun switch (cmd) {
64*4882a593Smuzhiyun case RTC_WIE_OFF:
65*4882a593Smuzhiyun /* Mask watchdog int. enab. bit */
66*4882a593Smuzhiyun spin_lock_irqsave(&priv->lock, flags);
67*4882a593Smuzhiyun val = ds1286_rtc_read(priv, RTC_CMD);
68*4882a593Smuzhiyun val |= RTC_WAM;
69*4882a593Smuzhiyun ds1286_rtc_write(priv, val, RTC_CMD);
70*4882a593Smuzhiyun spin_unlock_irqrestore(&priv->lock, flags);
71*4882a593Smuzhiyun break;
72*4882a593Smuzhiyun case RTC_WIE_ON:
73*4882a593Smuzhiyun /* Allow watchdog interrupts. */
74*4882a593Smuzhiyun spin_lock_irqsave(&priv->lock, flags);
75*4882a593Smuzhiyun val = ds1286_rtc_read(priv, RTC_CMD);
76*4882a593Smuzhiyun val &= ~RTC_WAM;
77*4882a593Smuzhiyun ds1286_rtc_write(priv, val, RTC_CMD);
78*4882a593Smuzhiyun spin_unlock_irqrestore(&priv->lock, flags);
79*4882a593Smuzhiyun break;
80*4882a593Smuzhiyun default:
81*4882a593Smuzhiyun return -ENOIOCTLCMD;
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun return 0;
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun #else
87*4882a593Smuzhiyun #define ds1286_ioctl NULL
88*4882a593Smuzhiyun #endif
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun #ifdef CONFIG_PROC_FS
91*4882a593Smuzhiyun
ds1286_proc(struct device * dev,struct seq_file * seq)92*4882a593Smuzhiyun static int ds1286_proc(struct device *dev, struct seq_file *seq)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun struct ds1286_priv *priv = dev_get_drvdata(dev);
95*4882a593Smuzhiyun unsigned char month, cmd, amode;
96*4882a593Smuzhiyun const char *s;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun month = ds1286_rtc_read(priv, RTC_MONTH);
99*4882a593Smuzhiyun seq_printf(seq,
100*4882a593Smuzhiyun "oscillator\t: %s\n"
101*4882a593Smuzhiyun "square_wave\t: %s\n",
102*4882a593Smuzhiyun (month & RTC_EOSC) ? "disabled" : "enabled",
103*4882a593Smuzhiyun (month & RTC_ESQW) ? "disabled" : "enabled");
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun amode = ((ds1286_rtc_read(priv, RTC_MINUTES_ALARM) & 0x80) >> 5) |
106*4882a593Smuzhiyun ((ds1286_rtc_read(priv, RTC_HOURS_ALARM) & 0x80) >> 6) |
107*4882a593Smuzhiyun ((ds1286_rtc_read(priv, RTC_DAY_ALARM) & 0x80) >> 7);
108*4882a593Smuzhiyun switch (amode) {
109*4882a593Smuzhiyun case 7:
110*4882a593Smuzhiyun s = "each minute";
111*4882a593Smuzhiyun break;
112*4882a593Smuzhiyun case 3:
113*4882a593Smuzhiyun s = "minutes match";
114*4882a593Smuzhiyun break;
115*4882a593Smuzhiyun case 1:
116*4882a593Smuzhiyun s = "hours and minutes match";
117*4882a593Smuzhiyun break;
118*4882a593Smuzhiyun case 0:
119*4882a593Smuzhiyun s = "days, hours and minutes match";
120*4882a593Smuzhiyun break;
121*4882a593Smuzhiyun default:
122*4882a593Smuzhiyun s = "invalid";
123*4882a593Smuzhiyun break;
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun seq_printf(seq, "alarm_mode\t: %s\n", s);
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun cmd = ds1286_rtc_read(priv, RTC_CMD);
128*4882a593Smuzhiyun seq_printf(seq,
129*4882a593Smuzhiyun "alarm_enable\t: %s\n"
130*4882a593Smuzhiyun "wdog_alarm\t: %s\n"
131*4882a593Smuzhiyun "alarm_mask\t: %s\n"
132*4882a593Smuzhiyun "wdog_alarm_mask\t: %s\n"
133*4882a593Smuzhiyun "interrupt_mode\t: %s\n"
134*4882a593Smuzhiyun "INTB_mode\t: %s_active\n"
135*4882a593Smuzhiyun "interrupt_pins\t: %s\n",
136*4882a593Smuzhiyun (cmd & RTC_TDF) ? "yes" : "no",
137*4882a593Smuzhiyun (cmd & RTC_WAF) ? "yes" : "no",
138*4882a593Smuzhiyun (cmd & RTC_TDM) ? "disabled" : "enabled",
139*4882a593Smuzhiyun (cmd & RTC_WAM) ? "disabled" : "enabled",
140*4882a593Smuzhiyun (cmd & RTC_PU_LVL) ? "pulse" : "level",
141*4882a593Smuzhiyun (cmd & RTC_IBH_LO) ? "low" : "high",
142*4882a593Smuzhiyun (cmd & RTC_IPSW) ? "unswapped" : "swapped");
143*4882a593Smuzhiyun return 0;
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun #else
147*4882a593Smuzhiyun #define ds1286_proc NULL
148*4882a593Smuzhiyun #endif
149*4882a593Smuzhiyun
ds1286_read_time(struct device * dev,struct rtc_time * tm)150*4882a593Smuzhiyun static int ds1286_read_time(struct device *dev, struct rtc_time *tm)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun struct ds1286_priv *priv = dev_get_drvdata(dev);
153*4882a593Smuzhiyun unsigned char save_control;
154*4882a593Smuzhiyun unsigned long flags;
155*4882a593Smuzhiyun unsigned long uip_watchdog = jiffies;
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun /*
158*4882a593Smuzhiyun * read RTC once any update in progress is done. The update
159*4882a593Smuzhiyun * can take just over 2ms. We wait 10 to 20ms. There is no need to
160*4882a593Smuzhiyun * to poll-wait (up to 1s - eeccch) for the falling edge of RTC_UIP.
161*4882a593Smuzhiyun * If you need to know *exactly* when a second has started, enable
162*4882a593Smuzhiyun * periodic update complete interrupts, (via ioctl) and then
163*4882a593Smuzhiyun * immediately read /dev/rtc which will block until you get the IRQ.
164*4882a593Smuzhiyun * Once the read clears, read the RTC time (again via ioctl). Easy.
165*4882a593Smuzhiyun */
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun if (ds1286_rtc_read(priv, RTC_CMD) & RTC_TE)
168*4882a593Smuzhiyun while (time_before(jiffies, uip_watchdog + 2*HZ/100))
169*4882a593Smuzhiyun barrier();
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun /*
172*4882a593Smuzhiyun * Only the values that we read from the RTC are set. We leave
173*4882a593Smuzhiyun * tm_wday, tm_yday and tm_isdst untouched. Even though the
174*4882a593Smuzhiyun * RTC has RTC_DAY_OF_WEEK, we ignore it, as it is only updated
175*4882a593Smuzhiyun * by the RTC when initially set to a non-zero value.
176*4882a593Smuzhiyun */
177*4882a593Smuzhiyun spin_lock_irqsave(&priv->lock, flags);
178*4882a593Smuzhiyun save_control = ds1286_rtc_read(priv, RTC_CMD);
179*4882a593Smuzhiyun ds1286_rtc_write(priv, (save_control|RTC_TE), RTC_CMD);
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun tm->tm_sec = ds1286_rtc_read(priv, RTC_SECONDS);
182*4882a593Smuzhiyun tm->tm_min = ds1286_rtc_read(priv, RTC_MINUTES);
183*4882a593Smuzhiyun tm->tm_hour = ds1286_rtc_read(priv, RTC_HOURS) & 0x3f;
184*4882a593Smuzhiyun tm->tm_mday = ds1286_rtc_read(priv, RTC_DATE);
185*4882a593Smuzhiyun tm->tm_mon = ds1286_rtc_read(priv, RTC_MONTH) & 0x1f;
186*4882a593Smuzhiyun tm->tm_year = ds1286_rtc_read(priv, RTC_YEAR);
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun ds1286_rtc_write(priv, save_control, RTC_CMD);
189*4882a593Smuzhiyun spin_unlock_irqrestore(&priv->lock, flags);
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun tm->tm_sec = bcd2bin(tm->tm_sec);
192*4882a593Smuzhiyun tm->tm_min = bcd2bin(tm->tm_min);
193*4882a593Smuzhiyun tm->tm_hour = bcd2bin(tm->tm_hour);
194*4882a593Smuzhiyun tm->tm_mday = bcd2bin(tm->tm_mday);
195*4882a593Smuzhiyun tm->tm_mon = bcd2bin(tm->tm_mon);
196*4882a593Smuzhiyun tm->tm_year = bcd2bin(tm->tm_year);
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun /*
199*4882a593Smuzhiyun * Account for differences between how the RTC uses the values
200*4882a593Smuzhiyun * and how they are defined in a struct rtc_time;
201*4882a593Smuzhiyun */
202*4882a593Smuzhiyun if (tm->tm_year < 45)
203*4882a593Smuzhiyun tm->tm_year += 30;
204*4882a593Smuzhiyun tm->tm_year += 40;
205*4882a593Smuzhiyun if (tm->tm_year < 70)
206*4882a593Smuzhiyun tm->tm_year += 100;
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun tm->tm_mon--;
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun return 0;
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun
ds1286_set_time(struct device * dev,struct rtc_time * tm)213*4882a593Smuzhiyun static int ds1286_set_time(struct device *dev, struct rtc_time *tm)
214*4882a593Smuzhiyun {
215*4882a593Smuzhiyun struct ds1286_priv *priv = dev_get_drvdata(dev);
216*4882a593Smuzhiyun unsigned char mon, day, hrs, min, sec;
217*4882a593Smuzhiyun unsigned char save_control;
218*4882a593Smuzhiyun unsigned int yrs;
219*4882a593Smuzhiyun unsigned long flags;
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun yrs = tm->tm_year + 1900;
222*4882a593Smuzhiyun mon = tm->tm_mon + 1; /* tm_mon starts at zero */
223*4882a593Smuzhiyun day = tm->tm_mday;
224*4882a593Smuzhiyun hrs = tm->tm_hour;
225*4882a593Smuzhiyun min = tm->tm_min;
226*4882a593Smuzhiyun sec = tm->tm_sec;
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun if (yrs < 1970)
229*4882a593Smuzhiyun return -EINVAL;
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun yrs -= 1940;
232*4882a593Smuzhiyun if (yrs > 255) /* They are unsigned */
233*4882a593Smuzhiyun return -EINVAL;
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun if (yrs >= 100)
236*4882a593Smuzhiyun yrs -= 100;
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun sec = bin2bcd(sec);
239*4882a593Smuzhiyun min = bin2bcd(min);
240*4882a593Smuzhiyun hrs = bin2bcd(hrs);
241*4882a593Smuzhiyun day = bin2bcd(day);
242*4882a593Smuzhiyun mon = bin2bcd(mon);
243*4882a593Smuzhiyun yrs = bin2bcd(yrs);
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun spin_lock_irqsave(&priv->lock, flags);
246*4882a593Smuzhiyun save_control = ds1286_rtc_read(priv, RTC_CMD);
247*4882a593Smuzhiyun ds1286_rtc_write(priv, (save_control|RTC_TE), RTC_CMD);
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun ds1286_rtc_write(priv, yrs, RTC_YEAR);
250*4882a593Smuzhiyun ds1286_rtc_write(priv, mon, RTC_MONTH);
251*4882a593Smuzhiyun ds1286_rtc_write(priv, day, RTC_DATE);
252*4882a593Smuzhiyun ds1286_rtc_write(priv, hrs, RTC_HOURS);
253*4882a593Smuzhiyun ds1286_rtc_write(priv, min, RTC_MINUTES);
254*4882a593Smuzhiyun ds1286_rtc_write(priv, sec, RTC_SECONDS);
255*4882a593Smuzhiyun ds1286_rtc_write(priv, 0, RTC_HUNDREDTH_SECOND);
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun ds1286_rtc_write(priv, save_control, RTC_CMD);
258*4882a593Smuzhiyun spin_unlock_irqrestore(&priv->lock, flags);
259*4882a593Smuzhiyun return 0;
260*4882a593Smuzhiyun }
261*4882a593Smuzhiyun
ds1286_read_alarm(struct device * dev,struct rtc_wkalrm * alm)262*4882a593Smuzhiyun static int ds1286_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
263*4882a593Smuzhiyun {
264*4882a593Smuzhiyun struct ds1286_priv *priv = dev_get_drvdata(dev);
265*4882a593Smuzhiyun unsigned long flags;
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun /*
268*4882a593Smuzhiyun * Only the values that we read from the RTC are set. That
269*4882a593Smuzhiyun * means only tm_wday, tm_hour, tm_min.
270*4882a593Smuzhiyun */
271*4882a593Smuzhiyun spin_lock_irqsave(&priv->lock, flags);
272*4882a593Smuzhiyun alm->time.tm_min = ds1286_rtc_read(priv, RTC_MINUTES_ALARM) & 0x7f;
273*4882a593Smuzhiyun alm->time.tm_hour = ds1286_rtc_read(priv, RTC_HOURS_ALARM) & 0x1f;
274*4882a593Smuzhiyun alm->time.tm_wday = ds1286_rtc_read(priv, RTC_DAY_ALARM) & 0x07;
275*4882a593Smuzhiyun ds1286_rtc_read(priv, RTC_CMD);
276*4882a593Smuzhiyun spin_unlock_irqrestore(&priv->lock, flags);
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun alm->time.tm_min = bcd2bin(alm->time.tm_min);
279*4882a593Smuzhiyun alm->time.tm_hour = bcd2bin(alm->time.tm_hour);
280*4882a593Smuzhiyun alm->time.tm_sec = 0;
281*4882a593Smuzhiyun return 0;
282*4882a593Smuzhiyun }
283*4882a593Smuzhiyun
ds1286_set_alarm(struct device * dev,struct rtc_wkalrm * alm)284*4882a593Smuzhiyun static int ds1286_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
285*4882a593Smuzhiyun {
286*4882a593Smuzhiyun struct ds1286_priv *priv = dev_get_drvdata(dev);
287*4882a593Smuzhiyun unsigned char hrs, min, sec;
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun hrs = alm->time.tm_hour;
290*4882a593Smuzhiyun min = alm->time.tm_min;
291*4882a593Smuzhiyun sec = alm->time.tm_sec;
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun if (hrs >= 24)
294*4882a593Smuzhiyun hrs = 0xff;
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun if (min >= 60)
297*4882a593Smuzhiyun min = 0xff;
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun if (sec != 0)
300*4882a593Smuzhiyun return -EINVAL;
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun min = bin2bcd(min);
303*4882a593Smuzhiyun hrs = bin2bcd(hrs);
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun spin_lock(&priv->lock);
306*4882a593Smuzhiyun ds1286_rtc_write(priv, hrs, RTC_HOURS_ALARM);
307*4882a593Smuzhiyun ds1286_rtc_write(priv, min, RTC_MINUTES_ALARM);
308*4882a593Smuzhiyun spin_unlock(&priv->lock);
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun return 0;
311*4882a593Smuzhiyun }
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun static const struct rtc_class_ops ds1286_ops = {
314*4882a593Smuzhiyun .ioctl = ds1286_ioctl,
315*4882a593Smuzhiyun .proc = ds1286_proc,
316*4882a593Smuzhiyun .read_time = ds1286_read_time,
317*4882a593Smuzhiyun .set_time = ds1286_set_time,
318*4882a593Smuzhiyun .read_alarm = ds1286_read_alarm,
319*4882a593Smuzhiyun .set_alarm = ds1286_set_alarm,
320*4882a593Smuzhiyun .alarm_irq_enable = ds1286_alarm_irq_enable,
321*4882a593Smuzhiyun };
322*4882a593Smuzhiyun
ds1286_probe(struct platform_device * pdev)323*4882a593Smuzhiyun static int ds1286_probe(struct platform_device *pdev)
324*4882a593Smuzhiyun {
325*4882a593Smuzhiyun struct rtc_device *rtc;
326*4882a593Smuzhiyun struct ds1286_priv *priv;
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun priv = devm_kzalloc(&pdev->dev, sizeof(struct ds1286_priv), GFP_KERNEL);
329*4882a593Smuzhiyun if (!priv)
330*4882a593Smuzhiyun return -ENOMEM;
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun priv->rtcregs = devm_platform_ioremap_resource(pdev, 0);
333*4882a593Smuzhiyun if (IS_ERR(priv->rtcregs))
334*4882a593Smuzhiyun return PTR_ERR(priv->rtcregs);
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun spin_lock_init(&priv->lock);
337*4882a593Smuzhiyun platform_set_drvdata(pdev, priv);
338*4882a593Smuzhiyun rtc = devm_rtc_device_register(&pdev->dev, "ds1286", &ds1286_ops,
339*4882a593Smuzhiyun THIS_MODULE);
340*4882a593Smuzhiyun if (IS_ERR(rtc))
341*4882a593Smuzhiyun return PTR_ERR(rtc);
342*4882a593Smuzhiyun priv->rtc = rtc;
343*4882a593Smuzhiyun return 0;
344*4882a593Smuzhiyun }
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun static struct platform_driver ds1286_platform_driver = {
347*4882a593Smuzhiyun .driver = {
348*4882a593Smuzhiyun .name = "rtc-ds1286",
349*4882a593Smuzhiyun },
350*4882a593Smuzhiyun .probe = ds1286_probe,
351*4882a593Smuzhiyun };
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun module_platform_driver(ds1286_platform_driver);
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun MODULE_AUTHOR("Thomas Bogendoerfer <tsbogend@alpha.franken.de>");
356*4882a593Smuzhiyun MODULE_DESCRIPTION("DS1286 RTC driver");
357*4882a593Smuzhiyun MODULE_LICENSE("GPL");
358*4882a593Smuzhiyun MODULE_ALIAS("platform:rtc-ds1286");
359