xref: /OK3568_Linux_fs/kernel/drivers/rtc/rtc-ds1216.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Dallas DS1216 RTC driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2007 Thomas Bogendoerfer
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/rtc.h>
11*4882a593Smuzhiyun #include <linux/platform_device.h>
12*4882a593Smuzhiyun #include <linux/bcd.h>
13*4882a593Smuzhiyun #include <linux/slab.h>
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun struct ds1216_regs {
16*4882a593Smuzhiyun 	u8 tsec;
17*4882a593Smuzhiyun 	u8 sec;
18*4882a593Smuzhiyun 	u8 min;
19*4882a593Smuzhiyun 	u8 hour;
20*4882a593Smuzhiyun 	u8 wday;
21*4882a593Smuzhiyun 	u8 mday;
22*4882a593Smuzhiyun 	u8 month;
23*4882a593Smuzhiyun 	u8 year;
24*4882a593Smuzhiyun };
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #define DS1216_HOUR_1224	(1 << 7)
27*4882a593Smuzhiyun #define DS1216_HOUR_AMPM	(1 << 5)
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun struct ds1216_priv {
30*4882a593Smuzhiyun 	struct rtc_device *rtc;
31*4882a593Smuzhiyun 	void __iomem *ioaddr;
32*4882a593Smuzhiyun };
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun static const u8 magic[] = {
35*4882a593Smuzhiyun 	0xc5, 0x3a, 0xa3, 0x5c, 0xc5, 0x3a, 0xa3, 0x5c
36*4882a593Smuzhiyun };
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun /*
39*4882a593Smuzhiyun  * Read the 64 bit we'd like to have - It a series
40*4882a593Smuzhiyun  * of 64 bits showing up in the LSB of the base register.
41*4882a593Smuzhiyun  *
42*4882a593Smuzhiyun  */
ds1216_read(u8 __iomem * ioaddr,u8 * buf)43*4882a593Smuzhiyun static void ds1216_read(u8 __iomem *ioaddr, u8 *buf)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun 	unsigned char c;
46*4882a593Smuzhiyun 	int i, j;
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 	for (i = 0; i < 8; i++) {
49*4882a593Smuzhiyun 		c = 0;
50*4882a593Smuzhiyun 		for (j = 0; j < 8; j++)
51*4882a593Smuzhiyun 			c |= (readb(ioaddr) & 0x1) << j;
52*4882a593Smuzhiyun 		buf[i] = c;
53*4882a593Smuzhiyun 	}
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun 
ds1216_write(u8 __iomem * ioaddr,const u8 * buf)56*4882a593Smuzhiyun static void ds1216_write(u8 __iomem *ioaddr, const u8 *buf)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun 	unsigned char c;
59*4882a593Smuzhiyun 	int i, j;
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 	for (i = 0; i < 8; i++) {
62*4882a593Smuzhiyun 		c = buf[i];
63*4882a593Smuzhiyun 		for (j = 0; j < 8; j++) {
64*4882a593Smuzhiyun 			writeb(c, ioaddr);
65*4882a593Smuzhiyun 			c = c >> 1;
66*4882a593Smuzhiyun 		}
67*4882a593Smuzhiyun 	}
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun 
ds1216_switch_ds_to_clock(u8 __iomem * ioaddr)70*4882a593Smuzhiyun static void ds1216_switch_ds_to_clock(u8 __iomem *ioaddr)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun 	/* Reset magic pointer */
73*4882a593Smuzhiyun 	readb(ioaddr);
74*4882a593Smuzhiyun 	/* Write 64 bit magic to DS1216 */
75*4882a593Smuzhiyun 	ds1216_write(ioaddr, magic);
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun 
ds1216_rtc_read_time(struct device * dev,struct rtc_time * tm)78*4882a593Smuzhiyun static int ds1216_rtc_read_time(struct device *dev, struct rtc_time *tm)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun 	struct ds1216_priv *priv = dev_get_drvdata(dev);
81*4882a593Smuzhiyun 	struct ds1216_regs regs;
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	ds1216_switch_ds_to_clock(priv->ioaddr);
84*4882a593Smuzhiyun 	ds1216_read(priv->ioaddr, (u8 *)&regs);
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	tm->tm_sec = bcd2bin(regs.sec);
87*4882a593Smuzhiyun 	tm->tm_min = bcd2bin(regs.min);
88*4882a593Smuzhiyun 	if (regs.hour & DS1216_HOUR_1224) {
89*4882a593Smuzhiyun 		/* AM/PM mode */
90*4882a593Smuzhiyun 		tm->tm_hour = bcd2bin(regs.hour & 0x1f);
91*4882a593Smuzhiyun 		if (regs.hour & DS1216_HOUR_AMPM)
92*4882a593Smuzhiyun 			tm->tm_hour += 12;
93*4882a593Smuzhiyun 	} else
94*4882a593Smuzhiyun 		tm->tm_hour = bcd2bin(regs.hour & 0x3f);
95*4882a593Smuzhiyun 	tm->tm_wday = (regs.wday & 7) - 1;
96*4882a593Smuzhiyun 	tm->tm_mday = bcd2bin(regs.mday & 0x3f);
97*4882a593Smuzhiyun 	tm->tm_mon = bcd2bin(regs.month & 0x1f);
98*4882a593Smuzhiyun 	tm->tm_year = bcd2bin(regs.year);
99*4882a593Smuzhiyun 	if (tm->tm_year < 70)
100*4882a593Smuzhiyun 		tm->tm_year += 100;
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	return 0;
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun 
ds1216_rtc_set_time(struct device * dev,struct rtc_time * tm)105*4882a593Smuzhiyun static int ds1216_rtc_set_time(struct device *dev, struct rtc_time *tm)
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun 	struct ds1216_priv *priv = dev_get_drvdata(dev);
108*4882a593Smuzhiyun 	struct ds1216_regs regs;
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	ds1216_switch_ds_to_clock(priv->ioaddr);
111*4882a593Smuzhiyun 	ds1216_read(priv->ioaddr, (u8 *)&regs);
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	regs.tsec = 0; /* clear 0.1 and 0.01 seconds */
114*4882a593Smuzhiyun 	regs.sec = bin2bcd(tm->tm_sec);
115*4882a593Smuzhiyun 	regs.min = bin2bcd(tm->tm_min);
116*4882a593Smuzhiyun 	regs.hour &= DS1216_HOUR_1224;
117*4882a593Smuzhiyun 	if (regs.hour && tm->tm_hour > 12) {
118*4882a593Smuzhiyun 		regs.hour |= DS1216_HOUR_AMPM;
119*4882a593Smuzhiyun 		tm->tm_hour -= 12;
120*4882a593Smuzhiyun 	}
121*4882a593Smuzhiyun 	regs.hour |= bin2bcd(tm->tm_hour);
122*4882a593Smuzhiyun 	regs.wday &= ~7;
123*4882a593Smuzhiyun 	regs.wday |= tm->tm_wday;
124*4882a593Smuzhiyun 	regs.mday = bin2bcd(tm->tm_mday);
125*4882a593Smuzhiyun 	regs.month = bin2bcd(tm->tm_mon);
126*4882a593Smuzhiyun 	regs.year = bin2bcd(tm->tm_year % 100);
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	ds1216_switch_ds_to_clock(priv->ioaddr);
129*4882a593Smuzhiyun 	ds1216_write(priv->ioaddr, (u8 *)&regs);
130*4882a593Smuzhiyun 	return 0;
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun static const struct rtc_class_ops ds1216_rtc_ops = {
134*4882a593Smuzhiyun 	.read_time	= ds1216_rtc_read_time,
135*4882a593Smuzhiyun 	.set_time	= ds1216_rtc_set_time,
136*4882a593Smuzhiyun };
137*4882a593Smuzhiyun 
ds1216_rtc_probe(struct platform_device * pdev)138*4882a593Smuzhiyun static int __init ds1216_rtc_probe(struct platform_device *pdev)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun 	struct ds1216_priv *priv;
141*4882a593Smuzhiyun 	u8 dummy[8];
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
144*4882a593Smuzhiyun 	if (!priv)
145*4882a593Smuzhiyun 		return -ENOMEM;
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	platform_set_drvdata(pdev, priv);
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	priv->ioaddr = devm_platform_ioremap_resource(pdev, 0);
150*4882a593Smuzhiyun 	if (IS_ERR(priv->ioaddr))
151*4882a593Smuzhiyun 		return PTR_ERR(priv->ioaddr);
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 	priv->rtc = devm_rtc_device_register(&pdev->dev, "ds1216",
154*4882a593Smuzhiyun 					&ds1216_rtc_ops, THIS_MODULE);
155*4882a593Smuzhiyun 	if (IS_ERR(priv->rtc))
156*4882a593Smuzhiyun 		return PTR_ERR(priv->rtc);
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun 	/* dummy read to get clock into a known state */
159*4882a593Smuzhiyun 	ds1216_read(priv->ioaddr, dummy);
160*4882a593Smuzhiyun 	return 0;
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun static struct platform_driver ds1216_rtc_platform_driver = {
164*4882a593Smuzhiyun 	.driver		= {
165*4882a593Smuzhiyun 		.name	= "rtc-ds1216",
166*4882a593Smuzhiyun 	},
167*4882a593Smuzhiyun };
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun module_platform_driver_probe(ds1216_rtc_platform_driver, ds1216_rtc_probe);
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun MODULE_AUTHOR("Thomas Bogendoerfer <tsbogend@alpha.franken.de>");
172*4882a593Smuzhiyun MODULE_DESCRIPTION("DS1216 RTC driver");
173*4882a593Smuzhiyun MODULE_LICENSE("GPL");
174*4882a593Smuzhiyun MODULE_ALIAS("platform:rtc-ds1216");
175