xref: /OK3568_Linux_fs/kernel/drivers/rtc/rtc-dm355evm.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * rtc-dm355evm.c - access battery-backed counter in MSP430 firmware
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2008 by David Brownell
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun #include <linux/kernel.h>
8*4882a593Smuzhiyun #include <linux/init.h>
9*4882a593Smuzhiyun #include <linux/rtc.h>
10*4882a593Smuzhiyun #include <linux/platform_device.h>
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <linux/mfd/dm355evm_msp.h>
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun /*
17*4882a593Smuzhiyun  * The MSP430 firmware on the DM355 EVM uses a watch crystal to feed
18*4882a593Smuzhiyun  * a 1 Hz counter.  When a backup battery is supplied, that makes a
19*4882a593Smuzhiyun  * reasonable RTC for applications where alarms and non-NTP drift
20*4882a593Smuzhiyun  * compensation aren't important.
21*4882a593Smuzhiyun  *
22*4882a593Smuzhiyun  * The only real glitch is the inability to read or write all four
23*4882a593Smuzhiyun  * counter bytes atomically:  the count may increment in the middle
24*4882a593Smuzhiyun  * of an operation, causing trouble when the LSB rolls over.
25*4882a593Smuzhiyun  *
26*4882a593Smuzhiyun  * This driver was tested with firmware revision A4.
27*4882a593Smuzhiyun  */
28*4882a593Smuzhiyun union evm_time {
29*4882a593Smuzhiyun 	u8	bytes[4];
30*4882a593Smuzhiyun 	u32	value;
31*4882a593Smuzhiyun };
32*4882a593Smuzhiyun 
dm355evm_rtc_read_time(struct device * dev,struct rtc_time * tm)33*4882a593Smuzhiyun static int dm355evm_rtc_read_time(struct device *dev, struct rtc_time *tm)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun 	union evm_time	time;
36*4882a593Smuzhiyun 	int		status;
37*4882a593Smuzhiyun 	int		tries = 0;
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun 	do {
40*4882a593Smuzhiyun 		/*
41*4882a593Smuzhiyun 		 * Read LSB(0) to MSB(3) bytes.  Defend against the counter
42*4882a593Smuzhiyun 		 * rolling over by re-reading until the value is stable,
43*4882a593Smuzhiyun 		 * and assuming the four reads take at most a few seconds.
44*4882a593Smuzhiyun 		 */
45*4882a593Smuzhiyun 		status = dm355evm_msp_read(DM355EVM_MSP_RTC_0);
46*4882a593Smuzhiyun 		if (status < 0)
47*4882a593Smuzhiyun 			return status;
48*4882a593Smuzhiyun 		if (tries && time.bytes[0] == status)
49*4882a593Smuzhiyun 			break;
50*4882a593Smuzhiyun 		time.bytes[0] = status;
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun 		status = dm355evm_msp_read(DM355EVM_MSP_RTC_1);
53*4882a593Smuzhiyun 		if (status < 0)
54*4882a593Smuzhiyun 			return status;
55*4882a593Smuzhiyun 		if (tries && time.bytes[1] == status)
56*4882a593Smuzhiyun 			break;
57*4882a593Smuzhiyun 		time.bytes[1] = status;
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun 		status = dm355evm_msp_read(DM355EVM_MSP_RTC_2);
60*4882a593Smuzhiyun 		if (status < 0)
61*4882a593Smuzhiyun 			return status;
62*4882a593Smuzhiyun 		if (tries && time.bytes[2] == status)
63*4882a593Smuzhiyun 			break;
64*4882a593Smuzhiyun 		time.bytes[2] = status;
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 		status = dm355evm_msp_read(DM355EVM_MSP_RTC_3);
67*4882a593Smuzhiyun 		if (status < 0)
68*4882a593Smuzhiyun 			return status;
69*4882a593Smuzhiyun 		if (tries && time.bytes[3] == status)
70*4882a593Smuzhiyun 			break;
71*4882a593Smuzhiyun 		time.bytes[3] = status;
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	} while (++tries < 5);
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	dev_dbg(dev, "read timestamp %08x\n", time.value);
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun 	rtc_time64_to_tm(le32_to_cpu(time.value), tm);
78*4882a593Smuzhiyun 	return 0;
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun 
dm355evm_rtc_set_time(struct device * dev,struct rtc_time * tm)81*4882a593Smuzhiyun static int dm355evm_rtc_set_time(struct device *dev, struct rtc_time *tm)
82*4882a593Smuzhiyun {
83*4882a593Smuzhiyun 	union evm_time	time;
84*4882a593Smuzhiyun 	unsigned long	value;
85*4882a593Smuzhiyun 	int		status;
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	value = rtc_tm_to_time64(tm);
88*4882a593Smuzhiyun 	time.value = cpu_to_le32(value);
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 	dev_dbg(dev, "write timestamp %08x\n", time.value);
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	/*
93*4882a593Smuzhiyun 	 * REVISIT handle non-atomic writes ... maybe just retry until
94*4882a593Smuzhiyun 	 * byte[1] sticks (no rollover)?
95*4882a593Smuzhiyun 	 */
96*4882a593Smuzhiyun 	status = dm355evm_msp_write(time.bytes[0], DM355EVM_MSP_RTC_0);
97*4882a593Smuzhiyun 	if (status < 0)
98*4882a593Smuzhiyun 		return status;
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	status = dm355evm_msp_write(time.bytes[1], DM355EVM_MSP_RTC_1);
101*4882a593Smuzhiyun 	if (status < 0)
102*4882a593Smuzhiyun 		return status;
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	status = dm355evm_msp_write(time.bytes[2], DM355EVM_MSP_RTC_2);
105*4882a593Smuzhiyun 	if (status < 0)
106*4882a593Smuzhiyun 		return status;
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	status = dm355evm_msp_write(time.bytes[3], DM355EVM_MSP_RTC_3);
109*4882a593Smuzhiyun 	if (status < 0)
110*4882a593Smuzhiyun 		return status;
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 	return 0;
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun static const struct rtc_class_ops dm355evm_rtc_ops = {
116*4882a593Smuzhiyun 	.read_time	= dm355evm_rtc_read_time,
117*4882a593Smuzhiyun 	.set_time	= dm355evm_rtc_set_time,
118*4882a593Smuzhiyun };
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun /*----------------------------------------------------------------------*/
121*4882a593Smuzhiyun 
dm355evm_rtc_probe(struct platform_device * pdev)122*4882a593Smuzhiyun static int dm355evm_rtc_probe(struct platform_device *pdev)
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun 	struct rtc_device *rtc;
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	rtc = devm_rtc_allocate_device(&pdev->dev);
127*4882a593Smuzhiyun 	if (IS_ERR(rtc))
128*4882a593Smuzhiyun 		return PTR_ERR(rtc);
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	platform_set_drvdata(pdev, rtc);
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	rtc->ops = &dm355evm_rtc_ops;
133*4882a593Smuzhiyun 	rtc->range_max = U32_MAX;
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	return rtc_register_device(rtc);
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun /*
139*4882a593Smuzhiyun  * I2C is used to talk to the MSP430, but this platform device is
140*4882a593Smuzhiyun  * exposed by an MFD driver that manages I2C communications.
141*4882a593Smuzhiyun  */
142*4882a593Smuzhiyun static struct platform_driver rtc_dm355evm_driver = {
143*4882a593Smuzhiyun 	.probe		= dm355evm_rtc_probe,
144*4882a593Smuzhiyun 	.driver		= {
145*4882a593Smuzhiyun 		.name	= "rtc-dm355evm",
146*4882a593Smuzhiyun 	},
147*4882a593Smuzhiyun };
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun module_platform_driver(rtc_dm355evm_driver);
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun MODULE_LICENSE("GPL");
152