1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Driver for TI BQ32000 RTC.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2009 Semihalf.
6*4882a593Smuzhiyun * Copyright (C) 2014 Pavel Machek <pavel@denx.de>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * You can get hardware description at
9*4882a593Smuzhiyun * https://www.ti.com/lit/ds/symlink/bq32000.pdf
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/i2c.h>
14*4882a593Smuzhiyun #include <linux/rtc.h>
15*4882a593Smuzhiyun #include <linux/init.h>
16*4882a593Smuzhiyun #include <linux/errno.h>
17*4882a593Smuzhiyun #include <linux/bcd.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #define BQ32K_SECONDS 0x00 /* Seconds register address */
20*4882a593Smuzhiyun #define BQ32K_SECONDS_MASK 0x7F /* Mask over seconds value */
21*4882a593Smuzhiyun #define BQ32K_STOP 0x80 /* Oscillator Stop flat */
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #define BQ32K_MINUTES 0x01 /* Minutes register address */
24*4882a593Smuzhiyun #define BQ32K_MINUTES_MASK 0x7F /* Mask over minutes value */
25*4882a593Smuzhiyun #define BQ32K_OF 0x80 /* Oscillator Failure flag */
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #define BQ32K_HOURS_MASK 0x3F /* Mask over hours value */
28*4882a593Smuzhiyun #define BQ32K_CENT 0x40 /* Century flag */
29*4882a593Smuzhiyun #define BQ32K_CENT_EN 0x80 /* Century flag enable bit */
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #define BQ32K_CALIBRATION 0x07 /* CAL_CFG1, calibration and control */
32*4882a593Smuzhiyun #define BQ32K_TCH2 0x08 /* Trickle charge enable */
33*4882a593Smuzhiyun #define BQ32K_CFG2 0x09 /* Trickle charger control */
34*4882a593Smuzhiyun #define BQ32K_TCFE BIT(6) /* Trickle charge FET bypass */
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun #define MAX_LEN 10 /* Maximum number of consecutive
37*4882a593Smuzhiyun * register for this particular RTC.
38*4882a593Smuzhiyun */
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun struct bq32k_regs {
41*4882a593Smuzhiyun uint8_t seconds;
42*4882a593Smuzhiyun uint8_t minutes;
43*4882a593Smuzhiyun uint8_t cent_hours;
44*4882a593Smuzhiyun uint8_t day;
45*4882a593Smuzhiyun uint8_t date;
46*4882a593Smuzhiyun uint8_t month;
47*4882a593Smuzhiyun uint8_t years;
48*4882a593Smuzhiyun };
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun static struct i2c_driver bq32k_driver;
51*4882a593Smuzhiyun
bq32k_read(struct device * dev,void * data,uint8_t off,uint8_t len)52*4882a593Smuzhiyun static int bq32k_read(struct device *dev, void *data, uint8_t off, uint8_t len)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun struct i2c_client *client = to_i2c_client(dev);
55*4882a593Smuzhiyun struct i2c_msg msgs[] = {
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun .addr = client->addr,
58*4882a593Smuzhiyun .flags = 0,
59*4882a593Smuzhiyun .len = 1,
60*4882a593Smuzhiyun .buf = &off,
61*4882a593Smuzhiyun }, {
62*4882a593Smuzhiyun .addr = client->addr,
63*4882a593Smuzhiyun .flags = I2C_M_RD,
64*4882a593Smuzhiyun .len = len,
65*4882a593Smuzhiyun .buf = data,
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun };
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun if (i2c_transfer(client->adapter, msgs, 2) == 2)
70*4882a593Smuzhiyun return 0;
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun return -EIO;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun
bq32k_write(struct device * dev,void * data,uint8_t off,uint8_t len)75*4882a593Smuzhiyun static int bq32k_write(struct device *dev, void *data, uint8_t off, uint8_t len)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun struct i2c_client *client = to_i2c_client(dev);
78*4882a593Smuzhiyun uint8_t buffer[MAX_LEN + 1];
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun buffer[0] = off;
81*4882a593Smuzhiyun memcpy(&buffer[1], data, len);
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun if (i2c_master_send(client, buffer, len + 1) == len + 1)
84*4882a593Smuzhiyun return 0;
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun return -EIO;
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun
bq32k_rtc_read_time(struct device * dev,struct rtc_time * tm)89*4882a593Smuzhiyun static int bq32k_rtc_read_time(struct device *dev, struct rtc_time *tm)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun struct bq32k_regs regs;
92*4882a593Smuzhiyun int error;
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun error = bq32k_read(dev, ®s, 0, sizeof(regs));
95*4882a593Smuzhiyun if (error)
96*4882a593Smuzhiyun return error;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun /*
99*4882a593Smuzhiyun * In case of oscillator failure, the register contents should be
100*4882a593Smuzhiyun * considered invalid. The flag is cleared the next time the RTC is set.
101*4882a593Smuzhiyun */
102*4882a593Smuzhiyun if (regs.minutes & BQ32K_OF)
103*4882a593Smuzhiyun return -EINVAL;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun tm->tm_sec = bcd2bin(regs.seconds & BQ32K_SECONDS_MASK);
106*4882a593Smuzhiyun tm->tm_min = bcd2bin(regs.minutes & BQ32K_MINUTES_MASK);
107*4882a593Smuzhiyun tm->tm_hour = bcd2bin(regs.cent_hours & BQ32K_HOURS_MASK);
108*4882a593Smuzhiyun tm->tm_mday = bcd2bin(regs.date);
109*4882a593Smuzhiyun tm->tm_wday = bcd2bin(regs.day) - 1;
110*4882a593Smuzhiyun tm->tm_mon = bcd2bin(regs.month) - 1;
111*4882a593Smuzhiyun tm->tm_year = bcd2bin(regs.years) +
112*4882a593Smuzhiyun ((regs.cent_hours & BQ32K_CENT) ? 100 : 0);
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun return 0;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
bq32k_rtc_set_time(struct device * dev,struct rtc_time * tm)117*4882a593Smuzhiyun static int bq32k_rtc_set_time(struct device *dev, struct rtc_time *tm)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun struct bq32k_regs regs;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun regs.seconds = bin2bcd(tm->tm_sec);
122*4882a593Smuzhiyun regs.minutes = bin2bcd(tm->tm_min);
123*4882a593Smuzhiyun regs.cent_hours = bin2bcd(tm->tm_hour) | BQ32K_CENT_EN;
124*4882a593Smuzhiyun regs.day = bin2bcd(tm->tm_wday + 1);
125*4882a593Smuzhiyun regs.date = bin2bcd(tm->tm_mday);
126*4882a593Smuzhiyun regs.month = bin2bcd(tm->tm_mon + 1);
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun if (tm->tm_year >= 100) {
129*4882a593Smuzhiyun regs.cent_hours |= BQ32K_CENT;
130*4882a593Smuzhiyun regs.years = bin2bcd(tm->tm_year - 100);
131*4882a593Smuzhiyun } else
132*4882a593Smuzhiyun regs.years = bin2bcd(tm->tm_year);
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun return bq32k_write(dev, ®s, 0, sizeof(regs));
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun static const struct rtc_class_ops bq32k_rtc_ops = {
138*4882a593Smuzhiyun .read_time = bq32k_rtc_read_time,
139*4882a593Smuzhiyun .set_time = bq32k_rtc_set_time,
140*4882a593Smuzhiyun };
141*4882a593Smuzhiyun
trickle_charger_of_init(struct device * dev,struct device_node * node)142*4882a593Smuzhiyun static int trickle_charger_of_init(struct device *dev, struct device_node *node)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun unsigned char reg;
145*4882a593Smuzhiyun int error;
146*4882a593Smuzhiyun u32 ohms = 0;
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun if (of_property_read_u32(node, "trickle-resistor-ohms" , &ohms))
149*4882a593Smuzhiyun return 0;
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun switch (ohms) {
152*4882a593Smuzhiyun case 180+940:
153*4882a593Smuzhiyun /*
154*4882a593Smuzhiyun * TCHE[3:0] == 0x05, TCH2 == 1, TCFE == 0 (charging
155*4882a593Smuzhiyun * over diode and 940ohm resistor)
156*4882a593Smuzhiyun */
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun if (of_property_read_bool(node, "trickle-diode-disable")) {
159*4882a593Smuzhiyun dev_err(dev, "diode and resistor mismatch\n");
160*4882a593Smuzhiyun return -EINVAL;
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun reg = 0x05;
163*4882a593Smuzhiyun break;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun case 180+20000:
166*4882a593Smuzhiyun /* diode disabled */
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun if (!of_property_read_bool(node, "trickle-diode-disable")) {
169*4882a593Smuzhiyun dev_err(dev, "bq32k: diode and resistor mismatch\n");
170*4882a593Smuzhiyun return -EINVAL;
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun reg = 0x45;
173*4882a593Smuzhiyun break;
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun default:
176*4882a593Smuzhiyun dev_err(dev, "invalid resistor value (%d)\n", ohms);
177*4882a593Smuzhiyun return -EINVAL;
178*4882a593Smuzhiyun }
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun error = bq32k_write(dev, ®, BQ32K_CFG2, 1);
181*4882a593Smuzhiyun if (error)
182*4882a593Smuzhiyun return error;
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun reg = 0x20;
185*4882a593Smuzhiyun error = bq32k_write(dev, ®, BQ32K_TCH2, 1);
186*4882a593Smuzhiyun if (error)
187*4882a593Smuzhiyun return error;
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun dev_info(dev, "Enabled trickle RTC battery charge.\n");
190*4882a593Smuzhiyun return 0;
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun
bq32k_sysfs_show_tricklecharge_bypass(struct device * dev,struct device_attribute * attr,char * buf)193*4882a593Smuzhiyun static ssize_t bq32k_sysfs_show_tricklecharge_bypass(struct device *dev,
194*4882a593Smuzhiyun struct device_attribute *attr,
195*4882a593Smuzhiyun char *buf)
196*4882a593Smuzhiyun {
197*4882a593Smuzhiyun int reg, error;
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun error = bq32k_read(dev, ®, BQ32K_CFG2, 1);
200*4882a593Smuzhiyun if (error)
201*4882a593Smuzhiyun return error;
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun return sprintf(buf, "%d\n", (reg & BQ32K_TCFE) ? 1 : 0);
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun
bq32k_sysfs_store_tricklecharge_bypass(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)206*4882a593Smuzhiyun static ssize_t bq32k_sysfs_store_tricklecharge_bypass(struct device *dev,
207*4882a593Smuzhiyun struct device_attribute *attr,
208*4882a593Smuzhiyun const char *buf, size_t count)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun int reg, enable, error;
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun if (kstrtoint(buf, 0, &enable))
213*4882a593Smuzhiyun return -EINVAL;
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun error = bq32k_read(dev, ®, BQ32K_CFG2, 1);
216*4882a593Smuzhiyun if (error)
217*4882a593Smuzhiyun return error;
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun if (enable) {
220*4882a593Smuzhiyun reg |= BQ32K_TCFE;
221*4882a593Smuzhiyun error = bq32k_write(dev, ®, BQ32K_CFG2, 1);
222*4882a593Smuzhiyun if (error)
223*4882a593Smuzhiyun return error;
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun dev_info(dev, "Enabled trickle charge FET bypass.\n");
226*4882a593Smuzhiyun } else {
227*4882a593Smuzhiyun reg &= ~BQ32K_TCFE;
228*4882a593Smuzhiyun error = bq32k_write(dev, ®, BQ32K_CFG2, 1);
229*4882a593Smuzhiyun if (error)
230*4882a593Smuzhiyun return error;
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun dev_info(dev, "Disabled trickle charge FET bypass.\n");
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun return count;
236*4882a593Smuzhiyun }
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun static DEVICE_ATTR(trickle_charge_bypass, 0644,
239*4882a593Smuzhiyun bq32k_sysfs_show_tricklecharge_bypass,
240*4882a593Smuzhiyun bq32k_sysfs_store_tricklecharge_bypass);
241*4882a593Smuzhiyun
bq32k_sysfs_register(struct device * dev)242*4882a593Smuzhiyun static int bq32k_sysfs_register(struct device *dev)
243*4882a593Smuzhiyun {
244*4882a593Smuzhiyun return device_create_file(dev, &dev_attr_trickle_charge_bypass);
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun
bq32k_sysfs_unregister(struct device * dev)247*4882a593Smuzhiyun static void bq32k_sysfs_unregister(struct device *dev)
248*4882a593Smuzhiyun {
249*4882a593Smuzhiyun device_remove_file(dev, &dev_attr_trickle_charge_bypass);
250*4882a593Smuzhiyun }
251*4882a593Smuzhiyun
bq32k_probe(struct i2c_client * client,const struct i2c_device_id * id)252*4882a593Smuzhiyun static int bq32k_probe(struct i2c_client *client,
253*4882a593Smuzhiyun const struct i2c_device_id *id)
254*4882a593Smuzhiyun {
255*4882a593Smuzhiyun struct device *dev = &client->dev;
256*4882a593Smuzhiyun struct rtc_device *rtc;
257*4882a593Smuzhiyun uint8_t reg;
258*4882a593Smuzhiyun int error;
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
261*4882a593Smuzhiyun return -ENODEV;
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun /* Check Oscillator Stop flag */
264*4882a593Smuzhiyun error = bq32k_read(dev, ®, BQ32K_SECONDS, 1);
265*4882a593Smuzhiyun if (!error && (reg & BQ32K_STOP)) {
266*4882a593Smuzhiyun dev_warn(dev, "Oscillator was halted. Restarting...\n");
267*4882a593Smuzhiyun reg &= ~BQ32K_STOP;
268*4882a593Smuzhiyun error = bq32k_write(dev, ®, BQ32K_SECONDS, 1);
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun if (error)
271*4882a593Smuzhiyun return error;
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun /* Check Oscillator Failure flag */
274*4882a593Smuzhiyun error = bq32k_read(dev, ®, BQ32K_MINUTES, 1);
275*4882a593Smuzhiyun if (error)
276*4882a593Smuzhiyun return error;
277*4882a593Smuzhiyun if (reg & BQ32K_OF)
278*4882a593Smuzhiyun dev_warn(dev, "Oscillator Failure. Check RTC battery.\n");
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun if (client->dev.of_node)
281*4882a593Smuzhiyun trickle_charger_of_init(dev, client->dev.of_node);
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun rtc = devm_rtc_device_register(&client->dev, bq32k_driver.driver.name,
284*4882a593Smuzhiyun &bq32k_rtc_ops, THIS_MODULE);
285*4882a593Smuzhiyun if (IS_ERR(rtc))
286*4882a593Smuzhiyun return PTR_ERR(rtc);
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun error = bq32k_sysfs_register(&client->dev);
289*4882a593Smuzhiyun if (error) {
290*4882a593Smuzhiyun dev_err(&client->dev,
291*4882a593Smuzhiyun "Unable to create sysfs entries for rtc bq32000\n");
292*4882a593Smuzhiyun return error;
293*4882a593Smuzhiyun }
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun i2c_set_clientdata(client, rtc);
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun return 0;
299*4882a593Smuzhiyun }
300*4882a593Smuzhiyun
bq32k_remove(struct i2c_client * client)301*4882a593Smuzhiyun static int bq32k_remove(struct i2c_client *client)
302*4882a593Smuzhiyun {
303*4882a593Smuzhiyun bq32k_sysfs_unregister(&client->dev);
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun return 0;
306*4882a593Smuzhiyun }
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun static const struct i2c_device_id bq32k_id[] = {
309*4882a593Smuzhiyun { "bq32000", 0 },
310*4882a593Smuzhiyun { }
311*4882a593Smuzhiyun };
312*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, bq32k_id);
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun static const struct of_device_id bq32k_of_match[] = {
315*4882a593Smuzhiyun { .compatible = "ti,bq32000" },
316*4882a593Smuzhiyun { }
317*4882a593Smuzhiyun };
318*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, bq32k_of_match);
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun static struct i2c_driver bq32k_driver = {
321*4882a593Smuzhiyun .driver = {
322*4882a593Smuzhiyun .name = "bq32k",
323*4882a593Smuzhiyun .of_match_table = of_match_ptr(bq32k_of_match),
324*4882a593Smuzhiyun },
325*4882a593Smuzhiyun .probe = bq32k_probe,
326*4882a593Smuzhiyun .remove = bq32k_remove,
327*4882a593Smuzhiyun .id_table = bq32k_id,
328*4882a593Smuzhiyun };
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun module_i2c_driver(bq32k_driver);
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun MODULE_AUTHOR("Semihalf, Piotr Ziecik <kosmo@semihalf.com>");
333*4882a593Smuzhiyun MODULE_DESCRIPTION("TI BQ32000 I2C RTC driver");
334*4882a593Smuzhiyun MODULE_LICENSE("GPL");
335