xref: /OK3568_Linux_fs/kernel/drivers/rtc/rtc-ab3100.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (C) 2007-2009 ST-Ericsson AB
4*4882a593Smuzhiyun  * RTC clock driver for the AB3100 Analog Baseband Chip
5*4882a593Smuzhiyun  * Author: Linus Walleij <linus.walleij@stericsson.com>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun #include <linux/module.h>
8*4882a593Smuzhiyun #include <linux/kernel.h>
9*4882a593Smuzhiyun #include <linux/init.h>
10*4882a593Smuzhiyun #include <linux/platform_device.h>
11*4882a593Smuzhiyun #include <linux/rtc.h>
12*4882a593Smuzhiyun #include <linux/mfd/abx500.h>
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun /* Clock rate in Hz */
15*4882a593Smuzhiyun #define AB3100_RTC_CLOCK_RATE	32768
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun /*
18*4882a593Smuzhiyun  * The AB3100 RTC registers. These are the same for
19*4882a593Smuzhiyun  * AB3000 and AB3100.
20*4882a593Smuzhiyun  * Control register:
21*4882a593Smuzhiyun  * Bit 0: RTC Monitor cleared=0, active=1, if you set it
22*4882a593Smuzhiyun  *        to 1 it remains active until RTC power is lost.
23*4882a593Smuzhiyun  * Bit 1: 32 kHz Oscillator, 0 = on, 1 = bypass
24*4882a593Smuzhiyun  * Bit 2: Alarm on, 0 = off, 1 = on
25*4882a593Smuzhiyun  * Bit 3: 32 kHz buffer disabling, 0 = enabled, 1 = disabled
26*4882a593Smuzhiyun  */
27*4882a593Smuzhiyun #define AB3100_RTC		0x53
28*4882a593Smuzhiyun /* default setting, buffer disabled, alarm on */
29*4882a593Smuzhiyun #define RTC_SETTING		0x30
30*4882a593Smuzhiyun /* Alarm when AL0-AL3 == TI0-TI3  */
31*4882a593Smuzhiyun #define AB3100_AL0		0x56
32*4882a593Smuzhiyun #define AB3100_AL1		0x57
33*4882a593Smuzhiyun #define AB3100_AL2		0x58
34*4882a593Smuzhiyun #define AB3100_AL3		0x59
35*4882a593Smuzhiyun /* This 48-bit register that counts up at 32768 Hz */
36*4882a593Smuzhiyun #define AB3100_TI0		0x5a
37*4882a593Smuzhiyun #define AB3100_TI1		0x5b
38*4882a593Smuzhiyun #define AB3100_TI2		0x5c
39*4882a593Smuzhiyun #define AB3100_TI3		0x5d
40*4882a593Smuzhiyun #define AB3100_TI4		0x5e
41*4882a593Smuzhiyun #define AB3100_TI5		0x5f
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun /*
44*4882a593Smuzhiyun  * RTC clock functions and device struct declaration
45*4882a593Smuzhiyun  */
ab3100_rtc_set_time(struct device * dev,struct rtc_time * tm)46*4882a593Smuzhiyun static int ab3100_rtc_set_time(struct device *dev, struct rtc_time *tm)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun 	u8 regs[] = {AB3100_TI0, AB3100_TI1, AB3100_TI2,
49*4882a593Smuzhiyun 		     AB3100_TI3, AB3100_TI4, AB3100_TI5};
50*4882a593Smuzhiyun 	unsigned char buf[6];
51*4882a593Smuzhiyun 	u64 hw_counter = rtc_tm_to_time64(tm) * AB3100_RTC_CLOCK_RATE * 2;
52*4882a593Smuzhiyun 	int err = 0;
53*4882a593Smuzhiyun 	int i;
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	buf[0] = (hw_counter) & 0xFF;
56*4882a593Smuzhiyun 	buf[1] = (hw_counter >> 8) & 0xFF;
57*4882a593Smuzhiyun 	buf[2] = (hw_counter >> 16) & 0xFF;
58*4882a593Smuzhiyun 	buf[3] = (hw_counter >> 24) & 0xFF;
59*4882a593Smuzhiyun 	buf[4] = (hw_counter >> 32) & 0xFF;
60*4882a593Smuzhiyun 	buf[5] = (hw_counter >> 40) & 0xFF;
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	for (i = 0; i < 6; i++) {
63*4882a593Smuzhiyun 		err = abx500_set_register_interruptible(dev, 0,
64*4882a593Smuzhiyun 							regs[i], buf[i]);
65*4882a593Smuzhiyun 		if (err)
66*4882a593Smuzhiyun 			return err;
67*4882a593Smuzhiyun 	}
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 	/* Set the flag to mark that the clock is now set */
70*4882a593Smuzhiyun 	return abx500_mask_and_set_register_interruptible(dev, 0,
71*4882a593Smuzhiyun 							  AB3100_RTC,
72*4882a593Smuzhiyun 							  0x01, 0x01);
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun 
ab3100_rtc_read_time(struct device * dev,struct rtc_time * tm)76*4882a593Smuzhiyun static int ab3100_rtc_read_time(struct device *dev, struct rtc_time *tm)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun 	time64_t time;
79*4882a593Smuzhiyun 	u8 rtcval;
80*4882a593Smuzhiyun 	int err;
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	err = abx500_get_register_interruptible(dev, 0,
83*4882a593Smuzhiyun 						AB3100_RTC, &rtcval);
84*4882a593Smuzhiyun 	if (err)
85*4882a593Smuzhiyun 		return err;
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	if (!(rtcval & 0x01)) {
88*4882a593Smuzhiyun 		dev_info(dev, "clock not set (lost power)");
89*4882a593Smuzhiyun 		return -EINVAL;
90*4882a593Smuzhiyun 	} else {
91*4882a593Smuzhiyun 		u64 hw_counter;
92*4882a593Smuzhiyun 		u8 buf[6];
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 		/* Read out time registers */
95*4882a593Smuzhiyun 		err = abx500_get_register_page_interruptible(dev, 0,
96*4882a593Smuzhiyun 							     AB3100_TI0,
97*4882a593Smuzhiyun 							     buf, 6);
98*4882a593Smuzhiyun 		if (err != 0)
99*4882a593Smuzhiyun 			return err;
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 		hw_counter = ((u64) buf[5] << 40) | ((u64) buf[4] << 32) |
102*4882a593Smuzhiyun 			((u64) buf[3] << 24) | ((u64) buf[2] << 16) |
103*4882a593Smuzhiyun 			((u64) buf[1] << 8) | (u64) buf[0];
104*4882a593Smuzhiyun 		time = hw_counter / (u64) (AB3100_RTC_CLOCK_RATE * 2);
105*4882a593Smuzhiyun 	}
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun 	rtc_time64_to_tm(time, tm);
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 	return 0;
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun 
ab3100_rtc_read_alarm(struct device * dev,struct rtc_wkalrm * alarm)112*4882a593Smuzhiyun static int ab3100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun 	time64_t time;
115*4882a593Smuzhiyun 	u64 hw_counter;
116*4882a593Smuzhiyun 	u8 buf[6];
117*4882a593Smuzhiyun 	u8 rtcval;
118*4882a593Smuzhiyun 	int err;
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	/* Figure out if alarm is enabled or not */
121*4882a593Smuzhiyun 	err = abx500_get_register_interruptible(dev, 0,
122*4882a593Smuzhiyun 						AB3100_RTC, &rtcval);
123*4882a593Smuzhiyun 	if (err)
124*4882a593Smuzhiyun 		return err;
125*4882a593Smuzhiyun 	if (rtcval & 0x04)
126*4882a593Smuzhiyun 		alarm->enabled = 1;
127*4882a593Smuzhiyun 	else
128*4882a593Smuzhiyun 		alarm->enabled = 0;
129*4882a593Smuzhiyun 	/* No idea how this could be represented */
130*4882a593Smuzhiyun 	alarm->pending = 0;
131*4882a593Smuzhiyun 	/* Read out alarm registers, only 4 bytes */
132*4882a593Smuzhiyun 	err = abx500_get_register_page_interruptible(dev, 0,
133*4882a593Smuzhiyun 						     AB3100_AL0, buf, 4);
134*4882a593Smuzhiyun 	if (err)
135*4882a593Smuzhiyun 		return err;
136*4882a593Smuzhiyun 	hw_counter = ((u64) buf[3] << 40) | ((u64) buf[2] << 32) |
137*4882a593Smuzhiyun 		((u64) buf[1] << 24) | ((u64) buf[0] << 16);
138*4882a593Smuzhiyun 	time = hw_counter / (u64) (AB3100_RTC_CLOCK_RATE * 2);
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	rtc_time64_to_tm(time, &alarm->time);
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 	return rtc_valid_tm(&alarm->time);
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun 
ab3100_rtc_set_alarm(struct device * dev,struct rtc_wkalrm * alarm)145*4882a593Smuzhiyun static int ab3100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun 	u8 regs[] = {AB3100_AL0, AB3100_AL1, AB3100_AL2, AB3100_AL3};
148*4882a593Smuzhiyun 	unsigned char buf[4];
149*4882a593Smuzhiyun 	time64_t secs;
150*4882a593Smuzhiyun 	u64 hw_counter;
151*4882a593Smuzhiyun 	int err;
152*4882a593Smuzhiyun 	int i;
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun 	secs = rtc_tm_to_time64(&alarm->time);
155*4882a593Smuzhiyun 	hw_counter = secs * AB3100_RTC_CLOCK_RATE * 2;
156*4882a593Smuzhiyun 	buf[0] = (hw_counter >> 16) & 0xFF;
157*4882a593Smuzhiyun 	buf[1] = (hw_counter >> 24) & 0xFF;
158*4882a593Smuzhiyun 	buf[2] = (hw_counter >> 32) & 0xFF;
159*4882a593Smuzhiyun 	buf[3] = (hw_counter >> 40) & 0xFF;
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 	/* Set the alarm */
162*4882a593Smuzhiyun 	for (i = 0; i < 4; i++) {
163*4882a593Smuzhiyun 		err = abx500_set_register_interruptible(dev, 0,
164*4882a593Smuzhiyun 							regs[i], buf[i]);
165*4882a593Smuzhiyun 		if (err)
166*4882a593Smuzhiyun 			return err;
167*4882a593Smuzhiyun 	}
168*4882a593Smuzhiyun 	/* Then enable the alarm */
169*4882a593Smuzhiyun 	return abx500_mask_and_set_register_interruptible(dev, 0,
170*4882a593Smuzhiyun 							  AB3100_RTC, (1 << 2),
171*4882a593Smuzhiyun 							  alarm->enabled << 2);
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun 
ab3100_rtc_irq_enable(struct device * dev,unsigned int enabled)174*4882a593Smuzhiyun static int ab3100_rtc_irq_enable(struct device *dev, unsigned int enabled)
175*4882a593Smuzhiyun {
176*4882a593Smuzhiyun 	/*
177*4882a593Smuzhiyun 	 * It's not possible to enable/disable the alarm IRQ for this RTC.
178*4882a593Smuzhiyun 	 * It does not actually trigger any IRQ: instead its only function is
179*4882a593Smuzhiyun 	 * to power up the system, if it wasn't on. This will manifest as
180*4882a593Smuzhiyun 	 * a "power up cause" in the AB3100 power driver (battery charging etc)
181*4882a593Smuzhiyun 	 * and need to be handled there instead.
182*4882a593Smuzhiyun 	 */
183*4882a593Smuzhiyun 	if (enabled)
184*4882a593Smuzhiyun 		return abx500_mask_and_set_register_interruptible(dev, 0,
185*4882a593Smuzhiyun 						    AB3100_RTC, (1 << 2),
186*4882a593Smuzhiyun 						    1 << 2);
187*4882a593Smuzhiyun 	else
188*4882a593Smuzhiyun 		return abx500_mask_and_set_register_interruptible(dev, 0,
189*4882a593Smuzhiyun 						    AB3100_RTC, (1 << 2),
190*4882a593Smuzhiyun 						    0);
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun static const struct rtc_class_ops ab3100_rtc_ops = {
194*4882a593Smuzhiyun 	.read_time	= ab3100_rtc_read_time,
195*4882a593Smuzhiyun 	.set_time	= ab3100_rtc_set_time,
196*4882a593Smuzhiyun 	.read_alarm	= ab3100_rtc_read_alarm,
197*4882a593Smuzhiyun 	.set_alarm	= ab3100_rtc_set_alarm,
198*4882a593Smuzhiyun 	.alarm_irq_enable = ab3100_rtc_irq_enable,
199*4882a593Smuzhiyun };
200*4882a593Smuzhiyun 
ab3100_rtc_probe(struct platform_device * pdev)201*4882a593Smuzhiyun static int __init ab3100_rtc_probe(struct platform_device *pdev)
202*4882a593Smuzhiyun {
203*4882a593Smuzhiyun 	int err;
204*4882a593Smuzhiyun 	u8 regval;
205*4882a593Smuzhiyun 	struct rtc_device *rtc;
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	/* The first RTC register needs special treatment */
208*4882a593Smuzhiyun 	err = abx500_get_register_interruptible(&pdev->dev, 0,
209*4882a593Smuzhiyun 						AB3100_RTC, &regval);
210*4882a593Smuzhiyun 	if (err) {
211*4882a593Smuzhiyun 		dev_err(&pdev->dev, "unable to read RTC register\n");
212*4882a593Smuzhiyun 		return -ENODEV;
213*4882a593Smuzhiyun 	}
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 	if ((regval & 0xFE) != RTC_SETTING) {
216*4882a593Smuzhiyun 		dev_warn(&pdev->dev, "not default value in RTC reg 0x%x\n",
217*4882a593Smuzhiyun 			 regval);
218*4882a593Smuzhiyun 	}
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 	if ((regval & 1) == 0) {
221*4882a593Smuzhiyun 		/*
222*4882a593Smuzhiyun 		 * Set bit to detect power loss.
223*4882a593Smuzhiyun 		 * This bit remains until RTC power is lost.
224*4882a593Smuzhiyun 		 */
225*4882a593Smuzhiyun 		regval = 1 | RTC_SETTING;
226*4882a593Smuzhiyun 		err = abx500_set_register_interruptible(&pdev->dev, 0,
227*4882a593Smuzhiyun 							AB3100_RTC, regval);
228*4882a593Smuzhiyun 		/* Ignore any error on this write */
229*4882a593Smuzhiyun 	}
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 	rtc = devm_rtc_allocate_device(&pdev->dev);
232*4882a593Smuzhiyun 	if (IS_ERR(rtc))
233*4882a593Smuzhiyun 		return PTR_ERR(rtc);
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun 	rtc->ops = &ab3100_rtc_ops;
236*4882a593Smuzhiyun 	/* 48bit counter at (AB3100_RTC_CLOCK_RATE * 2) */
237*4882a593Smuzhiyun 	rtc->range_max = U32_MAX;
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	platform_set_drvdata(pdev, rtc);
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun 	return rtc_register_device(rtc);
242*4882a593Smuzhiyun }
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun static struct platform_driver ab3100_rtc_driver = {
245*4882a593Smuzhiyun 	.driver = {
246*4882a593Smuzhiyun 		.name = "ab3100-rtc",
247*4882a593Smuzhiyun 	},
248*4882a593Smuzhiyun };
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun module_platform_driver_probe(ab3100_rtc_driver, ab3100_rtc_probe);
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun MODULE_AUTHOR("Linus Walleij <linus.walleij@stericsson.com>");
253*4882a593Smuzhiyun MODULE_DESCRIPTION("AB3100 RTC Driver");
254*4882a593Smuzhiyun MODULE_LICENSE("GPL");
255