1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Real Time Clock driver for Marvell 88PM860x PMIC
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2010 Marvell International Ltd.
6*4882a593Smuzhiyun * Author: Haojian Zhuang <haojian.zhuang@marvell.com>
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/kernel.h>
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/of.h>
12*4882a593Smuzhiyun #include <linux/platform_device.h>
13*4882a593Smuzhiyun #include <linux/slab.h>
14*4882a593Smuzhiyun #include <linux/mutex.h>
15*4882a593Smuzhiyun #include <linux/rtc.h>
16*4882a593Smuzhiyun #include <linux/delay.h>
17*4882a593Smuzhiyun #include <linux/mfd/core.h>
18*4882a593Smuzhiyun #include <linux/mfd/88pm860x.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #define VRTC_CALIBRATION
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun struct pm860x_rtc_info {
23*4882a593Smuzhiyun struct pm860x_chip *chip;
24*4882a593Smuzhiyun struct i2c_client *i2c;
25*4882a593Smuzhiyun struct rtc_device *rtc_dev;
26*4882a593Smuzhiyun struct device *dev;
27*4882a593Smuzhiyun struct delayed_work calib_work;
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun int irq;
30*4882a593Smuzhiyun int vrtc;
31*4882a593Smuzhiyun };
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #define REG_VRTC_MEAS1 0x7D
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #define REG0_ADDR 0xB0
36*4882a593Smuzhiyun #define REG1_ADDR 0xB2
37*4882a593Smuzhiyun #define REG2_ADDR 0xB4
38*4882a593Smuzhiyun #define REG3_ADDR 0xB6
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #define REG0_DATA 0xB1
41*4882a593Smuzhiyun #define REG1_DATA 0xB3
42*4882a593Smuzhiyun #define REG2_DATA 0xB5
43*4882a593Smuzhiyun #define REG3_DATA 0xB7
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun /* bit definitions of Measurement Enable Register 2 (0x51) */
46*4882a593Smuzhiyun #define MEAS2_VRTC (1 << 0)
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun /* bit definitions of RTC Register 1 (0xA0) */
49*4882a593Smuzhiyun #define ALARM_EN (1 << 3)
50*4882a593Smuzhiyun #define ALARM_WAKEUP (1 << 4)
51*4882a593Smuzhiyun #define ALARM (1 << 5)
52*4882a593Smuzhiyun #define RTC1_USE_XO (1 << 7)
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun #define VRTC_CALIB_INTERVAL (HZ * 60 * 10) /* 10 minutes */
55*4882a593Smuzhiyun
rtc_update_handler(int irq,void * data)56*4882a593Smuzhiyun static irqreturn_t rtc_update_handler(int irq, void *data)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun struct pm860x_rtc_info *info = (struct pm860x_rtc_info *)data;
59*4882a593Smuzhiyun int mask;
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun mask = ALARM | ALARM_WAKEUP;
62*4882a593Smuzhiyun pm860x_set_bits(info->i2c, PM8607_RTC1, mask | ALARM_EN, mask);
63*4882a593Smuzhiyun rtc_update_irq(info->rtc_dev, 1, RTC_AF);
64*4882a593Smuzhiyun return IRQ_HANDLED;
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
pm860x_rtc_alarm_irq_enable(struct device * dev,unsigned int enabled)67*4882a593Smuzhiyun static int pm860x_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun struct pm860x_rtc_info *info = dev_get_drvdata(dev);
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun if (enabled)
72*4882a593Smuzhiyun pm860x_set_bits(info->i2c, PM8607_RTC1, ALARM_EN, ALARM_EN);
73*4882a593Smuzhiyun else
74*4882a593Smuzhiyun pm860x_set_bits(info->i2c, PM8607_RTC1, ALARM_EN, 0);
75*4882a593Smuzhiyun return 0;
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
pm860x_rtc_read_time(struct device * dev,struct rtc_time * tm)78*4882a593Smuzhiyun static int pm860x_rtc_read_time(struct device *dev, struct rtc_time *tm)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun struct pm860x_rtc_info *info = dev_get_drvdata(dev);
81*4882a593Smuzhiyun unsigned char buf[8];
82*4882a593Smuzhiyun unsigned long ticks, base, data;
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun pm860x_page_bulk_read(info->i2c, REG0_ADDR, 8, buf);
85*4882a593Smuzhiyun dev_dbg(info->dev, "%x-%x-%x-%x-%x-%x-%x-%x\n", buf[0], buf[1],
86*4882a593Smuzhiyun buf[2], buf[3], buf[4], buf[5], buf[6], buf[7]);
87*4882a593Smuzhiyun base = ((unsigned long)buf[1] << 24) | (buf[3] << 16) |
88*4882a593Smuzhiyun (buf[5] << 8) | buf[7];
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun /* load 32-bit read-only counter */
91*4882a593Smuzhiyun pm860x_bulk_read(info->i2c, PM8607_RTC_COUNTER1, 4, buf);
92*4882a593Smuzhiyun data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
93*4882a593Smuzhiyun (buf[1] << 8) | buf[0];
94*4882a593Smuzhiyun ticks = base + data;
95*4882a593Smuzhiyun dev_dbg(info->dev, "get base:0x%lx, RO count:0x%lx, ticks:0x%lx\n",
96*4882a593Smuzhiyun base, data, ticks);
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun rtc_time64_to_tm(ticks, tm);
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun return 0;
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun
pm860x_rtc_set_time(struct device * dev,struct rtc_time * tm)103*4882a593Smuzhiyun static int pm860x_rtc_set_time(struct device *dev, struct rtc_time *tm)
104*4882a593Smuzhiyun {
105*4882a593Smuzhiyun struct pm860x_rtc_info *info = dev_get_drvdata(dev);
106*4882a593Smuzhiyun unsigned char buf[4];
107*4882a593Smuzhiyun unsigned long ticks, base, data;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun ticks = rtc_tm_to_time64(tm);
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun /* load 32-bit read-only counter */
112*4882a593Smuzhiyun pm860x_bulk_read(info->i2c, PM8607_RTC_COUNTER1, 4, buf);
113*4882a593Smuzhiyun data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
114*4882a593Smuzhiyun (buf[1] << 8) | buf[0];
115*4882a593Smuzhiyun base = ticks - data;
116*4882a593Smuzhiyun dev_dbg(info->dev, "set base:0x%lx, RO count:0x%lx, ticks:0x%lx\n",
117*4882a593Smuzhiyun base, data, ticks);
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun pm860x_page_reg_write(info->i2c, REG0_DATA, (base >> 24) & 0xFF);
120*4882a593Smuzhiyun pm860x_page_reg_write(info->i2c, REG1_DATA, (base >> 16) & 0xFF);
121*4882a593Smuzhiyun pm860x_page_reg_write(info->i2c, REG2_DATA, (base >> 8) & 0xFF);
122*4882a593Smuzhiyun pm860x_page_reg_write(info->i2c, REG3_DATA, base & 0xFF);
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun return 0;
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun
pm860x_rtc_read_alarm(struct device * dev,struct rtc_wkalrm * alrm)127*4882a593Smuzhiyun static int pm860x_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
128*4882a593Smuzhiyun {
129*4882a593Smuzhiyun struct pm860x_rtc_info *info = dev_get_drvdata(dev);
130*4882a593Smuzhiyun unsigned char buf[8];
131*4882a593Smuzhiyun unsigned long ticks, base, data;
132*4882a593Smuzhiyun int ret;
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun pm860x_page_bulk_read(info->i2c, REG0_ADDR, 8, buf);
135*4882a593Smuzhiyun dev_dbg(info->dev, "%x-%x-%x-%x-%x-%x-%x-%x\n", buf[0], buf[1],
136*4882a593Smuzhiyun buf[2], buf[3], buf[4], buf[5], buf[6], buf[7]);
137*4882a593Smuzhiyun base = ((unsigned long)buf[1] << 24) | (buf[3] << 16) |
138*4882a593Smuzhiyun (buf[5] << 8) | buf[7];
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun pm860x_bulk_read(info->i2c, PM8607_RTC_EXPIRE1, 4, buf);
141*4882a593Smuzhiyun data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
142*4882a593Smuzhiyun (buf[1] << 8) | buf[0];
143*4882a593Smuzhiyun ticks = base + data;
144*4882a593Smuzhiyun dev_dbg(info->dev, "get base:0x%lx, RO count:0x%lx, ticks:0x%lx\n",
145*4882a593Smuzhiyun base, data, ticks);
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun rtc_time64_to_tm(ticks, &alrm->time);
148*4882a593Smuzhiyun ret = pm860x_reg_read(info->i2c, PM8607_RTC1);
149*4882a593Smuzhiyun alrm->enabled = (ret & ALARM_EN) ? 1 : 0;
150*4882a593Smuzhiyun alrm->pending = (ret & (ALARM | ALARM_WAKEUP)) ? 1 : 0;
151*4882a593Smuzhiyun return 0;
152*4882a593Smuzhiyun }
153*4882a593Smuzhiyun
pm860x_rtc_set_alarm(struct device * dev,struct rtc_wkalrm * alrm)154*4882a593Smuzhiyun static int pm860x_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
155*4882a593Smuzhiyun {
156*4882a593Smuzhiyun struct pm860x_rtc_info *info = dev_get_drvdata(dev);
157*4882a593Smuzhiyun unsigned long ticks, base, data;
158*4882a593Smuzhiyun unsigned char buf[8];
159*4882a593Smuzhiyun int mask;
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun pm860x_set_bits(info->i2c, PM8607_RTC1, ALARM_EN, 0);
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun pm860x_page_bulk_read(info->i2c, REG0_ADDR, 8, buf);
164*4882a593Smuzhiyun dev_dbg(info->dev, "%x-%x-%x-%x-%x-%x-%x-%x\n", buf[0], buf[1],
165*4882a593Smuzhiyun buf[2], buf[3], buf[4], buf[5], buf[6], buf[7]);
166*4882a593Smuzhiyun base = ((unsigned long)buf[1] << 24) | (buf[3] << 16) |
167*4882a593Smuzhiyun (buf[5] << 8) | buf[7];
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun ticks = rtc_tm_to_time64(&alrm->time);
170*4882a593Smuzhiyun data = ticks - base;
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun buf[0] = data & 0xff;
173*4882a593Smuzhiyun buf[1] = (data >> 8) & 0xff;
174*4882a593Smuzhiyun buf[2] = (data >> 16) & 0xff;
175*4882a593Smuzhiyun buf[3] = (data >> 24) & 0xff;
176*4882a593Smuzhiyun pm860x_bulk_write(info->i2c, PM8607_RTC_EXPIRE1, 4, buf);
177*4882a593Smuzhiyun if (alrm->enabled) {
178*4882a593Smuzhiyun mask = ALARM | ALARM_WAKEUP | ALARM_EN;
179*4882a593Smuzhiyun pm860x_set_bits(info->i2c, PM8607_RTC1, mask, mask);
180*4882a593Smuzhiyun } else {
181*4882a593Smuzhiyun mask = ALARM | ALARM_WAKEUP | ALARM_EN;
182*4882a593Smuzhiyun pm860x_set_bits(info->i2c, PM8607_RTC1, mask,
183*4882a593Smuzhiyun ALARM | ALARM_WAKEUP);
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun return 0;
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun static const struct rtc_class_ops pm860x_rtc_ops = {
189*4882a593Smuzhiyun .read_time = pm860x_rtc_read_time,
190*4882a593Smuzhiyun .set_time = pm860x_rtc_set_time,
191*4882a593Smuzhiyun .read_alarm = pm860x_rtc_read_alarm,
192*4882a593Smuzhiyun .set_alarm = pm860x_rtc_set_alarm,
193*4882a593Smuzhiyun .alarm_irq_enable = pm860x_rtc_alarm_irq_enable,
194*4882a593Smuzhiyun };
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun #ifdef VRTC_CALIBRATION
calibrate_vrtc_work(struct work_struct * work)197*4882a593Smuzhiyun static void calibrate_vrtc_work(struct work_struct *work)
198*4882a593Smuzhiyun {
199*4882a593Smuzhiyun struct pm860x_rtc_info *info = container_of(work,
200*4882a593Smuzhiyun struct pm860x_rtc_info, calib_work.work);
201*4882a593Smuzhiyun unsigned char buf[2];
202*4882a593Smuzhiyun unsigned int sum, data, mean, vrtc_set;
203*4882a593Smuzhiyun int i;
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun for (i = 0, sum = 0; i < 16; i++) {
206*4882a593Smuzhiyun msleep(100);
207*4882a593Smuzhiyun pm860x_bulk_read(info->i2c, REG_VRTC_MEAS1, 2, buf);
208*4882a593Smuzhiyun data = (buf[0] << 4) | buf[1];
209*4882a593Smuzhiyun data = (data * 5400) >> 12; /* convert to mv */
210*4882a593Smuzhiyun sum += data;
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun mean = sum >> 4;
213*4882a593Smuzhiyun vrtc_set = 2700 + (info->vrtc & 0x3) * 200;
214*4882a593Smuzhiyun dev_dbg(info->dev, "mean:%d, vrtc_set:%d\n", mean, vrtc_set);
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun sum = pm860x_reg_read(info->i2c, PM8607_RTC_MISC1);
217*4882a593Smuzhiyun data = sum & 0x3;
218*4882a593Smuzhiyun if ((mean + 200) < vrtc_set) {
219*4882a593Smuzhiyun /* try higher voltage */
220*4882a593Smuzhiyun if (++data == 4)
221*4882a593Smuzhiyun goto out;
222*4882a593Smuzhiyun data = (sum & 0xf8) | (data & 0x3);
223*4882a593Smuzhiyun pm860x_reg_write(info->i2c, PM8607_RTC_MISC1, data);
224*4882a593Smuzhiyun } else if ((mean - 200) > vrtc_set) {
225*4882a593Smuzhiyun /* try lower voltage */
226*4882a593Smuzhiyun if (data-- == 0)
227*4882a593Smuzhiyun goto out;
228*4882a593Smuzhiyun data = (sum & 0xf8) | (data & 0x3);
229*4882a593Smuzhiyun pm860x_reg_write(info->i2c, PM8607_RTC_MISC1, data);
230*4882a593Smuzhiyun } else
231*4882a593Smuzhiyun goto out;
232*4882a593Smuzhiyun dev_dbg(info->dev, "set 0x%x to RTC_MISC1\n", data);
233*4882a593Smuzhiyun /* trigger next calibration since VRTC is updated */
234*4882a593Smuzhiyun schedule_delayed_work(&info->calib_work, VRTC_CALIB_INTERVAL);
235*4882a593Smuzhiyun return;
236*4882a593Smuzhiyun out:
237*4882a593Smuzhiyun /* disable measurement */
238*4882a593Smuzhiyun pm860x_set_bits(info->i2c, PM8607_MEAS_EN2, MEAS2_VRTC, 0);
239*4882a593Smuzhiyun dev_dbg(info->dev, "finish VRTC calibration\n");
240*4882a593Smuzhiyun return;
241*4882a593Smuzhiyun }
242*4882a593Smuzhiyun #endif
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun #ifdef CONFIG_OF
pm860x_rtc_dt_init(struct platform_device * pdev,struct pm860x_rtc_info * info)245*4882a593Smuzhiyun static int pm860x_rtc_dt_init(struct platform_device *pdev,
246*4882a593Smuzhiyun struct pm860x_rtc_info *info)
247*4882a593Smuzhiyun {
248*4882a593Smuzhiyun struct device_node *np = pdev->dev.parent->of_node;
249*4882a593Smuzhiyun int ret;
250*4882a593Smuzhiyun if (!np)
251*4882a593Smuzhiyun return -ENODEV;
252*4882a593Smuzhiyun np = of_get_child_by_name(np, "rtc");
253*4882a593Smuzhiyun if (!np) {
254*4882a593Smuzhiyun dev_err(&pdev->dev, "failed to find rtc node\n");
255*4882a593Smuzhiyun return -ENODEV;
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun ret = of_property_read_u32(np, "marvell,88pm860x-vrtc", &info->vrtc);
258*4882a593Smuzhiyun if (ret)
259*4882a593Smuzhiyun info->vrtc = 0;
260*4882a593Smuzhiyun of_node_put(np);
261*4882a593Smuzhiyun return 0;
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun #else
264*4882a593Smuzhiyun #define pm860x_rtc_dt_init(x, y) do { } while (0)
265*4882a593Smuzhiyun #endif
266*4882a593Smuzhiyun
pm860x_rtc_probe(struct platform_device * pdev)267*4882a593Smuzhiyun static int pm860x_rtc_probe(struct platform_device *pdev)
268*4882a593Smuzhiyun {
269*4882a593Smuzhiyun struct pm860x_chip *chip = dev_get_drvdata(pdev->dev.parent);
270*4882a593Smuzhiyun struct pm860x_rtc_info *info;
271*4882a593Smuzhiyun int ret;
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun info = devm_kzalloc(&pdev->dev, sizeof(struct pm860x_rtc_info),
274*4882a593Smuzhiyun GFP_KERNEL);
275*4882a593Smuzhiyun if (!info)
276*4882a593Smuzhiyun return -ENOMEM;
277*4882a593Smuzhiyun info->irq = platform_get_irq(pdev, 0);
278*4882a593Smuzhiyun if (info->irq < 0)
279*4882a593Smuzhiyun return info->irq;
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun info->chip = chip;
282*4882a593Smuzhiyun info->i2c = (chip->id == CHIP_PM8607) ? chip->client : chip->companion;
283*4882a593Smuzhiyun info->dev = &pdev->dev;
284*4882a593Smuzhiyun dev_set_drvdata(&pdev->dev, info);
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun info->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
287*4882a593Smuzhiyun if (IS_ERR(info->rtc_dev))
288*4882a593Smuzhiyun return PTR_ERR(info->rtc_dev);
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun ret = devm_request_threaded_irq(&pdev->dev, info->irq, NULL,
291*4882a593Smuzhiyun rtc_update_handler, IRQF_ONESHOT, "rtc",
292*4882a593Smuzhiyun info);
293*4882a593Smuzhiyun if (ret < 0) {
294*4882a593Smuzhiyun dev_err(chip->dev, "Failed to request IRQ: #%d: %d\n",
295*4882a593Smuzhiyun info->irq, ret);
296*4882a593Smuzhiyun return ret;
297*4882a593Smuzhiyun }
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun /* set addresses of 32-bit base value for RTC time */
300*4882a593Smuzhiyun pm860x_page_reg_write(info->i2c, REG0_ADDR, REG0_DATA);
301*4882a593Smuzhiyun pm860x_page_reg_write(info->i2c, REG1_ADDR, REG1_DATA);
302*4882a593Smuzhiyun pm860x_page_reg_write(info->i2c, REG2_ADDR, REG2_DATA);
303*4882a593Smuzhiyun pm860x_page_reg_write(info->i2c, REG3_ADDR, REG3_DATA);
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun pm860x_rtc_dt_init(pdev, info);
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun info->rtc_dev->ops = &pm860x_rtc_ops;
308*4882a593Smuzhiyun info->rtc_dev->range_max = U32_MAX;
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun ret = rtc_register_device(info->rtc_dev);
311*4882a593Smuzhiyun if (ret)
312*4882a593Smuzhiyun return ret;
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun /*
315*4882a593Smuzhiyun * enable internal XO instead of internal 3.25MHz clock since it can
316*4882a593Smuzhiyun * free running in PMIC power-down state.
317*4882a593Smuzhiyun */
318*4882a593Smuzhiyun pm860x_set_bits(info->i2c, PM8607_RTC1, RTC1_USE_XO, RTC1_USE_XO);
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun #ifdef VRTC_CALIBRATION
321*4882a593Smuzhiyun /* <00> -- 2.7V, <01> -- 2.9V, <10> -- 3.1V, <11> -- 3.3V */
322*4882a593Smuzhiyun pm860x_set_bits(info->i2c, PM8607_MEAS_EN2, MEAS2_VRTC, MEAS2_VRTC);
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun /* calibrate VRTC */
325*4882a593Smuzhiyun INIT_DELAYED_WORK(&info->calib_work, calibrate_vrtc_work);
326*4882a593Smuzhiyun schedule_delayed_work(&info->calib_work, VRTC_CALIB_INTERVAL);
327*4882a593Smuzhiyun #endif /* VRTC_CALIBRATION */
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun device_init_wakeup(&pdev->dev, 1);
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun return 0;
332*4882a593Smuzhiyun }
333*4882a593Smuzhiyun
pm860x_rtc_remove(struct platform_device * pdev)334*4882a593Smuzhiyun static int pm860x_rtc_remove(struct platform_device *pdev)
335*4882a593Smuzhiyun {
336*4882a593Smuzhiyun struct pm860x_rtc_info *info = platform_get_drvdata(pdev);
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun #ifdef VRTC_CALIBRATION
339*4882a593Smuzhiyun cancel_delayed_work_sync(&info->calib_work);
340*4882a593Smuzhiyun /* disable measurement */
341*4882a593Smuzhiyun pm860x_set_bits(info->i2c, PM8607_MEAS_EN2, MEAS2_VRTC, 0);
342*4882a593Smuzhiyun #endif /* VRTC_CALIBRATION */
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun return 0;
345*4882a593Smuzhiyun }
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
pm860x_rtc_suspend(struct device * dev)348*4882a593Smuzhiyun static int pm860x_rtc_suspend(struct device *dev)
349*4882a593Smuzhiyun {
350*4882a593Smuzhiyun struct platform_device *pdev = to_platform_device(dev);
351*4882a593Smuzhiyun struct pm860x_chip *chip = dev_get_drvdata(pdev->dev.parent);
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun if (device_may_wakeup(dev))
354*4882a593Smuzhiyun chip->wakeup_flag |= 1 << PM8607_IRQ_RTC;
355*4882a593Smuzhiyun return 0;
356*4882a593Smuzhiyun }
pm860x_rtc_resume(struct device * dev)357*4882a593Smuzhiyun static int pm860x_rtc_resume(struct device *dev)
358*4882a593Smuzhiyun {
359*4882a593Smuzhiyun struct platform_device *pdev = to_platform_device(dev);
360*4882a593Smuzhiyun struct pm860x_chip *chip = dev_get_drvdata(pdev->dev.parent);
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun if (device_may_wakeup(dev))
363*4882a593Smuzhiyun chip->wakeup_flag &= ~(1 << PM8607_IRQ_RTC);
364*4882a593Smuzhiyun return 0;
365*4882a593Smuzhiyun }
366*4882a593Smuzhiyun #endif
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(pm860x_rtc_pm_ops, pm860x_rtc_suspend, pm860x_rtc_resume);
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun static struct platform_driver pm860x_rtc_driver = {
371*4882a593Smuzhiyun .driver = {
372*4882a593Smuzhiyun .name = "88pm860x-rtc",
373*4882a593Smuzhiyun .pm = &pm860x_rtc_pm_ops,
374*4882a593Smuzhiyun },
375*4882a593Smuzhiyun .probe = pm860x_rtc_probe,
376*4882a593Smuzhiyun .remove = pm860x_rtc_remove,
377*4882a593Smuzhiyun };
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun module_platform_driver(pm860x_rtc_driver);
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun MODULE_DESCRIPTION("Marvell 88PM860x RTC driver");
382*4882a593Smuzhiyun MODULE_AUTHOR("Haojian Zhuang <haojian.zhuang@marvell.com>");
383*4882a593Smuzhiyun MODULE_LICENSE("GPL");
384