xref: /OK3568_Linux_fs/kernel/drivers/rtc/rtc-88pm80x.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Real Time Clock driver for Marvell 88PM80x PMIC
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2012 Marvell International Ltd.
6*4882a593Smuzhiyun  *  Wenzeng Chen<wzch@marvell.com>
7*4882a593Smuzhiyun  *  Qiao Zhou <zhouqiao@marvell.com>
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/slab.h>
13*4882a593Smuzhiyun #include <linux/regmap.h>
14*4882a593Smuzhiyun #include <linux/mfd/core.h>
15*4882a593Smuzhiyun #include <linux/mfd/88pm80x.h>
16*4882a593Smuzhiyun #include <linux/rtc.h>
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #define PM800_RTC_COUNTER1		(0xD1)
19*4882a593Smuzhiyun #define PM800_RTC_COUNTER2		(0xD2)
20*4882a593Smuzhiyun #define PM800_RTC_COUNTER3		(0xD3)
21*4882a593Smuzhiyun #define PM800_RTC_COUNTER4		(0xD4)
22*4882a593Smuzhiyun #define PM800_RTC_EXPIRE1_1		(0xD5)
23*4882a593Smuzhiyun #define PM800_RTC_EXPIRE1_2		(0xD6)
24*4882a593Smuzhiyun #define PM800_RTC_EXPIRE1_3		(0xD7)
25*4882a593Smuzhiyun #define PM800_RTC_EXPIRE1_4		(0xD8)
26*4882a593Smuzhiyun #define PM800_RTC_TRIM1			(0xD9)
27*4882a593Smuzhiyun #define PM800_RTC_TRIM2			(0xDA)
28*4882a593Smuzhiyun #define PM800_RTC_TRIM3			(0xDB)
29*4882a593Smuzhiyun #define PM800_RTC_TRIM4			(0xDC)
30*4882a593Smuzhiyun #define PM800_RTC_EXPIRE2_1		(0xDD)
31*4882a593Smuzhiyun #define PM800_RTC_EXPIRE2_2		(0xDE)
32*4882a593Smuzhiyun #define PM800_RTC_EXPIRE2_3		(0xDF)
33*4882a593Smuzhiyun #define PM800_RTC_EXPIRE2_4		(0xE0)
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #define PM800_POWER_DOWN_LOG1	(0xE5)
36*4882a593Smuzhiyun #define PM800_POWER_DOWN_LOG2	(0xE6)
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun struct pm80x_rtc_info {
39*4882a593Smuzhiyun 	struct pm80x_chip *chip;
40*4882a593Smuzhiyun 	struct regmap *map;
41*4882a593Smuzhiyun 	struct rtc_device *rtc_dev;
42*4882a593Smuzhiyun 	struct device *dev;
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun 	int irq;
45*4882a593Smuzhiyun };
46*4882a593Smuzhiyun 
rtc_update_handler(int irq,void * data)47*4882a593Smuzhiyun static irqreturn_t rtc_update_handler(int irq, void *data)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun 	struct pm80x_rtc_info *info = (struct pm80x_rtc_info *)data;
50*4882a593Smuzhiyun 	int mask;
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun 	mask = PM800_ALARM | PM800_ALARM_WAKEUP;
53*4882a593Smuzhiyun 	regmap_update_bits(info->map, PM800_RTC_CONTROL, mask | PM800_ALARM1_EN,
54*4882a593Smuzhiyun 			   mask);
55*4882a593Smuzhiyun 	rtc_update_irq(info->rtc_dev, 1, RTC_AF);
56*4882a593Smuzhiyun 	return IRQ_HANDLED;
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun 
pm80x_rtc_alarm_irq_enable(struct device * dev,unsigned int enabled)59*4882a593Smuzhiyun static int pm80x_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun 	struct pm80x_rtc_info *info = dev_get_drvdata(dev);
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun 	if (enabled)
64*4882a593Smuzhiyun 		regmap_update_bits(info->map, PM800_RTC_CONTROL,
65*4882a593Smuzhiyun 				   PM800_ALARM1_EN, PM800_ALARM1_EN);
66*4882a593Smuzhiyun 	else
67*4882a593Smuzhiyun 		regmap_update_bits(info->map, PM800_RTC_CONTROL,
68*4882a593Smuzhiyun 				   PM800_ALARM1_EN, 0);
69*4882a593Smuzhiyun 	return 0;
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun /*
73*4882a593Smuzhiyun  * Calculate the next alarm time given the requested alarm time mask
74*4882a593Smuzhiyun  * and the current time.
75*4882a593Smuzhiyun  */
rtc_next_alarm_time(struct rtc_time * next,struct rtc_time * now,struct rtc_time * alrm)76*4882a593Smuzhiyun static void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now,
77*4882a593Smuzhiyun 				struct rtc_time *alrm)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun 	unsigned long next_time;
80*4882a593Smuzhiyun 	unsigned long now_time;
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	next->tm_year = now->tm_year;
83*4882a593Smuzhiyun 	next->tm_mon = now->tm_mon;
84*4882a593Smuzhiyun 	next->tm_mday = now->tm_mday;
85*4882a593Smuzhiyun 	next->tm_hour = alrm->tm_hour;
86*4882a593Smuzhiyun 	next->tm_min = alrm->tm_min;
87*4882a593Smuzhiyun 	next->tm_sec = alrm->tm_sec;
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun 	now_time = rtc_tm_to_time64(now);
90*4882a593Smuzhiyun 	next_time = rtc_tm_to_time64(next);
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	if (next_time < now_time) {
93*4882a593Smuzhiyun 		/* Advance one day */
94*4882a593Smuzhiyun 		next_time += 60 * 60 * 24;
95*4882a593Smuzhiyun 		rtc_time64_to_tm(next_time, next);
96*4882a593Smuzhiyun 	}
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun 
pm80x_rtc_read_time(struct device * dev,struct rtc_time * tm)99*4882a593Smuzhiyun static int pm80x_rtc_read_time(struct device *dev, struct rtc_time *tm)
100*4882a593Smuzhiyun {
101*4882a593Smuzhiyun 	struct pm80x_rtc_info *info = dev_get_drvdata(dev);
102*4882a593Smuzhiyun 	unsigned char buf[4];
103*4882a593Smuzhiyun 	unsigned long ticks, base, data;
104*4882a593Smuzhiyun 	regmap_raw_read(info->map, PM800_RTC_EXPIRE2_1, buf, 4);
105*4882a593Smuzhiyun 	base = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
106*4882a593Smuzhiyun 		(buf[1] << 8) | buf[0];
107*4882a593Smuzhiyun 	dev_dbg(info->dev, "%x-%x-%x-%x\n", buf[0], buf[1], buf[2], buf[3]);
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 	/* load 32-bit read-only counter */
110*4882a593Smuzhiyun 	regmap_raw_read(info->map, PM800_RTC_COUNTER1, buf, 4);
111*4882a593Smuzhiyun 	data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
112*4882a593Smuzhiyun 		(buf[1] << 8) | buf[0];
113*4882a593Smuzhiyun 	ticks = base + data;
114*4882a593Smuzhiyun 	dev_dbg(info->dev, "get base:0x%lx, RO count:0x%lx, ticks:0x%lx\n",
115*4882a593Smuzhiyun 		base, data, ticks);
116*4882a593Smuzhiyun 	rtc_time64_to_tm(ticks, tm);
117*4882a593Smuzhiyun 	return 0;
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun 
pm80x_rtc_set_time(struct device * dev,struct rtc_time * tm)120*4882a593Smuzhiyun static int pm80x_rtc_set_time(struct device *dev, struct rtc_time *tm)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun 	struct pm80x_rtc_info *info = dev_get_drvdata(dev);
123*4882a593Smuzhiyun 	unsigned char buf[4];
124*4882a593Smuzhiyun 	unsigned long ticks, base, data;
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	ticks = rtc_tm_to_time64(tm);
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	/* load 32-bit read-only counter */
129*4882a593Smuzhiyun 	regmap_raw_read(info->map, PM800_RTC_COUNTER1, buf, 4);
130*4882a593Smuzhiyun 	data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
131*4882a593Smuzhiyun 		(buf[1] << 8) | buf[0];
132*4882a593Smuzhiyun 	base = ticks - data;
133*4882a593Smuzhiyun 	dev_dbg(info->dev, "set base:0x%lx, RO count:0x%lx, ticks:0x%lx\n",
134*4882a593Smuzhiyun 		base, data, ticks);
135*4882a593Smuzhiyun 	buf[0] = base & 0xFF;
136*4882a593Smuzhiyun 	buf[1] = (base >> 8) & 0xFF;
137*4882a593Smuzhiyun 	buf[2] = (base >> 16) & 0xFF;
138*4882a593Smuzhiyun 	buf[3] = (base >> 24) & 0xFF;
139*4882a593Smuzhiyun 	regmap_raw_write(info->map, PM800_RTC_EXPIRE2_1, buf, 4);
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun 	return 0;
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun 
pm80x_rtc_read_alarm(struct device * dev,struct rtc_wkalrm * alrm)144*4882a593Smuzhiyun static int pm80x_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
145*4882a593Smuzhiyun {
146*4882a593Smuzhiyun 	struct pm80x_rtc_info *info = dev_get_drvdata(dev);
147*4882a593Smuzhiyun 	unsigned char buf[4];
148*4882a593Smuzhiyun 	unsigned long ticks, base, data;
149*4882a593Smuzhiyun 	int ret;
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	regmap_raw_read(info->map, PM800_RTC_EXPIRE2_1, buf, 4);
152*4882a593Smuzhiyun 	base = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
153*4882a593Smuzhiyun 		(buf[1] << 8) | buf[0];
154*4882a593Smuzhiyun 	dev_dbg(info->dev, "%x-%x-%x-%x\n", buf[0], buf[1], buf[2], buf[3]);
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	regmap_raw_read(info->map, PM800_RTC_EXPIRE1_1, buf, 4);
157*4882a593Smuzhiyun 	data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
158*4882a593Smuzhiyun 		(buf[1] << 8) | buf[0];
159*4882a593Smuzhiyun 	ticks = base + data;
160*4882a593Smuzhiyun 	dev_dbg(info->dev, "get base:0x%lx, RO count:0x%lx, ticks:0x%lx\n",
161*4882a593Smuzhiyun 		base, data, ticks);
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	rtc_time64_to_tm(ticks, &alrm->time);
164*4882a593Smuzhiyun 	regmap_read(info->map, PM800_RTC_CONTROL, &ret);
165*4882a593Smuzhiyun 	alrm->enabled = (ret & PM800_ALARM1_EN) ? 1 : 0;
166*4882a593Smuzhiyun 	alrm->pending = (ret & (PM800_ALARM | PM800_ALARM_WAKEUP)) ? 1 : 0;
167*4882a593Smuzhiyun 	return 0;
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun 
pm80x_rtc_set_alarm(struct device * dev,struct rtc_wkalrm * alrm)170*4882a593Smuzhiyun static int pm80x_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
171*4882a593Smuzhiyun {
172*4882a593Smuzhiyun 	struct pm80x_rtc_info *info = dev_get_drvdata(dev);
173*4882a593Smuzhiyun 	struct rtc_time now_tm, alarm_tm;
174*4882a593Smuzhiyun 	unsigned long ticks, base, data;
175*4882a593Smuzhiyun 	unsigned char buf[4];
176*4882a593Smuzhiyun 	int mask;
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun 	regmap_update_bits(info->map, PM800_RTC_CONTROL, PM800_ALARM1_EN, 0);
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 	regmap_raw_read(info->map, PM800_RTC_EXPIRE2_1, buf, 4);
181*4882a593Smuzhiyun 	base = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
182*4882a593Smuzhiyun 		(buf[1] << 8) | buf[0];
183*4882a593Smuzhiyun 	dev_dbg(info->dev, "%x-%x-%x-%x\n", buf[0], buf[1], buf[2], buf[3]);
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	/* load 32-bit read-only counter */
186*4882a593Smuzhiyun 	regmap_raw_read(info->map, PM800_RTC_COUNTER1, buf, 4);
187*4882a593Smuzhiyun 	data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
188*4882a593Smuzhiyun 		(buf[1] << 8) | buf[0];
189*4882a593Smuzhiyun 	ticks = base + data;
190*4882a593Smuzhiyun 	dev_dbg(info->dev, "get base:0x%lx, RO count:0x%lx, ticks:0x%lx\n",
191*4882a593Smuzhiyun 		base, data, ticks);
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	rtc_time64_to_tm(ticks, &now_tm);
194*4882a593Smuzhiyun 	dev_dbg(info->dev, "%s, now time : %lu\n", __func__, ticks);
195*4882a593Smuzhiyun 	rtc_next_alarm_time(&alarm_tm, &now_tm, &alrm->time);
196*4882a593Smuzhiyun 	/* get new ticks for alarm in 24 hours */
197*4882a593Smuzhiyun 	ticks = rtc_tm_to_time64(&alarm_tm);
198*4882a593Smuzhiyun 	dev_dbg(info->dev, "%s, alarm time: %lu\n", __func__, ticks);
199*4882a593Smuzhiyun 	data = ticks - base;
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	buf[0] = data & 0xff;
202*4882a593Smuzhiyun 	buf[1] = (data >> 8) & 0xff;
203*4882a593Smuzhiyun 	buf[2] = (data >> 16) & 0xff;
204*4882a593Smuzhiyun 	buf[3] = (data >> 24) & 0xff;
205*4882a593Smuzhiyun 	regmap_raw_write(info->map, PM800_RTC_EXPIRE1_1, buf, 4);
206*4882a593Smuzhiyun 	if (alrm->enabled) {
207*4882a593Smuzhiyun 		mask = PM800_ALARM | PM800_ALARM_WAKEUP | PM800_ALARM1_EN;
208*4882a593Smuzhiyun 		regmap_update_bits(info->map, PM800_RTC_CONTROL, mask, mask);
209*4882a593Smuzhiyun 	} else {
210*4882a593Smuzhiyun 		mask = PM800_ALARM | PM800_ALARM_WAKEUP | PM800_ALARM1_EN;
211*4882a593Smuzhiyun 		regmap_update_bits(info->map, PM800_RTC_CONTROL, mask,
212*4882a593Smuzhiyun 				   PM800_ALARM | PM800_ALARM_WAKEUP);
213*4882a593Smuzhiyun 	}
214*4882a593Smuzhiyun 	return 0;
215*4882a593Smuzhiyun }
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun static const struct rtc_class_ops pm80x_rtc_ops = {
218*4882a593Smuzhiyun 	.read_time = pm80x_rtc_read_time,
219*4882a593Smuzhiyun 	.set_time = pm80x_rtc_set_time,
220*4882a593Smuzhiyun 	.read_alarm = pm80x_rtc_read_alarm,
221*4882a593Smuzhiyun 	.set_alarm = pm80x_rtc_set_alarm,
222*4882a593Smuzhiyun 	.alarm_irq_enable = pm80x_rtc_alarm_irq_enable,
223*4882a593Smuzhiyun };
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
pm80x_rtc_suspend(struct device * dev)226*4882a593Smuzhiyun static int pm80x_rtc_suspend(struct device *dev)
227*4882a593Smuzhiyun {
228*4882a593Smuzhiyun 	return pm80x_dev_suspend(dev);
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun 
pm80x_rtc_resume(struct device * dev)231*4882a593Smuzhiyun static int pm80x_rtc_resume(struct device *dev)
232*4882a593Smuzhiyun {
233*4882a593Smuzhiyun 	return pm80x_dev_resume(dev);
234*4882a593Smuzhiyun }
235*4882a593Smuzhiyun #endif
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(pm80x_rtc_pm_ops, pm80x_rtc_suspend, pm80x_rtc_resume);
238*4882a593Smuzhiyun 
pm80x_rtc_probe(struct platform_device * pdev)239*4882a593Smuzhiyun static int pm80x_rtc_probe(struct platform_device *pdev)
240*4882a593Smuzhiyun {
241*4882a593Smuzhiyun 	struct pm80x_chip *chip = dev_get_drvdata(pdev->dev.parent);
242*4882a593Smuzhiyun 	struct pm80x_rtc_pdata *pdata = dev_get_platdata(&pdev->dev);
243*4882a593Smuzhiyun 	struct pm80x_rtc_info *info;
244*4882a593Smuzhiyun 	struct device_node *node = pdev->dev.of_node;
245*4882a593Smuzhiyun 	int ret;
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 	if (!pdata && !node) {
248*4882a593Smuzhiyun 		dev_err(&pdev->dev,
249*4882a593Smuzhiyun 			"pm80x-rtc requires platform data or of_node\n");
250*4882a593Smuzhiyun 		return -EINVAL;
251*4882a593Smuzhiyun 	}
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	if (!pdata) {
254*4882a593Smuzhiyun 		pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
255*4882a593Smuzhiyun 		if (!pdata) {
256*4882a593Smuzhiyun 			dev_err(&pdev->dev, "failed to allocate memory\n");
257*4882a593Smuzhiyun 			return -ENOMEM;
258*4882a593Smuzhiyun 		}
259*4882a593Smuzhiyun 	}
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun 	info =
262*4882a593Smuzhiyun 	    devm_kzalloc(&pdev->dev, sizeof(struct pm80x_rtc_info), GFP_KERNEL);
263*4882a593Smuzhiyun 	if (!info)
264*4882a593Smuzhiyun 		return -ENOMEM;
265*4882a593Smuzhiyun 	info->irq = platform_get_irq(pdev, 0);
266*4882a593Smuzhiyun 	if (info->irq < 0) {
267*4882a593Smuzhiyun 		ret = -EINVAL;
268*4882a593Smuzhiyun 		goto out;
269*4882a593Smuzhiyun 	}
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 	info->chip = chip;
272*4882a593Smuzhiyun 	info->map = chip->regmap;
273*4882a593Smuzhiyun 	if (!info->map) {
274*4882a593Smuzhiyun 		dev_err(&pdev->dev, "no regmap!\n");
275*4882a593Smuzhiyun 		ret = -EINVAL;
276*4882a593Smuzhiyun 		goto out;
277*4882a593Smuzhiyun 	}
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun 	info->dev = &pdev->dev;
280*4882a593Smuzhiyun 	dev_set_drvdata(&pdev->dev, info);
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 	info->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
283*4882a593Smuzhiyun 	if (IS_ERR(info->rtc_dev))
284*4882a593Smuzhiyun 		return PTR_ERR(info->rtc_dev);
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun 	ret = pm80x_request_irq(chip, info->irq, rtc_update_handler,
287*4882a593Smuzhiyun 				IRQF_ONESHOT, "rtc", info);
288*4882a593Smuzhiyun 	if (ret < 0) {
289*4882a593Smuzhiyun 		dev_err(chip->dev, "Failed to request IRQ: #%d: %d\n",
290*4882a593Smuzhiyun 			info->irq, ret);
291*4882a593Smuzhiyun 		goto out;
292*4882a593Smuzhiyun 	}
293*4882a593Smuzhiyun 
294*4882a593Smuzhiyun 	info->rtc_dev->ops = &pm80x_rtc_ops;
295*4882a593Smuzhiyun 	info->rtc_dev->range_max = U32_MAX;
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 	ret = rtc_register_device(info->rtc_dev);
298*4882a593Smuzhiyun 	if (ret)
299*4882a593Smuzhiyun 		goto out_rtc;
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun 	/*
302*4882a593Smuzhiyun 	 * enable internal XO instead of internal 3.25MHz clock since it can
303*4882a593Smuzhiyun 	 * free running in PMIC power-down state.
304*4882a593Smuzhiyun 	 */
305*4882a593Smuzhiyun 	regmap_update_bits(info->map, PM800_RTC_CONTROL, PM800_RTC1_USE_XO,
306*4882a593Smuzhiyun 			   PM800_RTC1_USE_XO);
307*4882a593Smuzhiyun 
308*4882a593Smuzhiyun 	/* remember whether this power up is caused by PMIC RTC or not */
309*4882a593Smuzhiyun 	info->rtc_dev->dev.platform_data = &pdata->rtc_wakeup;
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun 	device_init_wakeup(&pdev->dev, 1);
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	return 0;
314*4882a593Smuzhiyun out_rtc:
315*4882a593Smuzhiyun 	pm80x_free_irq(chip, info->irq, info);
316*4882a593Smuzhiyun out:
317*4882a593Smuzhiyun 	return ret;
318*4882a593Smuzhiyun }
319*4882a593Smuzhiyun 
pm80x_rtc_remove(struct platform_device * pdev)320*4882a593Smuzhiyun static int pm80x_rtc_remove(struct platform_device *pdev)
321*4882a593Smuzhiyun {
322*4882a593Smuzhiyun 	struct pm80x_rtc_info *info = platform_get_drvdata(pdev);
323*4882a593Smuzhiyun 	pm80x_free_irq(info->chip, info->irq, info);
324*4882a593Smuzhiyun 	return 0;
325*4882a593Smuzhiyun }
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun static struct platform_driver pm80x_rtc_driver = {
328*4882a593Smuzhiyun 	.driver = {
329*4882a593Smuzhiyun 		   .name = "88pm80x-rtc",
330*4882a593Smuzhiyun 		   .pm = &pm80x_rtc_pm_ops,
331*4882a593Smuzhiyun 		   },
332*4882a593Smuzhiyun 	.probe = pm80x_rtc_probe,
333*4882a593Smuzhiyun 	.remove = pm80x_rtc_remove,
334*4882a593Smuzhiyun };
335*4882a593Smuzhiyun 
336*4882a593Smuzhiyun module_platform_driver(pm80x_rtc_driver);
337*4882a593Smuzhiyun 
338*4882a593Smuzhiyun MODULE_LICENSE("GPL");
339*4882a593Smuzhiyun MODULE_DESCRIPTION("Marvell 88PM80x RTC driver");
340*4882a593Smuzhiyun MODULE_AUTHOR("Qiao Zhou <zhouqiao@marvell.com>");
341*4882a593Smuzhiyun MODULE_ALIAS("platform:88pm80x-rtc");
342