1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2015, Sony Mobile Communications AB.
4*4882a593Smuzhiyun * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <linux/interrupt.h>
8*4882a593Smuzhiyun #include <linux/io.h>
9*4882a593Smuzhiyun #include <linux/mailbox_client.h>
10*4882a593Smuzhiyun #include <linux/mfd/syscon.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/of_irq.h>
13*4882a593Smuzhiyun #include <linux/of_platform.h>
14*4882a593Smuzhiyun #include <linux/platform_device.h>
15*4882a593Smuzhiyun #include <linux/regmap.h>
16*4882a593Smuzhiyun #include <linux/sched.h>
17*4882a593Smuzhiyun #include <linux/sizes.h>
18*4882a593Smuzhiyun #include <linux/slab.h>
19*4882a593Smuzhiyun #include <linux/soc/qcom/smem.h>
20*4882a593Smuzhiyun #include <linux/wait.h>
21*4882a593Smuzhiyun #include <linux/rpmsg.h>
22*4882a593Smuzhiyun #include <linux/rpmsg/qcom_smd.h>
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #include "rpmsg_internal.h"
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun /*
27*4882a593Smuzhiyun * The Qualcomm Shared Memory communication solution provides point-to-point
28*4882a593Smuzhiyun * channels for clients to send and receive streaming or packet based data.
29*4882a593Smuzhiyun *
30*4882a593Smuzhiyun * Each channel consists of a control item (channel info) and a ring buffer
31*4882a593Smuzhiyun * pair. The channel info carry information related to channel state, flow
32*4882a593Smuzhiyun * control and the offsets within the ring buffer.
33*4882a593Smuzhiyun *
34*4882a593Smuzhiyun * All allocated channels are listed in an allocation table, identifying the
35*4882a593Smuzhiyun * pair of items by name, type and remote processor.
36*4882a593Smuzhiyun *
37*4882a593Smuzhiyun * Upon creating a new channel the remote processor allocates channel info and
38*4882a593Smuzhiyun * ring buffer items from the smem heap and populate the allocation table. An
39*4882a593Smuzhiyun * interrupt is sent to the other end of the channel and a scan for new
40*4882a593Smuzhiyun * channels should be done. A channel never goes away, it will only change
41*4882a593Smuzhiyun * state.
42*4882a593Smuzhiyun *
43*4882a593Smuzhiyun * The remote processor signals it intent for bring up the communication
44*4882a593Smuzhiyun * channel by setting the state of its end of the channel to "opening" and
45*4882a593Smuzhiyun * sends out an interrupt. We detect this change and register a smd device to
46*4882a593Smuzhiyun * consume the channel. Upon finding a consumer we finish the handshake and the
47*4882a593Smuzhiyun * channel is up.
48*4882a593Smuzhiyun *
49*4882a593Smuzhiyun * Upon closing a channel, the remote processor will update the state of its
50*4882a593Smuzhiyun * end of the channel and signal us, we will then unregister any attached
51*4882a593Smuzhiyun * device and close our end of the channel.
52*4882a593Smuzhiyun *
53*4882a593Smuzhiyun * Devices attached to a channel can use the qcom_smd_send function to push
54*4882a593Smuzhiyun * data to the channel, this is done by copying the data into the tx ring
55*4882a593Smuzhiyun * buffer, updating the pointers in the channel info and signaling the remote
56*4882a593Smuzhiyun * processor.
57*4882a593Smuzhiyun *
58*4882a593Smuzhiyun * The remote processor does the equivalent when it transfer data and upon
59*4882a593Smuzhiyun * receiving the interrupt we check the channel info for new data and delivers
60*4882a593Smuzhiyun * this to the attached device. If the device is not ready to receive the data
61*4882a593Smuzhiyun * we leave it in the ring buffer for now.
62*4882a593Smuzhiyun */
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun struct smd_channel_info;
65*4882a593Smuzhiyun struct smd_channel_info_pair;
66*4882a593Smuzhiyun struct smd_channel_info_word;
67*4882a593Smuzhiyun struct smd_channel_info_word_pair;
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun static const struct rpmsg_endpoint_ops qcom_smd_endpoint_ops;
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun #define SMD_ALLOC_TBL_COUNT 2
72*4882a593Smuzhiyun #define SMD_ALLOC_TBL_SIZE 64
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun /*
75*4882a593Smuzhiyun * This lists the various smem heap items relevant for the allocation table and
76*4882a593Smuzhiyun * smd channel entries.
77*4882a593Smuzhiyun */
78*4882a593Smuzhiyun static const struct {
79*4882a593Smuzhiyun unsigned alloc_tbl_id;
80*4882a593Smuzhiyun unsigned info_base_id;
81*4882a593Smuzhiyun unsigned fifo_base_id;
82*4882a593Smuzhiyun } smem_items[SMD_ALLOC_TBL_COUNT] = {
83*4882a593Smuzhiyun {
84*4882a593Smuzhiyun .alloc_tbl_id = 13,
85*4882a593Smuzhiyun .info_base_id = 14,
86*4882a593Smuzhiyun .fifo_base_id = 338
87*4882a593Smuzhiyun },
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun .alloc_tbl_id = 266,
90*4882a593Smuzhiyun .info_base_id = 138,
91*4882a593Smuzhiyun .fifo_base_id = 202,
92*4882a593Smuzhiyun },
93*4882a593Smuzhiyun };
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun /**
96*4882a593Smuzhiyun * struct qcom_smd_edge - representing a remote processor
97*4882a593Smuzhiyun * @dev: device associated with this edge
98*4882a593Smuzhiyun * @name: name of this edge
99*4882a593Smuzhiyun * @of_node: of_node handle for information related to this edge
100*4882a593Smuzhiyun * @edge_id: identifier of this edge
101*4882a593Smuzhiyun * @remote_pid: identifier of remote processor
102*4882a593Smuzhiyun * @irq: interrupt for signals on this edge
103*4882a593Smuzhiyun * @ipc_regmap: regmap handle holding the outgoing ipc register
104*4882a593Smuzhiyun * @ipc_offset: offset within @ipc_regmap of the register for ipc
105*4882a593Smuzhiyun * @ipc_bit: bit in the register at @ipc_offset of @ipc_regmap
106*4882a593Smuzhiyun * @mbox_client: mailbox client handle
107*4882a593Smuzhiyun * @mbox_chan: apcs ipc mailbox channel handle
108*4882a593Smuzhiyun * @channels: list of all channels detected on this edge
109*4882a593Smuzhiyun * @channels_lock: guard for modifications of @channels
110*4882a593Smuzhiyun * @allocated: array of bitmaps representing already allocated channels
111*4882a593Smuzhiyun * @smem_available: last available amount of smem triggering a channel scan
112*4882a593Smuzhiyun * @new_channel_event: wait queue for new channel events
113*4882a593Smuzhiyun * @scan_work: work item for discovering new channels
114*4882a593Smuzhiyun * @state_work: work item for edge state changes
115*4882a593Smuzhiyun */
116*4882a593Smuzhiyun struct qcom_smd_edge {
117*4882a593Smuzhiyun struct device dev;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun const char *name;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun struct device_node *of_node;
122*4882a593Smuzhiyun unsigned edge_id;
123*4882a593Smuzhiyun unsigned remote_pid;
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun int irq;
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun struct regmap *ipc_regmap;
128*4882a593Smuzhiyun int ipc_offset;
129*4882a593Smuzhiyun int ipc_bit;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun struct mbox_client mbox_client;
132*4882a593Smuzhiyun struct mbox_chan *mbox_chan;
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun struct list_head channels;
135*4882a593Smuzhiyun spinlock_t channels_lock;
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun DECLARE_BITMAP(allocated[SMD_ALLOC_TBL_COUNT], SMD_ALLOC_TBL_SIZE);
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun unsigned smem_available;
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun wait_queue_head_t new_channel_event;
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun struct work_struct scan_work;
144*4882a593Smuzhiyun struct work_struct state_work;
145*4882a593Smuzhiyun };
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun /*
148*4882a593Smuzhiyun * SMD channel states.
149*4882a593Smuzhiyun */
150*4882a593Smuzhiyun enum smd_channel_state {
151*4882a593Smuzhiyun SMD_CHANNEL_CLOSED,
152*4882a593Smuzhiyun SMD_CHANNEL_OPENING,
153*4882a593Smuzhiyun SMD_CHANNEL_OPENED,
154*4882a593Smuzhiyun SMD_CHANNEL_FLUSHING,
155*4882a593Smuzhiyun SMD_CHANNEL_CLOSING,
156*4882a593Smuzhiyun SMD_CHANNEL_RESET,
157*4882a593Smuzhiyun SMD_CHANNEL_RESET_OPENING
158*4882a593Smuzhiyun };
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun struct qcom_smd_device {
161*4882a593Smuzhiyun struct rpmsg_device rpdev;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun struct qcom_smd_edge *edge;
164*4882a593Smuzhiyun };
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun struct qcom_smd_endpoint {
167*4882a593Smuzhiyun struct rpmsg_endpoint ept;
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun struct qcom_smd_channel *qsch;
170*4882a593Smuzhiyun };
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun #define to_smd_device(r) container_of(r, struct qcom_smd_device, rpdev)
173*4882a593Smuzhiyun #define to_smd_edge(d) container_of(d, struct qcom_smd_edge, dev)
174*4882a593Smuzhiyun #define to_smd_endpoint(e) container_of(e, struct qcom_smd_endpoint, ept)
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun /**
177*4882a593Smuzhiyun * struct qcom_smd_channel - smd channel struct
178*4882a593Smuzhiyun * @edge: qcom_smd_edge this channel is living on
179*4882a593Smuzhiyun * @qsept: reference to a associated smd endpoint
180*4882a593Smuzhiyun * @registered: flag to indicate if the channel is registered
181*4882a593Smuzhiyun * @name: name of the channel
182*4882a593Smuzhiyun * @state: local state of the channel
183*4882a593Smuzhiyun * @remote_state: remote state of the channel
184*4882a593Smuzhiyun * @state_change_event: state change event
185*4882a593Smuzhiyun * @info: byte aligned outgoing/incoming channel info
186*4882a593Smuzhiyun * @info_word: word aligned outgoing/incoming channel info
187*4882a593Smuzhiyun * @tx_lock: lock to make writes to the channel mutually exclusive
188*4882a593Smuzhiyun * @fblockread_event: wakeup event tied to tx fBLOCKREADINTR
189*4882a593Smuzhiyun * @tx_fifo: pointer to the outgoing ring buffer
190*4882a593Smuzhiyun * @rx_fifo: pointer to the incoming ring buffer
191*4882a593Smuzhiyun * @fifo_size: size of each ring buffer
192*4882a593Smuzhiyun * @bounce_buffer: bounce buffer for reading wrapped packets
193*4882a593Smuzhiyun * @cb: callback function registered for this channel
194*4882a593Smuzhiyun * @recv_lock: guard for rx info modifications and cb pointer
195*4882a593Smuzhiyun * @pkt_size: size of the currently handled packet
196*4882a593Smuzhiyun * @drvdata: driver private data
197*4882a593Smuzhiyun * @list: lite entry for @channels in qcom_smd_edge
198*4882a593Smuzhiyun */
199*4882a593Smuzhiyun struct qcom_smd_channel {
200*4882a593Smuzhiyun struct qcom_smd_edge *edge;
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun struct qcom_smd_endpoint *qsept;
203*4882a593Smuzhiyun bool registered;
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun char *name;
206*4882a593Smuzhiyun enum smd_channel_state state;
207*4882a593Smuzhiyun enum smd_channel_state remote_state;
208*4882a593Smuzhiyun wait_queue_head_t state_change_event;
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun struct smd_channel_info_pair *info;
211*4882a593Smuzhiyun struct smd_channel_info_word_pair *info_word;
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun spinlock_t tx_lock;
214*4882a593Smuzhiyun wait_queue_head_t fblockread_event;
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun void *tx_fifo;
217*4882a593Smuzhiyun void *rx_fifo;
218*4882a593Smuzhiyun int fifo_size;
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun void *bounce_buffer;
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun spinlock_t recv_lock;
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun int pkt_size;
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun void *drvdata;
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun struct list_head list;
229*4882a593Smuzhiyun };
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun /*
232*4882a593Smuzhiyun * Format of the smd_info smem items, for byte aligned channels.
233*4882a593Smuzhiyun */
234*4882a593Smuzhiyun struct smd_channel_info {
235*4882a593Smuzhiyun __le32 state;
236*4882a593Smuzhiyun u8 fDSR;
237*4882a593Smuzhiyun u8 fCTS;
238*4882a593Smuzhiyun u8 fCD;
239*4882a593Smuzhiyun u8 fRI;
240*4882a593Smuzhiyun u8 fHEAD;
241*4882a593Smuzhiyun u8 fTAIL;
242*4882a593Smuzhiyun u8 fSTATE;
243*4882a593Smuzhiyun u8 fBLOCKREADINTR;
244*4882a593Smuzhiyun __le32 tail;
245*4882a593Smuzhiyun __le32 head;
246*4882a593Smuzhiyun };
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun struct smd_channel_info_pair {
249*4882a593Smuzhiyun struct smd_channel_info tx;
250*4882a593Smuzhiyun struct smd_channel_info rx;
251*4882a593Smuzhiyun };
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun /*
254*4882a593Smuzhiyun * Format of the smd_info smem items, for word aligned channels.
255*4882a593Smuzhiyun */
256*4882a593Smuzhiyun struct smd_channel_info_word {
257*4882a593Smuzhiyun __le32 state;
258*4882a593Smuzhiyun __le32 fDSR;
259*4882a593Smuzhiyun __le32 fCTS;
260*4882a593Smuzhiyun __le32 fCD;
261*4882a593Smuzhiyun __le32 fRI;
262*4882a593Smuzhiyun __le32 fHEAD;
263*4882a593Smuzhiyun __le32 fTAIL;
264*4882a593Smuzhiyun __le32 fSTATE;
265*4882a593Smuzhiyun __le32 fBLOCKREADINTR;
266*4882a593Smuzhiyun __le32 tail;
267*4882a593Smuzhiyun __le32 head;
268*4882a593Smuzhiyun };
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun struct smd_channel_info_word_pair {
271*4882a593Smuzhiyun struct smd_channel_info_word tx;
272*4882a593Smuzhiyun struct smd_channel_info_word rx;
273*4882a593Smuzhiyun };
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun #define GET_RX_CHANNEL_FLAG(channel, param) \
276*4882a593Smuzhiyun ({ \
277*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(channel->info->rx.param) != sizeof(u8)); \
278*4882a593Smuzhiyun channel->info_word ? \
279*4882a593Smuzhiyun le32_to_cpu(channel->info_word->rx.param) : \
280*4882a593Smuzhiyun channel->info->rx.param; \
281*4882a593Smuzhiyun })
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun #define GET_RX_CHANNEL_INFO(channel, param) \
284*4882a593Smuzhiyun ({ \
285*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(channel->info->rx.param) != sizeof(u32)); \
286*4882a593Smuzhiyun le32_to_cpu(channel->info_word ? \
287*4882a593Smuzhiyun channel->info_word->rx.param : \
288*4882a593Smuzhiyun channel->info->rx.param); \
289*4882a593Smuzhiyun })
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun #define SET_RX_CHANNEL_FLAG(channel, param, value) \
292*4882a593Smuzhiyun ({ \
293*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(channel->info->rx.param) != sizeof(u8)); \
294*4882a593Smuzhiyun if (channel->info_word) \
295*4882a593Smuzhiyun channel->info_word->rx.param = cpu_to_le32(value); \
296*4882a593Smuzhiyun else \
297*4882a593Smuzhiyun channel->info->rx.param = value; \
298*4882a593Smuzhiyun })
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun #define SET_RX_CHANNEL_INFO(channel, param, value) \
301*4882a593Smuzhiyun ({ \
302*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(channel->info->rx.param) != sizeof(u32)); \
303*4882a593Smuzhiyun if (channel->info_word) \
304*4882a593Smuzhiyun channel->info_word->rx.param = cpu_to_le32(value); \
305*4882a593Smuzhiyun else \
306*4882a593Smuzhiyun channel->info->rx.param = cpu_to_le32(value); \
307*4882a593Smuzhiyun })
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun #define GET_TX_CHANNEL_FLAG(channel, param) \
310*4882a593Smuzhiyun ({ \
311*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(channel->info->tx.param) != sizeof(u8)); \
312*4882a593Smuzhiyun channel->info_word ? \
313*4882a593Smuzhiyun le32_to_cpu(channel->info_word->tx.param) : \
314*4882a593Smuzhiyun channel->info->tx.param; \
315*4882a593Smuzhiyun })
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun #define GET_TX_CHANNEL_INFO(channel, param) \
318*4882a593Smuzhiyun ({ \
319*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(channel->info->tx.param) != sizeof(u32)); \
320*4882a593Smuzhiyun le32_to_cpu(channel->info_word ? \
321*4882a593Smuzhiyun channel->info_word->tx.param : \
322*4882a593Smuzhiyun channel->info->tx.param); \
323*4882a593Smuzhiyun })
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun #define SET_TX_CHANNEL_FLAG(channel, param, value) \
326*4882a593Smuzhiyun ({ \
327*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(channel->info->tx.param) != sizeof(u8)); \
328*4882a593Smuzhiyun if (channel->info_word) \
329*4882a593Smuzhiyun channel->info_word->tx.param = cpu_to_le32(value); \
330*4882a593Smuzhiyun else \
331*4882a593Smuzhiyun channel->info->tx.param = value; \
332*4882a593Smuzhiyun })
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun #define SET_TX_CHANNEL_INFO(channel, param, value) \
335*4882a593Smuzhiyun ({ \
336*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(channel->info->tx.param) != sizeof(u32)); \
337*4882a593Smuzhiyun if (channel->info_word) \
338*4882a593Smuzhiyun channel->info_word->tx.param = cpu_to_le32(value); \
339*4882a593Smuzhiyun else \
340*4882a593Smuzhiyun channel->info->tx.param = cpu_to_le32(value); \
341*4882a593Smuzhiyun })
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun /**
344*4882a593Smuzhiyun * struct qcom_smd_alloc_entry - channel allocation entry
345*4882a593Smuzhiyun * @name: channel name
346*4882a593Smuzhiyun * @cid: channel index
347*4882a593Smuzhiyun * @flags: channel flags and edge id
348*4882a593Smuzhiyun * @ref_count: reference count of the channel
349*4882a593Smuzhiyun */
350*4882a593Smuzhiyun struct qcom_smd_alloc_entry {
351*4882a593Smuzhiyun u8 name[20];
352*4882a593Smuzhiyun __le32 cid;
353*4882a593Smuzhiyun __le32 flags;
354*4882a593Smuzhiyun __le32 ref_count;
355*4882a593Smuzhiyun } __packed;
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun #define SMD_CHANNEL_FLAGS_EDGE_MASK 0xff
358*4882a593Smuzhiyun #define SMD_CHANNEL_FLAGS_STREAM BIT(8)
359*4882a593Smuzhiyun #define SMD_CHANNEL_FLAGS_PACKET BIT(9)
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun /*
362*4882a593Smuzhiyun * Each smd packet contains a 20 byte header, with the first 4 being the length
363*4882a593Smuzhiyun * of the packet.
364*4882a593Smuzhiyun */
365*4882a593Smuzhiyun #define SMD_PACKET_HEADER_LEN 20
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun /*
368*4882a593Smuzhiyun * Signal the remote processor associated with 'channel'.
369*4882a593Smuzhiyun */
qcom_smd_signal_channel(struct qcom_smd_channel * channel)370*4882a593Smuzhiyun static void qcom_smd_signal_channel(struct qcom_smd_channel *channel)
371*4882a593Smuzhiyun {
372*4882a593Smuzhiyun struct qcom_smd_edge *edge = channel->edge;
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun if (edge->mbox_chan) {
375*4882a593Smuzhiyun /*
376*4882a593Smuzhiyun * We can ignore a failing mbox_send_message() as the only
377*4882a593Smuzhiyun * possible cause is that the FIFO in the framework is full of
378*4882a593Smuzhiyun * other writes to the same bit.
379*4882a593Smuzhiyun */
380*4882a593Smuzhiyun mbox_send_message(edge->mbox_chan, NULL);
381*4882a593Smuzhiyun mbox_client_txdone(edge->mbox_chan, 0);
382*4882a593Smuzhiyun } else {
383*4882a593Smuzhiyun regmap_write(edge->ipc_regmap, edge->ipc_offset, BIT(edge->ipc_bit));
384*4882a593Smuzhiyun }
385*4882a593Smuzhiyun }
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun /*
388*4882a593Smuzhiyun * Initialize the tx channel info
389*4882a593Smuzhiyun */
qcom_smd_channel_reset(struct qcom_smd_channel * channel)390*4882a593Smuzhiyun static void qcom_smd_channel_reset(struct qcom_smd_channel *channel)
391*4882a593Smuzhiyun {
392*4882a593Smuzhiyun SET_TX_CHANNEL_INFO(channel, state, SMD_CHANNEL_CLOSED);
393*4882a593Smuzhiyun SET_TX_CHANNEL_FLAG(channel, fDSR, 0);
394*4882a593Smuzhiyun SET_TX_CHANNEL_FLAG(channel, fCTS, 0);
395*4882a593Smuzhiyun SET_TX_CHANNEL_FLAG(channel, fCD, 0);
396*4882a593Smuzhiyun SET_TX_CHANNEL_FLAG(channel, fRI, 0);
397*4882a593Smuzhiyun SET_TX_CHANNEL_FLAG(channel, fHEAD, 0);
398*4882a593Smuzhiyun SET_TX_CHANNEL_FLAG(channel, fTAIL, 0);
399*4882a593Smuzhiyun SET_TX_CHANNEL_FLAG(channel, fSTATE, 1);
400*4882a593Smuzhiyun SET_TX_CHANNEL_FLAG(channel, fBLOCKREADINTR, 1);
401*4882a593Smuzhiyun SET_TX_CHANNEL_INFO(channel, head, 0);
402*4882a593Smuzhiyun SET_RX_CHANNEL_INFO(channel, tail, 0);
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun qcom_smd_signal_channel(channel);
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun channel->state = SMD_CHANNEL_CLOSED;
407*4882a593Smuzhiyun channel->pkt_size = 0;
408*4882a593Smuzhiyun }
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun /*
411*4882a593Smuzhiyun * Set the callback for a channel, with appropriate locking
412*4882a593Smuzhiyun */
qcom_smd_channel_set_callback(struct qcom_smd_channel * channel,rpmsg_rx_cb_t cb)413*4882a593Smuzhiyun static void qcom_smd_channel_set_callback(struct qcom_smd_channel *channel,
414*4882a593Smuzhiyun rpmsg_rx_cb_t cb)
415*4882a593Smuzhiyun {
416*4882a593Smuzhiyun struct rpmsg_endpoint *ept = &channel->qsept->ept;
417*4882a593Smuzhiyun unsigned long flags;
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun spin_lock_irqsave(&channel->recv_lock, flags);
420*4882a593Smuzhiyun ept->cb = cb;
421*4882a593Smuzhiyun spin_unlock_irqrestore(&channel->recv_lock, flags);
422*4882a593Smuzhiyun };
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun /*
425*4882a593Smuzhiyun * Calculate the amount of data available in the rx fifo
426*4882a593Smuzhiyun */
qcom_smd_channel_get_rx_avail(struct qcom_smd_channel * channel)427*4882a593Smuzhiyun static size_t qcom_smd_channel_get_rx_avail(struct qcom_smd_channel *channel)
428*4882a593Smuzhiyun {
429*4882a593Smuzhiyun unsigned head;
430*4882a593Smuzhiyun unsigned tail;
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun head = GET_RX_CHANNEL_INFO(channel, head);
433*4882a593Smuzhiyun tail = GET_RX_CHANNEL_INFO(channel, tail);
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun return (head - tail) & (channel->fifo_size - 1);
436*4882a593Smuzhiyun }
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun /*
439*4882a593Smuzhiyun * Set tx channel state and inform the remote processor
440*4882a593Smuzhiyun */
qcom_smd_channel_set_state(struct qcom_smd_channel * channel,int state)441*4882a593Smuzhiyun static void qcom_smd_channel_set_state(struct qcom_smd_channel *channel,
442*4882a593Smuzhiyun int state)
443*4882a593Smuzhiyun {
444*4882a593Smuzhiyun struct qcom_smd_edge *edge = channel->edge;
445*4882a593Smuzhiyun bool is_open = state == SMD_CHANNEL_OPENED;
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun if (channel->state == state)
448*4882a593Smuzhiyun return;
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun dev_dbg(&edge->dev, "set_state(%s, %d)\n", channel->name, state);
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun SET_TX_CHANNEL_FLAG(channel, fDSR, is_open);
453*4882a593Smuzhiyun SET_TX_CHANNEL_FLAG(channel, fCTS, is_open);
454*4882a593Smuzhiyun SET_TX_CHANNEL_FLAG(channel, fCD, is_open);
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun SET_TX_CHANNEL_INFO(channel, state, state);
457*4882a593Smuzhiyun SET_TX_CHANNEL_FLAG(channel, fSTATE, 1);
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun channel->state = state;
460*4882a593Smuzhiyun qcom_smd_signal_channel(channel);
461*4882a593Smuzhiyun }
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun /*
464*4882a593Smuzhiyun * Copy count bytes of data using 32bit accesses, if that's required.
465*4882a593Smuzhiyun */
smd_copy_to_fifo(void __iomem * dst,const void * src,size_t count,bool word_aligned)466*4882a593Smuzhiyun static void smd_copy_to_fifo(void __iomem *dst,
467*4882a593Smuzhiyun const void *src,
468*4882a593Smuzhiyun size_t count,
469*4882a593Smuzhiyun bool word_aligned)
470*4882a593Smuzhiyun {
471*4882a593Smuzhiyun if (word_aligned) {
472*4882a593Smuzhiyun __iowrite32_copy(dst, src, count / sizeof(u32));
473*4882a593Smuzhiyun } else {
474*4882a593Smuzhiyun memcpy_toio(dst, src, count);
475*4882a593Smuzhiyun }
476*4882a593Smuzhiyun }
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun /*
479*4882a593Smuzhiyun * Copy count bytes of data using 32bit accesses, if that is required.
480*4882a593Smuzhiyun */
smd_copy_from_fifo(void * dst,const void __iomem * src,size_t count,bool word_aligned)481*4882a593Smuzhiyun static void smd_copy_from_fifo(void *dst,
482*4882a593Smuzhiyun const void __iomem *src,
483*4882a593Smuzhiyun size_t count,
484*4882a593Smuzhiyun bool word_aligned)
485*4882a593Smuzhiyun {
486*4882a593Smuzhiyun if (word_aligned) {
487*4882a593Smuzhiyun __ioread32_copy(dst, src, count / sizeof(u32));
488*4882a593Smuzhiyun } else {
489*4882a593Smuzhiyun memcpy_fromio(dst, src, count);
490*4882a593Smuzhiyun }
491*4882a593Smuzhiyun }
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun /*
494*4882a593Smuzhiyun * Read count bytes of data from the rx fifo into buf, but don't advance the
495*4882a593Smuzhiyun * tail.
496*4882a593Smuzhiyun */
qcom_smd_channel_peek(struct qcom_smd_channel * channel,void * buf,size_t count)497*4882a593Smuzhiyun static size_t qcom_smd_channel_peek(struct qcom_smd_channel *channel,
498*4882a593Smuzhiyun void *buf, size_t count)
499*4882a593Smuzhiyun {
500*4882a593Smuzhiyun bool word_aligned;
501*4882a593Smuzhiyun unsigned tail;
502*4882a593Smuzhiyun size_t len;
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun word_aligned = channel->info_word;
505*4882a593Smuzhiyun tail = GET_RX_CHANNEL_INFO(channel, tail);
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun len = min_t(size_t, count, channel->fifo_size - tail);
508*4882a593Smuzhiyun if (len) {
509*4882a593Smuzhiyun smd_copy_from_fifo(buf,
510*4882a593Smuzhiyun channel->rx_fifo + tail,
511*4882a593Smuzhiyun len,
512*4882a593Smuzhiyun word_aligned);
513*4882a593Smuzhiyun }
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun if (len != count) {
516*4882a593Smuzhiyun smd_copy_from_fifo(buf + len,
517*4882a593Smuzhiyun channel->rx_fifo,
518*4882a593Smuzhiyun count - len,
519*4882a593Smuzhiyun word_aligned);
520*4882a593Smuzhiyun }
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun return count;
523*4882a593Smuzhiyun }
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun /*
526*4882a593Smuzhiyun * Advance the rx tail by count bytes.
527*4882a593Smuzhiyun */
qcom_smd_channel_advance(struct qcom_smd_channel * channel,size_t count)528*4882a593Smuzhiyun static void qcom_smd_channel_advance(struct qcom_smd_channel *channel,
529*4882a593Smuzhiyun size_t count)
530*4882a593Smuzhiyun {
531*4882a593Smuzhiyun unsigned tail;
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun tail = GET_RX_CHANNEL_INFO(channel, tail);
534*4882a593Smuzhiyun tail += count;
535*4882a593Smuzhiyun tail &= (channel->fifo_size - 1);
536*4882a593Smuzhiyun SET_RX_CHANNEL_INFO(channel, tail, tail);
537*4882a593Smuzhiyun }
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun /*
540*4882a593Smuzhiyun * Read out a single packet from the rx fifo and deliver it to the device
541*4882a593Smuzhiyun */
qcom_smd_channel_recv_single(struct qcom_smd_channel * channel)542*4882a593Smuzhiyun static int qcom_smd_channel_recv_single(struct qcom_smd_channel *channel)
543*4882a593Smuzhiyun {
544*4882a593Smuzhiyun struct rpmsg_endpoint *ept = &channel->qsept->ept;
545*4882a593Smuzhiyun unsigned tail;
546*4882a593Smuzhiyun size_t len;
547*4882a593Smuzhiyun void *ptr;
548*4882a593Smuzhiyun int ret;
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun tail = GET_RX_CHANNEL_INFO(channel, tail);
551*4882a593Smuzhiyun
552*4882a593Smuzhiyun /* Use bounce buffer if the data wraps */
553*4882a593Smuzhiyun if (tail + channel->pkt_size >= channel->fifo_size) {
554*4882a593Smuzhiyun ptr = channel->bounce_buffer;
555*4882a593Smuzhiyun len = qcom_smd_channel_peek(channel, ptr, channel->pkt_size);
556*4882a593Smuzhiyun } else {
557*4882a593Smuzhiyun ptr = channel->rx_fifo + tail;
558*4882a593Smuzhiyun len = channel->pkt_size;
559*4882a593Smuzhiyun }
560*4882a593Smuzhiyun
561*4882a593Smuzhiyun ret = ept->cb(ept->rpdev, ptr, len, ept->priv, RPMSG_ADDR_ANY);
562*4882a593Smuzhiyun if (ret < 0)
563*4882a593Smuzhiyun return ret;
564*4882a593Smuzhiyun
565*4882a593Smuzhiyun /* Only forward the tail if the client consumed the data */
566*4882a593Smuzhiyun qcom_smd_channel_advance(channel, len);
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun channel->pkt_size = 0;
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun return 0;
571*4882a593Smuzhiyun }
572*4882a593Smuzhiyun
573*4882a593Smuzhiyun /*
574*4882a593Smuzhiyun * Per channel interrupt handling
575*4882a593Smuzhiyun */
qcom_smd_channel_intr(struct qcom_smd_channel * channel)576*4882a593Smuzhiyun static bool qcom_smd_channel_intr(struct qcom_smd_channel *channel)
577*4882a593Smuzhiyun {
578*4882a593Smuzhiyun bool need_state_scan = false;
579*4882a593Smuzhiyun int remote_state;
580*4882a593Smuzhiyun __le32 pktlen;
581*4882a593Smuzhiyun int avail;
582*4882a593Smuzhiyun int ret;
583*4882a593Smuzhiyun
584*4882a593Smuzhiyun /* Handle state changes */
585*4882a593Smuzhiyun remote_state = GET_RX_CHANNEL_INFO(channel, state);
586*4882a593Smuzhiyun if (remote_state != channel->remote_state) {
587*4882a593Smuzhiyun channel->remote_state = remote_state;
588*4882a593Smuzhiyun need_state_scan = true;
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun wake_up_interruptible_all(&channel->state_change_event);
591*4882a593Smuzhiyun }
592*4882a593Smuzhiyun /* Indicate that we have seen any state change */
593*4882a593Smuzhiyun SET_RX_CHANNEL_FLAG(channel, fSTATE, 0);
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun /* Signal waiting qcom_smd_send() about the interrupt */
596*4882a593Smuzhiyun if (!GET_TX_CHANNEL_FLAG(channel, fBLOCKREADINTR))
597*4882a593Smuzhiyun wake_up_interruptible_all(&channel->fblockread_event);
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun /* Don't consume any data until we've opened the channel */
600*4882a593Smuzhiyun if (channel->state != SMD_CHANNEL_OPENED)
601*4882a593Smuzhiyun goto out;
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun /* Indicate that we've seen the new data */
604*4882a593Smuzhiyun SET_RX_CHANNEL_FLAG(channel, fHEAD, 0);
605*4882a593Smuzhiyun
606*4882a593Smuzhiyun /* Consume data */
607*4882a593Smuzhiyun for (;;) {
608*4882a593Smuzhiyun avail = qcom_smd_channel_get_rx_avail(channel);
609*4882a593Smuzhiyun
610*4882a593Smuzhiyun if (!channel->pkt_size && avail >= SMD_PACKET_HEADER_LEN) {
611*4882a593Smuzhiyun qcom_smd_channel_peek(channel, &pktlen, sizeof(pktlen));
612*4882a593Smuzhiyun qcom_smd_channel_advance(channel, SMD_PACKET_HEADER_LEN);
613*4882a593Smuzhiyun channel->pkt_size = le32_to_cpu(pktlen);
614*4882a593Smuzhiyun } else if (channel->pkt_size && avail >= channel->pkt_size) {
615*4882a593Smuzhiyun ret = qcom_smd_channel_recv_single(channel);
616*4882a593Smuzhiyun if (ret)
617*4882a593Smuzhiyun break;
618*4882a593Smuzhiyun } else {
619*4882a593Smuzhiyun break;
620*4882a593Smuzhiyun }
621*4882a593Smuzhiyun }
622*4882a593Smuzhiyun
623*4882a593Smuzhiyun /* Indicate that we have seen and updated tail */
624*4882a593Smuzhiyun SET_RX_CHANNEL_FLAG(channel, fTAIL, 1);
625*4882a593Smuzhiyun
626*4882a593Smuzhiyun /* Signal the remote that we've consumed the data (if requested) */
627*4882a593Smuzhiyun if (!GET_RX_CHANNEL_FLAG(channel, fBLOCKREADINTR)) {
628*4882a593Smuzhiyun /* Ensure ordering of channel info updates */
629*4882a593Smuzhiyun wmb();
630*4882a593Smuzhiyun
631*4882a593Smuzhiyun qcom_smd_signal_channel(channel);
632*4882a593Smuzhiyun }
633*4882a593Smuzhiyun
634*4882a593Smuzhiyun out:
635*4882a593Smuzhiyun return need_state_scan;
636*4882a593Smuzhiyun }
637*4882a593Smuzhiyun
638*4882a593Smuzhiyun /*
639*4882a593Smuzhiyun * The edge interrupts are triggered by the remote processor on state changes,
640*4882a593Smuzhiyun * channel info updates or when new channels are created.
641*4882a593Smuzhiyun */
qcom_smd_edge_intr(int irq,void * data)642*4882a593Smuzhiyun static irqreturn_t qcom_smd_edge_intr(int irq, void *data)
643*4882a593Smuzhiyun {
644*4882a593Smuzhiyun struct qcom_smd_edge *edge = data;
645*4882a593Smuzhiyun struct qcom_smd_channel *channel;
646*4882a593Smuzhiyun unsigned available;
647*4882a593Smuzhiyun bool kick_scanner = false;
648*4882a593Smuzhiyun bool kick_state = false;
649*4882a593Smuzhiyun
650*4882a593Smuzhiyun /*
651*4882a593Smuzhiyun * Handle state changes or data on each of the channels on this edge
652*4882a593Smuzhiyun */
653*4882a593Smuzhiyun spin_lock(&edge->channels_lock);
654*4882a593Smuzhiyun list_for_each_entry(channel, &edge->channels, list) {
655*4882a593Smuzhiyun spin_lock(&channel->recv_lock);
656*4882a593Smuzhiyun kick_state |= qcom_smd_channel_intr(channel);
657*4882a593Smuzhiyun spin_unlock(&channel->recv_lock);
658*4882a593Smuzhiyun }
659*4882a593Smuzhiyun spin_unlock(&edge->channels_lock);
660*4882a593Smuzhiyun
661*4882a593Smuzhiyun /*
662*4882a593Smuzhiyun * Creating a new channel requires allocating an smem entry, so we only
663*4882a593Smuzhiyun * have to scan if the amount of available space in smem have changed
664*4882a593Smuzhiyun * since last scan.
665*4882a593Smuzhiyun */
666*4882a593Smuzhiyun available = qcom_smem_get_free_space(edge->remote_pid);
667*4882a593Smuzhiyun if (available != edge->smem_available) {
668*4882a593Smuzhiyun edge->smem_available = available;
669*4882a593Smuzhiyun kick_scanner = true;
670*4882a593Smuzhiyun }
671*4882a593Smuzhiyun
672*4882a593Smuzhiyun if (kick_scanner)
673*4882a593Smuzhiyun schedule_work(&edge->scan_work);
674*4882a593Smuzhiyun if (kick_state)
675*4882a593Smuzhiyun schedule_work(&edge->state_work);
676*4882a593Smuzhiyun
677*4882a593Smuzhiyun return IRQ_HANDLED;
678*4882a593Smuzhiyun }
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun /*
681*4882a593Smuzhiyun * Calculate how much space is available in the tx fifo.
682*4882a593Smuzhiyun */
qcom_smd_get_tx_avail(struct qcom_smd_channel * channel)683*4882a593Smuzhiyun static size_t qcom_smd_get_tx_avail(struct qcom_smd_channel *channel)
684*4882a593Smuzhiyun {
685*4882a593Smuzhiyun unsigned head;
686*4882a593Smuzhiyun unsigned tail;
687*4882a593Smuzhiyun unsigned mask = channel->fifo_size - 1;
688*4882a593Smuzhiyun
689*4882a593Smuzhiyun head = GET_TX_CHANNEL_INFO(channel, head);
690*4882a593Smuzhiyun tail = GET_TX_CHANNEL_INFO(channel, tail);
691*4882a593Smuzhiyun
692*4882a593Smuzhiyun return mask - ((head - tail) & mask);
693*4882a593Smuzhiyun }
694*4882a593Smuzhiyun
695*4882a593Smuzhiyun /*
696*4882a593Smuzhiyun * Write count bytes of data into channel, possibly wrapping in the ring buffer
697*4882a593Smuzhiyun */
qcom_smd_write_fifo(struct qcom_smd_channel * channel,const void * data,size_t count)698*4882a593Smuzhiyun static int qcom_smd_write_fifo(struct qcom_smd_channel *channel,
699*4882a593Smuzhiyun const void *data,
700*4882a593Smuzhiyun size_t count)
701*4882a593Smuzhiyun {
702*4882a593Smuzhiyun bool word_aligned;
703*4882a593Smuzhiyun unsigned head;
704*4882a593Smuzhiyun size_t len;
705*4882a593Smuzhiyun
706*4882a593Smuzhiyun word_aligned = channel->info_word;
707*4882a593Smuzhiyun head = GET_TX_CHANNEL_INFO(channel, head);
708*4882a593Smuzhiyun
709*4882a593Smuzhiyun len = min_t(size_t, count, channel->fifo_size - head);
710*4882a593Smuzhiyun if (len) {
711*4882a593Smuzhiyun smd_copy_to_fifo(channel->tx_fifo + head,
712*4882a593Smuzhiyun data,
713*4882a593Smuzhiyun len,
714*4882a593Smuzhiyun word_aligned);
715*4882a593Smuzhiyun }
716*4882a593Smuzhiyun
717*4882a593Smuzhiyun if (len != count) {
718*4882a593Smuzhiyun smd_copy_to_fifo(channel->tx_fifo,
719*4882a593Smuzhiyun data + len,
720*4882a593Smuzhiyun count - len,
721*4882a593Smuzhiyun word_aligned);
722*4882a593Smuzhiyun }
723*4882a593Smuzhiyun
724*4882a593Smuzhiyun head += count;
725*4882a593Smuzhiyun head &= (channel->fifo_size - 1);
726*4882a593Smuzhiyun SET_TX_CHANNEL_INFO(channel, head, head);
727*4882a593Smuzhiyun
728*4882a593Smuzhiyun return count;
729*4882a593Smuzhiyun }
730*4882a593Smuzhiyun
731*4882a593Smuzhiyun /**
732*4882a593Smuzhiyun * qcom_smd_send - write data to smd channel
733*4882a593Smuzhiyun * @channel: channel handle
734*4882a593Smuzhiyun * @data: buffer of data to write
735*4882a593Smuzhiyun * @len: number of bytes to write
736*4882a593Smuzhiyun * @wait: flag to indicate if write has ca wait
737*4882a593Smuzhiyun *
738*4882a593Smuzhiyun * This is a blocking write of len bytes into the channel's tx ring buffer and
739*4882a593Smuzhiyun * signal the remote end. It will sleep until there is enough space available
740*4882a593Smuzhiyun * in the tx buffer, utilizing the fBLOCKREADINTR signaling mechanism to avoid
741*4882a593Smuzhiyun * polling.
742*4882a593Smuzhiyun */
__qcom_smd_send(struct qcom_smd_channel * channel,const void * data,int len,bool wait)743*4882a593Smuzhiyun static int __qcom_smd_send(struct qcom_smd_channel *channel, const void *data,
744*4882a593Smuzhiyun int len, bool wait)
745*4882a593Smuzhiyun {
746*4882a593Smuzhiyun __le32 hdr[5] = { cpu_to_le32(len), };
747*4882a593Smuzhiyun int tlen = sizeof(hdr) + len;
748*4882a593Smuzhiyun unsigned long flags;
749*4882a593Smuzhiyun int ret;
750*4882a593Smuzhiyun
751*4882a593Smuzhiyun /* Word aligned channels only accept word size aligned data */
752*4882a593Smuzhiyun if (channel->info_word && len % 4)
753*4882a593Smuzhiyun return -EINVAL;
754*4882a593Smuzhiyun
755*4882a593Smuzhiyun /* Reject packets that are too big */
756*4882a593Smuzhiyun if (tlen >= channel->fifo_size)
757*4882a593Smuzhiyun return -EINVAL;
758*4882a593Smuzhiyun
759*4882a593Smuzhiyun /* Highlight the fact that if we enter the loop below we might sleep */
760*4882a593Smuzhiyun if (wait)
761*4882a593Smuzhiyun might_sleep();
762*4882a593Smuzhiyun
763*4882a593Smuzhiyun spin_lock_irqsave(&channel->tx_lock, flags);
764*4882a593Smuzhiyun
765*4882a593Smuzhiyun while (qcom_smd_get_tx_avail(channel) < tlen &&
766*4882a593Smuzhiyun channel->state == SMD_CHANNEL_OPENED) {
767*4882a593Smuzhiyun if (!wait) {
768*4882a593Smuzhiyun ret = -EAGAIN;
769*4882a593Smuzhiyun goto out_unlock;
770*4882a593Smuzhiyun }
771*4882a593Smuzhiyun
772*4882a593Smuzhiyun SET_TX_CHANNEL_FLAG(channel, fBLOCKREADINTR, 0);
773*4882a593Smuzhiyun
774*4882a593Smuzhiyun /* Wait without holding the tx_lock */
775*4882a593Smuzhiyun spin_unlock_irqrestore(&channel->tx_lock, flags);
776*4882a593Smuzhiyun
777*4882a593Smuzhiyun ret = wait_event_interruptible(channel->fblockread_event,
778*4882a593Smuzhiyun qcom_smd_get_tx_avail(channel) >= tlen ||
779*4882a593Smuzhiyun channel->state != SMD_CHANNEL_OPENED);
780*4882a593Smuzhiyun if (ret)
781*4882a593Smuzhiyun return ret;
782*4882a593Smuzhiyun
783*4882a593Smuzhiyun spin_lock_irqsave(&channel->tx_lock, flags);
784*4882a593Smuzhiyun
785*4882a593Smuzhiyun SET_TX_CHANNEL_FLAG(channel, fBLOCKREADINTR, 1);
786*4882a593Smuzhiyun }
787*4882a593Smuzhiyun
788*4882a593Smuzhiyun /* Fail if the channel was closed */
789*4882a593Smuzhiyun if (channel->state != SMD_CHANNEL_OPENED) {
790*4882a593Smuzhiyun ret = -EPIPE;
791*4882a593Smuzhiyun goto out_unlock;
792*4882a593Smuzhiyun }
793*4882a593Smuzhiyun
794*4882a593Smuzhiyun SET_TX_CHANNEL_FLAG(channel, fTAIL, 0);
795*4882a593Smuzhiyun
796*4882a593Smuzhiyun qcom_smd_write_fifo(channel, hdr, sizeof(hdr));
797*4882a593Smuzhiyun qcom_smd_write_fifo(channel, data, len);
798*4882a593Smuzhiyun
799*4882a593Smuzhiyun SET_TX_CHANNEL_FLAG(channel, fHEAD, 1);
800*4882a593Smuzhiyun
801*4882a593Smuzhiyun /* Ensure ordering of channel info updates */
802*4882a593Smuzhiyun wmb();
803*4882a593Smuzhiyun
804*4882a593Smuzhiyun qcom_smd_signal_channel(channel);
805*4882a593Smuzhiyun
806*4882a593Smuzhiyun out_unlock:
807*4882a593Smuzhiyun spin_unlock_irqrestore(&channel->tx_lock, flags);
808*4882a593Smuzhiyun
809*4882a593Smuzhiyun return ret;
810*4882a593Smuzhiyun }
811*4882a593Smuzhiyun
812*4882a593Smuzhiyun /*
813*4882a593Smuzhiyun * Helper for opening a channel
814*4882a593Smuzhiyun */
qcom_smd_channel_open(struct qcom_smd_channel * channel,rpmsg_rx_cb_t cb)815*4882a593Smuzhiyun static int qcom_smd_channel_open(struct qcom_smd_channel *channel,
816*4882a593Smuzhiyun rpmsg_rx_cb_t cb)
817*4882a593Smuzhiyun {
818*4882a593Smuzhiyun struct qcom_smd_edge *edge = channel->edge;
819*4882a593Smuzhiyun size_t bb_size;
820*4882a593Smuzhiyun int ret;
821*4882a593Smuzhiyun
822*4882a593Smuzhiyun /*
823*4882a593Smuzhiyun * Packets are maximum 4k, but reduce if the fifo is smaller
824*4882a593Smuzhiyun */
825*4882a593Smuzhiyun bb_size = min(channel->fifo_size, SZ_4K);
826*4882a593Smuzhiyun channel->bounce_buffer = kmalloc(bb_size, GFP_KERNEL);
827*4882a593Smuzhiyun if (!channel->bounce_buffer)
828*4882a593Smuzhiyun return -ENOMEM;
829*4882a593Smuzhiyun
830*4882a593Smuzhiyun qcom_smd_channel_set_callback(channel, cb);
831*4882a593Smuzhiyun qcom_smd_channel_set_state(channel, SMD_CHANNEL_OPENING);
832*4882a593Smuzhiyun
833*4882a593Smuzhiyun /* Wait for remote to enter opening or opened */
834*4882a593Smuzhiyun ret = wait_event_interruptible_timeout(channel->state_change_event,
835*4882a593Smuzhiyun channel->remote_state == SMD_CHANNEL_OPENING ||
836*4882a593Smuzhiyun channel->remote_state == SMD_CHANNEL_OPENED,
837*4882a593Smuzhiyun HZ);
838*4882a593Smuzhiyun if (!ret) {
839*4882a593Smuzhiyun dev_err(&edge->dev, "remote side did not enter opening state\n");
840*4882a593Smuzhiyun goto out_close_timeout;
841*4882a593Smuzhiyun }
842*4882a593Smuzhiyun
843*4882a593Smuzhiyun qcom_smd_channel_set_state(channel, SMD_CHANNEL_OPENED);
844*4882a593Smuzhiyun
845*4882a593Smuzhiyun /* Wait for remote to enter opened */
846*4882a593Smuzhiyun ret = wait_event_interruptible_timeout(channel->state_change_event,
847*4882a593Smuzhiyun channel->remote_state == SMD_CHANNEL_OPENED,
848*4882a593Smuzhiyun HZ);
849*4882a593Smuzhiyun if (!ret) {
850*4882a593Smuzhiyun dev_err(&edge->dev, "remote side did not enter open state\n");
851*4882a593Smuzhiyun goto out_close_timeout;
852*4882a593Smuzhiyun }
853*4882a593Smuzhiyun
854*4882a593Smuzhiyun return 0;
855*4882a593Smuzhiyun
856*4882a593Smuzhiyun out_close_timeout:
857*4882a593Smuzhiyun qcom_smd_channel_set_state(channel, SMD_CHANNEL_CLOSED);
858*4882a593Smuzhiyun return -ETIMEDOUT;
859*4882a593Smuzhiyun }
860*4882a593Smuzhiyun
861*4882a593Smuzhiyun /*
862*4882a593Smuzhiyun * Helper for closing and resetting a channel
863*4882a593Smuzhiyun */
qcom_smd_channel_close(struct qcom_smd_channel * channel)864*4882a593Smuzhiyun static void qcom_smd_channel_close(struct qcom_smd_channel *channel)
865*4882a593Smuzhiyun {
866*4882a593Smuzhiyun qcom_smd_channel_set_callback(channel, NULL);
867*4882a593Smuzhiyun
868*4882a593Smuzhiyun kfree(channel->bounce_buffer);
869*4882a593Smuzhiyun channel->bounce_buffer = NULL;
870*4882a593Smuzhiyun
871*4882a593Smuzhiyun qcom_smd_channel_set_state(channel, SMD_CHANNEL_CLOSED);
872*4882a593Smuzhiyun qcom_smd_channel_reset(channel);
873*4882a593Smuzhiyun }
874*4882a593Smuzhiyun
875*4882a593Smuzhiyun static struct qcom_smd_channel *
qcom_smd_find_channel(struct qcom_smd_edge * edge,const char * name)876*4882a593Smuzhiyun qcom_smd_find_channel(struct qcom_smd_edge *edge, const char *name)
877*4882a593Smuzhiyun {
878*4882a593Smuzhiyun struct qcom_smd_channel *channel;
879*4882a593Smuzhiyun struct qcom_smd_channel *ret = NULL;
880*4882a593Smuzhiyun unsigned long flags;
881*4882a593Smuzhiyun
882*4882a593Smuzhiyun spin_lock_irqsave(&edge->channels_lock, flags);
883*4882a593Smuzhiyun list_for_each_entry(channel, &edge->channels, list) {
884*4882a593Smuzhiyun if (!strcmp(channel->name, name)) {
885*4882a593Smuzhiyun ret = channel;
886*4882a593Smuzhiyun break;
887*4882a593Smuzhiyun }
888*4882a593Smuzhiyun }
889*4882a593Smuzhiyun spin_unlock_irqrestore(&edge->channels_lock, flags);
890*4882a593Smuzhiyun
891*4882a593Smuzhiyun return ret;
892*4882a593Smuzhiyun }
893*4882a593Smuzhiyun
__ept_release(struct kref * kref)894*4882a593Smuzhiyun static void __ept_release(struct kref *kref)
895*4882a593Smuzhiyun {
896*4882a593Smuzhiyun struct rpmsg_endpoint *ept = container_of(kref, struct rpmsg_endpoint,
897*4882a593Smuzhiyun refcount);
898*4882a593Smuzhiyun kfree(to_smd_endpoint(ept));
899*4882a593Smuzhiyun }
900*4882a593Smuzhiyun
qcom_smd_create_ept(struct rpmsg_device * rpdev,rpmsg_rx_cb_t cb,void * priv,struct rpmsg_channel_info chinfo)901*4882a593Smuzhiyun static struct rpmsg_endpoint *qcom_smd_create_ept(struct rpmsg_device *rpdev,
902*4882a593Smuzhiyun rpmsg_rx_cb_t cb, void *priv,
903*4882a593Smuzhiyun struct rpmsg_channel_info chinfo)
904*4882a593Smuzhiyun {
905*4882a593Smuzhiyun struct qcom_smd_endpoint *qsept;
906*4882a593Smuzhiyun struct qcom_smd_channel *channel;
907*4882a593Smuzhiyun struct qcom_smd_device *qsdev = to_smd_device(rpdev);
908*4882a593Smuzhiyun struct qcom_smd_edge *edge = qsdev->edge;
909*4882a593Smuzhiyun struct rpmsg_endpoint *ept;
910*4882a593Smuzhiyun const char *name = chinfo.name;
911*4882a593Smuzhiyun int ret;
912*4882a593Smuzhiyun
913*4882a593Smuzhiyun /* Wait up to HZ for the channel to appear */
914*4882a593Smuzhiyun ret = wait_event_interruptible_timeout(edge->new_channel_event,
915*4882a593Smuzhiyun (channel = qcom_smd_find_channel(edge, name)) != NULL,
916*4882a593Smuzhiyun HZ);
917*4882a593Smuzhiyun if (!ret)
918*4882a593Smuzhiyun return NULL;
919*4882a593Smuzhiyun
920*4882a593Smuzhiyun if (channel->state != SMD_CHANNEL_CLOSED) {
921*4882a593Smuzhiyun dev_err(&rpdev->dev, "channel %s is busy\n", channel->name);
922*4882a593Smuzhiyun return NULL;
923*4882a593Smuzhiyun }
924*4882a593Smuzhiyun
925*4882a593Smuzhiyun qsept = kzalloc(sizeof(*qsept), GFP_KERNEL);
926*4882a593Smuzhiyun if (!qsept)
927*4882a593Smuzhiyun return NULL;
928*4882a593Smuzhiyun
929*4882a593Smuzhiyun ept = &qsept->ept;
930*4882a593Smuzhiyun
931*4882a593Smuzhiyun kref_init(&ept->refcount);
932*4882a593Smuzhiyun
933*4882a593Smuzhiyun ept->rpdev = rpdev;
934*4882a593Smuzhiyun ept->cb = cb;
935*4882a593Smuzhiyun ept->priv = priv;
936*4882a593Smuzhiyun ept->ops = &qcom_smd_endpoint_ops;
937*4882a593Smuzhiyun
938*4882a593Smuzhiyun channel->qsept = qsept;
939*4882a593Smuzhiyun qsept->qsch = channel;
940*4882a593Smuzhiyun
941*4882a593Smuzhiyun ret = qcom_smd_channel_open(channel, cb);
942*4882a593Smuzhiyun if (ret)
943*4882a593Smuzhiyun goto free_ept;
944*4882a593Smuzhiyun
945*4882a593Smuzhiyun return ept;
946*4882a593Smuzhiyun
947*4882a593Smuzhiyun free_ept:
948*4882a593Smuzhiyun channel->qsept = NULL;
949*4882a593Smuzhiyun kref_put(&ept->refcount, __ept_release);
950*4882a593Smuzhiyun return NULL;
951*4882a593Smuzhiyun }
952*4882a593Smuzhiyun
qcom_smd_destroy_ept(struct rpmsg_endpoint * ept)953*4882a593Smuzhiyun static void qcom_smd_destroy_ept(struct rpmsg_endpoint *ept)
954*4882a593Smuzhiyun {
955*4882a593Smuzhiyun struct qcom_smd_endpoint *qsept = to_smd_endpoint(ept);
956*4882a593Smuzhiyun struct qcom_smd_channel *ch = qsept->qsch;
957*4882a593Smuzhiyun
958*4882a593Smuzhiyun qcom_smd_channel_close(ch);
959*4882a593Smuzhiyun ch->qsept = NULL;
960*4882a593Smuzhiyun kref_put(&ept->refcount, __ept_release);
961*4882a593Smuzhiyun }
962*4882a593Smuzhiyun
qcom_smd_send(struct rpmsg_endpoint * ept,void * data,int len)963*4882a593Smuzhiyun static int qcom_smd_send(struct rpmsg_endpoint *ept, void *data, int len)
964*4882a593Smuzhiyun {
965*4882a593Smuzhiyun struct qcom_smd_endpoint *qsept = to_smd_endpoint(ept);
966*4882a593Smuzhiyun
967*4882a593Smuzhiyun return __qcom_smd_send(qsept->qsch, data, len, true);
968*4882a593Smuzhiyun }
969*4882a593Smuzhiyun
qcom_smd_trysend(struct rpmsg_endpoint * ept,void * data,int len)970*4882a593Smuzhiyun static int qcom_smd_trysend(struct rpmsg_endpoint *ept, void *data, int len)
971*4882a593Smuzhiyun {
972*4882a593Smuzhiyun struct qcom_smd_endpoint *qsept = to_smd_endpoint(ept);
973*4882a593Smuzhiyun
974*4882a593Smuzhiyun return __qcom_smd_send(qsept->qsch, data, len, false);
975*4882a593Smuzhiyun }
976*4882a593Smuzhiyun
qcom_smd_poll(struct rpmsg_endpoint * ept,struct file * filp,poll_table * wait)977*4882a593Smuzhiyun static __poll_t qcom_smd_poll(struct rpmsg_endpoint *ept,
978*4882a593Smuzhiyun struct file *filp, poll_table *wait)
979*4882a593Smuzhiyun {
980*4882a593Smuzhiyun struct qcom_smd_endpoint *qsept = to_smd_endpoint(ept);
981*4882a593Smuzhiyun struct qcom_smd_channel *channel = qsept->qsch;
982*4882a593Smuzhiyun __poll_t mask = 0;
983*4882a593Smuzhiyun
984*4882a593Smuzhiyun poll_wait(filp, &channel->fblockread_event, wait);
985*4882a593Smuzhiyun
986*4882a593Smuzhiyun if (qcom_smd_get_tx_avail(channel) > 20)
987*4882a593Smuzhiyun mask |= EPOLLOUT | EPOLLWRNORM;
988*4882a593Smuzhiyun
989*4882a593Smuzhiyun return mask;
990*4882a593Smuzhiyun }
991*4882a593Smuzhiyun
992*4882a593Smuzhiyun /*
993*4882a593Smuzhiyun * Finds the device_node for the smd child interested in this channel.
994*4882a593Smuzhiyun */
qcom_smd_match_channel(struct device_node * edge_node,const char * channel)995*4882a593Smuzhiyun static struct device_node *qcom_smd_match_channel(struct device_node *edge_node,
996*4882a593Smuzhiyun const char *channel)
997*4882a593Smuzhiyun {
998*4882a593Smuzhiyun struct device_node *child;
999*4882a593Smuzhiyun const char *name;
1000*4882a593Smuzhiyun const char *key;
1001*4882a593Smuzhiyun int ret;
1002*4882a593Smuzhiyun
1003*4882a593Smuzhiyun for_each_available_child_of_node(edge_node, child) {
1004*4882a593Smuzhiyun key = "qcom,smd-channels";
1005*4882a593Smuzhiyun ret = of_property_read_string(child, key, &name);
1006*4882a593Smuzhiyun if (ret)
1007*4882a593Smuzhiyun continue;
1008*4882a593Smuzhiyun
1009*4882a593Smuzhiyun if (strcmp(name, channel) == 0)
1010*4882a593Smuzhiyun return child;
1011*4882a593Smuzhiyun }
1012*4882a593Smuzhiyun
1013*4882a593Smuzhiyun return NULL;
1014*4882a593Smuzhiyun }
1015*4882a593Smuzhiyun
qcom_smd_announce_create(struct rpmsg_device * rpdev)1016*4882a593Smuzhiyun static int qcom_smd_announce_create(struct rpmsg_device *rpdev)
1017*4882a593Smuzhiyun {
1018*4882a593Smuzhiyun struct qcom_smd_endpoint *qept = to_smd_endpoint(rpdev->ept);
1019*4882a593Smuzhiyun struct qcom_smd_channel *channel = qept->qsch;
1020*4882a593Smuzhiyun unsigned long flags;
1021*4882a593Smuzhiyun bool kick_state;
1022*4882a593Smuzhiyun
1023*4882a593Smuzhiyun spin_lock_irqsave(&channel->recv_lock, flags);
1024*4882a593Smuzhiyun kick_state = qcom_smd_channel_intr(channel);
1025*4882a593Smuzhiyun spin_unlock_irqrestore(&channel->recv_lock, flags);
1026*4882a593Smuzhiyun
1027*4882a593Smuzhiyun if (kick_state)
1028*4882a593Smuzhiyun schedule_work(&channel->edge->state_work);
1029*4882a593Smuzhiyun
1030*4882a593Smuzhiyun return 0;
1031*4882a593Smuzhiyun }
1032*4882a593Smuzhiyun
1033*4882a593Smuzhiyun static const struct rpmsg_device_ops qcom_smd_device_ops = {
1034*4882a593Smuzhiyun .create_ept = qcom_smd_create_ept,
1035*4882a593Smuzhiyun .announce_create = qcom_smd_announce_create,
1036*4882a593Smuzhiyun };
1037*4882a593Smuzhiyun
1038*4882a593Smuzhiyun static const struct rpmsg_endpoint_ops qcom_smd_endpoint_ops = {
1039*4882a593Smuzhiyun .destroy_ept = qcom_smd_destroy_ept,
1040*4882a593Smuzhiyun .send = qcom_smd_send,
1041*4882a593Smuzhiyun .trysend = qcom_smd_trysend,
1042*4882a593Smuzhiyun .poll = qcom_smd_poll,
1043*4882a593Smuzhiyun };
1044*4882a593Smuzhiyun
qcom_smd_release_device(struct device * dev)1045*4882a593Smuzhiyun static void qcom_smd_release_device(struct device *dev)
1046*4882a593Smuzhiyun {
1047*4882a593Smuzhiyun struct rpmsg_device *rpdev = to_rpmsg_device(dev);
1048*4882a593Smuzhiyun struct qcom_smd_device *qsdev = to_smd_device(rpdev);
1049*4882a593Smuzhiyun
1050*4882a593Smuzhiyun kfree(qsdev);
1051*4882a593Smuzhiyun }
1052*4882a593Smuzhiyun
1053*4882a593Smuzhiyun /*
1054*4882a593Smuzhiyun * Create a smd client device for channel that is being opened.
1055*4882a593Smuzhiyun */
qcom_smd_create_device(struct qcom_smd_channel * channel)1056*4882a593Smuzhiyun static int qcom_smd_create_device(struct qcom_smd_channel *channel)
1057*4882a593Smuzhiyun {
1058*4882a593Smuzhiyun struct qcom_smd_device *qsdev;
1059*4882a593Smuzhiyun struct rpmsg_device *rpdev;
1060*4882a593Smuzhiyun struct qcom_smd_edge *edge = channel->edge;
1061*4882a593Smuzhiyun
1062*4882a593Smuzhiyun dev_dbg(&edge->dev, "registering '%s'\n", channel->name);
1063*4882a593Smuzhiyun
1064*4882a593Smuzhiyun qsdev = kzalloc(sizeof(*qsdev), GFP_KERNEL);
1065*4882a593Smuzhiyun if (!qsdev)
1066*4882a593Smuzhiyun return -ENOMEM;
1067*4882a593Smuzhiyun
1068*4882a593Smuzhiyun /* Link qsdev to our SMD edge */
1069*4882a593Smuzhiyun qsdev->edge = edge;
1070*4882a593Smuzhiyun
1071*4882a593Smuzhiyun /* Assign callbacks for rpmsg_device */
1072*4882a593Smuzhiyun qsdev->rpdev.ops = &qcom_smd_device_ops;
1073*4882a593Smuzhiyun
1074*4882a593Smuzhiyun /* Assign public information to the rpmsg_device */
1075*4882a593Smuzhiyun rpdev = &qsdev->rpdev;
1076*4882a593Smuzhiyun strscpy_pad(rpdev->id.name, channel->name, RPMSG_NAME_SIZE);
1077*4882a593Smuzhiyun rpdev->src = RPMSG_ADDR_ANY;
1078*4882a593Smuzhiyun rpdev->dst = RPMSG_ADDR_ANY;
1079*4882a593Smuzhiyun
1080*4882a593Smuzhiyun rpdev->dev.of_node = qcom_smd_match_channel(edge->of_node, channel->name);
1081*4882a593Smuzhiyun rpdev->dev.parent = &edge->dev;
1082*4882a593Smuzhiyun rpdev->dev.release = qcom_smd_release_device;
1083*4882a593Smuzhiyun
1084*4882a593Smuzhiyun return rpmsg_register_device(rpdev);
1085*4882a593Smuzhiyun }
1086*4882a593Smuzhiyun
qcom_smd_create_chrdev(struct qcom_smd_edge * edge)1087*4882a593Smuzhiyun static int qcom_smd_create_chrdev(struct qcom_smd_edge *edge)
1088*4882a593Smuzhiyun {
1089*4882a593Smuzhiyun struct qcom_smd_device *qsdev;
1090*4882a593Smuzhiyun
1091*4882a593Smuzhiyun qsdev = kzalloc(sizeof(*qsdev), GFP_KERNEL);
1092*4882a593Smuzhiyun if (!qsdev)
1093*4882a593Smuzhiyun return -ENOMEM;
1094*4882a593Smuzhiyun
1095*4882a593Smuzhiyun qsdev->edge = edge;
1096*4882a593Smuzhiyun qsdev->rpdev.ops = &qcom_smd_device_ops;
1097*4882a593Smuzhiyun qsdev->rpdev.dev.parent = &edge->dev;
1098*4882a593Smuzhiyun qsdev->rpdev.dev.release = qcom_smd_release_device;
1099*4882a593Smuzhiyun
1100*4882a593Smuzhiyun return rpmsg_chrdev_register_device(&qsdev->rpdev);
1101*4882a593Smuzhiyun }
1102*4882a593Smuzhiyun
1103*4882a593Smuzhiyun /*
1104*4882a593Smuzhiyun * Allocate the qcom_smd_channel object for a newly found smd channel,
1105*4882a593Smuzhiyun * retrieving and validating the smem items involved.
1106*4882a593Smuzhiyun */
qcom_smd_create_channel(struct qcom_smd_edge * edge,unsigned smem_info_item,unsigned smem_fifo_item,char * name)1107*4882a593Smuzhiyun static struct qcom_smd_channel *qcom_smd_create_channel(struct qcom_smd_edge *edge,
1108*4882a593Smuzhiyun unsigned smem_info_item,
1109*4882a593Smuzhiyun unsigned smem_fifo_item,
1110*4882a593Smuzhiyun char *name)
1111*4882a593Smuzhiyun {
1112*4882a593Smuzhiyun struct qcom_smd_channel *channel;
1113*4882a593Smuzhiyun size_t fifo_size;
1114*4882a593Smuzhiyun size_t info_size;
1115*4882a593Smuzhiyun void *fifo_base;
1116*4882a593Smuzhiyun void *info;
1117*4882a593Smuzhiyun int ret;
1118*4882a593Smuzhiyun
1119*4882a593Smuzhiyun channel = kzalloc(sizeof(*channel), GFP_KERNEL);
1120*4882a593Smuzhiyun if (!channel)
1121*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
1122*4882a593Smuzhiyun
1123*4882a593Smuzhiyun channel->edge = edge;
1124*4882a593Smuzhiyun channel->name = kstrdup(name, GFP_KERNEL);
1125*4882a593Smuzhiyun if (!channel->name) {
1126*4882a593Smuzhiyun ret = -ENOMEM;
1127*4882a593Smuzhiyun goto free_channel;
1128*4882a593Smuzhiyun }
1129*4882a593Smuzhiyun
1130*4882a593Smuzhiyun spin_lock_init(&channel->tx_lock);
1131*4882a593Smuzhiyun spin_lock_init(&channel->recv_lock);
1132*4882a593Smuzhiyun init_waitqueue_head(&channel->fblockread_event);
1133*4882a593Smuzhiyun init_waitqueue_head(&channel->state_change_event);
1134*4882a593Smuzhiyun
1135*4882a593Smuzhiyun info = qcom_smem_get(edge->remote_pid, smem_info_item, &info_size);
1136*4882a593Smuzhiyun if (IS_ERR(info)) {
1137*4882a593Smuzhiyun ret = PTR_ERR(info);
1138*4882a593Smuzhiyun goto free_name_and_channel;
1139*4882a593Smuzhiyun }
1140*4882a593Smuzhiyun
1141*4882a593Smuzhiyun /*
1142*4882a593Smuzhiyun * Use the size of the item to figure out which channel info struct to
1143*4882a593Smuzhiyun * use.
1144*4882a593Smuzhiyun */
1145*4882a593Smuzhiyun if (info_size == 2 * sizeof(struct smd_channel_info_word)) {
1146*4882a593Smuzhiyun channel->info_word = info;
1147*4882a593Smuzhiyun } else if (info_size == 2 * sizeof(struct smd_channel_info)) {
1148*4882a593Smuzhiyun channel->info = info;
1149*4882a593Smuzhiyun } else {
1150*4882a593Smuzhiyun dev_err(&edge->dev,
1151*4882a593Smuzhiyun "channel info of size %zu not supported\n", info_size);
1152*4882a593Smuzhiyun ret = -EINVAL;
1153*4882a593Smuzhiyun goto free_name_and_channel;
1154*4882a593Smuzhiyun }
1155*4882a593Smuzhiyun
1156*4882a593Smuzhiyun fifo_base = qcom_smem_get(edge->remote_pid, smem_fifo_item, &fifo_size);
1157*4882a593Smuzhiyun if (IS_ERR(fifo_base)) {
1158*4882a593Smuzhiyun ret = PTR_ERR(fifo_base);
1159*4882a593Smuzhiyun goto free_name_and_channel;
1160*4882a593Smuzhiyun }
1161*4882a593Smuzhiyun
1162*4882a593Smuzhiyun /* The channel consist of a rx and tx fifo of equal size */
1163*4882a593Smuzhiyun fifo_size /= 2;
1164*4882a593Smuzhiyun
1165*4882a593Smuzhiyun dev_dbg(&edge->dev, "new channel '%s' info-size: %zu fifo-size: %zu\n",
1166*4882a593Smuzhiyun name, info_size, fifo_size);
1167*4882a593Smuzhiyun
1168*4882a593Smuzhiyun channel->tx_fifo = fifo_base;
1169*4882a593Smuzhiyun channel->rx_fifo = fifo_base + fifo_size;
1170*4882a593Smuzhiyun channel->fifo_size = fifo_size;
1171*4882a593Smuzhiyun
1172*4882a593Smuzhiyun qcom_smd_channel_reset(channel);
1173*4882a593Smuzhiyun
1174*4882a593Smuzhiyun return channel;
1175*4882a593Smuzhiyun
1176*4882a593Smuzhiyun free_name_and_channel:
1177*4882a593Smuzhiyun kfree(channel->name);
1178*4882a593Smuzhiyun free_channel:
1179*4882a593Smuzhiyun kfree(channel);
1180*4882a593Smuzhiyun
1181*4882a593Smuzhiyun return ERR_PTR(ret);
1182*4882a593Smuzhiyun }
1183*4882a593Smuzhiyun
1184*4882a593Smuzhiyun /*
1185*4882a593Smuzhiyun * Scans the allocation table for any newly allocated channels, calls
1186*4882a593Smuzhiyun * qcom_smd_create_channel() to create representations of these and add
1187*4882a593Smuzhiyun * them to the edge's list of channels.
1188*4882a593Smuzhiyun */
qcom_channel_scan_worker(struct work_struct * work)1189*4882a593Smuzhiyun static void qcom_channel_scan_worker(struct work_struct *work)
1190*4882a593Smuzhiyun {
1191*4882a593Smuzhiyun struct qcom_smd_edge *edge = container_of(work, struct qcom_smd_edge, scan_work);
1192*4882a593Smuzhiyun struct qcom_smd_alloc_entry *alloc_tbl;
1193*4882a593Smuzhiyun struct qcom_smd_alloc_entry *entry;
1194*4882a593Smuzhiyun struct qcom_smd_channel *channel;
1195*4882a593Smuzhiyun unsigned long flags;
1196*4882a593Smuzhiyun unsigned fifo_id;
1197*4882a593Smuzhiyun unsigned info_id;
1198*4882a593Smuzhiyun int tbl;
1199*4882a593Smuzhiyun int i;
1200*4882a593Smuzhiyun u32 eflags, cid;
1201*4882a593Smuzhiyun
1202*4882a593Smuzhiyun for (tbl = 0; tbl < SMD_ALLOC_TBL_COUNT; tbl++) {
1203*4882a593Smuzhiyun alloc_tbl = qcom_smem_get(edge->remote_pid,
1204*4882a593Smuzhiyun smem_items[tbl].alloc_tbl_id, NULL);
1205*4882a593Smuzhiyun if (IS_ERR(alloc_tbl))
1206*4882a593Smuzhiyun continue;
1207*4882a593Smuzhiyun
1208*4882a593Smuzhiyun for (i = 0; i < SMD_ALLOC_TBL_SIZE; i++) {
1209*4882a593Smuzhiyun entry = &alloc_tbl[i];
1210*4882a593Smuzhiyun eflags = le32_to_cpu(entry->flags);
1211*4882a593Smuzhiyun if (test_bit(i, edge->allocated[tbl]))
1212*4882a593Smuzhiyun continue;
1213*4882a593Smuzhiyun
1214*4882a593Smuzhiyun if (entry->ref_count == 0)
1215*4882a593Smuzhiyun continue;
1216*4882a593Smuzhiyun
1217*4882a593Smuzhiyun if (!entry->name[0])
1218*4882a593Smuzhiyun continue;
1219*4882a593Smuzhiyun
1220*4882a593Smuzhiyun if (!(eflags & SMD_CHANNEL_FLAGS_PACKET))
1221*4882a593Smuzhiyun continue;
1222*4882a593Smuzhiyun
1223*4882a593Smuzhiyun if ((eflags & SMD_CHANNEL_FLAGS_EDGE_MASK) != edge->edge_id)
1224*4882a593Smuzhiyun continue;
1225*4882a593Smuzhiyun
1226*4882a593Smuzhiyun cid = le32_to_cpu(entry->cid);
1227*4882a593Smuzhiyun info_id = smem_items[tbl].info_base_id + cid;
1228*4882a593Smuzhiyun fifo_id = smem_items[tbl].fifo_base_id + cid;
1229*4882a593Smuzhiyun
1230*4882a593Smuzhiyun channel = qcom_smd_create_channel(edge, info_id, fifo_id, entry->name);
1231*4882a593Smuzhiyun if (IS_ERR(channel))
1232*4882a593Smuzhiyun continue;
1233*4882a593Smuzhiyun
1234*4882a593Smuzhiyun spin_lock_irqsave(&edge->channels_lock, flags);
1235*4882a593Smuzhiyun list_add(&channel->list, &edge->channels);
1236*4882a593Smuzhiyun spin_unlock_irqrestore(&edge->channels_lock, flags);
1237*4882a593Smuzhiyun
1238*4882a593Smuzhiyun dev_dbg(&edge->dev, "new channel found: '%s'\n", channel->name);
1239*4882a593Smuzhiyun set_bit(i, edge->allocated[tbl]);
1240*4882a593Smuzhiyun
1241*4882a593Smuzhiyun wake_up_interruptible_all(&edge->new_channel_event);
1242*4882a593Smuzhiyun }
1243*4882a593Smuzhiyun }
1244*4882a593Smuzhiyun
1245*4882a593Smuzhiyun schedule_work(&edge->state_work);
1246*4882a593Smuzhiyun }
1247*4882a593Smuzhiyun
1248*4882a593Smuzhiyun /*
1249*4882a593Smuzhiyun * This per edge worker scans smem for any new channels and register these. It
1250*4882a593Smuzhiyun * then scans all registered channels for state changes that should be handled
1251*4882a593Smuzhiyun * by creating or destroying smd client devices for the registered channels.
1252*4882a593Smuzhiyun *
1253*4882a593Smuzhiyun * LOCKING: edge->channels_lock only needs to cover the list operations, as the
1254*4882a593Smuzhiyun * worker is killed before any channels are deallocated
1255*4882a593Smuzhiyun */
qcom_channel_state_worker(struct work_struct * work)1256*4882a593Smuzhiyun static void qcom_channel_state_worker(struct work_struct *work)
1257*4882a593Smuzhiyun {
1258*4882a593Smuzhiyun struct qcom_smd_channel *channel;
1259*4882a593Smuzhiyun struct qcom_smd_edge *edge = container_of(work,
1260*4882a593Smuzhiyun struct qcom_smd_edge,
1261*4882a593Smuzhiyun state_work);
1262*4882a593Smuzhiyun struct rpmsg_channel_info chinfo;
1263*4882a593Smuzhiyun unsigned remote_state;
1264*4882a593Smuzhiyun unsigned long flags;
1265*4882a593Smuzhiyun
1266*4882a593Smuzhiyun /*
1267*4882a593Smuzhiyun * Register a device for any closed channel where the remote processor
1268*4882a593Smuzhiyun * is showing interest in opening the channel.
1269*4882a593Smuzhiyun */
1270*4882a593Smuzhiyun spin_lock_irqsave(&edge->channels_lock, flags);
1271*4882a593Smuzhiyun list_for_each_entry(channel, &edge->channels, list) {
1272*4882a593Smuzhiyun if (channel->state != SMD_CHANNEL_CLOSED)
1273*4882a593Smuzhiyun continue;
1274*4882a593Smuzhiyun
1275*4882a593Smuzhiyun remote_state = GET_RX_CHANNEL_INFO(channel, state);
1276*4882a593Smuzhiyun if (remote_state != SMD_CHANNEL_OPENING &&
1277*4882a593Smuzhiyun remote_state != SMD_CHANNEL_OPENED)
1278*4882a593Smuzhiyun continue;
1279*4882a593Smuzhiyun
1280*4882a593Smuzhiyun if (channel->registered)
1281*4882a593Smuzhiyun continue;
1282*4882a593Smuzhiyun
1283*4882a593Smuzhiyun spin_unlock_irqrestore(&edge->channels_lock, flags);
1284*4882a593Smuzhiyun qcom_smd_create_device(channel);
1285*4882a593Smuzhiyun channel->registered = true;
1286*4882a593Smuzhiyun spin_lock_irqsave(&edge->channels_lock, flags);
1287*4882a593Smuzhiyun
1288*4882a593Smuzhiyun channel->registered = true;
1289*4882a593Smuzhiyun }
1290*4882a593Smuzhiyun
1291*4882a593Smuzhiyun /*
1292*4882a593Smuzhiyun * Unregister the device for any channel that is opened where the
1293*4882a593Smuzhiyun * remote processor is closing the channel.
1294*4882a593Smuzhiyun */
1295*4882a593Smuzhiyun list_for_each_entry(channel, &edge->channels, list) {
1296*4882a593Smuzhiyun if (channel->state != SMD_CHANNEL_OPENING &&
1297*4882a593Smuzhiyun channel->state != SMD_CHANNEL_OPENED)
1298*4882a593Smuzhiyun continue;
1299*4882a593Smuzhiyun
1300*4882a593Smuzhiyun remote_state = GET_RX_CHANNEL_INFO(channel, state);
1301*4882a593Smuzhiyun if (remote_state == SMD_CHANNEL_OPENING ||
1302*4882a593Smuzhiyun remote_state == SMD_CHANNEL_OPENED)
1303*4882a593Smuzhiyun continue;
1304*4882a593Smuzhiyun
1305*4882a593Smuzhiyun spin_unlock_irqrestore(&edge->channels_lock, flags);
1306*4882a593Smuzhiyun
1307*4882a593Smuzhiyun strscpy_pad(chinfo.name, channel->name, sizeof(chinfo.name));
1308*4882a593Smuzhiyun chinfo.src = RPMSG_ADDR_ANY;
1309*4882a593Smuzhiyun chinfo.dst = RPMSG_ADDR_ANY;
1310*4882a593Smuzhiyun rpmsg_unregister_device(&edge->dev, &chinfo);
1311*4882a593Smuzhiyun channel->registered = false;
1312*4882a593Smuzhiyun spin_lock_irqsave(&edge->channels_lock, flags);
1313*4882a593Smuzhiyun }
1314*4882a593Smuzhiyun spin_unlock_irqrestore(&edge->channels_lock, flags);
1315*4882a593Smuzhiyun }
1316*4882a593Smuzhiyun
1317*4882a593Smuzhiyun /*
1318*4882a593Smuzhiyun * Parses an of_node describing an edge.
1319*4882a593Smuzhiyun */
qcom_smd_parse_edge(struct device * dev,struct device_node * node,struct qcom_smd_edge * edge)1320*4882a593Smuzhiyun static int qcom_smd_parse_edge(struct device *dev,
1321*4882a593Smuzhiyun struct device_node *node,
1322*4882a593Smuzhiyun struct qcom_smd_edge *edge)
1323*4882a593Smuzhiyun {
1324*4882a593Smuzhiyun struct device_node *syscon_np;
1325*4882a593Smuzhiyun const char *key;
1326*4882a593Smuzhiyun int irq;
1327*4882a593Smuzhiyun int ret;
1328*4882a593Smuzhiyun
1329*4882a593Smuzhiyun INIT_LIST_HEAD(&edge->channels);
1330*4882a593Smuzhiyun spin_lock_init(&edge->channels_lock);
1331*4882a593Smuzhiyun
1332*4882a593Smuzhiyun INIT_WORK(&edge->scan_work, qcom_channel_scan_worker);
1333*4882a593Smuzhiyun INIT_WORK(&edge->state_work, qcom_channel_state_worker);
1334*4882a593Smuzhiyun
1335*4882a593Smuzhiyun edge->of_node = of_node_get(node);
1336*4882a593Smuzhiyun
1337*4882a593Smuzhiyun key = "qcom,smd-edge";
1338*4882a593Smuzhiyun ret = of_property_read_u32(node, key, &edge->edge_id);
1339*4882a593Smuzhiyun if (ret) {
1340*4882a593Smuzhiyun dev_err(dev, "edge missing %s property\n", key);
1341*4882a593Smuzhiyun goto put_node;
1342*4882a593Smuzhiyun }
1343*4882a593Smuzhiyun
1344*4882a593Smuzhiyun edge->remote_pid = QCOM_SMEM_HOST_ANY;
1345*4882a593Smuzhiyun key = "qcom,remote-pid";
1346*4882a593Smuzhiyun of_property_read_u32(node, key, &edge->remote_pid);
1347*4882a593Smuzhiyun
1348*4882a593Smuzhiyun edge->mbox_client.dev = dev;
1349*4882a593Smuzhiyun edge->mbox_client.knows_txdone = true;
1350*4882a593Smuzhiyun edge->mbox_chan = mbox_request_channel(&edge->mbox_client, 0);
1351*4882a593Smuzhiyun if (IS_ERR(edge->mbox_chan)) {
1352*4882a593Smuzhiyun if (PTR_ERR(edge->mbox_chan) != -ENODEV) {
1353*4882a593Smuzhiyun ret = PTR_ERR(edge->mbox_chan);
1354*4882a593Smuzhiyun goto put_node;
1355*4882a593Smuzhiyun }
1356*4882a593Smuzhiyun
1357*4882a593Smuzhiyun edge->mbox_chan = NULL;
1358*4882a593Smuzhiyun
1359*4882a593Smuzhiyun syscon_np = of_parse_phandle(node, "qcom,ipc", 0);
1360*4882a593Smuzhiyun if (!syscon_np) {
1361*4882a593Smuzhiyun dev_err(dev, "no qcom,ipc node\n");
1362*4882a593Smuzhiyun ret = -ENODEV;
1363*4882a593Smuzhiyun goto put_node;
1364*4882a593Smuzhiyun }
1365*4882a593Smuzhiyun
1366*4882a593Smuzhiyun edge->ipc_regmap = syscon_node_to_regmap(syscon_np);
1367*4882a593Smuzhiyun of_node_put(syscon_np);
1368*4882a593Smuzhiyun if (IS_ERR(edge->ipc_regmap)) {
1369*4882a593Smuzhiyun ret = PTR_ERR(edge->ipc_regmap);
1370*4882a593Smuzhiyun goto put_node;
1371*4882a593Smuzhiyun }
1372*4882a593Smuzhiyun
1373*4882a593Smuzhiyun key = "qcom,ipc";
1374*4882a593Smuzhiyun ret = of_property_read_u32_index(node, key, 1, &edge->ipc_offset);
1375*4882a593Smuzhiyun if (ret < 0) {
1376*4882a593Smuzhiyun dev_err(dev, "no offset in %s\n", key);
1377*4882a593Smuzhiyun goto put_node;
1378*4882a593Smuzhiyun }
1379*4882a593Smuzhiyun
1380*4882a593Smuzhiyun ret = of_property_read_u32_index(node, key, 2, &edge->ipc_bit);
1381*4882a593Smuzhiyun if (ret < 0) {
1382*4882a593Smuzhiyun dev_err(dev, "no bit in %s\n", key);
1383*4882a593Smuzhiyun goto put_node;
1384*4882a593Smuzhiyun }
1385*4882a593Smuzhiyun }
1386*4882a593Smuzhiyun
1387*4882a593Smuzhiyun ret = of_property_read_string(node, "label", &edge->name);
1388*4882a593Smuzhiyun if (ret < 0)
1389*4882a593Smuzhiyun edge->name = node->name;
1390*4882a593Smuzhiyun
1391*4882a593Smuzhiyun irq = irq_of_parse_and_map(node, 0);
1392*4882a593Smuzhiyun if (!irq) {
1393*4882a593Smuzhiyun dev_err(dev, "required smd interrupt missing\n");
1394*4882a593Smuzhiyun ret = -EINVAL;
1395*4882a593Smuzhiyun goto put_node;
1396*4882a593Smuzhiyun }
1397*4882a593Smuzhiyun
1398*4882a593Smuzhiyun ret = devm_request_irq(dev, irq,
1399*4882a593Smuzhiyun qcom_smd_edge_intr, IRQF_TRIGGER_RISING,
1400*4882a593Smuzhiyun node->name, edge);
1401*4882a593Smuzhiyun if (ret) {
1402*4882a593Smuzhiyun dev_err(dev, "failed to request smd irq\n");
1403*4882a593Smuzhiyun goto put_node;
1404*4882a593Smuzhiyun }
1405*4882a593Smuzhiyun
1406*4882a593Smuzhiyun edge->irq = irq;
1407*4882a593Smuzhiyun
1408*4882a593Smuzhiyun return 0;
1409*4882a593Smuzhiyun
1410*4882a593Smuzhiyun put_node:
1411*4882a593Smuzhiyun of_node_put(node);
1412*4882a593Smuzhiyun edge->of_node = NULL;
1413*4882a593Smuzhiyun
1414*4882a593Smuzhiyun return ret;
1415*4882a593Smuzhiyun }
1416*4882a593Smuzhiyun
1417*4882a593Smuzhiyun /*
1418*4882a593Smuzhiyun * Release function for an edge.
1419*4882a593Smuzhiyun * Reset the state of each associated channel and free the edge context.
1420*4882a593Smuzhiyun */
qcom_smd_edge_release(struct device * dev)1421*4882a593Smuzhiyun static void qcom_smd_edge_release(struct device *dev)
1422*4882a593Smuzhiyun {
1423*4882a593Smuzhiyun struct qcom_smd_channel *channel, *tmp;
1424*4882a593Smuzhiyun struct qcom_smd_edge *edge = to_smd_edge(dev);
1425*4882a593Smuzhiyun
1426*4882a593Smuzhiyun list_for_each_entry_safe(channel, tmp, &edge->channels, list) {
1427*4882a593Smuzhiyun list_del(&channel->list);
1428*4882a593Smuzhiyun kfree(channel->name);
1429*4882a593Smuzhiyun kfree(channel);
1430*4882a593Smuzhiyun }
1431*4882a593Smuzhiyun
1432*4882a593Smuzhiyun kfree(edge);
1433*4882a593Smuzhiyun }
1434*4882a593Smuzhiyun
rpmsg_name_show(struct device * dev,struct device_attribute * attr,char * buf)1435*4882a593Smuzhiyun static ssize_t rpmsg_name_show(struct device *dev,
1436*4882a593Smuzhiyun struct device_attribute *attr, char *buf)
1437*4882a593Smuzhiyun {
1438*4882a593Smuzhiyun struct qcom_smd_edge *edge = to_smd_edge(dev);
1439*4882a593Smuzhiyun
1440*4882a593Smuzhiyun return sprintf(buf, "%s\n", edge->name);
1441*4882a593Smuzhiyun }
1442*4882a593Smuzhiyun static DEVICE_ATTR_RO(rpmsg_name);
1443*4882a593Smuzhiyun
1444*4882a593Smuzhiyun static struct attribute *qcom_smd_edge_attrs[] = {
1445*4882a593Smuzhiyun &dev_attr_rpmsg_name.attr,
1446*4882a593Smuzhiyun NULL
1447*4882a593Smuzhiyun };
1448*4882a593Smuzhiyun ATTRIBUTE_GROUPS(qcom_smd_edge);
1449*4882a593Smuzhiyun
1450*4882a593Smuzhiyun /**
1451*4882a593Smuzhiyun * qcom_smd_register_edge() - register an edge based on an device_node
1452*4882a593Smuzhiyun * @parent: parent device for the edge
1453*4882a593Smuzhiyun * @node: device_node describing the edge
1454*4882a593Smuzhiyun *
1455*4882a593Smuzhiyun * Returns an edge reference, or negative ERR_PTR() on failure.
1456*4882a593Smuzhiyun */
qcom_smd_register_edge(struct device * parent,struct device_node * node)1457*4882a593Smuzhiyun struct qcom_smd_edge *qcom_smd_register_edge(struct device *parent,
1458*4882a593Smuzhiyun struct device_node *node)
1459*4882a593Smuzhiyun {
1460*4882a593Smuzhiyun struct qcom_smd_edge *edge;
1461*4882a593Smuzhiyun int ret;
1462*4882a593Smuzhiyun
1463*4882a593Smuzhiyun edge = kzalloc(sizeof(*edge), GFP_KERNEL);
1464*4882a593Smuzhiyun if (!edge)
1465*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
1466*4882a593Smuzhiyun
1467*4882a593Smuzhiyun init_waitqueue_head(&edge->new_channel_event);
1468*4882a593Smuzhiyun
1469*4882a593Smuzhiyun edge->dev.parent = parent;
1470*4882a593Smuzhiyun edge->dev.release = qcom_smd_edge_release;
1471*4882a593Smuzhiyun edge->dev.of_node = node;
1472*4882a593Smuzhiyun edge->dev.groups = qcom_smd_edge_groups;
1473*4882a593Smuzhiyun dev_set_name(&edge->dev, "%s:%pOFn", dev_name(parent), node);
1474*4882a593Smuzhiyun ret = device_register(&edge->dev);
1475*4882a593Smuzhiyun if (ret) {
1476*4882a593Smuzhiyun pr_err("failed to register smd edge\n");
1477*4882a593Smuzhiyun put_device(&edge->dev);
1478*4882a593Smuzhiyun return ERR_PTR(ret);
1479*4882a593Smuzhiyun }
1480*4882a593Smuzhiyun
1481*4882a593Smuzhiyun ret = qcom_smd_parse_edge(&edge->dev, node, edge);
1482*4882a593Smuzhiyun if (ret) {
1483*4882a593Smuzhiyun dev_err(&edge->dev, "failed to parse smd edge\n");
1484*4882a593Smuzhiyun goto unregister_dev;
1485*4882a593Smuzhiyun }
1486*4882a593Smuzhiyun
1487*4882a593Smuzhiyun ret = qcom_smd_create_chrdev(edge);
1488*4882a593Smuzhiyun if (ret) {
1489*4882a593Smuzhiyun dev_err(&edge->dev, "failed to register chrdev for edge\n");
1490*4882a593Smuzhiyun goto unregister_dev;
1491*4882a593Smuzhiyun }
1492*4882a593Smuzhiyun
1493*4882a593Smuzhiyun schedule_work(&edge->scan_work);
1494*4882a593Smuzhiyun
1495*4882a593Smuzhiyun return edge;
1496*4882a593Smuzhiyun
1497*4882a593Smuzhiyun unregister_dev:
1498*4882a593Smuzhiyun if (!IS_ERR_OR_NULL(edge->mbox_chan))
1499*4882a593Smuzhiyun mbox_free_channel(edge->mbox_chan);
1500*4882a593Smuzhiyun
1501*4882a593Smuzhiyun device_unregister(&edge->dev);
1502*4882a593Smuzhiyun return ERR_PTR(ret);
1503*4882a593Smuzhiyun }
1504*4882a593Smuzhiyun EXPORT_SYMBOL(qcom_smd_register_edge);
1505*4882a593Smuzhiyun
qcom_smd_remove_device(struct device * dev,void * data)1506*4882a593Smuzhiyun static int qcom_smd_remove_device(struct device *dev, void *data)
1507*4882a593Smuzhiyun {
1508*4882a593Smuzhiyun device_unregister(dev);
1509*4882a593Smuzhiyun
1510*4882a593Smuzhiyun return 0;
1511*4882a593Smuzhiyun }
1512*4882a593Smuzhiyun
1513*4882a593Smuzhiyun /**
1514*4882a593Smuzhiyun * qcom_smd_unregister_edge() - release an edge and its children
1515*4882a593Smuzhiyun * @edge: edge reference acquired from qcom_smd_register_edge
1516*4882a593Smuzhiyun */
qcom_smd_unregister_edge(struct qcom_smd_edge * edge)1517*4882a593Smuzhiyun int qcom_smd_unregister_edge(struct qcom_smd_edge *edge)
1518*4882a593Smuzhiyun {
1519*4882a593Smuzhiyun int ret;
1520*4882a593Smuzhiyun
1521*4882a593Smuzhiyun disable_irq(edge->irq);
1522*4882a593Smuzhiyun cancel_work_sync(&edge->scan_work);
1523*4882a593Smuzhiyun cancel_work_sync(&edge->state_work);
1524*4882a593Smuzhiyun
1525*4882a593Smuzhiyun ret = device_for_each_child(&edge->dev, NULL, qcom_smd_remove_device);
1526*4882a593Smuzhiyun if (ret)
1527*4882a593Smuzhiyun dev_warn(&edge->dev, "can't remove smd device: %d\n", ret);
1528*4882a593Smuzhiyun
1529*4882a593Smuzhiyun mbox_free_channel(edge->mbox_chan);
1530*4882a593Smuzhiyun device_unregister(&edge->dev);
1531*4882a593Smuzhiyun
1532*4882a593Smuzhiyun return 0;
1533*4882a593Smuzhiyun }
1534*4882a593Smuzhiyun EXPORT_SYMBOL(qcom_smd_unregister_edge);
1535*4882a593Smuzhiyun
qcom_smd_probe(struct platform_device * pdev)1536*4882a593Smuzhiyun static int qcom_smd_probe(struct platform_device *pdev)
1537*4882a593Smuzhiyun {
1538*4882a593Smuzhiyun struct device_node *node;
1539*4882a593Smuzhiyun void *p;
1540*4882a593Smuzhiyun
1541*4882a593Smuzhiyun /* Wait for smem */
1542*4882a593Smuzhiyun p = qcom_smem_get(QCOM_SMEM_HOST_ANY, smem_items[0].alloc_tbl_id, NULL);
1543*4882a593Smuzhiyun if (PTR_ERR(p) == -EPROBE_DEFER)
1544*4882a593Smuzhiyun return PTR_ERR(p);
1545*4882a593Smuzhiyun
1546*4882a593Smuzhiyun for_each_available_child_of_node(pdev->dev.of_node, node)
1547*4882a593Smuzhiyun qcom_smd_register_edge(&pdev->dev, node);
1548*4882a593Smuzhiyun
1549*4882a593Smuzhiyun return 0;
1550*4882a593Smuzhiyun }
1551*4882a593Smuzhiyun
qcom_smd_remove_edge(struct device * dev,void * data)1552*4882a593Smuzhiyun static int qcom_smd_remove_edge(struct device *dev, void *data)
1553*4882a593Smuzhiyun {
1554*4882a593Smuzhiyun struct qcom_smd_edge *edge = to_smd_edge(dev);
1555*4882a593Smuzhiyun
1556*4882a593Smuzhiyun return qcom_smd_unregister_edge(edge);
1557*4882a593Smuzhiyun }
1558*4882a593Smuzhiyun
1559*4882a593Smuzhiyun /*
1560*4882a593Smuzhiyun * Shut down all smd clients by making sure that each edge stops processing
1561*4882a593Smuzhiyun * events and scanning for new channels, then call destroy on the devices.
1562*4882a593Smuzhiyun */
qcom_smd_remove(struct platform_device * pdev)1563*4882a593Smuzhiyun static int qcom_smd_remove(struct platform_device *pdev)
1564*4882a593Smuzhiyun {
1565*4882a593Smuzhiyun int ret;
1566*4882a593Smuzhiyun
1567*4882a593Smuzhiyun ret = device_for_each_child(&pdev->dev, NULL, qcom_smd_remove_edge);
1568*4882a593Smuzhiyun if (ret)
1569*4882a593Smuzhiyun dev_warn(&pdev->dev, "can't remove smd device: %d\n", ret);
1570*4882a593Smuzhiyun
1571*4882a593Smuzhiyun return ret;
1572*4882a593Smuzhiyun }
1573*4882a593Smuzhiyun
1574*4882a593Smuzhiyun static const struct of_device_id qcom_smd_of_match[] = {
1575*4882a593Smuzhiyun { .compatible = "qcom,smd" },
1576*4882a593Smuzhiyun {}
1577*4882a593Smuzhiyun };
1578*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, qcom_smd_of_match);
1579*4882a593Smuzhiyun
1580*4882a593Smuzhiyun static struct platform_driver qcom_smd_driver = {
1581*4882a593Smuzhiyun .probe = qcom_smd_probe,
1582*4882a593Smuzhiyun .remove = qcom_smd_remove,
1583*4882a593Smuzhiyun .driver = {
1584*4882a593Smuzhiyun .name = "qcom-smd",
1585*4882a593Smuzhiyun .of_match_table = qcom_smd_of_match,
1586*4882a593Smuzhiyun },
1587*4882a593Smuzhiyun };
1588*4882a593Smuzhiyun
qcom_smd_init(void)1589*4882a593Smuzhiyun static int __init qcom_smd_init(void)
1590*4882a593Smuzhiyun {
1591*4882a593Smuzhiyun return platform_driver_register(&qcom_smd_driver);
1592*4882a593Smuzhiyun }
1593*4882a593Smuzhiyun subsys_initcall(qcom_smd_init);
1594*4882a593Smuzhiyun
qcom_smd_exit(void)1595*4882a593Smuzhiyun static void __exit qcom_smd_exit(void)
1596*4882a593Smuzhiyun {
1597*4882a593Smuzhiyun platform_driver_unregister(&qcom_smd_driver);
1598*4882a593Smuzhiyun }
1599*4882a593Smuzhiyun module_exit(qcom_smd_exit);
1600*4882a593Smuzhiyun
1601*4882a593Smuzhiyun MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>");
1602*4882a593Smuzhiyun MODULE_DESCRIPTION("Qualcomm Shared Memory Driver");
1603*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
1604