1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2016-2017, Linaro Ltd
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <linux/idr.h>
7*4882a593Smuzhiyun #include <linux/interrupt.h>
8*4882a593Smuzhiyun #include <linux/io.h>
9*4882a593Smuzhiyun #include <linux/list.h>
10*4882a593Smuzhiyun #include <linux/mfd/syscon.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/of.h>
13*4882a593Smuzhiyun #include <linux/of_address.h>
14*4882a593Smuzhiyun #include <linux/platform_device.h>
15*4882a593Smuzhiyun #include <linux/regmap.h>
16*4882a593Smuzhiyun #include <linux/rpmsg.h>
17*4882a593Smuzhiyun #include <linux/slab.h>
18*4882a593Smuzhiyun #include <linux/workqueue.h>
19*4882a593Smuzhiyun #include <linux/mailbox_client.h>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #include "rpmsg_internal.h"
22*4882a593Smuzhiyun #include "qcom_glink_native.h"
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #define RPM_TOC_SIZE 256
25*4882a593Smuzhiyun #define RPM_TOC_MAGIC 0x67727430 /* grt0 */
26*4882a593Smuzhiyun #define RPM_TOC_MAX_ENTRIES ((RPM_TOC_SIZE - sizeof(struct rpm_toc)) / \
27*4882a593Smuzhiyun sizeof(struct rpm_toc_entry))
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #define RPM_TX_FIFO_ID 0x61703272 /* ap2r */
30*4882a593Smuzhiyun #define RPM_RX_FIFO_ID 0x72326170 /* r2ap */
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #define to_rpm_pipe(p) container_of(p, struct glink_rpm_pipe, native)
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun struct rpm_toc_entry {
35*4882a593Smuzhiyun __le32 id;
36*4882a593Smuzhiyun __le32 offset;
37*4882a593Smuzhiyun __le32 size;
38*4882a593Smuzhiyun } __packed;
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun struct rpm_toc {
41*4882a593Smuzhiyun __le32 magic;
42*4882a593Smuzhiyun __le32 count;
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun struct rpm_toc_entry entries[];
45*4882a593Smuzhiyun } __packed;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun struct glink_rpm_pipe {
48*4882a593Smuzhiyun struct qcom_glink_pipe native;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun void __iomem *tail;
51*4882a593Smuzhiyun void __iomem *head;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun void __iomem *fifo;
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun
glink_rpm_rx_avail(struct qcom_glink_pipe * glink_pipe)56*4882a593Smuzhiyun static size_t glink_rpm_rx_avail(struct qcom_glink_pipe *glink_pipe)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe);
59*4882a593Smuzhiyun unsigned int head;
60*4882a593Smuzhiyun unsigned int tail;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun head = readl(pipe->head);
63*4882a593Smuzhiyun tail = readl(pipe->tail);
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun if (head < tail)
66*4882a593Smuzhiyun return pipe->native.length - tail + head;
67*4882a593Smuzhiyun else
68*4882a593Smuzhiyun return head - tail;
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun
glink_rpm_rx_peak(struct qcom_glink_pipe * glink_pipe,void * data,unsigned int offset,size_t count)71*4882a593Smuzhiyun static void glink_rpm_rx_peak(struct qcom_glink_pipe *glink_pipe,
72*4882a593Smuzhiyun void *data, unsigned int offset, size_t count)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe);
75*4882a593Smuzhiyun unsigned int tail;
76*4882a593Smuzhiyun size_t len;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun tail = readl(pipe->tail);
79*4882a593Smuzhiyun tail += offset;
80*4882a593Smuzhiyun if (tail >= pipe->native.length)
81*4882a593Smuzhiyun tail -= pipe->native.length;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun len = min_t(size_t, count, pipe->native.length - tail);
84*4882a593Smuzhiyun if (len) {
85*4882a593Smuzhiyun __ioread32_copy(data, pipe->fifo + tail,
86*4882a593Smuzhiyun len / sizeof(u32));
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun if (len != count) {
90*4882a593Smuzhiyun __ioread32_copy(data + len, pipe->fifo,
91*4882a593Smuzhiyun (count - len) / sizeof(u32));
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
glink_rpm_rx_advance(struct qcom_glink_pipe * glink_pipe,size_t count)95*4882a593Smuzhiyun static void glink_rpm_rx_advance(struct qcom_glink_pipe *glink_pipe,
96*4882a593Smuzhiyun size_t count)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe);
99*4882a593Smuzhiyun unsigned int tail;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun tail = readl(pipe->tail);
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun tail += count;
104*4882a593Smuzhiyun if (tail >= pipe->native.length)
105*4882a593Smuzhiyun tail -= pipe->native.length;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun writel(tail, pipe->tail);
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun
glink_rpm_tx_avail(struct qcom_glink_pipe * glink_pipe)110*4882a593Smuzhiyun static size_t glink_rpm_tx_avail(struct qcom_glink_pipe *glink_pipe)
111*4882a593Smuzhiyun {
112*4882a593Smuzhiyun struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe);
113*4882a593Smuzhiyun unsigned int head;
114*4882a593Smuzhiyun unsigned int tail;
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun head = readl(pipe->head);
117*4882a593Smuzhiyun tail = readl(pipe->tail);
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun if (tail <= head)
120*4882a593Smuzhiyun return pipe->native.length - head + tail;
121*4882a593Smuzhiyun else
122*4882a593Smuzhiyun return tail - head;
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun
glink_rpm_tx_write_one(struct glink_rpm_pipe * pipe,unsigned int head,const void * data,size_t count)125*4882a593Smuzhiyun static unsigned int glink_rpm_tx_write_one(struct glink_rpm_pipe *pipe,
126*4882a593Smuzhiyun unsigned int head,
127*4882a593Smuzhiyun const void *data, size_t count)
128*4882a593Smuzhiyun {
129*4882a593Smuzhiyun size_t len;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun len = min_t(size_t, count, pipe->native.length - head);
132*4882a593Smuzhiyun if (len) {
133*4882a593Smuzhiyun __iowrite32_copy(pipe->fifo + head, data,
134*4882a593Smuzhiyun len / sizeof(u32));
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun if (len != count) {
138*4882a593Smuzhiyun __iowrite32_copy(pipe->fifo, data + len,
139*4882a593Smuzhiyun (count - len) / sizeof(u32));
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun head += count;
143*4882a593Smuzhiyun if (head >= pipe->native.length)
144*4882a593Smuzhiyun head -= pipe->native.length;
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun return head;
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun
glink_rpm_tx_write(struct qcom_glink_pipe * glink_pipe,const void * hdr,size_t hlen,const void * data,size_t dlen)149*4882a593Smuzhiyun static void glink_rpm_tx_write(struct qcom_glink_pipe *glink_pipe,
150*4882a593Smuzhiyun const void *hdr, size_t hlen,
151*4882a593Smuzhiyun const void *data, size_t dlen)
152*4882a593Smuzhiyun {
153*4882a593Smuzhiyun struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe);
154*4882a593Smuzhiyun size_t tlen = hlen + dlen;
155*4882a593Smuzhiyun size_t aligned_dlen;
156*4882a593Smuzhiyun unsigned int head;
157*4882a593Smuzhiyun char padding[8] = {0};
158*4882a593Smuzhiyun size_t pad;
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun /* Header length comes from glink native and is always 4 byte aligned */
161*4882a593Smuzhiyun if (WARN(hlen % 4, "Glink Header length must be 4 bytes aligned\n"))
162*4882a593Smuzhiyun return;
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun /*
165*4882a593Smuzhiyun * Move the unaligned tail of the message to the padding chunk, to
166*4882a593Smuzhiyun * ensure word aligned accesses
167*4882a593Smuzhiyun */
168*4882a593Smuzhiyun aligned_dlen = ALIGN_DOWN(dlen, 4);
169*4882a593Smuzhiyun if (aligned_dlen != dlen)
170*4882a593Smuzhiyun memcpy(padding, data + aligned_dlen, dlen - aligned_dlen);
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun head = readl(pipe->head);
173*4882a593Smuzhiyun head = glink_rpm_tx_write_one(pipe, head, hdr, hlen);
174*4882a593Smuzhiyun head = glink_rpm_tx_write_one(pipe, head, data, aligned_dlen);
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun pad = ALIGN(tlen, 8) - ALIGN_DOWN(tlen, 4);
177*4882a593Smuzhiyun if (pad)
178*4882a593Smuzhiyun head = glink_rpm_tx_write_one(pipe, head, padding, pad);
179*4882a593Smuzhiyun writel(head, pipe->head);
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun
glink_rpm_parse_toc(struct device * dev,void __iomem * msg_ram,size_t msg_ram_size,struct glink_rpm_pipe * rx,struct glink_rpm_pipe * tx)182*4882a593Smuzhiyun static int glink_rpm_parse_toc(struct device *dev,
183*4882a593Smuzhiyun void __iomem *msg_ram,
184*4882a593Smuzhiyun size_t msg_ram_size,
185*4882a593Smuzhiyun struct glink_rpm_pipe *rx,
186*4882a593Smuzhiyun struct glink_rpm_pipe *tx)
187*4882a593Smuzhiyun {
188*4882a593Smuzhiyun struct rpm_toc *toc;
189*4882a593Smuzhiyun int num_entries;
190*4882a593Smuzhiyun unsigned int id;
191*4882a593Smuzhiyun size_t offset;
192*4882a593Smuzhiyun size_t size;
193*4882a593Smuzhiyun void *buf;
194*4882a593Smuzhiyun int i;
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun buf = kzalloc(RPM_TOC_SIZE, GFP_KERNEL);
197*4882a593Smuzhiyun if (!buf)
198*4882a593Smuzhiyun return -ENOMEM;
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun __ioread32_copy(buf, msg_ram + msg_ram_size - RPM_TOC_SIZE,
201*4882a593Smuzhiyun RPM_TOC_SIZE / sizeof(u32));
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun toc = buf;
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun if (le32_to_cpu(toc->magic) != RPM_TOC_MAGIC) {
206*4882a593Smuzhiyun dev_err(dev, "RPM TOC has invalid magic\n");
207*4882a593Smuzhiyun goto err_inval;
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun num_entries = le32_to_cpu(toc->count);
211*4882a593Smuzhiyun if (num_entries > RPM_TOC_MAX_ENTRIES) {
212*4882a593Smuzhiyun dev_err(dev, "Invalid number of toc entries\n");
213*4882a593Smuzhiyun goto err_inval;
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun for (i = 0; i < num_entries; i++) {
217*4882a593Smuzhiyun id = le32_to_cpu(toc->entries[i].id);
218*4882a593Smuzhiyun offset = le32_to_cpu(toc->entries[i].offset);
219*4882a593Smuzhiyun size = le32_to_cpu(toc->entries[i].size);
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun if (offset > msg_ram_size || offset + size > msg_ram_size) {
222*4882a593Smuzhiyun dev_err(dev, "TOC entry with invalid size\n");
223*4882a593Smuzhiyun continue;
224*4882a593Smuzhiyun }
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun switch (id) {
227*4882a593Smuzhiyun case RPM_RX_FIFO_ID:
228*4882a593Smuzhiyun rx->native.length = size;
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun rx->tail = msg_ram + offset;
231*4882a593Smuzhiyun rx->head = msg_ram + offset + sizeof(u32);
232*4882a593Smuzhiyun rx->fifo = msg_ram + offset + 2 * sizeof(u32);
233*4882a593Smuzhiyun break;
234*4882a593Smuzhiyun case RPM_TX_FIFO_ID:
235*4882a593Smuzhiyun tx->native.length = size;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun tx->tail = msg_ram + offset;
238*4882a593Smuzhiyun tx->head = msg_ram + offset + sizeof(u32);
239*4882a593Smuzhiyun tx->fifo = msg_ram + offset + 2 * sizeof(u32);
240*4882a593Smuzhiyun break;
241*4882a593Smuzhiyun }
242*4882a593Smuzhiyun }
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun if (!rx->fifo || !tx->fifo) {
245*4882a593Smuzhiyun dev_err(dev, "Unable to find rx and tx descriptors\n");
246*4882a593Smuzhiyun goto err_inval;
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun kfree(buf);
250*4882a593Smuzhiyun return 0;
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun err_inval:
253*4882a593Smuzhiyun kfree(buf);
254*4882a593Smuzhiyun return -EINVAL;
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun
glink_rpm_probe(struct platform_device * pdev)257*4882a593Smuzhiyun static int glink_rpm_probe(struct platform_device *pdev)
258*4882a593Smuzhiyun {
259*4882a593Smuzhiyun struct qcom_glink *glink;
260*4882a593Smuzhiyun struct glink_rpm_pipe *rx_pipe;
261*4882a593Smuzhiyun struct glink_rpm_pipe *tx_pipe;
262*4882a593Smuzhiyun struct device_node *np;
263*4882a593Smuzhiyun void __iomem *msg_ram;
264*4882a593Smuzhiyun size_t msg_ram_size;
265*4882a593Smuzhiyun struct device *dev = &pdev->dev;
266*4882a593Smuzhiyun struct resource r;
267*4882a593Smuzhiyun int ret;
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun rx_pipe = devm_kzalloc(&pdev->dev, sizeof(*rx_pipe), GFP_KERNEL);
270*4882a593Smuzhiyun tx_pipe = devm_kzalloc(&pdev->dev, sizeof(*tx_pipe), GFP_KERNEL);
271*4882a593Smuzhiyun if (!rx_pipe || !tx_pipe)
272*4882a593Smuzhiyun return -ENOMEM;
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun np = of_parse_phandle(dev->of_node, "qcom,rpm-msg-ram", 0);
275*4882a593Smuzhiyun ret = of_address_to_resource(np, 0, &r);
276*4882a593Smuzhiyun of_node_put(np);
277*4882a593Smuzhiyun if (ret)
278*4882a593Smuzhiyun return ret;
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun msg_ram = devm_ioremap(dev, r.start, resource_size(&r));
281*4882a593Smuzhiyun msg_ram_size = resource_size(&r);
282*4882a593Smuzhiyun if (!msg_ram)
283*4882a593Smuzhiyun return -ENOMEM;
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun ret = glink_rpm_parse_toc(dev, msg_ram, msg_ram_size,
286*4882a593Smuzhiyun rx_pipe, tx_pipe);
287*4882a593Smuzhiyun if (ret)
288*4882a593Smuzhiyun return ret;
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun /* Pipe specific accessors */
291*4882a593Smuzhiyun rx_pipe->native.avail = glink_rpm_rx_avail;
292*4882a593Smuzhiyun rx_pipe->native.peak = glink_rpm_rx_peak;
293*4882a593Smuzhiyun rx_pipe->native.advance = glink_rpm_rx_advance;
294*4882a593Smuzhiyun tx_pipe->native.avail = glink_rpm_tx_avail;
295*4882a593Smuzhiyun tx_pipe->native.write = glink_rpm_tx_write;
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun writel(0, tx_pipe->head);
298*4882a593Smuzhiyun writel(0, rx_pipe->tail);
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun glink = qcom_glink_native_probe(&pdev->dev,
301*4882a593Smuzhiyun 0,
302*4882a593Smuzhiyun &rx_pipe->native,
303*4882a593Smuzhiyun &tx_pipe->native,
304*4882a593Smuzhiyun true);
305*4882a593Smuzhiyun if (IS_ERR(glink))
306*4882a593Smuzhiyun return PTR_ERR(glink);
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun platform_set_drvdata(pdev, glink);
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun return 0;
311*4882a593Smuzhiyun }
312*4882a593Smuzhiyun
glink_rpm_remove(struct platform_device * pdev)313*4882a593Smuzhiyun static int glink_rpm_remove(struct platform_device *pdev)
314*4882a593Smuzhiyun {
315*4882a593Smuzhiyun struct qcom_glink *glink = platform_get_drvdata(pdev);
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun qcom_glink_native_remove(glink);
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun return 0;
320*4882a593Smuzhiyun }
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun static const struct of_device_id glink_rpm_of_match[] = {
323*4882a593Smuzhiyun { .compatible = "qcom,glink-rpm" },
324*4882a593Smuzhiyun {}
325*4882a593Smuzhiyun };
326*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, glink_rpm_of_match);
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun static struct platform_driver glink_rpm_driver = {
329*4882a593Smuzhiyun .probe = glink_rpm_probe,
330*4882a593Smuzhiyun .remove = glink_rpm_remove,
331*4882a593Smuzhiyun .driver = {
332*4882a593Smuzhiyun .name = "qcom_glink_rpm",
333*4882a593Smuzhiyun .of_match_table = glink_rpm_of_match,
334*4882a593Smuzhiyun },
335*4882a593Smuzhiyun };
336*4882a593Smuzhiyun
glink_rpm_init(void)337*4882a593Smuzhiyun static int __init glink_rpm_init(void)
338*4882a593Smuzhiyun {
339*4882a593Smuzhiyun return platform_driver_register(&glink_rpm_driver);
340*4882a593Smuzhiyun }
341*4882a593Smuzhiyun subsys_initcall(glink_rpm_init);
342*4882a593Smuzhiyun
glink_rpm_exit(void)343*4882a593Smuzhiyun static void __exit glink_rpm_exit(void)
344*4882a593Smuzhiyun {
345*4882a593Smuzhiyun platform_driver_unregister(&glink_rpm_driver);
346*4882a593Smuzhiyun }
347*4882a593Smuzhiyun module_exit(glink_rpm_exit);
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@linaro.org>");
350*4882a593Smuzhiyun MODULE_DESCRIPTION("Qualcomm GLINK RPM driver");
351*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
352