1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) Rockchip Electronics Co.Ltd 4*4882a593Smuzhiyun * Author: Felix Zeng <felix.zeng@rock-chips.com> 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __LINUX_RKNPU_DRV_H_ 8*4882a593Smuzhiyun #define __LINUX_RKNPU_DRV_H_ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include <linux/completion.h> 11*4882a593Smuzhiyun #include <linux/device.h> 12*4882a593Smuzhiyun #include <linux/kref.h> 13*4882a593Smuzhiyun #include <linux/platform_device.h> 14*4882a593Smuzhiyun #include <linux/spinlock.h> 15*4882a593Smuzhiyun #include <linux/regulator/consumer.h> 16*4882a593Smuzhiyun #include <linux/version.h> 17*4882a593Smuzhiyun #include <linux/hrtimer.h> 18*4882a593Smuzhiyun #include <linux/miscdevice.h> 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #ifndef FPGA_PLATFORM 21*4882a593Smuzhiyun #if KERNEL_VERSION(5, 10, 0) <= LINUX_VERSION_CODE 22*4882a593Smuzhiyun #include <soc/rockchip/rockchip_opp_select.h> 23*4882a593Smuzhiyun #endif 24*4882a593Smuzhiyun #endif 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #include "rknpu_job.h" 27*4882a593Smuzhiyun #include "rknpu_fence.h" 28*4882a593Smuzhiyun #include "rknpu_debugger.h" 29*4882a593Smuzhiyun #include "rknpu_mm.h" 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define DRIVER_NAME "rknpu" 32*4882a593Smuzhiyun #define DRIVER_DESC "RKNPU driver" 33*4882a593Smuzhiyun #define DRIVER_DATE "20230629" 34*4882a593Smuzhiyun #define DRIVER_MAJOR 0 35*4882a593Smuzhiyun #define DRIVER_MINOR 9 36*4882a593Smuzhiyun #define DRIVER_PATCHLEVEL 0 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #define LOG_TAG "RKNPU" 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun /* sample interval: 1000ms */ 41*4882a593Smuzhiyun #define RKNPU_LOAD_INTERVAL 1000000000 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun #define LOG_INFO(fmt, args...) pr_info(LOG_TAG ": " fmt, ##args) 44*4882a593Smuzhiyun #if KERNEL_VERSION(5, 5, 0) <= LINUX_VERSION_CODE 45*4882a593Smuzhiyun #define LOG_WARN(fmt, args...) pr_warn(LOG_TAG ": " fmt, ##args) 46*4882a593Smuzhiyun #else 47*4882a593Smuzhiyun #define LOG_WARN(fmt, args...) pr_warning(LOG_TAG ": " fmt, ##args) 48*4882a593Smuzhiyun #endif 49*4882a593Smuzhiyun #define LOG_DEBUG(fmt, args...) pr_devel(LOG_TAG ": " fmt, ##args) 50*4882a593Smuzhiyun #define LOG_ERROR(fmt, args...) pr_err(LOG_TAG ": " fmt, ##args) 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun #define LOG_DEV_INFO(dev, fmt, args...) dev_info(dev, LOG_TAG ": " fmt, ##args) 53*4882a593Smuzhiyun #define LOG_DEV_WARN(dev, fmt, args...) dev_warn(dev, LOG_TAG ": " fmt, ##args) 54*4882a593Smuzhiyun #define LOG_DEV_DEBUG(dev, fmt, args...) dev_dbg(dev, LOG_TAG ": " fmt, ##args) 55*4882a593Smuzhiyun #define LOG_DEV_ERROR(dev, fmt, args...) dev_err(dev, LOG_TAG ": " fmt, ##args) 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun struct rknpu_reset_data { 58*4882a593Smuzhiyun const char *srst_a_name; 59*4882a593Smuzhiyun const char *srst_h_name; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun struct rknpu_config { 63*4882a593Smuzhiyun __u32 bw_priority_addr; 64*4882a593Smuzhiyun __u32 bw_priority_length; 65*4882a593Smuzhiyun __u64 dma_mask; 66*4882a593Smuzhiyun __u32 pc_data_amount_scale; 67*4882a593Smuzhiyun __u32 pc_task_number_bits; 68*4882a593Smuzhiyun __u32 pc_task_number_mask; 69*4882a593Smuzhiyun __u32 pc_task_status_offset; 70*4882a593Smuzhiyun __u32 pc_dma_ctrl; 71*4882a593Smuzhiyun __u32 bw_enable; 72*4882a593Smuzhiyun const struct rknpu_irqs_data *irqs; 73*4882a593Smuzhiyun const struct rknpu_reset_data *resets; 74*4882a593Smuzhiyun int num_irqs; 75*4882a593Smuzhiyun int num_resets; 76*4882a593Smuzhiyun __u64 nbuf_phyaddr; 77*4882a593Smuzhiyun __u64 nbuf_size; 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun struct rknpu_timer { 81*4882a593Smuzhiyun __u32 busy_time; 82*4882a593Smuzhiyun __u32 busy_time_record; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun struct rknpu_subcore_data { 86*4882a593Smuzhiyun struct list_head todo_list; 87*4882a593Smuzhiyun wait_queue_head_t job_done_wq; 88*4882a593Smuzhiyun struct rknpu_job *job; 89*4882a593Smuzhiyun int64_t task_num; 90*4882a593Smuzhiyun struct rknpu_timer timer; 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun /** 94*4882a593Smuzhiyun * RKNPU device 95*4882a593Smuzhiyun * 96*4882a593Smuzhiyun * @base: IO mapped base address for device 97*4882a593Smuzhiyun * @dev: Device instance 98*4882a593Smuzhiyun * @drm_dev: DRM device instance 99*4882a593Smuzhiyun */ 100*4882a593Smuzhiyun struct rknpu_device { 101*4882a593Smuzhiyun void __iomem *base[RKNPU_MAX_CORES]; 102*4882a593Smuzhiyun struct device *dev; 103*4882a593Smuzhiyun #ifdef CONFIG_ROCKCHIP_RKNPU_DRM_GEM 104*4882a593Smuzhiyun struct drm_device *drm_dev; 105*4882a593Smuzhiyun #endif 106*4882a593Smuzhiyun #ifdef CONFIG_ROCKCHIP_RKNPU_DMA_HEAP 107*4882a593Smuzhiyun struct miscdevice miscdev; 108*4882a593Smuzhiyun struct rk_dma_heap *heap; 109*4882a593Smuzhiyun #endif 110*4882a593Smuzhiyun atomic_t sequence; 111*4882a593Smuzhiyun spinlock_t lock; 112*4882a593Smuzhiyun spinlock_t irq_lock; 113*4882a593Smuzhiyun struct mutex power_lock; 114*4882a593Smuzhiyun struct mutex reset_lock; 115*4882a593Smuzhiyun struct rknpu_subcore_data subcore_datas[RKNPU_MAX_CORES]; 116*4882a593Smuzhiyun const struct rknpu_config *config; 117*4882a593Smuzhiyun void __iomem *bw_priority_base; 118*4882a593Smuzhiyun struct rknpu_fence_context *fence_ctx; 119*4882a593Smuzhiyun bool iommu_en; 120*4882a593Smuzhiyun struct reset_control *srst_a[RKNPU_MAX_CORES]; 121*4882a593Smuzhiyun struct reset_control *srst_h[RKNPU_MAX_CORES]; 122*4882a593Smuzhiyun struct clk_bulk_data *clks; 123*4882a593Smuzhiyun int num_clks; 124*4882a593Smuzhiyun struct regulator *vdd; 125*4882a593Smuzhiyun struct regulator *mem; 126*4882a593Smuzhiyun struct monitor_dev_info *mdev_info; 127*4882a593Smuzhiyun struct ipa_power_model_data *model_data; 128*4882a593Smuzhiyun struct thermal_cooling_device *devfreq_cooling; 129*4882a593Smuzhiyun struct devfreq *devfreq; 130*4882a593Smuzhiyun unsigned long ondemand_freq; 131*4882a593Smuzhiyun #ifndef FPGA_PLATFORM 132*4882a593Smuzhiyun #if KERNEL_VERSION(5, 10, 0) <= LINUX_VERSION_CODE 133*4882a593Smuzhiyun struct rockchip_opp_info opp_info; 134*4882a593Smuzhiyun #endif 135*4882a593Smuzhiyun #endif 136*4882a593Smuzhiyun unsigned long current_freq; 137*4882a593Smuzhiyun unsigned long current_volt; 138*4882a593Smuzhiyun int bypass_irq_handler; 139*4882a593Smuzhiyun int bypass_soft_reset; 140*4882a593Smuzhiyun bool soft_reseting; 141*4882a593Smuzhiyun struct device *genpd_dev_npu0; 142*4882a593Smuzhiyun struct device *genpd_dev_npu1; 143*4882a593Smuzhiyun struct device *genpd_dev_npu2; 144*4882a593Smuzhiyun bool multiple_domains; 145*4882a593Smuzhiyun atomic_t power_refcount; 146*4882a593Smuzhiyun atomic_t cmdline_power_refcount; 147*4882a593Smuzhiyun struct delayed_work power_off_work; 148*4882a593Smuzhiyun struct workqueue_struct *power_off_wq; 149*4882a593Smuzhiyun struct rknpu_debugger debugger; 150*4882a593Smuzhiyun struct hrtimer timer; 151*4882a593Smuzhiyun ktime_t kt; 152*4882a593Smuzhiyun phys_addr_t sram_start; 153*4882a593Smuzhiyun phys_addr_t sram_end; 154*4882a593Smuzhiyun phys_addr_t nbuf_start; 155*4882a593Smuzhiyun phys_addr_t nbuf_end; 156*4882a593Smuzhiyun uint32_t sram_size; 157*4882a593Smuzhiyun uint32_t nbuf_size; 158*4882a593Smuzhiyun void __iomem *sram_base_io; 159*4882a593Smuzhiyun void __iomem *nbuf_base_io; 160*4882a593Smuzhiyun struct rknpu_mm *sram_mm; 161*4882a593Smuzhiyun unsigned long power_put_delay; 162*4882a593Smuzhiyun }; 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun struct rknpu_session { 165*4882a593Smuzhiyun struct rknpu_device *rknpu_dev; 166*4882a593Smuzhiyun struct list_head list; 167*4882a593Smuzhiyun }; 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun int rknpu_power_get(struct rknpu_device *rknpu_dev); 170*4882a593Smuzhiyun int rknpu_power_put(struct rknpu_device *rknpu_dev); 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun #endif /* __LINUX_RKNPU_DRV_H_ */ 173