1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun
3*4882a593Smuzhiyun /* Copyright (c) 2018 Rockchip Electronics Co. Ltd. */
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun #include <linux/kernel.h>
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include "sfc_nand.h"
8*4882a593Smuzhiyun #include "rkflash_api.h"
9*4882a593Smuzhiyun #include "rk_sftl.h"
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun struct SFNAND_DEV *sfnand_dev;
12*4882a593Smuzhiyun
snand_init(void __iomem * reg_addr)13*4882a593Smuzhiyun static int snand_init(void __iomem *reg_addr)
14*4882a593Smuzhiyun {
15*4882a593Smuzhiyun int ret;
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun sfc_init(reg_addr);
18*4882a593Smuzhiyun ret = sfc_nand_init();
19*4882a593Smuzhiyun if (ret == 0) {
20*4882a593Smuzhiyun sfnand_dev = sfc_nand_get_private_dev();
21*4882a593Smuzhiyun #if IS_REACHABLE(CONFIG_RK_SFTL)
22*4882a593Smuzhiyun sfc_nand_ftl_ops_init();
23*4882a593Smuzhiyun ret = sftl_init();
24*4882a593Smuzhiyun #elif !IS_REACHABLE(CONFIG_RK_SFC_NAND_MTD)
25*4882a593Smuzhiyun #error "When CONFIG_RK_SFC_NAND_MTD is not used, CONFIG_RK_SFTL is required!"
26*4882a593Smuzhiyun #endif
27*4882a593Smuzhiyun }
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun return ret;
30*4882a593Smuzhiyun }
31*4882a593Smuzhiyun
snand_get_capacity(void)32*4882a593Smuzhiyun static unsigned int snand_get_capacity(void)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun if (IS_ENABLED(CONFIG_RK_SFTL))
35*4882a593Smuzhiyun return sftl_get_density();
36*4882a593Smuzhiyun return 0;
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun
snand_write(u32 sec,u32 n_sec,void * p_data)39*4882a593Smuzhiyun static int snand_write(u32 sec, u32 n_sec, void *p_data)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun if (IS_ENABLED(CONFIG_RK_SFTL))
42*4882a593Smuzhiyun return sftl_write(sec, n_sec, p_data);
43*4882a593Smuzhiyun return 0;
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun
snand_read(u32 sec,u32 n_sec,void * p_data)46*4882a593Smuzhiyun static int snand_read(u32 sec, u32 n_sec, void *p_data)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun if (IS_ENABLED(CONFIG_RK_SFTL))
49*4882a593Smuzhiyun return sftl_read(sec, n_sec, p_data);
50*4882a593Smuzhiyun return 0;
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun
snand_vendor_read(u32 sec,u32 n_sec,void * p_data)53*4882a593Smuzhiyun static int snand_vendor_read(u32 sec, u32 n_sec, void *p_data)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun if (IS_ENABLED(CONFIG_RK_SFTL))
56*4882a593Smuzhiyun return sftl_vendor_read(sec, n_sec, p_data);
57*4882a593Smuzhiyun return 0;
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun
snand_vendor_write(u32 sec,u32 n_sec,void * p_data)60*4882a593Smuzhiyun static int snand_vendor_write(u32 sec, u32 n_sec, void *p_data)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun if (IS_ENABLED(CONFIG_RK_SFTL))
63*4882a593Smuzhiyun return sftl_vendor_write(sec, n_sec, p_data);
64*4882a593Smuzhiyun return 0;
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
snand_gc(void)67*4882a593Smuzhiyun static int snand_gc(void)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun if (IS_ENABLED(CONFIG_RK_SFTL))
70*4882a593Smuzhiyun return sftl_gc();
71*4882a593Smuzhiyun return 0;
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun
snand_discard(u32 sec,u32 n_sec)74*4882a593Smuzhiyun static int snand_discard(u32 sec, u32 n_sec)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun if (IS_ENABLED(CONFIG_RK_SFTL))
77*4882a593Smuzhiyun return sftl_discard(sec, n_sec);
78*4882a593Smuzhiyun return 0;
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun
snand_deinit(void)81*4882a593Smuzhiyun static void snand_deinit(void)
82*4882a593Smuzhiyun {
83*4882a593Smuzhiyun if (IS_ENABLED(CONFIG_RK_SFTL))
84*4882a593Smuzhiyun sftl_deinit();
85*4882a593Smuzhiyun sfc_nand_deinit();
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun
snand_resume(void __iomem * reg_addr)88*4882a593Smuzhiyun static int snand_resume(void __iomem *reg_addr)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun sfc_init(reg_addr);
91*4882a593Smuzhiyun return sfc_nand_init();
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun const struct flash_boot_ops sfc_nand_ops = {
95*4882a593Smuzhiyun snand_init,
96*4882a593Smuzhiyun snand_read,
97*4882a593Smuzhiyun snand_write,
98*4882a593Smuzhiyun snand_get_capacity,
99*4882a593Smuzhiyun snand_deinit,
100*4882a593Smuzhiyun snand_resume,
101*4882a593Smuzhiyun snand_vendor_read,
102*4882a593Smuzhiyun snand_vendor_write,
103*4882a593Smuzhiyun snand_gc,
104*4882a593Smuzhiyun snand_discard,
105*4882a593Smuzhiyun };
106