1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun
3*4882a593Smuzhiyun /* Copyright (c) 2018 Rockchip Electronics Co. Ltd. */
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun #include <linux/kernel.h>
6*4882a593Smuzhiyun #include <linux/mutex.h>
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include "flash.h"
9*4882a593Smuzhiyun #include "rkflash_api.h"
10*4882a593Smuzhiyun #include "rk_sftl.h"
11*4882a593Smuzhiyun
sftl_flash_init(void __iomem * reg_addr)12*4882a593Smuzhiyun static int sftl_flash_init(void __iomem *reg_addr)
13*4882a593Smuzhiyun {
14*4882a593Smuzhiyun int ret;
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun ret = nandc_flash_init(reg_addr);
17*4882a593Smuzhiyun if (ret == 0)
18*4882a593Smuzhiyun ret = sftl_init();
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun return ret;
21*4882a593Smuzhiyun }
22*4882a593Smuzhiyun
sftl_flash_get_capacity(void)23*4882a593Smuzhiyun static unsigned int sftl_flash_get_capacity(void)
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun return sftl_get_density();
26*4882a593Smuzhiyun }
27*4882a593Smuzhiyun
sftl_flash_read(u32 sec,u32 n_sec,void * p_data)28*4882a593Smuzhiyun static int sftl_flash_read(u32 sec, u32 n_sec, void *p_data)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun return sftl_read(sec, n_sec, p_data);
31*4882a593Smuzhiyun }
32*4882a593Smuzhiyun
sftl_flash_write(u32 sec,u32 n_sec,void * p_data)33*4882a593Smuzhiyun static int sftl_flash_write(u32 sec, u32 n_sec, void *p_data)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun return sftl_write(sec, n_sec, p_data);
36*4882a593Smuzhiyun }
37*4882a593Smuzhiyun
sftl_flash_vendor_read(u32 sec,u32 n_sec,void * p_data)38*4882a593Smuzhiyun static int sftl_flash_vendor_read(u32 sec, u32 n_sec, void *p_data)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun return sftl_vendor_read(sec, n_sec, p_data);
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun
sftl_flash_vendor_write(u32 sec,u32 n_sec,void * p_data)43*4882a593Smuzhiyun static int sftl_flash_vendor_write(u32 sec, u32 n_sec, void *p_data)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun return sftl_vendor_write(sec, n_sec, p_data);
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun
sftl_flash_gc(void)48*4882a593Smuzhiyun static int sftl_flash_gc(void)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun return sftl_gc();
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun
sftl_flash_discard(u32 sec,u32 n_sec)53*4882a593Smuzhiyun static int sftl_flash_discard(u32 sec, u32 n_sec)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun return sftl_discard(sec, n_sec);
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun
sftl_flash_deinit(void)58*4882a593Smuzhiyun static void sftl_flash_deinit(void)
59*4882a593Smuzhiyun {
60*4882a593Smuzhiyun u8 chip_sel = 0;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun sftl_deinit();
63*4882a593Smuzhiyun nandc_flash_reset(chip_sel);
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun
sftl_flash_resume(void __iomem * reg_addr)66*4882a593Smuzhiyun static int sftl_flash_resume(void __iomem *reg_addr)
67*4882a593Smuzhiyun {
68*4882a593Smuzhiyun return nandc_flash_init(reg_addr);
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun const struct flash_boot_ops nandc_nand_ops = {
72*4882a593Smuzhiyun sftl_flash_init,
73*4882a593Smuzhiyun sftl_flash_read,
74*4882a593Smuzhiyun sftl_flash_write,
75*4882a593Smuzhiyun sftl_flash_get_capacity,
76*4882a593Smuzhiyun sftl_flash_deinit,
77*4882a593Smuzhiyun sftl_flash_resume,
78*4882a593Smuzhiyun sftl_flash_vendor_read,
79*4882a593Smuzhiyun sftl_flash_vendor_write,
80*4882a593Smuzhiyun sftl_flash_gc,
81*4882a593Smuzhiyun sftl_flash_discard,
82*4882a593Smuzhiyun };
83*4882a593Smuzhiyun
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