1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * AR71xx Reset Controller Driver
4*4882a593Smuzhiyun * Author: Alban Bedel
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 2015 Alban Bedel <albeu@free.fr>
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/io.h>
10*4882a593Smuzhiyun #include <linux/init.h>
11*4882a593Smuzhiyun #include <linux/mod_devicetable.h>
12*4882a593Smuzhiyun #include <linux/platform_device.h>
13*4882a593Smuzhiyun #include <linux/reset-controller.h>
14*4882a593Smuzhiyun #include <linux/reboot.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun struct ath79_reset {
17*4882a593Smuzhiyun struct reset_controller_dev rcdev;
18*4882a593Smuzhiyun struct notifier_block restart_nb;
19*4882a593Smuzhiyun void __iomem *base;
20*4882a593Smuzhiyun spinlock_t lock;
21*4882a593Smuzhiyun };
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #define FULL_CHIP_RESET 24
24*4882a593Smuzhiyun
ath79_reset_update(struct reset_controller_dev * rcdev,unsigned long id,bool assert)25*4882a593Smuzhiyun static int ath79_reset_update(struct reset_controller_dev *rcdev,
26*4882a593Smuzhiyun unsigned long id, bool assert)
27*4882a593Smuzhiyun {
28*4882a593Smuzhiyun struct ath79_reset *ath79_reset =
29*4882a593Smuzhiyun container_of(rcdev, struct ath79_reset, rcdev);
30*4882a593Smuzhiyun unsigned long flags;
31*4882a593Smuzhiyun u32 val;
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun spin_lock_irqsave(&ath79_reset->lock, flags);
34*4882a593Smuzhiyun val = readl(ath79_reset->base);
35*4882a593Smuzhiyun if (assert)
36*4882a593Smuzhiyun val |= BIT(id);
37*4882a593Smuzhiyun else
38*4882a593Smuzhiyun val &= ~BIT(id);
39*4882a593Smuzhiyun writel(val, ath79_reset->base);
40*4882a593Smuzhiyun spin_unlock_irqrestore(&ath79_reset->lock, flags);
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun return 0;
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun
ath79_reset_assert(struct reset_controller_dev * rcdev,unsigned long id)45*4882a593Smuzhiyun static int ath79_reset_assert(struct reset_controller_dev *rcdev,
46*4882a593Smuzhiyun unsigned long id)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun return ath79_reset_update(rcdev, id, true);
49*4882a593Smuzhiyun }
50*4882a593Smuzhiyun
ath79_reset_deassert(struct reset_controller_dev * rcdev,unsigned long id)51*4882a593Smuzhiyun static int ath79_reset_deassert(struct reset_controller_dev *rcdev,
52*4882a593Smuzhiyun unsigned long id)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun return ath79_reset_update(rcdev, id, false);
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun
ath79_reset_status(struct reset_controller_dev * rcdev,unsigned long id)57*4882a593Smuzhiyun static int ath79_reset_status(struct reset_controller_dev *rcdev,
58*4882a593Smuzhiyun unsigned long id)
59*4882a593Smuzhiyun {
60*4882a593Smuzhiyun struct ath79_reset *ath79_reset =
61*4882a593Smuzhiyun container_of(rcdev, struct ath79_reset, rcdev);
62*4882a593Smuzhiyun u32 val;
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun val = readl(ath79_reset->base);
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun return !!(val & BIT(id));
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun static const struct reset_control_ops ath79_reset_ops = {
70*4882a593Smuzhiyun .assert = ath79_reset_assert,
71*4882a593Smuzhiyun .deassert = ath79_reset_deassert,
72*4882a593Smuzhiyun .status = ath79_reset_status,
73*4882a593Smuzhiyun };
74*4882a593Smuzhiyun
ath79_reset_restart_handler(struct notifier_block * nb,unsigned long action,void * data)75*4882a593Smuzhiyun static int ath79_reset_restart_handler(struct notifier_block *nb,
76*4882a593Smuzhiyun unsigned long action, void *data)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun struct ath79_reset *ath79_reset =
79*4882a593Smuzhiyun container_of(nb, struct ath79_reset, restart_nb);
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun ath79_reset_assert(&ath79_reset->rcdev, FULL_CHIP_RESET);
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun return NOTIFY_DONE;
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun
ath79_reset_probe(struct platform_device * pdev)86*4882a593Smuzhiyun static int ath79_reset_probe(struct platform_device *pdev)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun struct ath79_reset *ath79_reset;
89*4882a593Smuzhiyun struct resource *res;
90*4882a593Smuzhiyun int err;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun ath79_reset = devm_kzalloc(&pdev->dev,
93*4882a593Smuzhiyun sizeof(*ath79_reset), GFP_KERNEL);
94*4882a593Smuzhiyun if (!ath79_reset)
95*4882a593Smuzhiyun return -ENOMEM;
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun platform_set_drvdata(pdev, ath79_reset);
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
100*4882a593Smuzhiyun ath79_reset->base = devm_ioremap_resource(&pdev->dev, res);
101*4882a593Smuzhiyun if (IS_ERR(ath79_reset->base))
102*4882a593Smuzhiyun return PTR_ERR(ath79_reset->base);
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun spin_lock_init(&ath79_reset->lock);
105*4882a593Smuzhiyun ath79_reset->rcdev.ops = &ath79_reset_ops;
106*4882a593Smuzhiyun ath79_reset->rcdev.owner = THIS_MODULE;
107*4882a593Smuzhiyun ath79_reset->rcdev.of_node = pdev->dev.of_node;
108*4882a593Smuzhiyun ath79_reset->rcdev.of_reset_n_cells = 1;
109*4882a593Smuzhiyun ath79_reset->rcdev.nr_resets = 32;
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun err = devm_reset_controller_register(&pdev->dev, &ath79_reset->rcdev);
112*4882a593Smuzhiyun if (err)
113*4882a593Smuzhiyun return err;
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun ath79_reset->restart_nb.notifier_call = ath79_reset_restart_handler;
116*4882a593Smuzhiyun ath79_reset->restart_nb.priority = 128;
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun err = register_restart_handler(&ath79_reset->restart_nb);
119*4882a593Smuzhiyun if (err)
120*4882a593Smuzhiyun dev_warn(&pdev->dev, "Failed to register restart handler\n");
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun return 0;
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun static const struct of_device_id ath79_reset_dt_ids[] = {
126*4882a593Smuzhiyun { .compatible = "qca,ar7100-reset", },
127*4882a593Smuzhiyun { },
128*4882a593Smuzhiyun };
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun static struct platform_driver ath79_reset_driver = {
131*4882a593Smuzhiyun .probe = ath79_reset_probe,
132*4882a593Smuzhiyun .driver = {
133*4882a593Smuzhiyun .name = "ath79-reset",
134*4882a593Smuzhiyun .of_match_table = ath79_reset_dt_ids,
135*4882a593Smuzhiyun .suppress_bind_attrs = true,
136*4882a593Smuzhiyun },
137*4882a593Smuzhiyun };
138*4882a593Smuzhiyun builtin_platform_driver(ath79_reset_driver);
139