xref: /OK3568_Linux_fs/kernel/drivers/regulator/xz3216.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Regulator driver for xz3216 DCDC chip for rk32xx
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Copyright (C) 2010, 2011 ROCKCHIP, Inc.
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun  * Based on xz3216.c that is work by zhangqing<zhangqing@rock-chips.com>
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * This program is free software; you can redistribute it and/or modify
9*4882a593Smuzhiyun  * it under the terms of the GNU General Public License version 2 as
10*4882a593Smuzhiyun  * published by the Free Software Foundation.
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  */
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <linux/bug.h>
15*4882a593Smuzhiyun #include <linux/err.h>
16*4882a593Smuzhiyun #include <linux/i2c.h>
17*4882a593Smuzhiyun #include <linux/kernel.h>
18*4882a593Smuzhiyun #include <linux/regulator/driver.h>
19*4882a593Smuzhiyun #include <linux/delay.h>
20*4882a593Smuzhiyun #include <linux/slab.h>
21*4882a593Smuzhiyun #include <linux/mutex.h>
22*4882a593Smuzhiyun #include <linux/mfd/core.h>
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #include <linux/interrupt.h>
25*4882a593Smuzhiyun #include <linux/module.h>
26*4882a593Smuzhiyun #include <linux/of_irq.h>
27*4882a593Smuzhiyun #include <linux/of_gpio.h>
28*4882a593Smuzhiyun #include <linux/of.h>
29*4882a593Smuzhiyun #include <linux/of_device.h>
30*4882a593Smuzhiyun #include <linux/regulator/of_regulator.h>
31*4882a593Smuzhiyun #include <linux/regulator/driver.h>
32*4882a593Smuzhiyun #include <linux/regulator/machine.h>
33*4882a593Smuzhiyun #include <linux/regmap.h>
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #if 0
36*4882a593Smuzhiyun #define DBG(x...)	pr_info(x)
37*4882a593Smuzhiyun #else
38*4882a593Smuzhiyun #define DBG(x...)
39*4882a593Smuzhiyun #endif
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun #define DBG_ERR(x...)	pr_err(x)
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun #define XZ3216_NUM_REGULATORS 1
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun #define XZ3216_BUCK1_SET_VOL_BASE 0x00
46*4882a593Smuzhiyun #define XZ3216_BUCK1_SLP_VOL_BASE 0x01
47*4882a593Smuzhiyun #define XZ3216_CONTR_REG1 0x02
48*4882a593Smuzhiyun #define XZ3216_ID1_REG 0x03
49*4882a593Smuzhiyun #define BUCK_VOL_MASK 0x3f
50*4882a593Smuzhiyun #define VOL_MIN_IDX 0x00
51*4882a593Smuzhiyun #define VOL_MAX_IDX 0x3
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun /* VSEL bit definitions */
54*4882a593Smuzhiyun #define VSEL_BUCK_EN	BIT(7)
55*4882a593Smuzhiyun #define VSEL_MODE	BIT(6)
56*4882a593Smuzhiyun #define VSEL_NSEL_MASK	0x3F
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun /* Control bit definitions */
59*4882a593Smuzhiyun #define CTL_OUTPUT_DISCHG	BIT(7)
60*4882a593Smuzhiyun #define CTL_SLEW_MASK		(0x7 << 4)
61*4882a593Smuzhiyun #define CTL_SLEW_SHIFT		4
62*4882a593Smuzhiyun #define CTL_RESET		BIT(2)
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun struct xz3216 {
65*4882a593Smuzhiyun 	struct device *dev;
66*4882a593Smuzhiyun 	struct i2c_client *i2c;
67*4882a593Smuzhiyun 	int num_regulators;
68*4882a593Smuzhiyun 	struct regulator_dev *rdev;
69*4882a593Smuzhiyun 	struct regulator_init_data *regulator;
70*4882a593Smuzhiyun 	struct regmap *regmap;
71*4882a593Smuzhiyun 	/* Voltage setting register */
72*4882a593Smuzhiyun 	unsigned int vol_reg;
73*4882a593Smuzhiyun 	unsigned int sleep_reg;
74*4882a593Smuzhiyun 	/* Voltage range and step(linear) */
75*4882a593Smuzhiyun 	unsigned int vsel_min;
76*4882a593Smuzhiyun 	unsigned int vsel_step;
77*4882a593Smuzhiyun 	unsigned int sleep_vol_cache;
78*4882a593Smuzhiyun };
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun struct xz3216_regulator {
81*4882a593Smuzhiyun 	struct device		*dev;
82*4882a593Smuzhiyun 	struct regulator_desc	*desc;
83*4882a593Smuzhiyun 	struct regulator_dev	*rdev;
84*4882a593Smuzhiyun };
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun struct xz3216_board {
87*4882a593Smuzhiyun 	struct regulator_init_data *xz3216_init_data;
88*4882a593Smuzhiyun 	struct device_node *of_node;
89*4882a593Smuzhiyun };
90*4882a593Smuzhiyun 
xz3216_dcdc_get_mode(struct regulator_dev * dev)91*4882a593Smuzhiyun static unsigned int xz3216_dcdc_get_mode(struct regulator_dev *dev)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun 	struct xz3216 *xz3216 = rdev_get_drvdata(dev);
94*4882a593Smuzhiyun 	unsigned int val;
95*4882a593Smuzhiyun 	int ret = 0;
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	ret = regmap_read(xz3216->regmap, xz3216->vol_reg, &val);
98*4882a593Smuzhiyun 	if (ret < 0)
99*4882a593Smuzhiyun 		return ret;
100*4882a593Smuzhiyun 	if (val & VSEL_MODE)
101*4882a593Smuzhiyun 		return REGULATOR_MODE_FAST;
102*4882a593Smuzhiyun 	else
103*4882a593Smuzhiyun 		return REGULATOR_MODE_NORMAL;
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun 
xz3216_dcdc_set_mode(struct regulator_dev * dev,unsigned int mode)106*4882a593Smuzhiyun static int xz3216_dcdc_set_mode(struct regulator_dev *dev, unsigned int mode)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun 	struct xz3216 *xz3216 = rdev_get_drvdata(dev);
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	switch (mode) {
111*4882a593Smuzhiyun 	case REGULATOR_MODE_FAST:
112*4882a593Smuzhiyun 		return regmap_update_bits(xz3216->regmap, xz3216->vol_reg,
113*4882a593Smuzhiyun 					  VSEL_MODE, VSEL_MODE);
114*4882a593Smuzhiyun 	case REGULATOR_MODE_NORMAL:
115*4882a593Smuzhiyun 		return regmap_update_bits(xz3216->regmap, xz3216->vol_reg,
116*4882a593Smuzhiyun 					  VSEL_MODE, 0);
117*4882a593Smuzhiyun 	default:
118*4882a593Smuzhiyun 		DBG("error:dcdc_xz3216 only auto and pwm mode\n");
119*4882a593Smuzhiyun 		return -EINVAL;
120*4882a593Smuzhiyun 	}
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun 
xz3216_dcdc_suspend_enable(struct regulator_dev * dev)123*4882a593Smuzhiyun static int xz3216_dcdc_suspend_enable(struct regulator_dev *dev)
124*4882a593Smuzhiyun {
125*4882a593Smuzhiyun 	struct xz3216 *xz3216 = rdev_get_drvdata(dev);
126*4882a593Smuzhiyun 	return regmap_update_bits(xz3216->regmap, XZ3216_BUCK1_SLP_VOL_BASE,
127*4882a593Smuzhiyun 				  VSEL_BUCK_EN, VSEL_BUCK_EN);
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun 
xz3216_dcdc_suspend_disable(struct regulator_dev * dev)130*4882a593Smuzhiyun static int xz3216_dcdc_suspend_disable(struct regulator_dev *dev)
131*4882a593Smuzhiyun {
132*4882a593Smuzhiyun 	struct xz3216 *xz3216 = rdev_get_drvdata(dev);
133*4882a593Smuzhiyun 	return regmap_update_bits(xz3216->regmap, XZ3216_BUCK1_SLP_VOL_BASE,
134*4882a593Smuzhiyun 				  VSEL_BUCK_EN, 0);
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun 
xz3216_dcdc_set_sleep_voltage(struct regulator_dev * dev,int uV)138*4882a593Smuzhiyun static int xz3216_dcdc_set_sleep_voltage(struct regulator_dev *dev,
139*4882a593Smuzhiyun 					 int uV)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun 	struct xz3216 *xz3216 = rdev_get_drvdata(dev);
142*4882a593Smuzhiyun 	int ret;
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	if (xz3216->sleep_vol_cache == uV)
145*4882a593Smuzhiyun 		return 0;
146*4882a593Smuzhiyun 	ret = regulator_map_voltage_linear(dev, uV, uV);
147*4882a593Smuzhiyun 	if (ret < 0)
148*4882a593Smuzhiyun 		return ret;
149*4882a593Smuzhiyun 	ret = regmap_update_bits(xz3216->regmap, XZ3216_BUCK1_SLP_VOL_BASE,
150*4882a593Smuzhiyun 					VSEL_NSEL_MASK, ret);
151*4882a593Smuzhiyun 	if (ret < 0)
152*4882a593Smuzhiyun 		return ret;
153*4882a593Smuzhiyun 	xz3216->sleep_vol_cache = uV;
154*4882a593Smuzhiyun 	return 0;
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun 
xz3216_dcdc_set_suspend_mode(struct regulator_dev * dev,unsigned int mode)158*4882a593Smuzhiyun static int xz3216_dcdc_set_suspend_mode(struct regulator_dev *dev,
159*4882a593Smuzhiyun 					 unsigned int mode)
160*4882a593Smuzhiyun {
161*4882a593Smuzhiyun 	struct xz3216 *xz3216 = rdev_get_drvdata(dev);
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	switch (mode) {
164*4882a593Smuzhiyun 	case REGULATOR_MODE_FAST:
165*4882a593Smuzhiyun 		return regmap_update_bits(xz3216->regmap, xz3216->vol_reg,
166*4882a593Smuzhiyun 					  VSEL_MODE, VSEL_MODE);
167*4882a593Smuzhiyun 	case REGULATOR_MODE_NORMAL:
168*4882a593Smuzhiyun 		return regmap_update_bits(xz3216->regmap, xz3216->vol_reg,
169*4882a593Smuzhiyun 					  VSEL_MODE, 0);
170*4882a593Smuzhiyun 	default:
171*4882a593Smuzhiyun 		DBG_ERR("error:dcdc_xz3216 only auto and pwm mode\n");
172*4882a593Smuzhiyun 		return -EINVAL;
173*4882a593Smuzhiyun 	}
174*4882a593Smuzhiyun }
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun static const int slew_rates[] = {
177*4882a593Smuzhiyun 	64000,
178*4882a593Smuzhiyun 	32000,
179*4882a593Smuzhiyun 	16000,
180*4882a593Smuzhiyun 	 8000,
181*4882a593Smuzhiyun 	 4000,
182*4882a593Smuzhiyun 	 2000,
183*4882a593Smuzhiyun 	 1000,
184*4882a593Smuzhiyun 	  500,
185*4882a593Smuzhiyun };
186*4882a593Smuzhiyun 
xz3216_set_ramp(struct regulator_dev * rdev,int ramp)187*4882a593Smuzhiyun static int xz3216_set_ramp(struct regulator_dev *rdev, int ramp)
188*4882a593Smuzhiyun {
189*4882a593Smuzhiyun 	struct xz3216 *xz3216 = rdev_get_drvdata(rdev);
190*4882a593Smuzhiyun 	int regval = -1, i;
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(slew_rates); i++) {
193*4882a593Smuzhiyun 		if (ramp <= slew_rates[i])
194*4882a593Smuzhiyun 			regval = i;
195*4882a593Smuzhiyun 		else
196*4882a593Smuzhiyun 			break;
197*4882a593Smuzhiyun 	}
198*4882a593Smuzhiyun 	if (regval < 0) {
199*4882a593Smuzhiyun 		dev_err(xz3216->dev, "unsupported ramp value %d\n", ramp);
200*4882a593Smuzhiyun 		return -EINVAL;
201*4882a593Smuzhiyun 	}
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 	return regmap_update_bits(xz3216->regmap, XZ3216_CONTR_REG1,
204*4882a593Smuzhiyun 				  CTL_SLEW_MASK, regval << CTL_SLEW_SHIFT);
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun static struct regulator_ops xz3216_dcdc_ops = {
208*4882a593Smuzhiyun 	.set_voltage_sel = regulator_set_voltage_sel_regmap,
209*4882a593Smuzhiyun 	.get_voltage_sel = regulator_get_voltage_sel_regmap,
210*4882a593Smuzhiyun 	.list_voltage = regulator_list_voltage_linear,
211*4882a593Smuzhiyun 	.map_voltage = regulator_map_voltage_linear,
212*4882a593Smuzhiyun 	.is_enabled = regulator_is_enabled_regmap,
213*4882a593Smuzhiyun 	.enable = regulator_enable_regmap,
214*4882a593Smuzhiyun 	.disable = regulator_disable_regmap,
215*4882a593Smuzhiyun 	.get_mode = xz3216_dcdc_get_mode,
216*4882a593Smuzhiyun 	.set_mode = xz3216_dcdc_set_mode,
217*4882a593Smuzhiyun 	.set_suspend_voltage = xz3216_dcdc_set_sleep_voltage,
218*4882a593Smuzhiyun 	.set_suspend_enable = xz3216_dcdc_suspend_enable,
219*4882a593Smuzhiyun 	.set_suspend_disable = xz3216_dcdc_suspend_disable,
220*4882a593Smuzhiyun 	.set_suspend_mode = xz3216_dcdc_set_suspend_mode,
221*4882a593Smuzhiyun 	.set_ramp_delay = xz3216_set_ramp,
222*4882a593Smuzhiyun 	.set_voltage_time_sel = regulator_set_voltage_time_sel,
223*4882a593Smuzhiyun };
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun static struct regulator_desc regulators[] = {
226*4882a593Smuzhiyun 	{
227*4882a593Smuzhiyun 		.name = "XZ_DCDC1",
228*4882a593Smuzhiyun 		.supply_name = "vin",
229*4882a593Smuzhiyun 		.id = 0,
230*4882a593Smuzhiyun 		.ops = &xz3216_dcdc_ops,
231*4882a593Smuzhiyun 		.n_voltages = 64,
232*4882a593Smuzhiyun 		.type = REGULATOR_VOLTAGE,
233*4882a593Smuzhiyun 		.enable_time = 400,
234*4882a593Smuzhiyun 		.enable_reg = XZ3216_BUCK1_SET_VOL_BASE,
235*4882a593Smuzhiyun 		.enable_mask = VSEL_BUCK_EN,
236*4882a593Smuzhiyun 		.min_uV = 600000,
237*4882a593Smuzhiyun 		.uV_step = 12500,
238*4882a593Smuzhiyun 		.vsel_reg = XZ3216_BUCK1_SET_VOL_BASE,
239*4882a593Smuzhiyun 		.vsel_mask = VSEL_NSEL_MASK,
240*4882a593Smuzhiyun 		.owner = THIS_MODULE,
241*4882a593Smuzhiyun 	},
242*4882a593Smuzhiyun };
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun static const struct regmap_config xz3216_regmap_config = {
245*4882a593Smuzhiyun 	.reg_bits = 8,
246*4882a593Smuzhiyun 	.val_bits = 8,
247*4882a593Smuzhiyun };
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun #ifdef CONFIG_OF
250*4882a593Smuzhiyun static struct of_device_id xz3216_of_match[] = {
251*4882a593Smuzhiyun 	{ .compatible = "xz3216"},
252*4882a593Smuzhiyun 	{ },
253*4882a593Smuzhiyun };
254*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, xz3216_of_match);
255*4882a593Smuzhiyun #endif
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun #ifdef CONFIG_OF
258*4882a593Smuzhiyun static struct of_regulator_match xz3216_reg_matches[] = {
259*4882a593Smuzhiyun 	{ .name = "xz_dcdc1", .driver_data = (void *)0},
260*4882a593Smuzhiyun };
261*4882a593Smuzhiyun 
xz3216_parse_dt(struct xz3216 * xz3216)262*4882a593Smuzhiyun static struct xz3216_board *xz3216_parse_dt(struct xz3216 *xz3216)
263*4882a593Smuzhiyun {
264*4882a593Smuzhiyun 	struct xz3216_board *pdata;
265*4882a593Smuzhiyun 	struct device_node *regs;
266*4882a593Smuzhiyun 	struct device_node *xz3216_np;
267*4882a593Smuzhiyun 	int count;
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	xz3216_np = of_node_get(xz3216->dev->of_node);
270*4882a593Smuzhiyun 	if (!xz3216_np) {
271*4882a593Smuzhiyun 		DBG_ERR("could not find pmic sub-node\n");
272*4882a593Smuzhiyun 		return NULL;
273*4882a593Smuzhiyun 	}
274*4882a593Smuzhiyun 	regs = of_find_node_by_name(xz3216_np, "regulators");
275*4882a593Smuzhiyun 	if (!regs)
276*4882a593Smuzhiyun 		return NULL;
277*4882a593Smuzhiyun 	count = of_regulator_match(xz3216->dev, regs, xz3216_reg_matches,
278*4882a593Smuzhiyun 				   XZ3216_NUM_REGULATORS);
279*4882a593Smuzhiyun 	of_node_put(regs);
280*4882a593Smuzhiyun 	pdata = devm_kzalloc(xz3216->dev, sizeof(*pdata), GFP_KERNEL);
281*4882a593Smuzhiyun 	if (!pdata)
282*4882a593Smuzhiyun 		return NULL;
283*4882a593Smuzhiyun 	pdata->xz3216_init_data = xz3216_reg_matches[0].init_data;
284*4882a593Smuzhiyun 	pdata->of_node = xz3216_reg_matches[0].of_node;
285*4882a593Smuzhiyun 	return pdata;
286*4882a593Smuzhiyun }
287*4882a593Smuzhiyun 
288*4882a593Smuzhiyun #else
xz3216_parse_dt(struct i2c_client * i2c)289*4882a593Smuzhiyun static struct xz3216_board *xz3216_parse_dt(struct i2c_client *i2c)
290*4882a593Smuzhiyun {
291*4882a593Smuzhiyun 	return NULL;
292*4882a593Smuzhiyun }
293*4882a593Smuzhiyun #endif
294*4882a593Smuzhiyun 
xz3216_i2c_probe(struct i2c_client * i2c,const struct i2c_device_id * id)295*4882a593Smuzhiyun static int xz3216_i2c_probe(struct i2c_client *i2c,
296*4882a593Smuzhiyun 			    const struct i2c_device_id *id)
297*4882a593Smuzhiyun {
298*4882a593Smuzhiyun 	struct xz3216 *xz3216;
299*4882a593Smuzhiyun 	struct xz3216_board *pdev;
300*4882a593Smuzhiyun 	const struct of_device_id *match;
301*4882a593Smuzhiyun 	struct regulator_config config = { };
302*4882a593Smuzhiyun 	int ret;
303*4882a593Smuzhiyun 	DBG("%s, line=%d\n", __func__, __LINE__);
304*4882a593Smuzhiyun 	xz3216 = devm_kzalloc(&i2c->dev, sizeof(struct xz3216),
305*4882a593Smuzhiyun 						GFP_KERNEL);
306*4882a593Smuzhiyun 	if (!xz3216) {
307*4882a593Smuzhiyun 		ret = -ENOMEM;
308*4882a593Smuzhiyun 		goto err;
309*4882a593Smuzhiyun 	}
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun 	if (i2c->dev.of_node) {
312*4882a593Smuzhiyun 		match = of_match_device(xz3216_of_match, &i2c->dev);
313*4882a593Smuzhiyun 		if (!match) {
314*4882a593Smuzhiyun 			DBG_ERR("Failed to find matching dt id\n");
315*4882a593Smuzhiyun 			return -EINVAL;
316*4882a593Smuzhiyun 		}
317*4882a593Smuzhiyun 	}
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun 	xz3216->regmap = devm_regmap_init_i2c(i2c, &xz3216_regmap_config);
320*4882a593Smuzhiyun 	if (IS_ERR(xz3216->regmap)) {
321*4882a593Smuzhiyun 		dev_err(&i2c->dev, "Failed to allocate regmap!\n");
322*4882a593Smuzhiyun 		return PTR_ERR(xz3216->regmap);
323*4882a593Smuzhiyun 	}
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun 	xz3216->i2c = i2c;
326*4882a593Smuzhiyun 	xz3216->dev = &i2c->dev;
327*4882a593Smuzhiyun 	i2c_set_clientdata(i2c, xz3216);
328*4882a593Smuzhiyun 	pdev = dev_get_platdata(&i2c->dev);
329*4882a593Smuzhiyun 	if (!pdev)
330*4882a593Smuzhiyun 		pdev = xz3216_parse_dt(xz3216);
331*4882a593Smuzhiyun 	if (pdev) {
332*4882a593Smuzhiyun 		xz3216->num_regulators = XZ3216_NUM_REGULATORS;
333*4882a593Smuzhiyun 		xz3216->rdev = kcalloc(XZ3216_NUM_REGULATORS,
334*4882a593Smuzhiyun 					sizeof(struct regulator_dev),
335*4882a593Smuzhiyun 					GFP_KERNEL);
336*4882a593Smuzhiyun 		if (!xz3216->rdev)
337*4882a593Smuzhiyun 			return -ENOMEM;
338*4882a593Smuzhiyun 		/* Instantiate the regulators */
339*4882a593Smuzhiyun 		xz3216->regulator = pdev->xz3216_init_data;
340*4882a593Smuzhiyun 		if (xz3216->dev->of_node)
341*4882a593Smuzhiyun 			config.of_node = pdev->of_node;
342*4882a593Smuzhiyun 		config.dev = xz3216->dev;
343*4882a593Smuzhiyun 		config.driver_data = xz3216;
344*4882a593Smuzhiyun 		config.init_data = xz3216->regulator;
345*4882a593Smuzhiyun 		xz3216->rdev = devm_regulator_register(xz3216->dev,
346*4882a593Smuzhiyun 						&regulators[0], &config);
347*4882a593Smuzhiyun 		ret = PTR_ERR_OR_ZERO(xz3216->rdev);
348*4882a593Smuzhiyun 		if (ret < 0)
349*4882a593Smuzhiyun 			dev_err(&i2c->dev, "Failed to register regulator!\n");
350*4882a593Smuzhiyun 		return ret;
351*4882a593Smuzhiyun 	}
352*4882a593Smuzhiyun 	return 0;
353*4882a593Smuzhiyun err:
354*4882a593Smuzhiyun 	return ret;
355*4882a593Smuzhiyun }
356*4882a593Smuzhiyun 
xz3216_i2c_remove(struct i2c_client * i2c)357*4882a593Smuzhiyun static int xz3216_i2c_remove(struct i2c_client *i2c)
358*4882a593Smuzhiyun {
359*4882a593Smuzhiyun 	struct xz3216 *xz3216 = i2c_get_clientdata(i2c);
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun 	if (xz3216->rdev)
362*4882a593Smuzhiyun 		regulator_unregister(xz3216->rdev);
363*4882a593Smuzhiyun 	i2c_set_clientdata(i2c, NULL);
364*4882a593Smuzhiyun 	return 0;
365*4882a593Smuzhiyun }
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun static const struct i2c_device_id xz3216_i2c_id[] = {
368*4882a593Smuzhiyun 	{ "xz3216", 0 },
369*4882a593Smuzhiyun 	{ }
370*4882a593Smuzhiyun };
371*4882a593Smuzhiyun 
372*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, xz3216_i2c_id);
373*4882a593Smuzhiyun 
374*4882a593Smuzhiyun static struct i2c_driver xz3216_i2c_driver = {
375*4882a593Smuzhiyun 	.driver = {
376*4882a593Smuzhiyun 		.name = "xz3216",
377*4882a593Smuzhiyun 		.owner = THIS_MODULE,
378*4882a593Smuzhiyun 		.of_match_table = of_match_ptr(xz3216_of_match),
379*4882a593Smuzhiyun 	},
380*4882a593Smuzhiyun 	.probe = xz3216_i2c_probe,
381*4882a593Smuzhiyun 	.remove = xz3216_i2c_remove,
382*4882a593Smuzhiyun 	.id_table = xz3216_i2c_id,
383*4882a593Smuzhiyun };
384*4882a593Smuzhiyun 
xz3216_module_init(void)385*4882a593Smuzhiyun static int __init xz3216_module_init(void)
386*4882a593Smuzhiyun {
387*4882a593Smuzhiyun 	int ret;
388*4882a593Smuzhiyun 
389*4882a593Smuzhiyun 	ret = i2c_add_driver(&xz3216_i2c_driver);
390*4882a593Smuzhiyun 	if (ret != 0)
391*4882a593Smuzhiyun 		pr_err("Failed to register I2C driver: %d\n", ret);
392*4882a593Smuzhiyun 	return ret;
393*4882a593Smuzhiyun }
394*4882a593Smuzhiyun subsys_initcall_sync(xz3216_module_init);
395*4882a593Smuzhiyun 
xz3216_module_exit(void)396*4882a593Smuzhiyun static void __exit xz3216_module_exit(void)
397*4882a593Smuzhiyun {
398*4882a593Smuzhiyun 	i2c_del_driver(&xz3216_i2c_driver);
399*4882a593Smuzhiyun }
400*4882a593Smuzhiyun module_exit(xz3216_module_exit);
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun MODULE_LICENSE("GPL");
403*4882a593Smuzhiyun MODULE_AUTHOR("zhangqing <zhangqing@rock-chips.com>");
404*4882a593Smuzhiyun MODULE_DESCRIPTION("xz3216 PMIC driver");
405