xref: /OK3568_Linux_fs/kernel/drivers/regulator/wm831x-ldo.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // wm831x-ldo.c  --  LDO driver for the WM831x series
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Copyright 2009 Wolfson Microelectronics PLC.
6*4882a593Smuzhiyun //
7*4882a593Smuzhiyun // Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/moduleparam.h>
11*4882a593Smuzhiyun #include <linux/init.h>
12*4882a593Smuzhiyun #include <linux/bitops.h>
13*4882a593Smuzhiyun #include <linux/err.h>
14*4882a593Smuzhiyun #include <linux/i2c.h>
15*4882a593Smuzhiyun #include <linux/platform_device.h>
16*4882a593Smuzhiyun #include <linux/regulator/driver.h>
17*4882a593Smuzhiyun #include <linux/slab.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #include <linux/mfd/wm831x/core.h>
20*4882a593Smuzhiyun #include <linux/mfd/wm831x/regulator.h>
21*4882a593Smuzhiyun #include <linux/mfd/wm831x/pdata.h>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #define WM831X_LDO_MAX_NAME 9
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #define WM831X_LDO_CONTROL       0
26*4882a593Smuzhiyun #define WM831X_LDO_ON_CONTROL    1
27*4882a593Smuzhiyun #define WM831X_LDO_SLEEP_CONTROL 2
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #define WM831X_ALIVE_LDO_ON_CONTROL    0
30*4882a593Smuzhiyun #define WM831X_ALIVE_LDO_SLEEP_CONTROL 1
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun struct wm831x_ldo {
33*4882a593Smuzhiyun 	char name[WM831X_LDO_MAX_NAME];
34*4882a593Smuzhiyun 	char supply_name[WM831X_LDO_MAX_NAME];
35*4882a593Smuzhiyun 	struct regulator_desc desc;
36*4882a593Smuzhiyun 	int base;
37*4882a593Smuzhiyun 	struct wm831x *wm831x;
38*4882a593Smuzhiyun 	struct regulator_dev *regulator;
39*4882a593Smuzhiyun };
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun /*
42*4882a593Smuzhiyun  * Shared
43*4882a593Smuzhiyun  */
44*4882a593Smuzhiyun 
wm831x_ldo_uv_irq(int irq,void * data)45*4882a593Smuzhiyun static irqreturn_t wm831x_ldo_uv_irq(int irq, void *data)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun 	struct wm831x_ldo *ldo = data;
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun 	regulator_notifier_call_chain(ldo->regulator,
50*4882a593Smuzhiyun 				      REGULATOR_EVENT_UNDER_VOLTAGE,
51*4882a593Smuzhiyun 				      NULL);
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun 	return IRQ_HANDLED;
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun /*
57*4882a593Smuzhiyun  * General purpose LDOs
58*4882a593Smuzhiyun  */
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun static const struct linear_range wm831x_gp_ldo_ranges[] = {
61*4882a593Smuzhiyun 	REGULATOR_LINEAR_RANGE(900000, 0, 14, 50000),
62*4882a593Smuzhiyun 	REGULATOR_LINEAR_RANGE(1700000, 15, 31, 100000),
63*4882a593Smuzhiyun };
64*4882a593Smuzhiyun 
wm831x_gp_ldo_set_suspend_voltage(struct regulator_dev * rdev,int uV)65*4882a593Smuzhiyun static int wm831x_gp_ldo_set_suspend_voltage(struct regulator_dev *rdev,
66*4882a593Smuzhiyun 					     int uV)
67*4882a593Smuzhiyun {
68*4882a593Smuzhiyun 	struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
69*4882a593Smuzhiyun 	struct wm831x *wm831x = ldo->wm831x;
70*4882a593Smuzhiyun 	int sel, reg = ldo->base + WM831X_LDO_SLEEP_CONTROL;
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun 	sel = regulator_map_voltage_linear_range(rdev, uV, uV);
73*4882a593Smuzhiyun 	if (sel < 0)
74*4882a593Smuzhiyun 		return sel;
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	return wm831x_set_bits(wm831x, reg, WM831X_LDO1_ON_VSEL_MASK, sel);
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun 
wm831x_gp_ldo_get_mode(struct regulator_dev * rdev)79*4882a593Smuzhiyun static unsigned int wm831x_gp_ldo_get_mode(struct regulator_dev *rdev)
80*4882a593Smuzhiyun {
81*4882a593Smuzhiyun 	struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
82*4882a593Smuzhiyun 	struct wm831x *wm831x = ldo->wm831x;
83*4882a593Smuzhiyun 	int ctrl_reg = ldo->base + WM831X_LDO_CONTROL;
84*4882a593Smuzhiyun 	int on_reg = ldo->base + WM831X_LDO_ON_CONTROL;
85*4882a593Smuzhiyun 	int ret;
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	ret = wm831x_reg_read(wm831x, on_reg);
88*4882a593Smuzhiyun 	if (ret < 0)
89*4882a593Smuzhiyun 		return ret;
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun 	if (!(ret & WM831X_LDO1_ON_MODE))
92*4882a593Smuzhiyun 		return REGULATOR_MODE_NORMAL;
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 	ret = wm831x_reg_read(wm831x, ctrl_reg);
95*4882a593Smuzhiyun 	if (ret < 0)
96*4882a593Smuzhiyun 		return ret;
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 	if (ret & WM831X_LDO1_LP_MODE)
99*4882a593Smuzhiyun 		return REGULATOR_MODE_STANDBY;
100*4882a593Smuzhiyun 	else
101*4882a593Smuzhiyun 		return REGULATOR_MODE_IDLE;
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun 
wm831x_gp_ldo_set_mode(struct regulator_dev * rdev,unsigned int mode)104*4882a593Smuzhiyun static int wm831x_gp_ldo_set_mode(struct regulator_dev *rdev,
105*4882a593Smuzhiyun 				  unsigned int mode)
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun 	struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
108*4882a593Smuzhiyun 	struct wm831x *wm831x = ldo->wm831x;
109*4882a593Smuzhiyun 	int ctrl_reg = ldo->base + WM831X_LDO_CONTROL;
110*4882a593Smuzhiyun 	int on_reg = ldo->base + WM831X_LDO_ON_CONTROL;
111*4882a593Smuzhiyun 	int ret;
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	switch (mode) {
115*4882a593Smuzhiyun 	case REGULATOR_MODE_NORMAL:
116*4882a593Smuzhiyun 		ret = wm831x_set_bits(wm831x, on_reg,
117*4882a593Smuzhiyun 				      WM831X_LDO1_ON_MODE, 0);
118*4882a593Smuzhiyun 		if (ret < 0)
119*4882a593Smuzhiyun 			return ret;
120*4882a593Smuzhiyun 		break;
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 	case REGULATOR_MODE_IDLE:
123*4882a593Smuzhiyun 		ret = wm831x_set_bits(wm831x, ctrl_reg,
124*4882a593Smuzhiyun 				      WM831X_LDO1_LP_MODE, 0);
125*4882a593Smuzhiyun 		if (ret < 0)
126*4882a593Smuzhiyun 			return ret;
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 		ret = wm831x_set_bits(wm831x, on_reg,
129*4882a593Smuzhiyun 				      WM831X_LDO1_ON_MODE,
130*4882a593Smuzhiyun 				      WM831X_LDO1_ON_MODE);
131*4882a593Smuzhiyun 		if (ret < 0)
132*4882a593Smuzhiyun 			return ret;
133*4882a593Smuzhiyun 		break;
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	case REGULATOR_MODE_STANDBY:
136*4882a593Smuzhiyun 		ret = wm831x_set_bits(wm831x, ctrl_reg,
137*4882a593Smuzhiyun 				      WM831X_LDO1_LP_MODE,
138*4882a593Smuzhiyun 				      WM831X_LDO1_LP_MODE);
139*4882a593Smuzhiyun 		if (ret < 0)
140*4882a593Smuzhiyun 			return ret;
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 		ret = wm831x_set_bits(wm831x, on_reg,
143*4882a593Smuzhiyun 				      WM831X_LDO1_ON_MODE,
144*4882a593Smuzhiyun 				      WM831X_LDO1_ON_MODE);
145*4882a593Smuzhiyun 		if (ret < 0)
146*4882a593Smuzhiyun 			return ret;
147*4882a593Smuzhiyun 		break;
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	default:
150*4882a593Smuzhiyun 		return -EINVAL;
151*4882a593Smuzhiyun 	}
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 	return 0;
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun 
wm831x_gp_ldo_get_status(struct regulator_dev * rdev)156*4882a593Smuzhiyun static int wm831x_gp_ldo_get_status(struct regulator_dev *rdev)
157*4882a593Smuzhiyun {
158*4882a593Smuzhiyun 	struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
159*4882a593Smuzhiyun 	struct wm831x *wm831x = ldo->wm831x;
160*4882a593Smuzhiyun 	int mask = 1 << rdev_get_id(rdev);
161*4882a593Smuzhiyun 	int ret;
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	/* Is the regulator on? */
164*4882a593Smuzhiyun 	ret = wm831x_reg_read(wm831x, WM831X_LDO_STATUS);
165*4882a593Smuzhiyun 	if (ret < 0)
166*4882a593Smuzhiyun 		return ret;
167*4882a593Smuzhiyun 	if (!(ret & mask))
168*4882a593Smuzhiyun 		return REGULATOR_STATUS_OFF;
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 	/* Is it reporting under voltage? */
171*4882a593Smuzhiyun 	ret = wm831x_reg_read(wm831x, WM831X_LDO_UV_STATUS);
172*4882a593Smuzhiyun 	if (ret < 0)
173*4882a593Smuzhiyun 		return ret;
174*4882a593Smuzhiyun 	if (ret & mask)
175*4882a593Smuzhiyun 		return REGULATOR_STATUS_ERROR;
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 	ret = wm831x_gp_ldo_get_mode(rdev);
178*4882a593Smuzhiyun 	if (ret < 0)
179*4882a593Smuzhiyun 		return ret;
180*4882a593Smuzhiyun 	else
181*4882a593Smuzhiyun 		return regulator_mode_to_status(ret);
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun 
wm831x_gp_ldo_get_optimum_mode(struct regulator_dev * rdev,int input_uV,int output_uV,int load_uA)184*4882a593Smuzhiyun static unsigned int wm831x_gp_ldo_get_optimum_mode(struct regulator_dev *rdev,
185*4882a593Smuzhiyun 						   int input_uV,
186*4882a593Smuzhiyun 						   int output_uV, int load_uA)
187*4882a593Smuzhiyun {
188*4882a593Smuzhiyun 	if (load_uA < 20000)
189*4882a593Smuzhiyun 		return REGULATOR_MODE_STANDBY;
190*4882a593Smuzhiyun 	if (load_uA < 50000)
191*4882a593Smuzhiyun 		return REGULATOR_MODE_IDLE;
192*4882a593Smuzhiyun 	return REGULATOR_MODE_NORMAL;
193*4882a593Smuzhiyun }
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun static const struct regulator_ops wm831x_gp_ldo_ops = {
197*4882a593Smuzhiyun 	.list_voltage = regulator_list_voltage_linear_range,
198*4882a593Smuzhiyun 	.map_voltage = regulator_map_voltage_linear_range,
199*4882a593Smuzhiyun 	.get_voltage_sel = regulator_get_voltage_sel_regmap,
200*4882a593Smuzhiyun 	.set_voltage_sel = regulator_set_voltage_sel_regmap,
201*4882a593Smuzhiyun 	.set_suspend_voltage = wm831x_gp_ldo_set_suspend_voltage,
202*4882a593Smuzhiyun 	.get_mode = wm831x_gp_ldo_get_mode,
203*4882a593Smuzhiyun 	.set_mode = wm831x_gp_ldo_set_mode,
204*4882a593Smuzhiyun 	.get_status = wm831x_gp_ldo_get_status,
205*4882a593Smuzhiyun 	.get_optimum_mode = wm831x_gp_ldo_get_optimum_mode,
206*4882a593Smuzhiyun 	.get_bypass = regulator_get_bypass_regmap,
207*4882a593Smuzhiyun 	.set_bypass = regulator_set_bypass_regmap,
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun 	.is_enabled = regulator_is_enabled_regmap,
210*4882a593Smuzhiyun 	.enable = regulator_enable_regmap,
211*4882a593Smuzhiyun 	.disable = regulator_disable_regmap,
212*4882a593Smuzhiyun };
213*4882a593Smuzhiyun 
wm831x_gp_ldo_probe(struct platform_device * pdev)214*4882a593Smuzhiyun static int wm831x_gp_ldo_probe(struct platform_device *pdev)
215*4882a593Smuzhiyun {
216*4882a593Smuzhiyun 	struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
217*4882a593Smuzhiyun 	struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
218*4882a593Smuzhiyun 	struct regulator_config config = { };
219*4882a593Smuzhiyun 	int id;
220*4882a593Smuzhiyun 	struct wm831x_ldo *ldo;
221*4882a593Smuzhiyun 	struct resource *res;
222*4882a593Smuzhiyun 	int ret, irq;
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun 	if (pdata && pdata->wm831x_num)
225*4882a593Smuzhiyun 		id = (pdata->wm831x_num * 10) + 1;
226*4882a593Smuzhiyun 	else
227*4882a593Smuzhiyun 		id = 0;
228*4882a593Smuzhiyun 	id = pdev->id - id;
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	dev_dbg(&pdev->dev, "Probing LDO%d\n", id + 1);
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 	ldo = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_ldo), GFP_KERNEL);
233*4882a593Smuzhiyun 	if (!ldo)
234*4882a593Smuzhiyun 		return -ENOMEM;
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 	ldo->wm831x = wm831x;
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun 	res = platform_get_resource(pdev, IORESOURCE_REG, 0);
239*4882a593Smuzhiyun 	if (res == NULL) {
240*4882a593Smuzhiyun 		dev_err(&pdev->dev, "No REG resource\n");
241*4882a593Smuzhiyun 		ret = -EINVAL;
242*4882a593Smuzhiyun 		goto err;
243*4882a593Smuzhiyun 	}
244*4882a593Smuzhiyun 	ldo->base = res->start;
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	snprintf(ldo->name, sizeof(ldo->name), "LDO%d", id + 1);
247*4882a593Smuzhiyun 	ldo->desc.name = ldo->name;
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun 	snprintf(ldo->supply_name, sizeof(ldo->supply_name),
250*4882a593Smuzhiyun 		 "LDO%dVDD", id + 1);
251*4882a593Smuzhiyun 	ldo->desc.supply_name = ldo->supply_name;
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	ldo->desc.id = id;
254*4882a593Smuzhiyun 	ldo->desc.type = REGULATOR_VOLTAGE;
255*4882a593Smuzhiyun 	ldo->desc.n_voltages = 32;
256*4882a593Smuzhiyun 	ldo->desc.ops = &wm831x_gp_ldo_ops;
257*4882a593Smuzhiyun 	ldo->desc.owner = THIS_MODULE;
258*4882a593Smuzhiyun 	ldo->desc.vsel_reg = ldo->base + WM831X_LDO_ON_CONTROL;
259*4882a593Smuzhiyun 	ldo->desc.vsel_mask = WM831X_LDO1_ON_VSEL_MASK;
260*4882a593Smuzhiyun 	ldo->desc.enable_reg = WM831X_LDO_ENABLE;
261*4882a593Smuzhiyun 	ldo->desc.enable_mask = 1 << id;
262*4882a593Smuzhiyun 	ldo->desc.bypass_reg = ldo->base;
263*4882a593Smuzhiyun 	ldo->desc.bypass_mask = WM831X_LDO1_SWI;
264*4882a593Smuzhiyun 	ldo->desc.linear_ranges = wm831x_gp_ldo_ranges;
265*4882a593Smuzhiyun 	ldo->desc.n_linear_ranges = ARRAY_SIZE(wm831x_gp_ldo_ranges);
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun 	config.dev = pdev->dev.parent;
268*4882a593Smuzhiyun 	if (pdata)
269*4882a593Smuzhiyun 		config.init_data = pdata->ldo[id];
270*4882a593Smuzhiyun 	config.driver_data = ldo;
271*4882a593Smuzhiyun 	config.regmap = wm831x->regmap;
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun 	ldo->regulator = devm_regulator_register(&pdev->dev, &ldo->desc,
274*4882a593Smuzhiyun 						 &config);
275*4882a593Smuzhiyun 	if (IS_ERR(ldo->regulator)) {
276*4882a593Smuzhiyun 		ret = PTR_ERR(ldo->regulator);
277*4882a593Smuzhiyun 		dev_err(wm831x->dev, "Failed to register LDO%d: %d\n",
278*4882a593Smuzhiyun 			id + 1, ret);
279*4882a593Smuzhiyun 		goto err;
280*4882a593Smuzhiyun 	}
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 	irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
283*4882a593Smuzhiyun 	ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
284*4882a593Smuzhiyun 					wm831x_ldo_uv_irq,
285*4882a593Smuzhiyun 					IRQF_TRIGGER_RISING | IRQF_ONESHOT,
286*4882a593Smuzhiyun 					ldo->name,
287*4882a593Smuzhiyun 					ldo);
288*4882a593Smuzhiyun 	if (ret != 0) {
289*4882a593Smuzhiyun 		dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
290*4882a593Smuzhiyun 			irq, ret);
291*4882a593Smuzhiyun 		goto err;
292*4882a593Smuzhiyun 	}
293*4882a593Smuzhiyun 
294*4882a593Smuzhiyun 	platform_set_drvdata(pdev, ldo);
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun 	return 0;
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun err:
299*4882a593Smuzhiyun 	return ret;
300*4882a593Smuzhiyun }
301*4882a593Smuzhiyun 
302*4882a593Smuzhiyun static struct platform_driver wm831x_gp_ldo_driver = {
303*4882a593Smuzhiyun 	.probe = wm831x_gp_ldo_probe,
304*4882a593Smuzhiyun 	.driver		= {
305*4882a593Smuzhiyun 		.name	= "wm831x-ldo",
306*4882a593Smuzhiyun 	},
307*4882a593Smuzhiyun };
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun /*
310*4882a593Smuzhiyun  * Analogue LDOs
311*4882a593Smuzhiyun  */
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun static const struct linear_range wm831x_aldo_ranges[] = {
314*4882a593Smuzhiyun 	REGULATOR_LINEAR_RANGE(1000000, 0, 12, 50000),
315*4882a593Smuzhiyun 	REGULATOR_LINEAR_RANGE(1700000, 13, 31, 100000),
316*4882a593Smuzhiyun };
317*4882a593Smuzhiyun 
wm831x_aldo_set_suspend_voltage(struct regulator_dev * rdev,int uV)318*4882a593Smuzhiyun static int wm831x_aldo_set_suspend_voltage(struct regulator_dev *rdev,
319*4882a593Smuzhiyun 					     int uV)
320*4882a593Smuzhiyun {
321*4882a593Smuzhiyun 	struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
322*4882a593Smuzhiyun 	struct wm831x *wm831x = ldo->wm831x;
323*4882a593Smuzhiyun 	int sel, reg = ldo->base + WM831X_LDO_SLEEP_CONTROL;
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun 	sel = regulator_map_voltage_linear_range(rdev, uV, uV);
326*4882a593Smuzhiyun 	if (sel < 0)
327*4882a593Smuzhiyun 		return sel;
328*4882a593Smuzhiyun 
329*4882a593Smuzhiyun 	return wm831x_set_bits(wm831x, reg, WM831X_LDO7_ON_VSEL_MASK, sel);
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun 
wm831x_aldo_get_mode(struct regulator_dev * rdev)332*4882a593Smuzhiyun static unsigned int wm831x_aldo_get_mode(struct regulator_dev *rdev)
333*4882a593Smuzhiyun {
334*4882a593Smuzhiyun 	struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
335*4882a593Smuzhiyun 	struct wm831x *wm831x = ldo->wm831x;
336*4882a593Smuzhiyun 	int on_reg = ldo->base + WM831X_LDO_ON_CONTROL;
337*4882a593Smuzhiyun 	int ret;
338*4882a593Smuzhiyun 
339*4882a593Smuzhiyun 	ret = wm831x_reg_read(wm831x, on_reg);
340*4882a593Smuzhiyun 	if (ret < 0)
341*4882a593Smuzhiyun 		return 0;
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun 	if (ret & WM831X_LDO7_ON_MODE)
344*4882a593Smuzhiyun 		return REGULATOR_MODE_IDLE;
345*4882a593Smuzhiyun 	else
346*4882a593Smuzhiyun 		return REGULATOR_MODE_NORMAL;
347*4882a593Smuzhiyun }
348*4882a593Smuzhiyun 
wm831x_aldo_set_mode(struct regulator_dev * rdev,unsigned int mode)349*4882a593Smuzhiyun static int wm831x_aldo_set_mode(struct regulator_dev *rdev,
350*4882a593Smuzhiyun 				  unsigned int mode)
351*4882a593Smuzhiyun {
352*4882a593Smuzhiyun 	struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
353*4882a593Smuzhiyun 	struct wm831x *wm831x = ldo->wm831x;
354*4882a593Smuzhiyun 	int on_reg = ldo->base + WM831X_LDO_ON_CONTROL;
355*4882a593Smuzhiyun 	int ret;
356*4882a593Smuzhiyun 
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun 	switch (mode) {
359*4882a593Smuzhiyun 	case REGULATOR_MODE_NORMAL:
360*4882a593Smuzhiyun 		ret = wm831x_set_bits(wm831x, on_reg, WM831X_LDO7_ON_MODE, 0);
361*4882a593Smuzhiyun 		if (ret < 0)
362*4882a593Smuzhiyun 			return ret;
363*4882a593Smuzhiyun 		break;
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun 	case REGULATOR_MODE_IDLE:
366*4882a593Smuzhiyun 		ret = wm831x_set_bits(wm831x, on_reg, WM831X_LDO7_ON_MODE,
367*4882a593Smuzhiyun 				      WM831X_LDO7_ON_MODE);
368*4882a593Smuzhiyun 		if (ret < 0)
369*4882a593Smuzhiyun 			return ret;
370*4882a593Smuzhiyun 		break;
371*4882a593Smuzhiyun 
372*4882a593Smuzhiyun 	default:
373*4882a593Smuzhiyun 		return -EINVAL;
374*4882a593Smuzhiyun 	}
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun 	return 0;
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun 
wm831x_aldo_get_status(struct regulator_dev * rdev)379*4882a593Smuzhiyun static int wm831x_aldo_get_status(struct regulator_dev *rdev)
380*4882a593Smuzhiyun {
381*4882a593Smuzhiyun 	struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
382*4882a593Smuzhiyun 	struct wm831x *wm831x = ldo->wm831x;
383*4882a593Smuzhiyun 	int mask = 1 << rdev_get_id(rdev);
384*4882a593Smuzhiyun 	int ret;
385*4882a593Smuzhiyun 
386*4882a593Smuzhiyun 	/* Is the regulator on? */
387*4882a593Smuzhiyun 	ret = wm831x_reg_read(wm831x, WM831X_LDO_STATUS);
388*4882a593Smuzhiyun 	if (ret < 0)
389*4882a593Smuzhiyun 		return ret;
390*4882a593Smuzhiyun 	if (!(ret & mask))
391*4882a593Smuzhiyun 		return REGULATOR_STATUS_OFF;
392*4882a593Smuzhiyun 
393*4882a593Smuzhiyun 	/* Is it reporting under voltage? */
394*4882a593Smuzhiyun 	ret = wm831x_reg_read(wm831x, WM831X_LDO_UV_STATUS);
395*4882a593Smuzhiyun 	if (ret < 0)
396*4882a593Smuzhiyun 		return ret;
397*4882a593Smuzhiyun 	if (ret & mask)
398*4882a593Smuzhiyun 		return REGULATOR_STATUS_ERROR;
399*4882a593Smuzhiyun 
400*4882a593Smuzhiyun 	ret = wm831x_aldo_get_mode(rdev);
401*4882a593Smuzhiyun 	if (ret < 0)
402*4882a593Smuzhiyun 		return ret;
403*4882a593Smuzhiyun 	else
404*4882a593Smuzhiyun 		return regulator_mode_to_status(ret);
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun 
407*4882a593Smuzhiyun static const struct regulator_ops wm831x_aldo_ops = {
408*4882a593Smuzhiyun 	.list_voltage = regulator_list_voltage_linear_range,
409*4882a593Smuzhiyun 	.map_voltage = regulator_map_voltage_linear_range,
410*4882a593Smuzhiyun 	.get_voltage_sel = regulator_get_voltage_sel_regmap,
411*4882a593Smuzhiyun 	.set_voltage_sel = regulator_set_voltage_sel_regmap,
412*4882a593Smuzhiyun 	.set_suspend_voltage = wm831x_aldo_set_suspend_voltage,
413*4882a593Smuzhiyun 	.get_mode = wm831x_aldo_get_mode,
414*4882a593Smuzhiyun 	.set_mode = wm831x_aldo_set_mode,
415*4882a593Smuzhiyun 	.get_status = wm831x_aldo_get_status,
416*4882a593Smuzhiyun 	.set_bypass = regulator_set_bypass_regmap,
417*4882a593Smuzhiyun 	.get_bypass = regulator_get_bypass_regmap,
418*4882a593Smuzhiyun 
419*4882a593Smuzhiyun 	.is_enabled = regulator_is_enabled_regmap,
420*4882a593Smuzhiyun 	.enable = regulator_enable_regmap,
421*4882a593Smuzhiyun 	.disable = regulator_disable_regmap,
422*4882a593Smuzhiyun };
423*4882a593Smuzhiyun 
wm831x_aldo_probe(struct platform_device * pdev)424*4882a593Smuzhiyun static int wm831x_aldo_probe(struct platform_device *pdev)
425*4882a593Smuzhiyun {
426*4882a593Smuzhiyun 	struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
427*4882a593Smuzhiyun 	struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
428*4882a593Smuzhiyun 	struct regulator_config config = { };
429*4882a593Smuzhiyun 	int id;
430*4882a593Smuzhiyun 	struct wm831x_ldo *ldo;
431*4882a593Smuzhiyun 	struct resource *res;
432*4882a593Smuzhiyun 	int ret, irq;
433*4882a593Smuzhiyun 
434*4882a593Smuzhiyun 	if (pdata && pdata->wm831x_num)
435*4882a593Smuzhiyun 		id = (pdata->wm831x_num * 10) + 1;
436*4882a593Smuzhiyun 	else
437*4882a593Smuzhiyun 		id = 0;
438*4882a593Smuzhiyun 	id = pdev->id - id;
439*4882a593Smuzhiyun 
440*4882a593Smuzhiyun 	dev_dbg(&pdev->dev, "Probing LDO%d\n", id + 1);
441*4882a593Smuzhiyun 
442*4882a593Smuzhiyun 	ldo = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_ldo), GFP_KERNEL);
443*4882a593Smuzhiyun 	if (!ldo)
444*4882a593Smuzhiyun 		return -ENOMEM;
445*4882a593Smuzhiyun 
446*4882a593Smuzhiyun 	ldo->wm831x = wm831x;
447*4882a593Smuzhiyun 
448*4882a593Smuzhiyun 	res = platform_get_resource(pdev, IORESOURCE_REG, 0);
449*4882a593Smuzhiyun 	if (res == NULL) {
450*4882a593Smuzhiyun 		dev_err(&pdev->dev, "No REG resource\n");
451*4882a593Smuzhiyun 		ret = -EINVAL;
452*4882a593Smuzhiyun 		goto err;
453*4882a593Smuzhiyun 	}
454*4882a593Smuzhiyun 	ldo->base = res->start;
455*4882a593Smuzhiyun 
456*4882a593Smuzhiyun 	snprintf(ldo->name, sizeof(ldo->name), "LDO%d", id + 1);
457*4882a593Smuzhiyun 	ldo->desc.name = ldo->name;
458*4882a593Smuzhiyun 
459*4882a593Smuzhiyun 	snprintf(ldo->supply_name, sizeof(ldo->supply_name),
460*4882a593Smuzhiyun 		 "LDO%dVDD", id + 1);
461*4882a593Smuzhiyun 	ldo->desc.supply_name = ldo->supply_name;
462*4882a593Smuzhiyun 
463*4882a593Smuzhiyun 	ldo->desc.id = id;
464*4882a593Smuzhiyun 	ldo->desc.type = REGULATOR_VOLTAGE;
465*4882a593Smuzhiyun 	ldo->desc.n_voltages = 32;
466*4882a593Smuzhiyun 	ldo->desc.linear_ranges = wm831x_aldo_ranges;
467*4882a593Smuzhiyun 	ldo->desc.n_linear_ranges = ARRAY_SIZE(wm831x_aldo_ranges);
468*4882a593Smuzhiyun 	ldo->desc.ops = &wm831x_aldo_ops;
469*4882a593Smuzhiyun 	ldo->desc.owner = THIS_MODULE;
470*4882a593Smuzhiyun 	ldo->desc.vsel_reg = ldo->base + WM831X_LDO_ON_CONTROL;
471*4882a593Smuzhiyun 	ldo->desc.vsel_mask = WM831X_LDO7_ON_VSEL_MASK;
472*4882a593Smuzhiyun 	ldo->desc.enable_reg = WM831X_LDO_ENABLE;
473*4882a593Smuzhiyun 	ldo->desc.enable_mask = 1 << id;
474*4882a593Smuzhiyun 	ldo->desc.bypass_reg = ldo->base;
475*4882a593Smuzhiyun 	ldo->desc.bypass_mask = WM831X_LDO7_SWI;
476*4882a593Smuzhiyun 
477*4882a593Smuzhiyun 	config.dev = pdev->dev.parent;
478*4882a593Smuzhiyun 	if (pdata)
479*4882a593Smuzhiyun 		config.init_data = pdata->ldo[id];
480*4882a593Smuzhiyun 	config.driver_data = ldo;
481*4882a593Smuzhiyun 	config.regmap = wm831x->regmap;
482*4882a593Smuzhiyun 
483*4882a593Smuzhiyun 	ldo->regulator = devm_regulator_register(&pdev->dev, &ldo->desc,
484*4882a593Smuzhiyun 						 &config);
485*4882a593Smuzhiyun 	if (IS_ERR(ldo->regulator)) {
486*4882a593Smuzhiyun 		ret = PTR_ERR(ldo->regulator);
487*4882a593Smuzhiyun 		dev_err(wm831x->dev, "Failed to register LDO%d: %d\n",
488*4882a593Smuzhiyun 			id + 1, ret);
489*4882a593Smuzhiyun 		goto err;
490*4882a593Smuzhiyun 	}
491*4882a593Smuzhiyun 
492*4882a593Smuzhiyun 	irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
493*4882a593Smuzhiyun 	ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
494*4882a593Smuzhiyun 					wm831x_ldo_uv_irq,
495*4882a593Smuzhiyun 					IRQF_TRIGGER_RISING | IRQF_ONESHOT,
496*4882a593Smuzhiyun 					ldo->name, ldo);
497*4882a593Smuzhiyun 	if (ret != 0) {
498*4882a593Smuzhiyun 		dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
499*4882a593Smuzhiyun 			irq, ret);
500*4882a593Smuzhiyun 		goto err;
501*4882a593Smuzhiyun 	}
502*4882a593Smuzhiyun 
503*4882a593Smuzhiyun 	platform_set_drvdata(pdev, ldo);
504*4882a593Smuzhiyun 
505*4882a593Smuzhiyun 	return 0;
506*4882a593Smuzhiyun 
507*4882a593Smuzhiyun err:
508*4882a593Smuzhiyun 	return ret;
509*4882a593Smuzhiyun }
510*4882a593Smuzhiyun 
511*4882a593Smuzhiyun static struct platform_driver wm831x_aldo_driver = {
512*4882a593Smuzhiyun 	.probe = wm831x_aldo_probe,
513*4882a593Smuzhiyun 	.driver		= {
514*4882a593Smuzhiyun 		.name	= "wm831x-aldo",
515*4882a593Smuzhiyun 	},
516*4882a593Smuzhiyun };
517*4882a593Smuzhiyun 
518*4882a593Smuzhiyun /*
519*4882a593Smuzhiyun  * Alive LDO
520*4882a593Smuzhiyun  */
521*4882a593Smuzhiyun 
522*4882a593Smuzhiyun #define WM831X_ALIVE_LDO_MAX_SELECTOR 0xf
523*4882a593Smuzhiyun 
wm831x_alive_ldo_set_suspend_voltage(struct regulator_dev * rdev,int uV)524*4882a593Smuzhiyun static int wm831x_alive_ldo_set_suspend_voltage(struct regulator_dev *rdev,
525*4882a593Smuzhiyun 					     int uV)
526*4882a593Smuzhiyun {
527*4882a593Smuzhiyun 	struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
528*4882a593Smuzhiyun 	struct wm831x *wm831x = ldo->wm831x;
529*4882a593Smuzhiyun 	int sel, reg = ldo->base + WM831X_ALIVE_LDO_SLEEP_CONTROL;
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun 	sel = regulator_map_voltage_linear(rdev, uV, uV);
532*4882a593Smuzhiyun 	if (sel < 0)
533*4882a593Smuzhiyun 		return sel;
534*4882a593Smuzhiyun 
535*4882a593Smuzhiyun 	return wm831x_set_bits(wm831x, reg, WM831X_LDO11_ON_VSEL_MASK, sel);
536*4882a593Smuzhiyun }
537*4882a593Smuzhiyun 
wm831x_alive_ldo_get_status(struct regulator_dev * rdev)538*4882a593Smuzhiyun static int wm831x_alive_ldo_get_status(struct regulator_dev *rdev)
539*4882a593Smuzhiyun {
540*4882a593Smuzhiyun 	struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
541*4882a593Smuzhiyun 	struct wm831x *wm831x = ldo->wm831x;
542*4882a593Smuzhiyun 	int mask = 1 << rdev_get_id(rdev);
543*4882a593Smuzhiyun 	int ret;
544*4882a593Smuzhiyun 
545*4882a593Smuzhiyun 	/* Is the regulator on? */
546*4882a593Smuzhiyun 	ret = wm831x_reg_read(wm831x, WM831X_LDO_STATUS);
547*4882a593Smuzhiyun 	if (ret < 0)
548*4882a593Smuzhiyun 		return ret;
549*4882a593Smuzhiyun 	if (ret & mask)
550*4882a593Smuzhiyun 		return REGULATOR_STATUS_ON;
551*4882a593Smuzhiyun 	else
552*4882a593Smuzhiyun 		return REGULATOR_STATUS_OFF;
553*4882a593Smuzhiyun }
554*4882a593Smuzhiyun 
555*4882a593Smuzhiyun static const struct regulator_ops wm831x_alive_ldo_ops = {
556*4882a593Smuzhiyun 	.list_voltage = regulator_list_voltage_linear,
557*4882a593Smuzhiyun 	.map_voltage = regulator_map_voltage_linear,
558*4882a593Smuzhiyun 	.get_voltage_sel = regulator_get_voltage_sel_regmap,
559*4882a593Smuzhiyun 	.set_voltage_sel = regulator_set_voltage_sel_regmap,
560*4882a593Smuzhiyun 	.set_suspend_voltage = wm831x_alive_ldo_set_suspend_voltage,
561*4882a593Smuzhiyun 	.get_status = wm831x_alive_ldo_get_status,
562*4882a593Smuzhiyun 
563*4882a593Smuzhiyun 	.is_enabled = regulator_is_enabled_regmap,
564*4882a593Smuzhiyun 	.enable = regulator_enable_regmap,
565*4882a593Smuzhiyun 	.disable = regulator_disable_regmap,
566*4882a593Smuzhiyun };
567*4882a593Smuzhiyun 
wm831x_alive_ldo_probe(struct platform_device * pdev)568*4882a593Smuzhiyun static int wm831x_alive_ldo_probe(struct platform_device *pdev)
569*4882a593Smuzhiyun {
570*4882a593Smuzhiyun 	struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
571*4882a593Smuzhiyun 	struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
572*4882a593Smuzhiyun 	struct regulator_config config = { };
573*4882a593Smuzhiyun 	int id;
574*4882a593Smuzhiyun 	struct wm831x_ldo *ldo;
575*4882a593Smuzhiyun 	struct resource *res;
576*4882a593Smuzhiyun 	int ret;
577*4882a593Smuzhiyun 
578*4882a593Smuzhiyun 	if (pdata && pdata->wm831x_num)
579*4882a593Smuzhiyun 		id = (pdata->wm831x_num * 10) + 1;
580*4882a593Smuzhiyun 	else
581*4882a593Smuzhiyun 		id = 0;
582*4882a593Smuzhiyun 	id = pdev->id - id;
583*4882a593Smuzhiyun 
584*4882a593Smuzhiyun 
585*4882a593Smuzhiyun 	dev_dbg(&pdev->dev, "Probing LDO%d\n", id + 1);
586*4882a593Smuzhiyun 
587*4882a593Smuzhiyun 	ldo = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_ldo), GFP_KERNEL);
588*4882a593Smuzhiyun 	if (!ldo)
589*4882a593Smuzhiyun 		return -ENOMEM;
590*4882a593Smuzhiyun 
591*4882a593Smuzhiyun 	ldo->wm831x = wm831x;
592*4882a593Smuzhiyun 
593*4882a593Smuzhiyun 	res = platform_get_resource(pdev, IORESOURCE_REG, 0);
594*4882a593Smuzhiyun 	if (res == NULL) {
595*4882a593Smuzhiyun 		dev_err(&pdev->dev, "No REG resource\n");
596*4882a593Smuzhiyun 		ret = -EINVAL;
597*4882a593Smuzhiyun 		goto err;
598*4882a593Smuzhiyun 	}
599*4882a593Smuzhiyun 	ldo->base = res->start;
600*4882a593Smuzhiyun 
601*4882a593Smuzhiyun 	snprintf(ldo->name, sizeof(ldo->name), "LDO%d", id + 1);
602*4882a593Smuzhiyun 	ldo->desc.name = ldo->name;
603*4882a593Smuzhiyun 
604*4882a593Smuzhiyun 	snprintf(ldo->supply_name, sizeof(ldo->supply_name),
605*4882a593Smuzhiyun 		 "LDO%dVDD", id + 1);
606*4882a593Smuzhiyun 	ldo->desc.supply_name = ldo->supply_name;
607*4882a593Smuzhiyun 
608*4882a593Smuzhiyun 	ldo->desc.id = id;
609*4882a593Smuzhiyun 	ldo->desc.type = REGULATOR_VOLTAGE;
610*4882a593Smuzhiyun 	ldo->desc.n_voltages = WM831X_ALIVE_LDO_MAX_SELECTOR + 1;
611*4882a593Smuzhiyun 	ldo->desc.ops = &wm831x_alive_ldo_ops;
612*4882a593Smuzhiyun 	ldo->desc.owner = THIS_MODULE;
613*4882a593Smuzhiyun 	ldo->desc.vsel_reg = ldo->base + WM831X_ALIVE_LDO_ON_CONTROL;
614*4882a593Smuzhiyun 	ldo->desc.vsel_mask = WM831X_LDO11_ON_VSEL_MASK;
615*4882a593Smuzhiyun 	ldo->desc.enable_reg = WM831X_LDO_ENABLE;
616*4882a593Smuzhiyun 	ldo->desc.enable_mask = 1 << id;
617*4882a593Smuzhiyun 	ldo->desc.min_uV = 800000;
618*4882a593Smuzhiyun 	ldo->desc.uV_step = 50000;
619*4882a593Smuzhiyun 	ldo->desc.enable_time = 1000;
620*4882a593Smuzhiyun 
621*4882a593Smuzhiyun 	config.dev = pdev->dev.parent;
622*4882a593Smuzhiyun 	if (pdata)
623*4882a593Smuzhiyun 		config.init_data = pdata->ldo[id];
624*4882a593Smuzhiyun 	config.driver_data = ldo;
625*4882a593Smuzhiyun 	config.regmap = wm831x->regmap;
626*4882a593Smuzhiyun 
627*4882a593Smuzhiyun 	ldo->regulator = devm_regulator_register(&pdev->dev, &ldo->desc,
628*4882a593Smuzhiyun 						 &config);
629*4882a593Smuzhiyun 	if (IS_ERR(ldo->regulator)) {
630*4882a593Smuzhiyun 		ret = PTR_ERR(ldo->regulator);
631*4882a593Smuzhiyun 		dev_err(wm831x->dev, "Failed to register LDO%d: %d\n",
632*4882a593Smuzhiyun 			id + 1, ret);
633*4882a593Smuzhiyun 		goto err;
634*4882a593Smuzhiyun 	}
635*4882a593Smuzhiyun 
636*4882a593Smuzhiyun 	platform_set_drvdata(pdev, ldo);
637*4882a593Smuzhiyun 
638*4882a593Smuzhiyun 	return 0;
639*4882a593Smuzhiyun 
640*4882a593Smuzhiyun err:
641*4882a593Smuzhiyun 	return ret;
642*4882a593Smuzhiyun }
643*4882a593Smuzhiyun 
644*4882a593Smuzhiyun static struct platform_driver wm831x_alive_ldo_driver = {
645*4882a593Smuzhiyun 	.probe = wm831x_alive_ldo_probe,
646*4882a593Smuzhiyun 	.driver		= {
647*4882a593Smuzhiyun 		.name	= "wm831x-alive-ldo",
648*4882a593Smuzhiyun 	},
649*4882a593Smuzhiyun };
650*4882a593Smuzhiyun 
651*4882a593Smuzhiyun static struct platform_driver * const drivers[] = {
652*4882a593Smuzhiyun 	&wm831x_gp_ldo_driver,
653*4882a593Smuzhiyun 	&wm831x_aldo_driver,
654*4882a593Smuzhiyun 	&wm831x_alive_ldo_driver,
655*4882a593Smuzhiyun };
656*4882a593Smuzhiyun 
wm831x_ldo_init(void)657*4882a593Smuzhiyun static int __init wm831x_ldo_init(void)
658*4882a593Smuzhiyun {
659*4882a593Smuzhiyun 	return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
660*4882a593Smuzhiyun }
661*4882a593Smuzhiyun subsys_initcall(wm831x_ldo_init);
662*4882a593Smuzhiyun 
wm831x_ldo_exit(void)663*4882a593Smuzhiyun static void __exit wm831x_ldo_exit(void)
664*4882a593Smuzhiyun {
665*4882a593Smuzhiyun 	platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
666*4882a593Smuzhiyun }
667*4882a593Smuzhiyun module_exit(wm831x_ldo_exit);
668*4882a593Smuzhiyun 
669*4882a593Smuzhiyun /* Module information */
670*4882a593Smuzhiyun MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
671*4882a593Smuzhiyun MODULE_DESCRIPTION("WM831x LDO driver");
672*4882a593Smuzhiyun MODULE_LICENSE("GPL");
673*4882a593Smuzhiyun MODULE_ALIAS("platform:wm831x-ldo");
674*4882a593Smuzhiyun MODULE_ALIAS("platform:wm831x-aldo");
675*4882a593Smuzhiyun MODULE_ALIAS("platform:wm831x-aliveldo");
676