xref: /OK3568_Linux_fs/kernel/drivers/regulator/tps65217-regulator.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * tps65217-regulator.c
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Regulator driver for TPS65217 PMIC
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * This program is free software; you can redistribute it and/or
9*4882a593Smuzhiyun  * modify it under the terms of the GNU General Public License as
10*4882a593Smuzhiyun  * published by the Free Software Foundation version 2.
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
13*4882a593Smuzhiyun  * kind, whether express or implied; without even the implied warranty
14*4882a593Smuzhiyun  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15*4882a593Smuzhiyun  * GNU General Public License for more details.
16*4882a593Smuzhiyun  */
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #include <linux/kernel.h>
19*4882a593Smuzhiyun #include <linux/module.h>
20*4882a593Smuzhiyun #include <linux/device.h>
21*4882a593Smuzhiyun #include <linux/init.h>
22*4882a593Smuzhiyun #include <linux/err.h>
23*4882a593Smuzhiyun #include <linux/platform_device.h>
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #include <linux/regulator/of_regulator.h>
26*4882a593Smuzhiyun #include <linux/regulator/driver.h>
27*4882a593Smuzhiyun #include <linux/regulator/machine.h>
28*4882a593Smuzhiyun #include <linux/mfd/tps65217.h>
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #define TPS65217_REGULATOR(_name, _id, _of_match, _ops, _n, _vr, _vm, _em, \
31*4882a593Smuzhiyun 			   _t, _lr, _nlr,  _sr, _sm)	\
32*4882a593Smuzhiyun 	{						\
33*4882a593Smuzhiyun 		.name		= _name,		\
34*4882a593Smuzhiyun 		.id		= _id,			\
35*4882a593Smuzhiyun 		.of_match       = of_match_ptr(_of_match),    \
36*4882a593Smuzhiyun 		.regulators_node= of_match_ptr("regulators"), \
37*4882a593Smuzhiyun 		.ops		= &_ops,		\
38*4882a593Smuzhiyun 		.n_voltages	= _n,			\
39*4882a593Smuzhiyun 		.type		= REGULATOR_VOLTAGE,	\
40*4882a593Smuzhiyun 		.owner		= THIS_MODULE,		\
41*4882a593Smuzhiyun 		.vsel_reg	= _vr,			\
42*4882a593Smuzhiyun 		.vsel_mask	= _vm,			\
43*4882a593Smuzhiyun 		.enable_reg	= TPS65217_REG_ENABLE,	\
44*4882a593Smuzhiyun 		.enable_mask	= _em,			\
45*4882a593Smuzhiyun 		.volt_table	= _t,			\
46*4882a593Smuzhiyun 		.linear_ranges	= _lr,			\
47*4882a593Smuzhiyun 		.n_linear_ranges = _nlr,		\
48*4882a593Smuzhiyun 		.bypass_reg	= _sr,			\
49*4882a593Smuzhiyun 		.bypass_mask	= _sm,			\
50*4882a593Smuzhiyun 	}						\
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun static const unsigned int LDO1_VSEL_table[] = {
53*4882a593Smuzhiyun 	1000000, 1100000, 1200000, 1250000,
54*4882a593Smuzhiyun 	1300000, 1350000, 1400000, 1500000,
55*4882a593Smuzhiyun 	1600000, 1800000, 2500000, 2750000,
56*4882a593Smuzhiyun 	2800000, 3000000, 3100000, 3300000,
57*4882a593Smuzhiyun };
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun static const struct linear_range tps65217_uv1_ranges[] = {
60*4882a593Smuzhiyun 	REGULATOR_LINEAR_RANGE(900000, 0, 24, 25000),
61*4882a593Smuzhiyun 	REGULATOR_LINEAR_RANGE(1550000, 25, 52, 50000),
62*4882a593Smuzhiyun 	REGULATOR_LINEAR_RANGE(3000000, 53, 55, 100000),
63*4882a593Smuzhiyun 	REGULATOR_LINEAR_RANGE(3300000, 56, 63, 0),
64*4882a593Smuzhiyun };
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun static const struct linear_range tps65217_uv2_ranges[] = {
67*4882a593Smuzhiyun 	REGULATOR_LINEAR_RANGE(1500000, 0, 8, 50000),
68*4882a593Smuzhiyun 	REGULATOR_LINEAR_RANGE(2000000, 9, 13, 100000),
69*4882a593Smuzhiyun 	REGULATOR_LINEAR_RANGE(2450000, 14, 31, 50000),
70*4882a593Smuzhiyun };
71*4882a593Smuzhiyun 
tps65217_pmic_enable(struct regulator_dev * dev)72*4882a593Smuzhiyun static int tps65217_pmic_enable(struct regulator_dev *dev)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun 	struct tps65217 *tps = rdev_get_drvdata(dev);
75*4882a593Smuzhiyun 	int rid = rdev_get_id(dev);
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun 	if (rid < TPS65217_DCDC_1 || rid > TPS65217_LDO_4)
78*4882a593Smuzhiyun 		return -EINVAL;
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun 	/* Enable the regulator and password protection is level 1 */
81*4882a593Smuzhiyun 	return tps65217_set_bits(tps, TPS65217_REG_ENABLE,
82*4882a593Smuzhiyun 				 dev->desc->enable_mask, dev->desc->enable_mask,
83*4882a593Smuzhiyun 				 TPS65217_PROTECT_L1);
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun 
tps65217_pmic_disable(struct regulator_dev * dev)86*4882a593Smuzhiyun static int tps65217_pmic_disable(struct regulator_dev *dev)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun 	struct tps65217 *tps = rdev_get_drvdata(dev);
89*4882a593Smuzhiyun 	int rid = rdev_get_id(dev);
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun 	if (rid < TPS65217_DCDC_1 || rid > TPS65217_LDO_4)
92*4882a593Smuzhiyun 		return -EINVAL;
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 	/* Disable the regulator and password protection is level 1 */
95*4882a593Smuzhiyun 	return tps65217_clear_bits(tps, TPS65217_REG_ENABLE,
96*4882a593Smuzhiyun 				   dev->desc->enable_mask, TPS65217_PROTECT_L1);
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun 
tps65217_pmic_set_voltage_sel(struct regulator_dev * dev,unsigned selector)99*4882a593Smuzhiyun static int tps65217_pmic_set_voltage_sel(struct regulator_dev *dev,
100*4882a593Smuzhiyun 					 unsigned selector)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun 	int ret;
103*4882a593Smuzhiyun 	struct tps65217 *tps = rdev_get_drvdata(dev);
104*4882a593Smuzhiyun 	unsigned int rid = rdev_get_id(dev);
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	/* Set the voltage based on vsel value and write protect level is 2 */
107*4882a593Smuzhiyun 	ret = tps65217_set_bits(tps, dev->desc->vsel_reg, dev->desc->vsel_mask,
108*4882a593Smuzhiyun 				selector, TPS65217_PROTECT_L2);
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	/* Set GO bit for DCDCx to initiate voltage transistion */
111*4882a593Smuzhiyun 	switch (rid) {
112*4882a593Smuzhiyun 	case TPS65217_DCDC_1 ... TPS65217_DCDC_3:
113*4882a593Smuzhiyun 		ret = tps65217_set_bits(tps, TPS65217_REG_DEFSLEW,
114*4882a593Smuzhiyun 				       TPS65217_DEFSLEW_GO, TPS65217_DEFSLEW_GO,
115*4882a593Smuzhiyun 				       TPS65217_PROTECT_L2);
116*4882a593Smuzhiyun 		break;
117*4882a593Smuzhiyun 	}
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	return ret;
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun 
tps65217_pmic_set_suspend_enable(struct regulator_dev * dev)122*4882a593Smuzhiyun static int tps65217_pmic_set_suspend_enable(struct regulator_dev *dev)
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun 	struct tps65217 *tps = rdev_get_drvdata(dev);
125*4882a593Smuzhiyun 	unsigned int rid = rdev_get_id(dev);
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	if (rid > TPS65217_LDO_4)
128*4882a593Smuzhiyun 		return -EINVAL;
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	return tps65217_clear_bits(tps, dev->desc->bypass_reg,
131*4882a593Smuzhiyun 				   dev->desc->bypass_mask,
132*4882a593Smuzhiyun 				   TPS65217_PROTECT_L1);
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun 
tps65217_pmic_set_suspend_disable(struct regulator_dev * dev)135*4882a593Smuzhiyun static int tps65217_pmic_set_suspend_disable(struct regulator_dev *dev)
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun 	struct tps65217 *tps = rdev_get_drvdata(dev);
138*4882a593Smuzhiyun 	unsigned int rid = rdev_get_id(dev);
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	if (rid > TPS65217_LDO_4)
141*4882a593Smuzhiyun 		return -EINVAL;
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	if (!tps->strobes[rid])
144*4882a593Smuzhiyun 		return -EINVAL;
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	return tps65217_set_bits(tps, dev->desc->bypass_reg,
147*4882a593Smuzhiyun 				 dev->desc->bypass_mask,
148*4882a593Smuzhiyun 				 tps->strobes[rid], TPS65217_PROTECT_L1);
149*4882a593Smuzhiyun }
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun /* Operations permitted on DCDCx, LDO2, LDO3 and LDO4 */
152*4882a593Smuzhiyun static const struct regulator_ops tps65217_pmic_ops = {
153*4882a593Smuzhiyun 	.is_enabled		= regulator_is_enabled_regmap,
154*4882a593Smuzhiyun 	.enable			= tps65217_pmic_enable,
155*4882a593Smuzhiyun 	.disable		= tps65217_pmic_disable,
156*4882a593Smuzhiyun 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
157*4882a593Smuzhiyun 	.set_voltage_sel	= tps65217_pmic_set_voltage_sel,
158*4882a593Smuzhiyun 	.list_voltage		= regulator_list_voltage_linear_range,
159*4882a593Smuzhiyun 	.map_voltage		= regulator_map_voltage_linear_range,
160*4882a593Smuzhiyun 	.set_suspend_enable	= tps65217_pmic_set_suspend_enable,
161*4882a593Smuzhiyun 	.set_suspend_disable	= tps65217_pmic_set_suspend_disable,
162*4882a593Smuzhiyun };
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun /* Operations permitted on LDO1 */
165*4882a593Smuzhiyun static const struct regulator_ops tps65217_pmic_ldo1_ops = {
166*4882a593Smuzhiyun 	.is_enabled		= regulator_is_enabled_regmap,
167*4882a593Smuzhiyun 	.enable			= tps65217_pmic_enable,
168*4882a593Smuzhiyun 	.disable		= tps65217_pmic_disable,
169*4882a593Smuzhiyun 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
170*4882a593Smuzhiyun 	.set_voltage_sel	= tps65217_pmic_set_voltage_sel,
171*4882a593Smuzhiyun 	.list_voltage		= regulator_list_voltage_table,
172*4882a593Smuzhiyun 	.map_voltage		= regulator_map_voltage_ascend,
173*4882a593Smuzhiyun 	.set_suspend_enable	= tps65217_pmic_set_suspend_enable,
174*4882a593Smuzhiyun 	.set_suspend_disable	= tps65217_pmic_set_suspend_disable,
175*4882a593Smuzhiyun };
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun static const struct regulator_desc regulators[] = {
178*4882a593Smuzhiyun 	TPS65217_REGULATOR("DCDC1", TPS65217_DCDC_1, "dcdc1",
179*4882a593Smuzhiyun 			   tps65217_pmic_ops, 64, TPS65217_REG_DEFDCDC1,
180*4882a593Smuzhiyun 			   TPS65217_DEFDCDCX_DCDC_MASK, TPS65217_ENABLE_DC1_EN,
181*4882a593Smuzhiyun 			   NULL, tps65217_uv1_ranges,
182*4882a593Smuzhiyun 			   ARRAY_SIZE(tps65217_uv1_ranges), TPS65217_REG_SEQ1,
183*4882a593Smuzhiyun 			   TPS65217_SEQ1_DC1_SEQ_MASK),
184*4882a593Smuzhiyun 	TPS65217_REGULATOR("DCDC2", TPS65217_DCDC_2, "dcdc2",
185*4882a593Smuzhiyun 			   tps65217_pmic_ops, 64, TPS65217_REG_DEFDCDC2,
186*4882a593Smuzhiyun 			   TPS65217_DEFDCDCX_DCDC_MASK, TPS65217_ENABLE_DC2_EN,
187*4882a593Smuzhiyun 			   NULL, tps65217_uv1_ranges,
188*4882a593Smuzhiyun 			   ARRAY_SIZE(tps65217_uv1_ranges), TPS65217_REG_SEQ1,
189*4882a593Smuzhiyun 			   TPS65217_SEQ1_DC2_SEQ_MASK),
190*4882a593Smuzhiyun 	TPS65217_REGULATOR("DCDC3", TPS65217_DCDC_3, "dcdc3",
191*4882a593Smuzhiyun 			   tps65217_pmic_ops, 64, TPS65217_REG_DEFDCDC3,
192*4882a593Smuzhiyun 			   TPS65217_DEFDCDCX_DCDC_MASK, TPS65217_ENABLE_DC3_EN,
193*4882a593Smuzhiyun 			   NULL, tps65217_uv1_ranges,
194*4882a593Smuzhiyun 			   ARRAY_SIZE(tps65217_uv1_ranges), TPS65217_REG_SEQ2,
195*4882a593Smuzhiyun 			   TPS65217_SEQ2_DC3_SEQ_MASK),
196*4882a593Smuzhiyun 	TPS65217_REGULATOR("LDO1", TPS65217_LDO_1, "ldo1",
197*4882a593Smuzhiyun 			   tps65217_pmic_ldo1_ops, 16, TPS65217_REG_DEFLDO1,
198*4882a593Smuzhiyun 			   TPS65217_DEFLDO1_LDO1_MASK, TPS65217_ENABLE_LDO1_EN,
199*4882a593Smuzhiyun 			   LDO1_VSEL_table, NULL, 0, TPS65217_REG_SEQ2,
200*4882a593Smuzhiyun 			   TPS65217_SEQ2_LDO1_SEQ_MASK),
201*4882a593Smuzhiyun 	TPS65217_REGULATOR("LDO2", TPS65217_LDO_2, "ldo2", tps65217_pmic_ops,
202*4882a593Smuzhiyun 			   64, TPS65217_REG_DEFLDO2,
203*4882a593Smuzhiyun 			   TPS65217_DEFLDO2_LDO2_MASK, TPS65217_ENABLE_LDO2_EN,
204*4882a593Smuzhiyun 			   NULL, tps65217_uv1_ranges,
205*4882a593Smuzhiyun 			   ARRAY_SIZE(tps65217_uv1_ranges), TPS65217_REG_SEQ3,
206*4882a593Smuzhiyun 			   TPS65217_SEQ3_LDO2_SEQ_MASK),
207*4882a593Smuzhiyun 	TPS65217_REGULATOR("LDO3", TPS65217_LDO_3, "ldo3", tps65217_pmic_ops,
208*4882a593Smuzhiyun 			   32, TPS65217_REG_DEFLS1, TPS65217_DEFLDO3_LDO3_MASK,
209*4882a593Smuzhiyun 			   TPS65217_ENABLE_LS1_EN | TPS65217_DEFLDO3_LDO3_EN,
210*4882a593Smuzhiyun 			   NULL, tps65217_uv2_ranges,
211*4882a593Smuzhiyun 			   ARRAY_SIZE(tps65217_uv2_ranges), TPS65217_REG_SEQ3,
212*4882a593Smuzhiyun 			   TPS65217_SEQ3_LDO3_SEQ_MASK),
213*4882a593Smuzhiyun 	TPS65217_REGULATOR("LDO4", TPS65217_LDO_4, "ldo4", tps65217_pmic_ops,
214*4882a593Smuzhiyun 			   32, TPS65217_REG_DEFLS2, TPS65217_DEFLDO4_LDO4_MASK,
215*4882a593Smuzhiyun 			   TPS65217_ENABLE_LS2_EN | TPS65217_DEFLDO4_LDO4_EN,
216*4882a593Smuzhiyun 			   NULL, tps65217_uv2_ranges,
217*4882a593Smuzhiyun 			   ARRAY_SIZE(tps65217_uv2_ranges), TPS65217_REG_SEQ4,
218*4882a593Smuzhiyun 			   TPS65217_SEQ4_LDO4_SEQ_MASK),
219*4882a593Smuzhiyun };
220*4882a593Smuzhiyun 
tps65217_regulator_probe(struct platform_device * pdev)221*4882a593Smuzhiyun static int tps65217_regulator_probe(struct platform_device *pdev)
222*4882a593Smuzhiyun {
223*4882a593Smuzhiyun 	struct tps65217 *tps = dev_get_drvdata(pdev->dev.parent);
224*4882a593Smuzhiyun 	struct tps65217_board *pdata = dev_get_platdata(tps->dev);
225*4882a593Smuzhiyun 	struct regulator_dev *rdev;
226*4882a593Smuzhiyun 	struct regulator_config config = { };
227*4882a593Smuzhiyun 	int i, ret;
228*4882a593Smuzhiyun 	unsigned int val;
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	/* Allocate memory for strobes */
231*4882a593Smuzhiyun 	tps->strobes = devm_kcalloc(&pdev->dev,
232*4882a593Smuzhiyun 				    TPS65217_NUM_REGULATOR, sizeof(u8),
233*4882a593Smuzhiyun 				    GFP_KERNEL);
234*4882a593Smuzhiyun 	if (!tps->strobes)
235*4882a593Smuzhiyun 		return -ENOMEM;
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 	platform_set_drvdata(pdev, tps);
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	for (i = 0; i < TPS65217_NUM_REGULATOR; i++) {
240*4882a593Smuzhiyun 		/* Register the regulators */
241*4882a593Smuzhiyun 		config.dev = tps->dev;
242*4882a593Smuzhiyun 		if (pdata)
243*4882a593Smuzhiyun 			config.init_data = pdata->tps65217_init_data[i];
244*4882a593Smuzhiyun 		config.driver_data = tps;
245*4882a593Smuzhiyun 		config.regmap = tps->regmap;
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 		rdev = devm_regulator_register(&pdev->dev, &regulators[i],
248*4882a593Smuzhiyun 					       &config);
249*4882a593Smuzhiyun 		if (IS_ERR(rdev)) {
250*4882a593Smuzhiyun 			dev_err(tps->dev, "failed to register %s regulator\n",
251*4882a593Smuzhiyun 				pdev->name);
252*4882a593Smuzhiyun 			return PTR_ERR(rdev);
253*4882a593Smuzhiyun 		}
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun 		/* Store default strobe info */
256*4882a593Smuzhiyun 		ret = tps65217_reg_read(tps, regulators[i].bypass_reg, &val);
257*4882a593Smuzhiyun 		if (ret)
258*4882a593Smuzhiyun 			return ret;
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 		tps->strobes[i] = val & regulators[i].bypass_mask;
261*4882a593Smuzhiyun 	}
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 	return 0;
264*4882a593Smuzhiyun }
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun static struct platform_driver tps65217_regulator_driver = {
267*4882a593Smuzhiyun 	.driver = {
268*4882a593Smuzhiyun 		.name = "tps65217-pmic",
269*4882a593Smuzhiyun 	},
270*4882a593Smuzhiyun 	.probe = tps65217_regulator_probe,
271*4882a593Smuzhiyun };
272*4882a593Smuzhiyun 
tps65217_regulator_init(void)273*4882a593Smuzhiyun static int __init tps65217_regulator_init(void)
274*4882a593Smuzhiyun {
275*4882a593Smuzhiyun 	return platform_driver_register(&tps65217_regulator_driver);
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun subsys_initcall(tps65217_regulator_init);
278*4882a593Smuzhiyun 
tps65217_regulator_exit(void)279*4882a593Smuzhiyun static void __exit tps65217_regulator_exit(void)
280*4882a593Smuzhiyun {
281*4882a593Smuzhiyun 	platform_driver_unregister(&tps65217_regulator_driver);
282*4882a593Smuzhiyun }
283*4882a593Smuzhiyun module_exit(tps65217_regulator_exit);
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun MODULE_AUTHOR("AnilKumar Ch <anilkumar@ti.com>");
286*4882a593Smuzhiyun MODULE_DESCRIPTION("TPS65217 voltage regulator driver");
287*4882a593Smuzhiyun MODULE_ALIAS("platform:tps65217-pmic");
288*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
289