1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * TI TPS65132 Regulator driver
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (C) 2017 NVIDIA CORPORATION. All rights reserved.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Author: Venkat Reddy Talla <vreddytalla@nvidia.com>
7*4882a593Smuzhiyun * Laxman Dewangan <ldewangan@nvidia.com>
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or
10*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License as
11*4882a593Smuzhiyun * published by the Free Software Foundation; either version 2 of the
12*4882a593Smuzhiyun * License, or (at your option) any later version.
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
15*4882a593Smuzhiyun * whether express or implied; without even the implied warranty of
16*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17*4882a593Smuzhiyun * General Public License for more details.
18*4882a593Smuzhiyun */
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #include <linux/delay.h>
21*4882a593Smuzhiyun #include <linux/err.h>
22*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
23*4882a593Smuzhiyun #include <linux/i2c.h>
24*4882a593Smuzhiyun #include <linux/module.h>
25*4882a593Smuzhiyun #include <linux/regmap.h>
26*4882a593Smuzhiyun #include <linux/regulator/driver.h>
27*4882a593Smuzhiyun #include <linux/regulator/machine.h>
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #define TPS65132_REG_VPOS 0x00
30*4882a593Smuzhiyun #define TPS65132_REG_VNEG 0x01
31*4882a593Smuzhiyun #define TPS65132_REG_APPS_DISP_DISN 0x03
32*4882a593Smuzhiyun #define TPS65132_REG_CONTROL 0x0FF
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #define TPS65132_VOUT_MASK 0x1F
35*4882a593Smuzhiyun #define TPS65132_VOUT_N_VOLTAGE 0x15
36*4882a593Smuzhiyun #define TPS65132_VOUT_VMIN 4000000
37*4882a593Smuzhiyun #define TPS65132_VOUT_VMAX 6000000
38*4882a593Smuzhiyun #define TPS65132_VOUT_STEP 100000
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #define TPS65132_REG_APPS_DIS_VPOS BIT(0)
41*4882a593Smuzhiyun #define TPS65132_REG_APPS_DIS_VNEG BIT(1)
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun #define TPS65132_REGULATOR_ID_VPOS 0
44*4882a593Smuzhiyun #define TPS65132_REGULATOR_ID_VNEG 1
45*4882a593Smuzhiyun #define TPS65132_MAX_REGULATORS 2
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun #define TPS65132_ACT_DIS_TIME_SLACK 1000
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun struct tps65132_reg_pdata {
50*4882a593Smuzhiyun struct gpio_desc *en_gpiod;
51*4882a593Smuzhiyun struct gpio_desc *act_dis_gpiod;
52*4882a593Smuzhiyun unsigned int act_dis_time_us;
53*4882a593Smuzhiyun int ena_gpio_state;
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun struct tps65132_regulator {
57*4882a593Smuzhiyun struct device *dev;
58*4882a593Smuzhiyun struct tps65132_reg_pdata reg_pdata[TPS65132_MAX_REGULATORS];
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun
tps65132_regulator_enable(struct regulator_dev * rdev)61*4882a593Smuzhiyun static int tps65132_regulator_enable(struct regulator_dev *rdev)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun struct tps65132_regulator *tps = rdev_get_drvdata(rdev);
64*4882a593Smuzhiyun int id = rdev_get_id(rdev);
65*4882a593Smuzhiyun struct tps65132_reg_pdata *rpdata = &tps->reg_pdata[id];
66*4882a593Smuzhiyun int ret;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun if (!IS_ERR(rpdata->en_gpiod)) {
69*4882a593Smuzhiyun gpiod_set_value_cansleep(rpdata->en_gpiod, 1);
70*4882a593Smuzhiyun rpdata->ena_gpio_state = 1;
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun /* Hardware automatically enable discharge bit in enable */
74*4882a593Smuzhiyun if (rdev->constraints->active_discharge ==
75*4882a593Smuzhiyun REGULATOR_ACTIVE_DISCHARGE_DISABLE) {
76*4882a593Smuzhiyun ret = regulator_set_active_discharge_regmap(rdev, false);
77*4882a593Smuzhiyun if (ret < 0) {
78*4882a593Smuzhiyun dev_err(tps->dev, "Failed to disable active discharge: %d\n",
79*4882a593Smuzhiyun ret);
80*4882a593Smuzhiyun return ret;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun return 0;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
tps65132_regulator_disable(struct regulator_dev * rdev)87*4882a593Smuzhiyun static int tps65132_regulator_disable(struct regulator_dev *rdev)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun struct tps65132_regulator *tps = rdev_get_drvdata(rdev);
90*4882a593Smuzhiyun int id = rdev_get_id(rdev);
91*4882a593Smuzhiyun struct tps65132_reg_pdata *rpdata = &tps->reg_pdata[id];
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun if (!IS_ERR(rpdata->en_gpiod)) {
94*4882a593Smuzhiyun gpiod_set_value_cansleep(rpdata->en_gpiod, 0);
95*4882a593Smuzhiyun rpdata->ena_gpio_state = 0;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun if (!IS_ERR(rpdata->act_dis_gpiod)) {
99*4882a593Smuzhiyun gpiod_set_value_cansleep(rpdata->act_dis_gpiod, 1);
100*4882a593Smuzhiyun usleep_range(rpdata->act_dis_time_us, rpdata->act_dis_time_us +
101*4882a593Smuzhiyun TPS65132_ACT_DIS_TIME_SLACK);
102*4882a593Smuzhiyun gpiod_set_value_cansleep(rpdata->act_dis_gpiod, 0);
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun return 0;
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun
tps65132_regulator_is_enabled(struct regulator_dev * rdev)108*4882a593Smuzhiyun static int tps65132_regulator_is_enabled(struct regulator_dev *rdev)
109*4882a593Smuzhiyun {
110*4882a593Smuzhiyun struct tps65132_regulator *tps = rdev_get_drvdata(rdev);
111*4882a593Smuzhiyun int id = rdev_get_id(rdev);
112*4882a593Smuzhiyun struct tps65132_reg_pdata *rpdata = &tps->reg_pdata[id];
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun if (!IS_ERR(rpdata->en_gpiod))
115*4882a593Smuzhiyun return rpdata->ena_gpio_state;
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun return 1;
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun static const struct regulator_ops tps65132_regulator_ops = {
121*4882a593Smuzhiyun .enable = tps65132_regulator_enable,
122*4882a593Smuzhiyun .disable = tps65132_regulator_disable,
123*4882a593Smuzhiyun .is_enabled = tps65132_regulator_is_enabled,
124*4882a593Smuzhiyun .list_voltage = regulator_list_voltage_linear,
125*4882a593Smuzhiyun .map_voltage = regulator_map_voltage_linear,
126*4882a593Smuzhiyun .get_voltage_sel = regulator_get_voltage_sel_regmap,
127*4882a593Smuzhiyun .set_voltage_sel = regulator_set_voltage_sel_regmap,
128*4882a593Smuzhiyun .set_active_discharge = regulator_set_active_discharge_regmap,
129*4882a593Smuzhiyun };
130*4882a593Smuzhiyun
tps65132_of_parse_cb(struct device_node * np,const struct regulator_desc * desc,struct regulator_config * config)131*4882a593Smuzhiyun static int tps65132_of_parse_cb(struct device_node *np,
132*4882a593Smuzhiyun const struct regulator_desc *desc,
133*4882a593Smuzhiyun struct regulator_config *config)
134*4882a593Smuzhiyun {
135*4882a593Smuzhiyun struct tps65132_regulator *tps = config->driver_data;
136*4882a593Smuzhiyun struct tps65132_reg_pdata *rpdata = &tps->reg_pdata[desc->id];
137*4882a593Smuzhiyun int ret;
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun rpdata->en_gpiod = devm_fwnode_gpiod_get(tps->dev, of_fwnode_handle(np),
140*4882a593Smuzhiyun "enable", GPIOD_ASIS,
141*4882a593Smuzhiyun "enable");
142*4882a593Smuzhiyun if (IS_ERR(rpdata->en_gpiod)) {
143*4882a593Smuzhiyun ret = PTR_ERR(rpdata->en_gpiod);
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun /* Ignore the error other than probe defer */
146*4882a593Smuzhiyun if (ret == -EPROBE_DEFER)
147*4882a593Smuzhiyun return ret;
148*4882a593Smuzhiyun return 0;
149*4882a593Smuzhiyun }
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun rpdata->act_dis_gpiod = devm_fwnode_gpiod_get(tps->dev,
152*4882a593Smuzhiyun of_fwnode_handle(np),
153*4882a593Smuzhiyun "active-discharge",
154*4882a593Smuzhiyun GPIOD_ASIS,
155*4882a593Smuzhiyun "active-discharge");
156*4882a593Smuzhiyun if (IS_ERR(rpdata->act_dis_gpiod)) {
157*4882a593Smuzhiyun ret = PTR_ERR(rpdata->act_dis_gpiod);
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun /* Ignore the error other than probe defer */
160*4882a593Smuzhiyun if (ret == -EPROBE_DEFER)
161*4882a593Smuzhiyun return ret;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun return 0;
164*4882a593Smuzhiyun }
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun ret = of_property_read_u32(np, "ti,active-discharge-time-us",
167*4882a593Smuzhiyun &rpdata->act_dis_time_us);
168*4882a593Smuzhiyun if (ret < 0) {
169*4882a593Smuzhiyun dev_err(tps->dev, "Failed to read active discharge time:%d\n",
170*4882a593Smuzhiyun ret);
171*4882a593Smuzhiyun return ret;
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun return 0;
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun #define TPS65132_REGULATOR_DESC(_id, _name) \
178*4882a593Smuzhiyun [TPS65132_REGULATOR_ID_##_id] = { \
179*4882a593Smuzhiyun .name = "tps65132-"#_name, \
180*4882a593Smuzhiyun .supply_name = "vin", \
181*4882a593Smuzhiyun .id = TPS65132_REGULATOR_ID_##_id, \
182*4882a593Smuzhiyun .of_match = of_match_ptr(#_name), \
183*4882a593Smuzhiyun .of_parse_cb = tps65132_of_parse_cb, \
184*4882a593Smuzhiyun .ops = &tps65132_regulator_ops, \
185*4882a593Smuzhiyun .n_voltages = TPS65132_VOUT_N_VOLTAGE, \
186*4882a593Smuzhiyun .min_uV = TPS65132_VOUT_VMIN, \
187*4882a593Smuzhiyun .uV_step = TPS65132_VOUT_STEP, \
188*4882a593Smuzhiyun .enable_time = 500, \
189*4882a593Smuzhiyun .vsel_mask = TPS65132_VOUT_MASK, \
190*4882a593Smuzhiyun .vsel_reg = TPS65132_REG_##_id, \
191*4882a593Smuzhiyun .active_discharge_off = 0, \
192*4882a593Smuzhiyun .active_discharge_on = TPS65132_REG_APPS_DIS_##_id, \
193*4882a593Smuzhiyun .active_discharge_mask = TPS65132_REG_APPS_DIS_##_id, \
194*4882a593Smuzhiyun .active_discharge_reg = TPS65132_REG_APPS_DISP_DISN, \
195*4882a593Smuzhiyun .type = REGULATOR_VOLTAGE, \
196*4882a593Smuzhiyun .owner = THIS_MODULE, \
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun static const struct regulator_desc tps_regs_desc[TPS65132_MAX_REGULATORS] = {
200*4882a593Smuzhiyun TPS65132_REGULATOR_DESC(VPOS, outp),
201*4882a593Smuzhiyun TPS65132_REGULATOR_DESC(VNEG, outn),
202*4882a593Smuzhiyun };
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun static const struct regmap_range tps65132_no_reg_ranges[] = {
205*4882a593Smuzhiyun regmap_reg_range(TPS65132_REG_APPS_DISP_DISN + 1,
206*4882a593Smuzhiyun TPS65132_REG_CONTROL - 1),
207*4882a593Smuzhiyun };
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun static const struct regmap_access_table tps65132_no_reg_table = {
210*4882a593Smuzhiyun .no_ranges = tps65132_no_reg_ranges,
211*4882a593Smuzhiyun .n_no_ranges = ARRAY_SIZE(tps65132_no_reg_ranges),
212*4882a593Smuzhiyun };
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun static const struct regmap_config tps65132_regmap_config = {
215*4882a593Smuzhiyun .reg_bits = 8,
216*4882a593Smuzhiyun .val_bits = 8,
217*4882a593Smuzhiyun .max_register = TPS65132_REG_CONTROL,
218*4882a593Smuzhiyun .cache_type = REGCACHE_NONE,
219*4882a593Smuzhiyun .rd_table = &tps65132_no_reg_table,
220*4882a593Smuzhiyun .wr_table = &tps65132_no_reg_table,
221*4882a593Smuzhiyun };
222*4882a593Smuzhiyun
tps65132_probe(struct i2c_client * client)223*4882a593Smuzhiyun static int tps65132_probe(struct i2c_client *client)
224*4882a593Smuzhiyun {
225*4882a593Smuzhiyun struct device *dev = &client->dev;
226*4882a593Smuzhiyun struct tps65132_regulator *tps;
227*4882a593Smuzhiyun struct regulator_dev *rdev;
228*4882a593Smuzhiyun struct regmap *rmap;
229*4882a593Smuzhiyun struct regulator_config config = { };
230*4882a593Smuzhiyun int id;
231*4882a593Smuzhiyun int ret;
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun tps = devm_kzalloc(dev, sizeof(*tps), GFP_KERNEL);
234*4882a593Smuzhiyun if (!tps)
235*4882a593Smuzhiyun return -ENOMEM;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun rmap = devm_regmap_init_i2c(client, &tps65132_regmap_config);
238*4882a593Smuzhiyun if (IS_ERR(rmap)) {
239*4882a593Smuzhiyun ret = PTR_ERR(rmap);
240*4882a593Smuzhiyun dev_err(dev, "regmap init failed: %d\n", ret);
241*4882a593Smuzhiyun return ret;
242*4882a593Smuzhiyun }
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun i2c_set_clientdata(client, tps);
245*4882a593Smuzhiyun tps->dev = dev;
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun for (id = 0; id < TPS65132_MAX_REGULATORS; ++id) {
248*4882a593Smuzhiyun config.regmap = rmap;
249*4882a593Smuzhiyun config.dev = dev;
250*4882a593Smuzhiyun config.driver_data = tps;
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun rdev = devm_regulator_register(dev, &tps_regs_desc[id],
253*4882a593Smuzhiyun &config);
254*4882a593Smuzhiyun if (IS_ERR(rdev)) {
255*4882a593Smuzhiyun ret = PTR_ERR(rdev);
256*4882a593Smuzhiyun dev_err(dev, "regulator %s register failed: %d\n",
257*4882a593Smuzhiyun tps_regs_desc[id].name, ret);
258*4882a593Smuzhiyun return ret;
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun }
261*4882a593Smuzhiyun return 0;
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun static const struct i2c_device_id tps65132_id[] = {
265*4882a593Smuzhiyun {.name = "tps65132",},
266*4882a593Smuzhiyun {},
267*4882a593Smuzhiyun };
268*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, tps65132_id);
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun static struct i2c_driver tps65132_i2c_driver = {
271*4882a593Smuzhiyun .driver = {
272*4882a593Smuzhiyun .name = "tps65132",
273*4882a593Smuzhiyun },
274*4882a593Smuzhiyun .probe_new = tps65132_probe,
275*4882a593Smuzhiyun .id_table = tps65132_id,
276*4882a593Smuzhiyun };
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun module_i2c_driver(tps65132_i2c_driver);
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun MODULE_DESCRIPTION("tps65132 regulator driver");
281*4882a593Smuzhiyun MODULE_AUTHOR("Venkat Reddy Talla <vreddytalla@nvidia.com>");
282*4882a593Smuzhiyun MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
283*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
284