1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * tps6507x-regulator.c
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Regulator driver for TPS65073 PMIC
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 2009 Texas Instrument Incorporated - https://www.ti.com/
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or
9*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License as
10*4882a593Smuzhiyun * published by the Free Software Foundation version 2.
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
13*4882a593Smuzhiyun * whether express or implied; without even the implied warranty of
14*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15*4882a593Smuzhiyun * General Public License for more details.
16*4882a593Smuzhiyun */
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #include <linux/kernel.h>
19*4882a593Smuzhiyun #include <linux/module.h>
20*4882a593Smuzhiyun #include <linux/init.h>
21*4882a593Smuzhiyun #include <linux/err.h>
22*4882a593Smuzhiyun #include <linux/platform_device.h>
23*4882a593Smuzhiyun #include <linux/regulator/driver.h>
24*4882a593Smuzhiyun #include <linux/regulator/machine.h>
25*4882a593Smuzhiyun #include <linux/regulator/tps6507x.h>
26*4882a593Smuzhiyun #include <linux/of.h>
27*4882a593Smuzhiyun #include <linux/slab.h>
28*4882a593Smuzhiyun #include <linux/mfd/tps6507x.h>
29*4882a593Smuzhiyun #include <linux/regulator/of_regulator.h>
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun /* DCDC's */
32*4882a593Smuzhiyun #define TPS6507X_DCDC_1 0
33*4882a593Smuzhiyun #define TPS6507X_DCDC_2 1
34*4882a593Smuzhiyun #define TPS6507X_DCDC_3 2
35*4882a593Smuzhiyun /* LDOs */
36*4882a593Smuzhiyun #define TPS6507X_LDO_1 3
37*4882a593Smuzhiyun #define TPS6507X_LDO_2 4
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun #define TPS6507X_MAX_REG_ID TPS6507X_LDO_2
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun /* Number of step-down converters available */
42*4882a593Smuzhiyun #define TPS6507X_NUM_DCDC 3
43*4882a593Smuzhiyun /* Number of LDO voltage regulators available */
44*4882a593Smuzhiyun #define TPS6507X_NUM_LDO 2
45*4882a593Smuzhiyun /* Number of total regulators available */
46*4882a593Smuzhiyun #define TPS6507X_NUM_REGULATOR (TPS6507X_NUM_DCDC + TPS6507X_NUM_LDO)
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun /* Supported voltage values for regulators (in microVolts) */
49*4882a593Smuzhiyun static const unsigned int VDCDCx_VSEL_table[] = {
50*4882a593Smuzhiyun 725000, 750000, 775000, 800000,
51*4882a593Smuzhiyun 825000, 850000, 875000, 900000,
52*4882a593Smuzhiyun 925000, 950000, 975000, 1000000,
53*4882a593Smuzhiyun 1025000, 1050000, 1075000, 1100000,
54*4882a593Smuzhiyun 1125000, 1150000, 1175000, 1200000,
55*4882a593Smuzhiyun 1225000, 1250000, 1275000, 1300000,
56*4882a593Smuzhiyun 1325000, 1350000, 1375000, 1400000,
57*4882a593Smuzhiyun 1425000, 1450000, 1475000, 1500000,
58*4882a593Smuzhiyun 1550000, 1600000, 1650000, 1700000,
59*4882a593Smuzhiyun 1750000, 1800000, 1850000, 1900000,
60*4882a593Smuzhiyun 1950000, 2000000, 2050000, 2100000,
61*4882a593Smuzhiyun 2150000, 2200000, 2250000, 2300000,
62*4882a593Smuzhiyun 2350000, 2400000, 2450000, 2500000,
63*4882a593Smuzhiyun 2550000, 2600000, 2650000, 2700000,
64*4882a593Smuzhiyun 2750000, 2800000, 2850000, 2900000,
65*4882a593Smuzhiyun 3000000, 3100000, 3200000, 3300000,
66*4882a593Smuzhiyun };
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun static const unsigned int LDO1_VSEL_table[] = {
69*4882a593Smuzhiyun 1000000, 1100000, 1200000, 1250000,
70*4882a593Smuzhiyun 1300000, 1350000, 1400000, 1500000,
71*4882a593Smuzhiyun 1600000, 1800000, 2500000, 2750000,
72*4882a593Smuzhiyun 2800000, 3000000, 3100000, 3300000,
73*4882a593Smuzhiyun };
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun /* The voltage mapping table for LDO2 is the same as VDCDCx */
76*4882a593Smuzhiyun #define LDO2_VSEL_table VDCDCx_VSEL_table
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun struct tps_info {
79*4882a593Smuzhiyun const char *name;
80*4882a593Smuzhiyun u8 table_len;
81*4882a593Smuzhiyun const unsigned int *table;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun /* Does DCDC high or the low register defines output voltage? */
84*4882a593Smuzhiyun bool defdcdc_default;
85*4882a593Smuzhiyun };
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun static struct tps_info tps6507x_pmic_regs[] = {
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun .name = "VDCDC1",
90*4882a593Smuzhiyun .table_len = ARRAY_SIZE(VDCDCx_VSEL_table),
91*4882a593Smuzhiyun .table = VDCDCx_VSEL_table,
92*4882a593Smuzhiyun },
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun .name = "VDCDC2",
95*4882a593Smuzhiyun .table_len = ARRAY_SIZE(VDCDCx_VSEL_table),
96*4882a593Smuzhiyun .table = VDCDCx_VSEL_table,
97*4882a593Smuzhiyun },
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun .name = "VDCDC3",
100*4882a593Smuzhiyun .table_len = ARRAY_SIZE(VDCDCx_VSEL_table),
101*4882a593Smuzhiyun .table = VDCDCx_VSEL_table,
102*4882a593Smuzhiyun },
103*4882a593Smuzhiyun {
104*4882a593Smuzhiyun .name = "LDO1",
105*4882a593Smuzhiyun .table_len = ARRAY_SIZE(LDO1_VSEL_table),
106*4882a593Smuzhiyun .table = LDO1_VSEL_table,
107*4882a593Smuzhiyun },
108*4882a593Smuzhiyun {
109*4882a593Smuzhiyun .name = "LDO2",
110*4882a593Smuzhiyun .table_len = ARRAY_SIZE(LDO2_VSEL_table),
111*4882a593Smuzhiyun .table = LDO2_VSEL_table,
112*4882a593Smuzhiyun },
113*4882a593Smuzhiyun };
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun struct tps6507x_pmic {
116*4882a593Smuzhiyun struct regulator_desc desc[TPS6507X_NUM_REGULATOR];
117*4882a593Smuzhiyun struct tps6507x_dev *mfd;
118*4882a593Smuzhiyun struct tps_info *info[TPS6507X_NUM_REGULATOR];
119*4882a593Smuzhiyun struct mutex io_lock;
120*4882a593Smuzhiyun };
tps6507x_pmic_read(struct tps6507x_pmic * tps,u8 reg)121*4882a593Smuzhiyun static inline int tps6507x_pmic_read(struct tps6507x_pmic *tps, u8 reg)
122*4882a593Smuzhiyun {
123*4882a593Smuzhiyun u8 val;
124*4882a593Smuzhiyun int err;
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun err = tps->mfd->read_dev(tps->mfd, reg, 1, &val);
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun if (err)
129*4882a593Smuzhiyun return err;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun return val;
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun
tps6507x_pmic_write(struct tps6507x_pmic * tps,u8 reg,u8 val)134*4882a593Smuzhiyun static inline int tps6507x_pmic_write(struct tps6507x_pmic *tps, u8 reg, u8 val)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun return tps->mfd->write_dev(tps->mfd, reg, 1, &val);
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun
tps6507x_pmic_set_bits(struct tps6507x_pmic * tps,u8 reg,u8 mask)139*4882a593Smuzhiyun static int tps6507x_pmic_set_bits(struct tps6507x_pmic *tps, u8 reg, u8 mask)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun int err, data;
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun mutex_lock(&tps->io_lock);
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun data = tps6507x_pmic_read(tps, reg);
146*4882a593Smuzhiyun if (data < 0) {
147*4882a593Smuzhiyun dev_err(tps->mfd->dev, "Read from reg 0x%x failed\n", reg);
148*4882a593Smuzhiyun err = data;
149*4882a593Smuzhiyun goto out;
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun data |= mask;
153*4882a593Smuzhiyun err = tps6507x_pmic_write(tps, reg, data);
154*4882a593Smuzhiyun if (err)
155*4882a593Smuzhiyun dev_err(tps->mfd->dev, "Write for reg 0x%x failed\n", reg);
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun out:
158*4882a593Smuzhiyun mutex_unlock(&tps->io_lock);
159*4882a593Smuzhiyun return err;
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun
tps6507x_pmic_clear_bits(struct tps6507x_pmic * tps,u8 reg,u8 mask)162*4882a593Smuzhiyun static int tps6507x_pmic_clear_bits(struct tps6507x_pmic *tps, u8 reg, u8 mask)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun int err, data;
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun mutex_lock(&tps->io_lock);
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun data = tps6507x_pmic_read(tps, reg);
169*4882a593Smuzhiyun if (data < 0) {
170*4882a593Smuzhiyun dev_err(tps->mfd->dev, "Read from reg 0x%x failed\n", reg);
171*4882a593Smuzhiyun err = data;
172*4882a593Smuzhiyun goto out;
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun data &= ~mask;
176*4882a593Smuzhiyun err = tps6507x_pmic_write(tps, reg, data);
177*4882a593Smuzhiyun if (err)
178*4882a593Smuzhiyun dev_err(tps->mfd->dev, "Write for reg 0x%x failed\n", reg);
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun out:
181*4882a593Smuzhiyun mutex_unlock(&tps->io_lock);
182*4882a593Smuzhiyun return err;
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun
tps6507x_pmic_reg_read(struct tps6507x_pmic * tps,u8 reg)185*4882a593Smuzhiyun static int tps6507x_pmic_reg_read(struct tps6507x_pmic *tps, u8 reg)
186*4882a593Smuzhiyun {
187*4882a593Smuzhiyun int data;
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun mutex_lock(&tps->io_lock);
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun data = tps6507x_pmic_read(tps, reg);
192*4882a593Smuzhiyun if (data < 0)
193*4882a593Smuzhiyun dev_err(tps->mfd->dev, "Read from reg 0x%x failed\n", reg);
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun mutex_unlock(&tps->io_lock);
196*4882a593Smuzhiyun return data;
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun
tps6507x_pmic_reg_write(struct tps6507x_pmic * tps,u8 reg,u8 val)199*4882a593Smuzhiyun static int tps6507x_pmic_reg_write(struct tps6507x_pmic *tps, u8 reg, u8 val)
200*4882a593Smuzhiyun {
201*4882a593Smuzhiyun int err;
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun mutex_lock(&tps->io_lock);
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun err = tps6507x_pmic_write(tps, reg, val);
206*4882a593Smuzhiyun if (err < 0)
207*4882a593Smuzhiyun dev_err(tps->mfd->dev, "Write for reg 0x%x failed\n", reg);
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun mutex_unlock(&tps->io_lock);
210*4882a593Smuzhiyun return err;
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun
tps6507x_pmic_is_enabled(struct regulator_dev * dev)213*4882a593Smuzhiyun static int tps6507x_pmic_is_enabled(struct regulator_dev *dev)
214*4882a593Smuzhiyun {
215*4882a593Smuzhiyun struct tps6507x_pmic *tps = rdev_get_drvdata(dev);
216*4882a593Smuzhiyun int data, rid = rdev_get_id(dev);
217*4882a593Smuzhiyun u8 shift;
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun if (rid < TPS6507X_DCDC_1 || rid > TPS6507X_LDO_2)
220*4882a593Smuzhiyun return -EINVAL;
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun shift = TPS6507X_MAX_REG_ID - rid;
223*4882a593Smuzhiyun data = tps6507x_pmic_reg_read(tps, TPS6507X_REG_CON_CTRL1);
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun if (data < 0)
226*4882a593Smuzhiyun return data;
227*4882a593Smuzhiyun else
228*4882a593Smuzhiyun return (data & 1<<shift) ? 1 : 0;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun
tps6507x_pmic_enable(struct regulator_dev * dev)231*4882a593Smuzhiyun static int tps6507x_pmic_enable(struct regulator_dev *dev)
232*4882a593Smuzhiyun {
233*4882a593Smuzhiyun struct tps6507x_pmic *tps = rdev_get_drvdata(dev);
234*4882a593Smuzhiyun int rid = rdev_get_id(dev);
235*4882a593Smuzhiyun u8 shift;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun if (rid < TPS6507X_DCDC_1 || rid > TPS6507X_LDO_2)
238*4882a593Smuzhiyun return -EINVAL;
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun shift = TPS6507X_MAX_REG_ID - rid;
241*4882a593Smuzhiyun return tps6507x_pmic_set_bits(tps, TPS6507X_REG_CON_CTRL1, 1 << shift);
242*4882a593Smuzhiyun }
243*4882a593Smuzhiyun
tps6507x_pmic_disable(struct regulator_dev * dev)244*4882a593Smuzhiyun static int tps6507x_pmic_disable(struct regulator_dev *dev)
245*4882a593Smuzhiyun {
246*4882a593Smuzhiyun struct tps6507x_pmic *tps = rdev_get_drvdata(dev);
247*4882a593Smuzhiyun int rid = rdev_get_id(dev);
248*4882a593Smuzhiyun u8 shift;
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun if (rid < TPS6507X_DCDC_1 || rid > TPS6507X_LDO_2)
251*4882a593Smuzhiyun return -EINVAL;
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun shift = TPS6507X_MAX_REG_ID - rid;
254*4882a593Smuzhiyun return tps6507x_pmic_clear_bits(tps, TPS6507X_REG_CON_CTRL1,
255*4882a593Smuzhiyun 1 << shift);
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun
tps6507x_pmic_get_voltage_sel(struct regulator_dev * dev)258*4882a593Smuzhiyun static int tps6507x_pmic_get_voltage_sel(struct regulator_dev *dev)
259*4882a593Smuzhiyun {
260*4882a593Smuzhiyun struct tps6507x_pmic *tps = rdev_get_drvdata(dev);
261*4882a593Smuzhiyun int data, rid = rdev_get_id(dev);
262*4882a593Smuzhiyun u8 reg, mask;
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun switch (rid) {
265*4882a593Smuzhiyun case TPS6507X_DCDC_1:
266*4882a593Smuzhiyun reg = TPS6507X_REG_DEFDCDC1;
267*4882a593Smuzhiyun mask = TPS6507X_DEFDCDCX_DCDC_MASK;
268*4882a593Smuzhiyun break;
269*4882a593Smuzhiyun case TPS6507X_DCDC_2:
270*4882a593Smuzhiyun if (tps->info[rid]->defdcdc_default)
271*4882a593Smuzhiyun reg = TPS6507X_REG_DEFDCDC2_HIGH;
272*4882a593Smuzhiyun else
273*4882a593Smuzhiyun reg = TPS6507X_REG_DEFDCDC2_LOW;
274*4882a593Smuzhiyun mask = TPS6507X_DEFDCDCX_DCDC_MASK;
275*4882a593Smuzhiyun break;
276*4882a593Smuzhiyun case TPS6507X_DCDC_3:
277*4882a593Smuzhiyun if (tps->info[rid]->defdcdc_default)
278*4882a593Smuzhiyun reg = TPS6507X_REG_DEFDCDC3_HIGH;
279*4882a593Smuzhiyun else
280*4882a593Smuzhiyun reg = TPS6507X_REG_DEFDCDC3_LOW;
281*4882a593Smuzhiyun mask = TPS6507X_DEFDCDCX_DCDC_MASK;
282*4882a593Smuzhiyun break;
283*4882a593Smuzhiyun case TPS6507X_LDO_1:
284*4882a593Smuzhiyun reg = TPS6507X_REG_LDO_CTRL1;
285*4882a593Smuzhiyun mask = TPS6507X_REG_LDO_CTRL1_LDO1_MASK;
286*4882a593Smuzhiyun break;
287*4882a593Smuzhiyun case TPS6507X_LDO_2:
288*4882a593Smuzhiyun reg = TPS6507X_REG_DEFLDO2;
289*4882a593Smuzhiyun mask = TPS6507X_REG_DEFLDO2_LDO2_MASK;
290*4882a593Smuzhiyun break;
291*4882a593Smuzhiyun default:
292*4882a593Smuzhiyun return -EINVAL;
293*4882a593Smuzhiyun }
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun data = tps6507x_pmic_reg_read(tps, reg);
296*4882a593Smuzhiyun if (data < 0)
297*4882a593Smuzhiyun return data;
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun data &= mask;
300*4882a593Smuzhiyun return data;
301*4882a593Smuzhiyun }
302*4882a593Smuzhiyun
tps6507x_pmic_set_voltage_sel(struct regulator_dev * dev,unsigned selector)303*4882a593Smuzhiyun static int tps6507x_pmic_set_voltage_sel(struct regulator_dev *dev,
304*4882a593Smuzhiyun unsigned selector)
305*4882a593Smuzhiyun {
306*4882a593Smuzhiyun struct tps6507x_pmic *tps = rdev_get_drvdata(dev);
307*4882a593Smuzhiyun int data, rid = rdev_get_id(dev);
308*4882a593Smuzhiyun u8 reg, mask;
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun switch (rid) {
311*4882a593Smuzhiyun case TPS6507X_DCDC_1:
312*4882a593Smuzhiyun reg = TPS6507X_REG_DEFDCDC1;
313*4882a593Smuzhiyun mask = TPS6507X_DEFDCDCX_DCDC_MASK;
314*4882a593Smuzhiyun break;
315*4882a593Smuzhiyun case TPS6507X_DCDC_2:
316*4882a593Smuzhiyun if (tps->info[rid]->defdcdc_default)
317*4882a593Smuzhiyun reg = TPS6507X_REG_DEFDCDC2_HIGH;
318*4882a593Smuzhiyun else
319*4882a593Smuzhiyun reg = TPS6507X_REG_DEFDCDC2_LOW;
320*4882a593Smuzhiyun mask = TPS6507X_DEFDCDCX_DCDC_MASK;
321*4882a593Smuzhiyun break;
322*4882a593Smuzhiyun case TPS6507X_DCDC_3:
323*4882a593Smuzhiyun if (tps->info[rid]->defdcdc_default)
324*4882a593Smuzhiyun reg = TPS6507X_REG_DEFDCDC3_HIGH;
325*4882a593Smuzhiyun else
326*4882a593Smuzhiyun reg = TPS6507X_REG_DEFDCDC3_LOW;
327*4882a593Smuzhiyun mask = TPS6507X_DEFDCDCX_DCDC_MASK;
328*4882a593Smuzhiyun break;
329*4882a593Smuzhiyun case TPS6507X_LDO_1:
330*4882a593Smuzhiyun reg = TPS6507X_REG_LDO_CTRL1;
331*4882a593Smuzhiyun mask = TPS6507X_REG_LDO_CTRL1_LDO1_MASK;
332*4882a593Smuzhiyun break;
333*4882a593Smuzhiyun case TPS6507X_LDO_2:
334*4882a593Smuzhiyun reg = TPS6507X_REG_DEFLDO2;
335*4882a593Smuzhiyun mask = TPS6507X_REG_DEFLDO2_LDO2_MASK;
336*4882a593Smuzhiyun break;
337*4882a593Smuzhiyun default:
338*4882a593Smuzhiyun return -EINVAL;
339*4882a593Smuzhiyun }
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun data = tps6507x_pmic_reg_read(tps, reg);
342*4882a593Smuzhiyun if (data < 0)
343*4882a593Smuzhiyun return data;
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun data &= ~mask;
346*4882a593Smuzhiyun data |= selector;
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun return tps6507x_pmic_reg_write(tps, reg, data);
349*4882a593Smuzhiyun }
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun static const struct regulator_ops tps6507x_pmic_ops = {
352*4882a593Smuzhiyun .is_enabled = tps6507x_pmic_is_enabled,
353*4882a593Smuzhiyun .enable = tps6507x_pmic_enable,
354*4882a593Smuzhiyun .disable = tps6507x_pmic_disable,
355*4882a593Smuzhiyun .get_voltage_sel = tps6507x_pmic_get_voltage_sel,
356*4882a593Smuzhiyun .set_voltage_sel = tps6507x_pmic_set_voltage_sel,
357*4882a593Smuzhiyun .list_voltage = regulator_list_voltage_table,
358*4882a593Smuzhiyun .map_voltage = regulator_map_voltage_ascend,
359*4882a593Smuzhiyun };
360*4882a593Smuzhiyun
tps6507x_pmic_of_parse_cb(struct device_node * np,const struct regulator_desc * desc,struct regulator_config * config)361*4882a593Smuzhiyun static int tps6507x_pmic_of_parse_cb(struct device_node *np,
362*4882a593Smuzhiyun const struct regulator_desc *desc,
363*4882a593Smuzhiyun struct regulator_config *config)
364*4882a593Smuzhiyun {
365*4882a593Smuzhiyun struct tps6507x_pmic *tps = config->driver_data;
366*4882a593Smuzhiyun struct tps_info *info = tps->info[desc->id];
367*4882a593Smuzhiyun u32 prop;
368*4882a593Smuzhiyun int ret;
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun ret = of_property_read_u32(np, "ti,defdcdc_default", &prop);
371*4882a593Smuzhiyun if (!ret)
372*4882a593Smuzhiyun info->defdcdc_default = prop;
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun return 0;
375*4882a593Smuzhiyun }
376*4882a593Smuzhiyun
tps6507x_pmic_probe(struct platform_device * pdev)377*4882a593Smuzhiyun static int tps6507x_pmic_probe(struct platform_device *pdev)
378*4882a593Smuzhiyun {
379*4882a593Smuzhiyun struct tps6507x_dev *tps6507x_dev = dev_get_drvdata(pdev->dev.parent);
380*4882a593Smuzhiyun struct tps_info *info = &tps6507x_pmic_regs[0];
381*4882a593Smuzhiyun struct regulator_config config = { };
382*4882a593Smuzhiyun struct regulator_init_data *init_data = NULL;
383*4882a593Smuzhiyun struct regulator_dev *rdev;
384*4882a593Smuzhiyun struct tps6507x_pmic *tps;
385*4882a593Smuzhiyun struct tps6507x_board *tps_board;
386*4882a593Smuzhiyun int i;
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun /**
389*4882a593Smuzhiyun * tps_board points to pmic related constants
390*4882a593Smuzhiyun * coming from the board-evm file.
391*4882a593Smuzhiyun */
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun tps_board = dev_get_platdata(tps6507x_dev->dev);
394*4882a593Smuzhiyun if (tps_board)
395*4882a593Smuzhiyun init_data = tps_board->tps6507x_pmic_init_data;
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun tps = devm_kzalloc(&pdev->dev, sizeof(*tps), GFP_KERNEL);
398*4882a593Smuzhiyun if (!tps)
399*4882a593Smuzhiyun return -ENOMEM;
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun mutex_init(&tps->io_lock);
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun /* common for all regulators */
404*4882a593Smuzhiyun tps->mfd = tps6507x_dev;
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun for (i = 0; i < TPS6507X_NUM_REGULATOR; i++, info++) {
407*4882a593Smuzhiyun /* Register the regulators */
408*4882a593Smuzhiyun tps->info[i] = info;
409*4882a593Smuzhiyun if (init_data && init_data[i].driver_data) {
410*4882a593Smuzhiyun struct tps6507x_reg_platform_data *data =
411*4882a593Smuzhiyun init_data[i].driver_data;
412*4882a593Smuzhiyun info->defdcdc_default = data->defdcdc_default;
413*4882a593Smuzhiyun }
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun tps->desc[i].name = info->name;
416*4882a593Smuzhiyun tps->desc[i].of_match = of_match_ptr(info->name);
417*4882a593Smuzhiyun tps->desc[i].regulators_node = of_match_ptr("regulators");
418*4882a593Smuzhiyun tps->desc[i].of_parse_cb = tps6507x_pmic_of_parse_cb;
419*4882a593Smuzhiyun tps->desc[i].id = i;
420*4882a593Smuzhiyun tps->desc[i].n_voltages = info->table_len;
421*4882a593Smuzhiyun tps->desc[i].volt_table = info->table;
422*4882a593Smuzhiyun tps->desc[i].ops = &tps6507x_pmic_ops;
423*4882a593Smuzhiyun tps->desc[i].type = REGULATOR_VOLTAGE;
424*4882a593Smuzhiyun tps->desc[i].owner = THIS_MODULE;
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun config.dev = tps6507x_dev->dev;
427*4882a593Smuzhiyun config.init_data = init_data;
428*4882a593Smuzhiyun config.driver_data = tps;
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun rdev = devm_regulator_register(&pdev->dev, &tps->desc[i],
431*4882a593Smuzhiyun &config);
432*4882a593Smuzhiyun if (IS_ERR(rdev)) {
433*4882a593Smuzhiyun dev_err(tps6507x_dev->dev,
434*4882a593Smuzhiyun "failed to register %s regulator\n",
435*4882a593Smuzhiyun pdev->name);
436*4882a593Smuzhiyun return PTR_ERR(rdev);
437*4882a593Smuzhiyun }
438*4882a593Smuzhiyun }
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun tps6507x_dev->pmic = tps;
441*4882a593Smuzhiyun platform_set_drvdata(pdev, tps6507x_dev);
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun return 0;
444*4882a593Smuzhiyun }
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun static struct platform_driver tps6507x_pmic_driver = {
447*4882a593Smuzhiyun .driver = {
448*4882a593Smuzhiyun .name = "tps6507x-pmic",
449*4882a593Smuzhiyun },
450*4882a593Smuzhiyun .probe = tps6507x_pmic_probe,
451*4882a593Smuzhiyun };
452*4882a593Smuzhiyun
tps6507x_pmic_init(void)453*4882a593Smuzhiyun static int __init tps6507x_pmic_init(void)
454*4882a593Smuzhiyun {
455*4882a593Smuzhiyun return platform_driver_register(&tps6507x_pmic_driver);
456*4882a593Smuzhiyun }
457*4882a593Smuzhiyun subsys_initcall(tps6507x_pmic_init);
458*4882a593Smuzhiyun
tps6507x_pmic_cleanup(void)459*4882a593Smuzhiyun static void __exit tps6507x_pmic_cleanup(void)
460*4882a593Smuzhiyun {
461*4882a593Smuzhiyun platform_driver_unregister(&tps6507x_pmic_driver);
462*4882a593Smuzhiyun }
463*4882a593Smuzhiyun module_exit(tps6507x_pmic_cleanup);
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun MODULE_AUTHOR("Texas Instruments");
466*4882a593Smuzhiyun MODULE_DESCRIPTION("TPS6507x voltage regulator driver");
467*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
468*4882a593Smuzhiyun MODULE_ALIAS("platform:tps6507x-pmic");
469