1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * tps51632-regulator.c -- TI TPS51632
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Regulator driver for TPS51632 3-2-1 Phase D-Cap Step Down Driverless
5*4882a593Smuzhiyun * Controller with serial VID control and DVFS.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright (c) 2012, NVIDIA Corporation.
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * Author: Laxman Dewangan <ldewangan@nvidia.com>
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or
12*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License as
13*4882a593Smuzhiyun * published by the Free Software Foundation version 2.
14*4882a593Smuzhiyun *
15*4882a593Smuzhiyun * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
16*4882a593Smuzhiyun * whether express or implied; without even the implied warranty of
17*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18*4882a593Smuzhiyun * General Public License for more details.
19*4882a593Smuzhiyun *
20*4882a593Smuzhiyun * You should have received a copy of the GNU General Public License
21*4882a593Smuzhiyun * along with this program; if not, write to the Free Software
22*4882a593Smuzhiyun * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
23*4882a593Smuzhiyun * 02111-1307, USA
24*4882a593Smuzhiyun */
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #include <linux/err.h>
27*4882a593Smuzhiyun #include <linux/i2c.h>
28*4882a593Smuzhiyun #include <linux/init.h>
29*4882a593Smuzhiyun #include <linux/kernel.h>
30*4882a593Smuzhiyun #include <linux/module.h>
31*4882a593Smuzhiyun #include <linux/of.h>
32*4882a593Smuzhiyun #include <linux/of_device.h>
33*4882a593Smuzhiyun #include <linux/platform_device.h>
34*4882a593Smuzhiyun #include <linux/regmap.h>
35*4882a593Smuzhiyun #include <linux/regulator/driver.h>
36*4882a593Smuzhiyun #include <linux/regulator/machine.h>
37*4882a593Smuzhiyun #include <linux/regulator/of_regulator.h>
38*4882a593Smuzhiyun #include <linux/regulator/tps51632-regulator.h>
39*4882a593Smuzhiyun #include <linux/slab.h>
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun /* Register definitions */
42*4882a593Smuzhiyun #define TPS51632_VOLTAGE_SELECT_REG 0x0
43*4882a593Smuzhiyun #define TPS51632_VOLTAGE_BASE_REG 0x1
44*4882a593Smuzhiyun #define TPS51632_OFFSET_REG 0x2
45*4882a593Smuzhiyun #define TPS51632_IMON_REG 0x3
46*4882a593Smuzhiyun #define TPS51632_VMAX_REG 0x4
47*4882a593Smuzhiyun #define TPS51632_DVFS_CONTROL_REG 0x5
48*4882a593Smuzhiyun #define TPS51632_POWER_STATE_REG 0x6
49*4882a593Smuzhiyun #define TPS51632_SLEW_REGS 0x7
50*4882a593Smuzhiyun #define TPS51632_FAULT_REG 0x14
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun #define TPS51632_MAX_REG 0x15
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun #define TPS51632_VOUT_MASK 0x7F
55*4882a593Smuzhiyun #define TPS51632_VOUT_OFFSET_MASK 0x1F
56*4882a593Smuzhiyun #define TPS51632_VMAX_MASK 0x7F
57*4882a593Smuzhiyun #define TPS51632_VMAX_LOCK 0x80
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun /* TPS51632_DVFS_CONTROL_REG */
60*4882a593Smuzhiyun #define TPS51632_DVFS_PWMEN 0x1
61*4882a593Smuzhiyun #define TPS51632_DVFS_STEP_20 0x2
62*4882a593Smuzhiyun #define TPS51632_DVFS_VMAX_PG 0x4
63*4882a593Smuzhiyun #define TPS51632_DVFS_PWMRST 0x8
64*4882a593Smuzhiyun #define TPS51632_DVFS_OCA_EN 0x10
65*4882a593Smuzhiyun #define TPS51632_DVFS_FCCM 0x20
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun /* TPS51632_POWER_STATE_REG */
68*4882a593Smuzhiyun #define TPS51632_POWER_STATE_MASK 0x03
69*4882a593Smuzhiyun #define TPS51632_POWER_STATE_MULTI_PHASE_CCM 0x0
70*4882a593Smuzhiyun #define TPS51632_POWER_STATE_SINGLE_PHASE_CCM 0x1
71*4882a593Smuzhiyun #define TPS51632_POWER_STATE_SINGLE_PHASE_DCM 0x2
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun #define TPS51632_MIN_VOLTAGE 500000
74*4882a593Smuzhiyun #define TPS51632_MAX_VOLTAGE 1520000
75*4882a593Smuzhiyun #define TPS51632_VOLTAGE_STEP_10mV 10000
76*4882a593Smuzhiyun #define TPS51632_VOLTAGE_STEP_20mV 20000
77*4882a593Smuzhiyun #define TPS51632_MAX_VSEL 0x7F
78*4882a593Smuzhiyun #define TPS51632_MIN_VSEL 0x19
79*4882a593Smuzhiyun #define TPS51632_DEFAULT_RAMP_DELAY 6000
80*4882a593Smuzhiyun #define TPS51632_VOLT_VSEL(uV) \
81*4882a593Smuzhiyun (DIV_ROUND_UP(uV - TPS51632_MIN_VOLTAGE, \
82*4882a593Smuzhiyun TPS51632_VOLTAGE_STEP_10mV) + \
83*4882a593Smuzhiyun TPS51632_MIN_VSEL)
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun /* TPS51632 chip information */
86*4882a593Smuzhiyun struct tps51632_chip {
87*4882a593Smuzhiyun struct device *dev;
88*4882a593Smuzhiyun struct regulator_desc desc;
89*4882a593Smuzhiyun struct regulator_dev *rdev;
90*4882a593Smuzhiyun struct regmap *regmap;
91*4882a593Smuzhiyun };
92*4882a593Smuzhiyun
tps51632_dcdc_set_ramp_delay(struct regulator_dev * rdev,int ramp_delay)93*4882a593Smuzhiyun static int tps51632_dcdc_set_ramp_delay(struct regulator_dev *rdev,
94*4882a593Smuzhiyun int ramp_delay)
95*4882a593Smuzhiyun {
96*4882a593Smuzhiyun struct tps51632_chip *tps = rdev_get_drvdata(rdev);
97*4882a593Smuzhiyun int bit;
98*4882a593Smuzhiyun int ret;
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun if (ramp_delay == 0)
101*4882a593Smuzhiyun bit = 0;
102*4882a593Smuzhiyun else
103*4882a593Smuzhiyun bit = DIV_ROUND_UP(ramp_delay, 6000) - 1;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun ret = regmap_write(tps->regmap, TPS51632_SLEW_REGS, BIT(bit));
106*4882a593Smuzhiyun if (ret < 0)
107*4882a593Smuzhiyun dev_err(tps->dev, "SLEW reg write failed, err %d\n", ret);
108*4882a593Smuzhiyun return ret;
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun static const struct regulator_ops tps51632_dcdc_ops = {
112*4882a593Smuzhiyun .get_voltage_sel = regulator_get_voltage_sel_regmap,
113*4882a593Smuzhiyun .set_voltage_sel = regulator_set_voltage_sel_regmap,
114*4882a593Smuzhiyun .list_voltage = regulator_list_voltage_linear,
115*4882a593Smuzhiyun .set_voltage_time_sel = regulator_set_voltage_time_sel,
116*4882a593Smuzhiyun .set_ramp_delay = tps51632_dcdc_set_ramp_delay,
117*4882a593Smuzhiyun };
118*4882a593Smuzhiyun
tps51632_init_dcdc(struct tps51632_chip * tps,struct tps51632_regulator_platform_data * pdata)119*4882a593Smuzhiyun static int tps51632_init_dcdc(struct tps51632_chip *tps,
120*4882a593Smuzhiyun struct tps51632_regulator_platform_data *pdata)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun int ret;
123*4882a593Smuzhiyun uint8_t control = 0;
124*4882a593Smuzhiyun int vsel;
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun if (!pdata->enable_pwm_dvfs)
127*4882a593Smuzhiyun goto skip_pwm_config;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun control |= TPS51632_DVFS_PWMEN;
130*4882a593Smuzhiyun vsel = TPS51632_VOLT_VSEL(pdata->base_voltage_uV);
131*4882a593Smuzhiyun ret = regmap_write(tps->regmap, TPS51632_VOLTAGE_BASE_REG, vsel);
132*4882a593Smuzhiyun if (ret < 0) {
133*4882a593Smuzhiyun dev_err(tps->dev, "BASE reg write failed, err %d\n", ret);
134*4882a593Smuzhiyun return ret;
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun if (pdata->dvfs_step_20mV)
138*4882a593Smuzhiyun control |= TPS51632_DVFS_STEP_20;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun if (pdata->max_voltage_uV) {
141*4882a593Smuzhiyun unsigned int vmax;
142*4882a593Smuzhiyun /**
143*4882a593Smuzhiyun * TPS51632 hw behavior: VMAX register can be write only
144*4882a593Smuzhiyun * once as it get locked after first write. The lock get
145*4882a593Smuzhiyun * reset only when device is power-reset.
146*4882a593Smuzhiyun * Write register only when lock bit is not enabled.
147*4882a593Smuzhiyun */
148*4882a593Smuzhiyun ret = regmap_read(tps->regmap, TPS51632_VMAX_REG, &vmax);
149*4882a593Smuzhiyun if (ret < 0) {
150*4882a593Smuzhiyun dev_err(tps->dev, "VMAX read failed, err %d\n", ret);
151*4882a593Smuzhiyun return ret;
152*4882a593Smuzhiyun }
153*4882a593Smuzhiyun if (!(vmax & TPS51632_VMAX_LOCK)) {
154*4882a593Smuzhiyun vsel = TPS51632_VOLT_VSEL(pdata->max_voltage_uV);
155*4882a593Smuzhiyun ret = regmap_write(tps->regmap, TPS51632_VMAX_REG,
156*4882a593Smuzhiyun vsel);
157*4882a593Smuzhiyun if (ret < 0) {
158*4882a593Smuzhiyun dev_err(tps->dev,
159*4882a593Smuzhiyun "VMAX write failed, err %d\n", ret);
160*4882a593Smuzhiyun return ret;
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun skip_pwm_config:
166*4882a593Smuzhiyun ret = regmap_write(tps->regmap, TPS51632_DVFS_CONTROL_REG, control);
167*4882a593Smuzhiyun if (ret < 0)
168*4882a593Smuzhiyun dev_err(tps->dev, "DVFS reg write failed, err %d\n", ret);
169*4882a593Smuzhiyun return ret;
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun
is_volatile_reg(struct device * dev,unsigned int reg)172*4882a593Smuzhiyun static bool is_volatile_reg(struct device *dev, unsigned int reg)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun switch (reg) {
175*4882a593Smuzhiyun case TPS51632_OFFSET_REG:
176*4882a593Smuzhiyun case TPS51632_FAULT_REG:
177*4882a593Smuzhiyun case TPS51632_IMON_REG:
178*4882a593Smuzhiyun return true;
179*4882a593Smuzhiyun default:
180*4882a593Smuzhiyun return false;
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun
is_read_reg(struct device * dev,unsigned int reg)184*4882a593Smuzhiyun static bool is_read_reg(struct device *dev, unsigned int reg)
185*4882a593Smuzhiyun {
186*4882a593Smuzhiyun switch (reg) {
187*4882a593Smuzhiyun case 0x08 ... 0x0F:
188*4882a593Smuzhiyun return false;
189*4882a593Smuzhiyun default:
190*4882a593Smuzhiyun return true;
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun
is_write_reg(struct device * dev,unsigned int reg)194*4882a593Smuzhiyun static bool is_write_reg(struct device *dev, unsigned int reg)
195*4882a593Smuzhiyun {
196*4882a593Smuzhiyun switch (reg) {
197*4882a593Smuzhiyun case TPS51632_VOLTAGE_SELECT_REG:
198*4882a593Smuzhiyun case TPS51632_VOLTAGE_BASE_REG:
199*4882a593Smuzhiyun case TPS51632_VMAX_REG:
200*4882a593Smuzhiyun case TPS51632_DVFS_CONTROL_REG:
201*4882a593Smuzhiyun case TPS51632_POWER_STATE_REG:
202*4882a593Smuzhiyun case TPS51632_SLEW_REGS:
203*4882a593Smuzhiyun return true;
204*4882a593Smuzhiyun default:
205*4882a593Smuzhiyun return false;
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun }
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun static const struct regmap_config tps51632_regmap_config = {
210*4882a593Smuzhiyun .reg_bits = 8,
211*4882a593Smuzhiyun .val_bits = 8,
212*4882a593Smuzhiyun .writeable_reg = is_write_reg,
213*4882a593Smuzhiyun .readable_reg = is_read_reg,
214*4882a593Smuzhiyun .volatile_reg = is_volatile_reg,
215*4882a593Smuzhiyun .max_register = TPS51632_MAX_REG - 1,
216*4882a593Smuzhiyun .cache_type = REGCACHE_RBTREE,
217*4882a593Smuzhiyun };
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun #if defined(CONFIG_OF)
220*4882a593Smuzhiyun static const struct of_device_id tps51632_of_match[] = {
221*4882a593Smuzhiyun { .compatible = "ti,tps51632",},
222*4882a593Smuzhiyun {},
223*4882a593Smuzhiyun };
224*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, tps51632_of_match);
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun static struct tps51632_regulator_platform_data *
of_get_tps51632_platform_data(struct device * dev,const struct regulator_desc * desc)227*4882a593Smuzhiyun of_get_tps51632_platform_data(struct device *dev,
228*4882a593Smuzhiyun const struct regulator_desc *desc)
229*4882a593Smuzhiyun {
230*4882a593Smuzhiyun struct tps51632_regulator_platform_data *pdata;
231*4882a593Smuzhiyun struct device_node *np = dev->of_node;
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
234*4882a593Smuzhiyun if (!pdata)
235*4882a593Smuzhiyun return NULL;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun pdata->reg_init_data = of_get_regulator_init_data(dev, dev->of_node,
238*4882a593Smuzhiyun desc);
239*4882a593Smuzhiyun if (!pdata->reg_init_data) {
240*4882a593Smuzhiyun dev_err(dev, "Not able to get OF regulator init data\n");
241*4882a593Smuzhiyun return NULL;
242*4882a593Smuzhiyun }
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun pdata->enable_pwm_dvfs =
245*4882a593Smuzhiyun of_property_read_bool(np, "ti,enable-pwm-dvfs");
246*4882a593Smuzhiyun pdata->dvfs_step_20mV = of_property_read_bool(np, "ti,dvfs-step-20mV");
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun pdata->base_voltage_uV = pdata->reg_init_data->constraints.min_uV ? :
249*4882a593Smuzhiyun TPS51632_MIN_VOLTAGE;
250*4882a593Smuzhiyun pdata->max_voltage_uV = pdata->reg_init_data->constraints.max_uV ? :
251*4882a593Smuzhiyun TPS51632_MAX_VOLTAGE;
252*4882a593Smuzhiyun return pdata;
253*4882a593Smuzhiyun }
254*4882a593Smuzhiyun #else
255*4882a593Smuzhiyun static struct tps51632_regulator_platform_data *
of_get_tps51632_platform_data(struct device * dev,const struct regulator_desc * desc)256*4882a593Smuzhiyun of_get_tps51632_platform_data(struct device *dev,
257*4882a593Smuzhiyun const struct regulator_desc *desc)
258*4882a593Smuzhiyun {
259*4882a593Smuzhiyun return NULL;
260*4882a593Smuzhiyun }
261*4882a593Smuzhiyun #endif
262*4882a593Smuzhiyun
tps51632_probe(struct i2c_client * client,const struct i2c_device_id * id)263*4882a593Smuzhiyun static int tps51632_probe(struct i2c_client *client,
264*4882a593Smuzhiyun const struct i2c_device_id *id)
265*4882a593Smuzhiyun {
266*4882a593Smuzhiyun struct tps51632_regulator_platform_data *pdata;
267*4882a593Smuzhiyun struct regulator_dev *rdev;
268*4882a593Smuzhiyun struct tps51632_chip *tps;
269*4882a593Smuzhiyun int ret;
270*4882a593Smuzhiyun struct regulator_config config = { };
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun if (client->dev.of_node) {
273*4882a593Smuzhiyun const struct of_device_id *match;
274*4882a593Smuzhiyun match = of_match_device(of_match_ptr(tps51632_of_match),
275*4882a593Smuzhiyun &client->dev);
276*4882a593Smuzhiyun if (!match) {
277*4882a593Smuzhiyun dev_err(&client->dev, "Error: No device match found\n");
278*4882a593Smuzhiyun return -ENODEV;
279*4882a593Smuzhiyun }
280*4882a593Smuzhiyun }
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun tps = devm_kzalloc(&client->dev, sizeof(*tps), GFP_KERNEL);
283*4882a593Smuzhiyun if (!tps)
284*4882a593Smuzhiyun return -ENOMEM;
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun tps->dev = &client->dev;
287*4882a593Smuzhiyun tps->desc.name = client->name;
288*4882a593Smuzhiyun tps->desc.id = 0;
289*4882a593Smuzhiyun tps->desc.ramp_delay = TPS51632_DEFAULT_RAMP_DELAY;
290*4882a593Smuzhiyun tps->desc.min_uV = TPS51632_MIN_VOLTAGE;
291*4882a593Smuzhiyun tps->desc.uV_step = TPS51632_VOLTAGE_STEP_10mV;
292*4882a593Smuzhiyun tps->desc.linear_min_sel = TPS51632_MIN_VSEL;
293*4882a593Smuzhiyun tps->desc.n_voltages = TPS51632_MAX_VSEL + 1;
294*4882a593Smuzhiyun tps->desc.ops = &tps51632_dcdc_ops;
295*4882a593Smuzhiyun tps->desc.type = REGULATOR_VOLTAGE;
296*4882a593Smuzhiyun tps->desc.owner = THIS_MODULE;
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun pdata = dev_get_platdata(&client->dev);
299*4882a593Smuzhiyun if (!pdata && client->dev.of_node)
300*4882a593Smuzhiyun pdata = of_get_tps51632_platform_data(&client->dev, &tps->desc);
301*4882a593Smuzhiyun if (!pdata) {
302*4882a593Smuzhiyun dev_err(&client->dev, "No Platform data\n");
303*4882a593Smuzhiyun return -EINVAL;
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun if (pdata->enable_pwm_dvfs) {
307*4882a593Smuzhiyun if ((pdata->base_voltage_uV < TPS51632_MIN_VOLTAGE) ||
308*4882a593Smuzhiyun (pdata->base_voltage_uV > TPS51632_MAX_VOLTAGE)) {
309*4882a593Smuzhiyun dev_err(&client->dev, "Invalid base_voltage_uV setting\n");
310*4882a593Smuzhiyun return -EINVAL;
311*4882a593Smuzhiyun }
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun if ((pdata->max_voltage_uV) &&
314*4882a593Smuzhiyun ((pdata->max_voltage_uV < TPS51632_MIN_VOLTAGE) ||
315*4882a593Smuzhiyun (pdata->max_voltage_uV > TPS51632_MAX_VOLTAGE))) {
316*4882a593Smuzhiyun dev_err(&client->dev, "Invalid max_voltage_uV setting\n");
317*4882a593Smuzhiyun return -EINVAL;
318*4882a593Smuzhiyun }
319*4882a593Smuzhiyun }
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun if (pdata->enable_pwm_dvfs)
322*4882a593Smuzhiyun tps->desc.vsel_reg = TPS51632_VOLTAGE_BASE_REG;
323*4882a593Smuzhiyun else
324*4882a593Smuzhiyun tps->desc.vsel_reg = TPS51632_VOLTAGE_SELECT_REG;
325*4882a593Smuzhiyun tps->desc.vsel_mask = TPS51632_VOUT_MASK;
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun tps->regmap = devm_regmap_init_i2c(client, &tps51632_regmap_config);
328*4882a593Smuzhiyun if (IS_ERR(tps->regmap)) {
329*4882a593Smuzhiyun ret = PTR_ERR(tps->regmap);
330*4882a593Smuzhiyun dev_err(&client->dev, "regmap init failed, err %d\n", ret);
331*4882a593Smuzhiyun return ret;
332*4882a593Smuzhiyun }
333*4882a593Smuzhiyun i2c_set_clientdata(client, tps);
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun ret = tps51632_init_dcdc(tps, pdata);
336*4882a593Smuzhiyun if (ret < 0) {
337*4882a593Smuzhiyun dev_err(tps->dev, "Init failed, err = %d\n", ret);
338*4882a593Smuzhiyun return ret;
339*4882a593Smuzhiyun }
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun /* Register the regulators */
342*4882a593Smuzhiyun config.dev = &client->dev;
343*4882a593Smuzhiyun config.init_data = pdata->reg_init_data;
344*4882a593Smuzhiyun config.driver_data = tps;
345*4882a593Smuzhiyun config.regmap = tps->regmap;
346*4882a593Smuzhiyun config.of_node = client->dev.of_node;
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun rdev = devm_regulator_register(&client->dev, &tps->desc, &config);
349*4882a593Smuzhiyun if (IS_ERR(rdev)) {
350*4882a593Smuzhiyun dev_err(tps->dev, "regulator register failed\n");
351*4882a593Smuzhiyun return PTR_ERR(rdev);
352*4882a593Smuzhiyun }
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun tps->rdev = rdev;
355*4882a593Smuzhiyun return 0;
356*4882a593Smuzhiyun }
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun static const struct i2c_device_id tps51632_id[] = {
359*4882a593Smuzhiyun {.name = "tps51632",},
360*4882a593Smuzhiyun {},
361*4882a593Smuzhiyun };
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, tps51632_id);
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun static struct i2c_driver tps51632_i2c_driver = {
366*4882a593Smuzhiyun .driver = {
367*4882a593Smuzhiyun .name = "tps51632",
368*4882a593Smuzhiyun .of_match_table = of_match_ptr(tps51632_of_match),
369*4882a593Smuzhiyun },
370*4882a593Smuzhiyun .probe = tps51632_probe,
371*4882a593Smuzhiyun .id_table = tps51632_id,
372*4882a593Smuzhiyun };
373*4882a593Smuzhiyun
tps51632_init(void)374*4882a593Smuzhiyun static int __init tps51632_init(void)
375*4882a593Smuzhiyun {
376*4882a593Smuzhiyun return i2c_add_driver(&tps51632_i2c_driver);
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun subsys_initcall(tps51632_init);
379*4882a593Smuzhiyun
tps51632_cleanup(void)380*4882a593Smuzhiyun static void __exit tps51632_cleanup(void)
381*4882a593Smuzhiyun {
382*4882a593Smuzhiyun i2c_del_driver(&tps51632_i2c_driver);
383*4882a593Smuzhiyun }
384*4882a593Smuzhiyun module_exit(tps51632_cleanup);
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
387*4882a593Smuzhiyun MODULE_DESCRIPTION("TPS51632 voltage regulator driver");
388*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
389