1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Regulator driver for syr82x DCDC chip for rk32xx
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (C) 2010, 2011 ROCKCHIP, Inc.
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun * Based on syr82x.c that is work by zhangqing<zhangqing@rock-chips.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify
9*4882a593Smuzhiyun * it under the terms of the GNU General Public License version 2 as
10*4882a593Smuzhiyun * published by the Free Software Foundation.
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun */
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include <linux/bug.h>
15*4882a593Smuzhiyun #include <linux/err.h>
16*4882a593Smuzhiyun #include <linux/i2c.h>
17*4882a593Smuzhiyun #include <linux/kernel.h>
18*4882a593Smuzhiyun #include <linux/regulator/driver.h>
19*4882a593Smuzhiyun #include <linux/delay.h>
20*4882a593Smuzhiyun #include <linux/slab.h>
21*4882a593Smuzhiyun #include <linux/mutex.h>
22*4882a593Smuzhiyun #include <linux/mfd/core.h>
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #include <linux/interrupt.h>
25*4882a593Smuzhiyun #include <linux/module.h>
26*4882a593Smuzhiyun #include <linux/of_irq.h>
27*4882a593Smuzhiyun #include <linux/of_gpio.h>
28*4882a593Smuzhiyun #include <linux/of.h>
29*4882a593Smuzhiyun #include <linux/of_device.h>
30*4882a593Smuzhiyun #include <linux/regulator/of_regulator.h>
31*4882a593Smuzhiyun #include <linux/regulator/driver.h>
32*4882a593Smuzhiyun #include <linux/regulator/machine.h>
33*4882a593Smuzhiyun #include <linux/regmap.h>
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #define syr82x_NUM_REGULATORS 1
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun struct syr82x {
38*4882a593Smuzhiyun struct device *dev;
39*4882a593Smuzhiyun struct mutex io_lock;
40*4882a593Smuzhiyun struct i2c_client *i2c;
41*4882a593Smuzhiyun int num_regulators;
42*4882a593Smuzhiyun struct regulator_dev **rdev;
43*4882a593Smuzhiyun int irq_base;
44*4882a593Smuzhiyun int chip_irq;
45*4882a593Smuzhiyun int sleep_gpio; /* */
46*4882a593Smuzhiyun unsigned int dcdc_slp_voltage[3]; /* buckx_voltage in uV */
47*4882a593Smuzhiyun bool pmic_sleep;
48*4882a593Smuzhiyun struct regmap *regmap;
49*4882a593Smuzhiyun };
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun struct syr82x_regulator {
52*4882a593Smuzhiyun struct device *dev;
53*4882a593Smuzhiyun struct regulator_desc *desc;
54*4882a593Smuzhiyun struct regulator_dev *rdev;
55*4882a593Smuzhiyun };
56*4882a593Smuzhiyun struct syr82x_board {
57*4882a593Smuzhiyun int irq;
58*4882a593Smuzhiyun int irq_base;
59*4882a593Smuzhiyun struct regulator_init_data *syr82x_init_data[syr82x_NUM_REGULATORS];
60*4882a593Smuzhiyun struct device_node *of_node[syr82x_NUM_REGULATORS];
61*4882a593Smuzhiyun int sleep_gpio; /* */
62*4882a593Smuzhiyun unsigned int dcdc_slp_voltage[3]; /* buckx_voltage in uV */
63*4882a593Smuzhiyun bool sleep;
64*4882a593Smuzhiyun };
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun struct syr82x_regulator_subdev {
67*4882a593Smuzhiyun int id;
68*4882a593Smuzhiyun struct regulator_init_data *initdata;
69*4882a593Smuzhiyun struct device_node *reg_node;
70*4882a593Smuzhiyun };
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun struct syr82x_platform_data {
73*4882a593Smuzhiyun int ono;
74*4882a593Smuzhiyun int num_regulators;
75*4882a593Smuzhiyun struct syr82x_regulator_subdev *regulators;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun int sleep_gpio; /* */
78*4882a593Smuzhiyun unsigned int dcdc_slp_voltage[3]; /* buckx_voltage in uV */
79*4882a593Smuzhiyun bool sleep;
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun struct syr82x *g_syr82x;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun #define SYR82X_BUCK1_SET_VOL_BASE 0x00
84*4882a593Smuzhiyun #define SYR82X_BUCK1_SLP_VOL_BASE 0x01
85*4882a593Smuzhiyun #define SYR82X_CONTR_REG1 0x02
86*4882a593Smuzhiyun #define SYR82X_ID1_REG 0x03
87*4882a593Smuzhiyun #define SYR82X_ID2_REG 0x04
88*4882a593Smuzhiyun #define SYR82X_CONTR_REG2 0x05
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun #define BUCK_VOL_MASK 0x3f
91*4882a593Smuzhiyun #define VOL_MIN_IDX 0x00
92*4882a593Smuzhiyun #define VOL_MAX_IDX 0x3f
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun struct syr82x_reg_data {
95*4882a593Smuzhiyun int addr;
96*4882a593Smuzhiyun int mask;
97*4882a593Smuzhiyun int value;
98*4882a593Smuzhiyun };
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun static const struct regmap_config syr82x_regmap_config = {
101*4882a593Smuzhiyun .reg_bits = 8,
102*4882a593Smuzhiyun .val_bits = 8,
103*4882a593Smuzhiyun .max_register = SYR82X_CONTR_REG2,
104*4882a593Smuzhiyun .cache_type = REGCACHE_RBTREE,
105*4882a593Smuzhiyun };
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun const static int buck_voltage_map[] = {
108*4882a593Smuzhiyun 712500, 725000, 737500,750000, 762500,775000,787500,800000,
109*4882a593Smuzhiyun 812500, 825000, 837500,850000, 862500,875000,887500,900000,
110*4882a593Smuzhiyun 912500, 925000, 937500,950000, 962500,975000,987500,1000000,
111*4882a593Smuzhiyun 1012500, 1025000, 1037500,1050000, 1062500,1075000,1087500,1100000,
112*4882a593Smuzhiyun 1112500, 1125000, 1137500,1150000, 1162500,1175000,1187500,1200000,
113*4882a593Smuzhiyun 1212500, 1225000, 1237500,1250000, 1262500,1275000,1287500,1300000,
114*4882a593Smuzhiyun 1312500, 1325000, 1337500,1350000, 1362500,1375000,1387500,1400000,
115*4882a593Smuzhiyun 1412500, 1425000, 1437500,1450000, 1462500,1475000,1487500,1500000,
116*4882a593Smuzhiyun };
117*4882a593Smuzhiyun
syr82x_dcdc_list_voltage(struct regulator_dev * dev,unsigned index)118*4882a593Smuzhiyun static int syr82x_dcdc_list_voltage(struct regulator_dev *dev, unsigned index)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun if (index >= ARRAY_SIZE(buck_voltage_map))
121*4882a593Smuzhiyun return -EINVAL;
122*4882a593Smuzhiyun return buck_voltage_map[index];
123*4882a593Smuzhiyun }
syr82x_dcdc_is_enabled(struct regulator_dev * dev)124*4882a593Smuzhiyun static int syr82x_dcdc_is_enabled(struct regulator_dev *dev)
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun struct syr82x *syr82x = rdev_get_drvdata(dev);
127*4882a593Smuzhiyun unsigned int val;
128*4882a593Smuzhiyun u16 mask = 0x80;
129*4882a593Smuzhiyun int ret = 0;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun ret = regmap_read(syr82x->regmap, SYR82X_BUCK1_SET_VOL_BASE, &val);
132*4882a593Smuzhiyun if (ret != 0)
133*4882a593Smuzhiyun return ret;
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun val &= (~0x7f);
136*4882a593Smuzhiyun if (val & mask)
137*4882a593Smuzhiyun return 1;
138*4882a593Smuzhiyun else
139*4882a593Smuzhiyun return 0;
140*4882a593Smuzhiyun }
syr82x_dcdc_enable(struct regulator_dev * dev)141*4882a593Smuzhiyun static int syr82x_dcdc_enable(struct regulator_dev *dev)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun struct syr82x *syr82x = rdev_get_drvdata(dev);
144*4882a593Smuzhiyun u16 mask = 0x80;
145*4882a593Smuzhiyun int ret = 0;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun ret = regmap_update_bits(syr82x->regmap,
148*4882a593Smuzhiyun SYR82X_BUCK1_SET_VOL_BASE,
149*4882a593Smuzhiyun mask, 0x80);
150*4882a593Smuzhiyun return ret;
151*4882a593Smuzhiyun }
syr82x_dcdc_disable(struct regulator_dev * dev)152*4882a593Smuzhiyun static int syr82x_dcdc_disable(struct regulator_dev *dev)
153*4882a593Smuzhiyun {
154*4882a593Smuzhiyun struct syr82x *syr82x = rdev_get_drvdata(dev);
155*4882a593Smuzhiyun u16 mask = 0x80;
156*4882a593Smuzhiyun int ret = 0;
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun ret = regmap_update_bits(syr82x->regmap,
159*4882a593Smuzhiyun SYR82X_BUCK1_SET_VOL_BASE,
160*4882a593Smuzhiyun mask, 0);
161*4882a593Smuzhiyun return ret;
162*4882a593Smuzhiyun }
syr82x_dcdc_get_voltage(struct regulator_dev * dev)163*4882a593Smuzhiyun static int syr82x_dcdc_get_voltage(struct regulator_dev *dev)
164*4882a593Smuzhiyun {
165*4882a593Smuzhiyun struct syr82x *syr82x = rdev_get_drvdata(dev);
166*4882a593Smuzhiyun unsigned int reg;
167*4882a593Smuzhiyun int val;
168*4882a593Smuzhiyun int ret = 0;
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun ret = regmap_read(syr82x->regmap, SYR82X_BUCK1_SET_VOL_BASE, ®);
171*4882a593Smuzhiyun if (ret != 0)
172*4882a593Smuzhiyun return ret;
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun reg &= BUCK_VOL_MASK;
175*4882a593Smuzhiyun val = buck_voltage_map[reg];
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun return val;
178*4882a593Smuzhiyun }
syr82x_dcdc_set_voltage(struct regulator_dev * dev,int min_uV,int max_uV,unsigned * selector)179*4882a593Smuzhiyun static int syr82x_dcdc_set_voltage(struct regulator_dev *dev,
180*4882a593Smuzhiyun int min_uV, int max_uV,unsigned *selector)
181*4882a593Smuzhiyun {
182*4882a593Smuzhiyun struct syr82x *syr82x = rdev_get_drvdata(dev);
183*4882a593Smuzhiyun const int *vol_map = buck_voltage_map;
184*4882a593Smuzhiyun u16 val;
185*4882a593Smuzhiyun int ret = 0;
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun if (min_uV < vol_map[VOL_MIN_IDX] ||
188*4882a593Smuzhiyun min_uV > vol_map[VOL_MAX_IDX])
189*4882a593Smuzhiyun return -EINVAL;
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun for (val = VOL_MIN_IDX; val <= VOL_MAX_IDX; val++){
192*4882a593Smuzhiyun if (vol_map[val] >= min_uV)
193*4882a593Smuzhiyun break;
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun if (vol_map[val] > max_uV)
197*4882a593Smuzhiyun printk("WARNING:this voltage is not support!voltage set is %d mv\n",vol_map[val]);
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun ret = regmap_update_bits(syr82x->regmap,
200*4882a593Smuzhiyun SYR82X_BUCK1_SET_VOL_BASE,
201*4882a593Smuzhiyun BUCK_VOL_MASK, val);
202*4882a593Smuzhiyun if (ret != 0)
203*4882a593Smuzhiyun printk("###################WARNING:set voltage is error!voltage set is %d mv %d\n",vol_map[val],ret);
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun return ret;
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun
syr82x_dcdc_get_mode(struct regulator_dev * dev)208*4882a593Smuzhiyun static unsigned int syr82x_dcdc_get_mode(struct regulator_dev *dev)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun struct syr82x *syr82x = rdev_get_drvdata(dev);
211*4882a593Smuzhiyun u16 mask = 0x40;
212*4882a593Smuzhiyun unsigned int val;
213*4882a593Smuzhiyun int ret = 0;
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun ret = regmap_read(syr82x->regmap, SYR82X_BUCK1_SET_VOL_BASE, &val);
216*4882a593Smuzhiyun if (ret != 0)
217*4882a593Smuzhiyun return ret;
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun val &= mask;
220*4882a593Smuzhiyun if (val == mask)
221*4882a593Smuzhiyun return REGULATOR_MODE_FAST;
222*4882a593Smuzhiyun else
223*4882a593Smuzhiyun return REGULATOR_MODE_NORMAL;
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun }
syr82x_dcdc_set_mode(struct regulator_dev * dev,unsigned int mode)226*4882a593Smuzhiyun static int syr82x_dcdc_set_mode(struct regulator_dev *dev, unsigned int mode)
227*4882a593Smuzhiyun {
228*4882a593Smuzhiyun struct syr82x *syr82x = rdev_get_drvdata(dev);
229*4882a593Smuzhiyun u16 mask = 0x40;
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun switch(mode)
232*4882a593Smuzhiyun {
233*4882a593Smuzhiyun case REGULATOR_MODE_FAST:
234*4882a593Smuzhiyun return regmap_update_bits(syr82x->regmap,
235*4882a593Smuzhiyun SYR82X_BUCK1_SET_VOL_BASE,
236*4882a593Smuzhiyun mask, mask);
237*4882a593Smuzhiyun case REGULATOR_MODE_NORMAL:
238*4882a593Smuzhiyun return regmap_update_bits(syr82x->regmap,
239*4882a593Smuzhiyun SYR82X_BUCK1_SET_VOL_BASE,
240*4882a593Smuzhiyun mask, 0);
241*4882a593Smuzhiyun default:
242*4882a593Smuzhiyun printk("error:dcdc_syr82x only auto and pwm mode\n");
243*4882a593Smuzhiyun return -EINVAL;
244*4882a593Smuzhiyun }
245*4882a593Smuzhiyun }
syr82x_dcdc_set_voltage_time_sel(struct regulator_dev * dev,unsigned int old_selector,unsigned int new_selector)246*4882a593Smuzhiyun static int syr82x_dcdc_set_voltage_time_sel(struct regulator_dev *dev, unsigned int old_selector,
247*4882a593Smuzhiyun unsigned int new_selector)
248*4882a593Smuzhiyun {
249*4882a593Smuzhiyun int old_volt, new_volt;
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun old_volt = syr82x_dcdc_list_voltage(dev, old_selector);
252*4882a593Smuzhiyun if (old_volt < 0)
253*4882a593Smuzhiyun return old_volt;
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun new_volt = syr82x_dcdc_list_voltage(dev, new_selector);
256*4882a593Smuzhiyun if (new_volt < 0)
257*4882a593Smuzhiyun return new_volt;
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun return DIV_ROUND_UP(abs(old_volt - new_volt)*4, 10000);
260*4882a593Smuzhiyun }
syr82x_dcdc_suspend_enable(struct regulator_dev * dev)261*4882a593Smuzhiyun static int syr82x_dcdc_suspend_enable(struct regulator_dev *dev)
262*4882a593Smuzhiyun {
263*4882a593Smuzhiyun struct syr82x *syr82x = rdev_get_drvdata(dev);
264*4882a593Smuzhiyun u16 mask = 0x80;
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun return regmap_update_bits(syr82x->regmap,
267*4882a593Smuzhiyun SYR82X_BUCK1_SLP_VOL_BASE,
268*4882a593Smuzhiyun mask, 0x80);
269*4882a593Smuzhiyun }
syr82x_dcdc_suspend_disable(struct regulator_dev * dev)270*4882a593Smuzhiyun static int syr82x_dcdc_suspend_disable(struct regulator_dev *dev)
271*4882a593Smuzhiyun {
272*4882a593Smuzhiyun struct syr82x *syr82x = rdev_get_drvdata(dev);
273*4882a593Smuzhiyun u16 mask=0x80;
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun return regmap_update_bits(syr82x->regmap,
276*4882a593Smuzhiyun SYR82X_BUCK1_SLP_VOL_BASE,
277*4882a593Smuzhiyun mask, 0);
278*4882a593Smuzhiyun }
syr82x_dcdc_set_sleep_voltage(struct regulator_dev * dev,int uV)279*4882a593Smuzhiyun static int syr82x_dcdc_set_sleep_voltage(struct regulator_dev *dev,
280*4882a593Smuzhiyun int uV)
281*4882a593Smuzhiyun {
282*4882a593Smuzhiyun struct syr82x *syr82x = rdev_get_drvdata(dev);
283*4882a593Smuzhiyun const int *vol_map = buck_voltage_map;
284*4882a593Smuzhiyun u16 val;
285*4882a593Smuzhiyun int ret = 0;
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun if (uV < vol_map[VOL_MIN_IDX] ||
288*4882a593Smuzhiyun uV > vol_map[VOL_MAX_IDX])
289*4882a593Smuzhiyun return -EINVAL;
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun for (val = VOL_MIN_IDX; val <= VOL_MAX_IDX; val++){
292*4882a593Smuzhiyun if (vol_map[val] >= uV)
293*4882a593Smuzhiyun break;
294*4882a593Smuzhiyun }
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun if (vol_map[val] > uV)
297*4882a593Smuzhiyun printk("WARNING:this voltage is not support!voltage set is %d mv\n",vol_map[val]);
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun ret = regmap_update_bits(syr82x->regmap,
300*4882a593Smuzhiyun SYR82X_BUCK1_SLP_VOL_BASE,
301*4882a593Smuzhiyun BUCK_VOL_MASK, val);
302*4882a593Smuzhiyun return ret;
303*4882a593Smuzhiyun }
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun
syr82x_dcdc_set_suspend_mode(struct regulator_dev * dev,unsigned int mode)306*4882a593Smuzhiyun static int syr82x_dcdc_set_suspend_mode(struct regulator_dev *dev, unsigned int mode)
307*4882a593Smuzhiyun {
308*4882a593Smuzhiyun struct syr82x *syr82x = rdev_get_drvdata(dev);
309*4882a593Smuzhiyun u16 mask = 0x40;
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun switch(mode)
312*4882a593Smuzhiyun {
313*4882a593Smuzhiyun case REGULATOR_MODE_FAST:
314*4882a593Smuzhiyun return regmap_update_bits(syr82x->regmap,
315*4882a593Smuzhiyun SYR82X_BUCK1_SLP_VOL_BASE,
316*4882a593Smuzhiyun mask, mask);
317*4882a593Smuzhiyun case REGULATOR_MODE_NORMAL:
318*4882a593Smuzhiyun return regmap_update_bits(syr82x->regmap,
319*4882a593Smuzhiyun SYR82X_BUCK1_SLP_VOL_BASE,
320*4882a593Smuzhiyun mask, 0);
321*4882a593Smuzhiyun default:
322*4882a593Smuzhiyun printk("error:dcdc_syr82x only auto and pwm mode\n");
323*4882a593Smuzhiyun return -EINVAL;
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun }
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun static struct regulator_ops syr82x_dcdc_ops = {
328*4882a593Smuzhiyun .set_voltage = syr82x_dcdc_set_voltage,
329*4882a593Smuzhiyun .get_voltage = syr82x_dcdc_get_voltage,
330*4882a593Smuzhiyun .list_voltage= syr82x_dcdc_list_voltage,
331*4882a593Smuzhiyun .is_enabled = syr82x_dcdc_is_enabled,
332*4882a593Smuzhiyun .enable = syr82x_dcdc_enable,
333*4882a593Smuzhiyun .disable = syr82x_dcdc_disable,
334*4882a593Smuzhiyun .get_mode = syr82x_dcdc_get_mode,
335*4882a593Smuzhiyun .set_mode = syr82x_dcdc_set_mode,
336*4882a593Smuzhiyun .set_suspend_voltage = syr82x_dcdc_set_sleep_voltage,
337*4882a593Smuzhiyun .set_suspend_enable = syr82x_dcdc_suspend_enable,
338*4882a593Smuzhiyun .set_suspend_disable = syr82x_dcdc_suspend_disable,
339*4882a593Smuzhiyun .set_suspend_mode = syr82x_dcdc_set_suspend_mode,
340*4882a593Smuzhiyun .set_voltage_time_sel = syr82x_dcdc_set_voltage_time_sel,
341*4882a593Smuzhiyun };
342*4882a593Smuzhiyun static struct regulator_desc regulators[] = {
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun {
345*4882a593Smuzhiyun .name = "SY_DCDC1",
346*4882a593Smuzhiyun .id = 0,
347*4882a593Smuzhiyun .ops = &syr82x_dcdc_ops,
348*4882a593Smuzhiyun .n_voltages = ARRAY_SIZE(buck_voltage_map),
349*4882a593Smuzhiyun .type = REGULATOR_VOLTAGE,
350*4882a593Smuzhiyun .owner = THIS_MODULE,
351*4882a593Smuzhiyun },
352*4882a593Smuzhiyun };
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun static struct of_device_id syr82x_of_match[] = {
355*4882a593Smuzhiyun { .compatible = "silergy,syr82x"},
356*4882a593Smuzhiyun { },
357*4882a593Smuzhiyun };
358*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, syr82x_of_match);
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun static struct of_regulator_match syr82x_reg_matches[] = {
361*4882a593Smuzhiyun { .name = "syr82x_dcdc1" ,.driver_data = (void *)0},
362*4882a593Smuzhiyun };
363*4882a593Smuzhiyun
syr82x_parse_dt(struct syr82x * syr82x)364*4882a593Smuzhiyun static struct syr82x_board *syr82x_parse_dt(struct syr82x *syr82x)
365*4882a593Smuzhiyun {
366*4882a593Smuzhiyun struct syr82x_board *pdata;
367*4882a593Smuzhiyun struct device_node *regs;
368*4882a593Smuzhiyun struct device_node *syr82x_np;
369*4882a593Smuzhiyun int count;
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun syr82x_np = of_node_get(syr82x->dev->of_node);
372*4882a593Smuzhiyun if (!syr82x_np) {
373*4882a593Smuzhiyun printk("could not find pmic sub-node\n");
374*4882a593Smuzhiyun return NULL;
375*4882a593Smuzhiyun }
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun regs = of_find_node_by_name(syr82x_np, "regulators");
378*4882a593Smuzhiyun if (!regs)
379*4882a593Smuzhiyun return NULL;
380*4882a593Smuzhiyun count = of_regulator_match(syr82x->dev, regs, syr82x_reg_matches,
381*4882a593Smuzhiyun syr82x_NUM_REGULATORS);
382*4882a593Smuzhiyun of_node_put(regs);
383*4882a593Smuzhiyun pdata = devm_kzalloc(syr82x->dev, sizeof(*pdata), GFP_KERNEL);
384*4882a593Smuzhiyun if (!pdata)
385*4882a593Smuzhiyun return NULL;
386*4882a593Smuzhiyun pdata->syr82x_init_data[0] = syr82x_reg_matches[0].init_data;
387*4882a593Smuzhiyun pdata->of_node[0] = syr82x_reg_matches[0].of_node;
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun return pdata;
390*4882a593Smuzhiyun }
391*4882a593Smuzhiyun
syr82x_i2c_probe(struct i2c_client * i2c,const struct i2c_device_id * id)392*4882a593Smuzhiyun static int syr82x_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
393*4882a593Smuzhiyun {
394*4882a593Smuzhiyun struct syr82x *syr82x;
395*4882a593Smuzhiyun struct syr82x_board *pdev ;
396*4882a593Smuzhiyun const struct of_device_id *match;
397*4882a593Smuzhiyun struct regulator_config config = { };
398*4882a593Smuzhiyun struct regulator_dev *sy_rdev;
399*4882a593Smuzhiyun struct regulator_init_data *reg_data;
400*4882a593Smuzhiyun const char *rail_name = NULL;
401*4882a593Smuzhiyun int ret;
402*4882a593Smuzhiyun unsigned int val;
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun if (i2c->dev.of_node) {
405*4882a593Smuzhiyun match = of_match_device(syr82x_of_match, &i2c->dev);
406*4882a593Smuzhiyun if (!match) {
407*4882a593Smuzhiyun printk("Failed to find matching dt id\n");
408*4882a593Smuzhiyun return -EINVAL;
409*4882a593Smuzhiyun }
410*4882a593Smuzhiyun }
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun syr82x = devm_kzalloc(&i2c->dev,sizeof(struct syr82x), GFP_KERNEL);
413*4882a593Smuzhiyun if (syr82x == NULL) {
414*4882a593Smuzhiyun ret = -ENOMEM;
415*4882a593Smuzhiyun goto err;
416*4882a593Smuzhiyun }
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun syr82x->regmap = devm_regmap_init_i2c(i2c, &syr82x_regmap_config);
419*4882a593Smuzhiyun if (IS_ERR(syr82x->regmap)) {
420*4882a593Smuzhiyun dev_err(&i2c->dev, "regmap initialization failed\n");
421*4882a593Smuzhiyun return PTR_ERR(syr82x->regmap);
422*4882a593Smuzhiyun }
423*4882a593Smuzhiyun syr82x->i2c = i2c;
424*4882a593Smuzhiyun syr82x->dev = &i2c->dev;
425*4882a593Smuzhiyun i2c_set_clientdata(i2c, syr82x);
426*4882a593Smuzhiyun g_syr82x = syr82x;
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun mutex_init(&syr82x->io_lock);
429*4882a593Smuzhiyun ret = regmap_read(syr82x->regmap, SYR82X_ID1_REG, &val);
430*4882a593Smuzhiyun if ((ret < 0) || (val == 0xff) || (val == 0)) {
431*4882a593Smuzhiyun dev_err(&i2c->dev, "The device is not syr82x\n");
432*4882a593Smuzhiyun goto err;
433*4882a593Smuzhiyun }
434*4882a593Smuzhiyun ret = regmap_update_bits(syr82x->regmap,
435*4882a593Smuzhiyun SYR82X_CONTR_REG1,
436*4882a593Smuzhiyun (1 << 6), (1 << 6));
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun if (syr82x->dev->of_node)
439*4882a593Smuzhiyun pdev = syr82x_parse_dt(syr82x);
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun if (pdev) {
442*4882a593Smuzhiyun syr82x->num_regulators = syr82x_NUM_REGULATORS;
443*4882a593Smuzhiyun syr82x->rdev = kcalloc(syr82x_NUM_REGULATORS,sizeof(struct regulator_dev *), GFP_KERNEL);
444*4882a593Smuzhiyun if (!syr82x->rdev) {
445*4882a593Smuzhiyun return -ENOMEM;
446*4882a593Smuzhiyun }
447*4882a593Smuzhiyun /* Instantiate the regulators */
448*4882a593Smuzhiyun reg_data = pdev->syr82x_init_data[0];
449*4882a593Smuzhiyun config.dev = syr82x->dev;
450*4882a593Smuzhiyun config.driver_data = syr82x;
451*4882a593Smuzhiyun if (syr82x->dev->of_node)
452*4882a593Smuzhiyun config.of_node = pdev->of_node[0];
453*4882a593Smuzhiyun if (reg_data && reg_data->constraints.name)
454*4882a593Smuzhiyun rail_name = reg_data->constraints.name;
455*4882a593Smuzhiyun else
456*4882a593Smuzhiyun rail_name = regulators[0].name;
457*4882a593Smuzhiyun reg_data->supply_regulator = rail_name;
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun config.init_data =reg_data;
460*4882a593Smuzhiyun sy_rdev = regulator_register(®ulators[0],&config);
461*4882a593Smuzhiyun if (IS_ERR(sy_rdev)) {
462*4882a593Smuzhiyun printk("failed to register regulator\n");
463*4882a593Smuzhiyun goto err;
464*4882a593Smuzhiyun }
465*4882a593Smuzhiyun syr82x->rdev[0] = sy_rdev;
466*4882a593Smuzhiyun }
467*4882a593Smuzhiyun return 0;
468*4882a593Smuzhiyun err:
469*4882a593Smuzhiyun return ret;
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun }
472*4882a593Smuzhiyun
syr82x_i2c_remove(struct i2c_client * i2c)473*4882a593Smuzhiyun static int syr82x_i2c_remove(struct i2c_client *i2c)
474*4882a593Smuzhiyun {
475*4882a593Smuzhiyun struct syr82x *syr82x = i2c_get_clientdata(i2c);
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun if (syr82x->rdev[0])
478*4882a593Smuzhiyun regulator_unregister(syr82x->rdev[0]);
479*4882a593Smuzhiyun i2c_set_clientdata(i2c, NULL);
480*4882a593Smuzhiyun return 0;
481*4882a593Smuzhiyun }
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun static const struct i2c_device_id syr82x_i2c_id[] = {
484*4882a593Smuzhiyun { "syr82x", 0 },
485*4882a593Smuzhiyun { }
486*4882a593Smuzhiyun };
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, syr82x_i2c_id);
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun static struct i2c_driver syr82x_i2c_driver = {
491*4882a593Smuzhiyun .driver = {
492*4882a593Smuzhiyun .name = "syr82x",
493*4882a593Smuzhiyun .owner = THIS_MODULE,
494*4882a593Smuzhiyun .of_match_table =of_match_ptr(syr82x_of_match),
495*4882a593Smuzhiyun },
496*4882a593Smuzhiyun .probe = syr82x_i2c_probe,
497*4882a593Smuzhiyun .remove = syr82x_i2c_remove,
498*4882a593Smuzhiyun .id_table = syr82x_i2c_id,
499*4882a593Smuzhiyun };
500*4882a593Smuzhiyun
syr82x_module_init(void)501*4882a593Smuzhiyun static int __init syr82x_module_init(void)
502*4882a593Smuzhiyun {
503*4882a593Smuzhiyun int ret;
504*4882a593Smuzhiyun ret = i2c_add_driver(&syr82x_i2c_driver);
505*4882a593Smuzhiyun if (ret != 0)
506*4882a593Smuzhiyun pr_err("Failed to register I2C driver: %d\n", ret);
507*4882a593Smuzhiyun return ret;
508*4882a593Smuzhiyun }
509*4882a593Smuzhiyun subsys_initcall_sync(syr82x_module_init);
510*4882a593Smuzhiyun
syr82x_module_exit(void)511*4882a593Smuzhiyun static void __exit syr82x_module_exit(void)
512*4882a593Smuzhiyun {
513*4882a593Smuzhiyun i2c_del_driver(&syr82x_i2c_driver);
514*4882a593Smuzhiyun }
515*4882a593Smuzhiyun module_exit(syr82x_module_exit);
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun MODULE_LICENSE("GPL");
518*4882a593Smuzhiyun MODULE_AUTHOR("zhangqing <zhangqing@rock-chips.com>");
519*4882a593Smuzhiyun MODULE_DESCRIPTION("syr82x PMIC driver");
520*4882a593Smuzhiyun
521