1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2021 Fuzhou Rockchip Electronics Co., Ltd
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun #include <linux/err.h>
6*4882a593Smuzhiyun #include <linux/gpio.h>
7*4882a593Smuzhiyun #include <linux/i2c.h>
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/of_device.h>
10*4882a593Smuzhiyun #include <linux/of_gpio.h>
11*4882a593Smuzhiyun #include <linux/param.h>
12*4882a593Smuzhiyun #include <linux/platform_device.h>
13*4882a593Smuzhiyun #include <linux/regmap.h>
14*4882a593Smuzhiyun #include <linux/regulator/driver.h>
15*4882a593Smuzhiyun #include <linux/regulator/machine.h>
16*4882a593Smuzhiyun #include <linux/regulator/of_regulator.h>
17*4882a593Smuzhiyun #include <linux/slab.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun /* Voltage setting */
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #define RK860X_VSEL0_A 0x00
22*4882a593Smuzhiyun #define RK860X_VSEL1_A 0x01
23*4882a593Smuzhiyun #define RK860X_VSEL0_B 0x06
24*4882a593Smuzhiyun #define RK860X_VSEL1_B 0x07
25*4882a593Smuzhiyun #define RK860X_MAX_SET 0x08
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun /* Control register */
28*4882a593Smuzhiyun #define RK860X_CONTROL 0x02
29*4882a593Smuzhiyun /* IC Type */
30*4882a593Smuzhiyun #define RK860X_ID1 0x03
31*4882a593Smuzhiyun /* IC mask version */
32*4882a593Smuzhiyun #define RK860X_ID2 0x04
33*4882a593Smuzhiyun /* Monitor register */
34*4882a593Smuzhiyun #define RK860X_MONITOR 0x05
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun /* VSEL bit definitions */
37*4882a593Smuzhiyun #define VSEL_BUCK_EN BIT(7)
38*4882a593Smuzhiyun #define VSEL_MODE BIT(6)
39*4882a593Smuzhiyun #define VSEL_A_NSEL_MASK 0x3F
40*4882a593Smuzhiyun #define VSEL_B_NSEL_MASK 0xff
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun /* Chip ID */
43*4882a593Smuzhiyun #define DIE_ID 0x0f
44*4882a593Smuzhiyun #define DIE_REV 0x0f
45*4882a593Smuzhiyun /* Control bit definitions */
46*4882a593Smuzhiyun #define CTL_OUTPUT_DISCHG BIT(7)
47*4882a593Smuzhiyun #define CTL_SLEW_MASK (0x7 << 4)
48*4882a593Smuzhiyun #define CTL_SLEW_SHIFT 4
49*4882a593Smuzhiyun #define CTL_RESET BIT(2)
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun #define RK860X_NVOLTAGES_64 64
52*4882a593Smuzhiyun #define RK860X_NVOLTAGES_160 160
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun /* IC Type */
55*4882a593Smuzhiyun enum {
56*4882a593Smuzhiyun RK860X_CHIP_ID_00 = 0,
57*4882a593Smuzhiyun RK860X_CHIP_ID_01,
58*4882a593Smuzhiyun RK860X_CHIP_ID_02,
59*4882a593Smuzhiyun RK860X_CHIP_ID_03,
60*4882a593Smuzhiyun };
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun struct rk860x_platform_data {
63*4882a593Smuzhiyun struct regulator_init_data *regulator;
64*4882a593Smuzhiyun unsigned int slew_rate;
65*4882a593Smuzhiyun /* Sleep VSEL ID */
66*4882a593Smuzhiyun unsigned int sleep_vsel_id;
67*4882a593Smuzhiyun int limit_volt;
68*4882a593Smuzhiyun struct gpio_desc *vsel_gpio;
69*4882a593Smuzhiyun };
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun struct rk860x_device_info {
72*4882a593Smuzhiyun struct regmap *regmap;
73*4882a593Smuzhiyun struct device *dev;
74*4882a593Smuzhiyun struct regulator_desc desc;
75*4882a593Smuzhiyun struct regulator_dev *rdev;
76*4882a593Smuzhiyun struct regulator_init_data *regulator;
77*4882a593Smuzhiyun /* IC Type and Rev */
78*4882a593Smuzhiyun int chip_id;
79*4882a593Smuzhiyun /* Voltage setting register */
80*4882a593Smuzhiyun unsigned int vol_reg;
81*4882a593Smuzhiyun unsigned int sleep_reg;
82*4882a593Smuzhiyun unsigned int en_reg;
83*4882a593Smuzhiyun unsigned int sleep_en_reg;
84*4882a593Smuzhiyun unsigned int mode_reg;
85*4882a593Smuzhiyun unsigned int vol_mask;
86*4882a593Smuzhiyun unsigned int mode_mask;
87*4882a593Smuzhiyun unsigned int slew_reg;
88*4882a593Smuzhiyun unsigned int slew_mask;
89*4882a593Smuzhiyun unsigned int slew_shift;
90*4882a593Smuzhiyun /* Voltage range and step(linear) */
91*4882a593Smuzhiyun unsigned int vsel_min;
92*4882a593Smuzhiyun unsigned int vsel_step;
93*4882a593Smuzhiyun unsigned int n_voltages;
94*4882a593Smuzhiyun /* Voltage slew rate limiting */
95*4882a593Smuzhiyun unsigned int slew_rate;
96*4882a593Smuzhiyun struct gpio_desc *vsel_gpio;
97*4882a593Smuzhiyun unsigned int sleep_vsel_id;
98*4882a593Smuzhiyun };
99*4882a593Smuzhiyun
rk860x_map_mode(unsigned int mode)100*4882a593Smuzhiyun static unsigned int rk860x_map_mode(unsigned int mode)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun return mode == REGULATOR_MODE_FAST ?
103*4882a593Smuzhiyun REGULATOR_MODE_FAST : REGULATOR_MODE_NORMAL;
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun
rk860x_get_voltage(struct regulator_dev * rdev)106*4882a593Smuzhiyun static int rk860x_get_voltage(struct regulator_dev *rdev)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun struct rk860x_device_info *di = rdev_get_drvdata(rdev);
109*4882a593Smuzhiyun unsigned int val;
110*4882a593Smuzhiyun int ret;
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun ret = regmap_read(di->regmap, RK860X_MAX_SET, &val);
113*4882a593Smuzhiyun if (ret < 0)
114*4882a593Smuzhiyun return ret;
115*4882a593Smuzhiyun ret = regulator_get_voltage_sel_regmap(rdev);
116*4882a593Smuzhiyun if (ret > val)
117*4882a593Smuzhiyun return val;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun return ret;
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun
rk860x_set_suspend_voltage(struct regulator_dev * rdev,int uV)122*4882a593Smuzhiyun static int rk860x_set_suspend_voltage(struct regulator_dev *rdev, int uV)
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun struct rk860x_device_info *di = rdev_get_drvdata(rdev);
125*4882a593Smuzhiyun int ret;
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun ret = regulator_map_voltage_linear(rdev, uV, uV);
128*4882a593Smuzhiyun if (ret < 0)
129*4882a593Smuzhiyun return ret;
130*4882a593Smuzhiyun ret = regmap_update_bits(di->regmap, di->sleep_reg,
131*4882a593Smuzhiyun di->vol_mask, ret);
132*4882a593Smuzhiyun if (ret < 0)
133*4882a593Smuzhiyun return ret;
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun return 0;
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
rk860x_set_suspend_enable(struct regulator_dev * rdev)138*4882a593Smuzhiyun static int rk860x_set_suspend_enable(struct regulator_dev *rdev)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun struct rk860x_device_info *di = rdev_get_drvdata(rdev);
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun return regmap_update_bits(di->regmap, di->sleep_en_reg,
143*4882a593Smuzhiyun VSEL_BUCK_EN, VSEL_BUCK_EN);
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun
rk860x_set_suspend_disable(struct regulator_dev * rdev)146*4882a593Smuzhiyun static int rk860x_set_suspend_disable(struct regulator_dev *rdev)
147*4882a593Smuzhiyun {
148*4882a593Smuzhiyun struct rk860x_device_info *di = rdev_get_drvdata(rdev);
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun return regmap_update_bits(di->regmap, di->sleep_en_reg,
151*4882a593Smuzhiyun VSEL_BUCK_EN, 0);
152*4882a593Smuzhiyun }
153*4882a593Smuzhiyun
rk860x_resume(struct regulator_dev * rdev)154*4882a593Smuzhiyun static int rk860x_resume(struct regulator_dev *rdev)
155*4882a593Smuzhiyun {
156*4882a593Smuzhiyun int ret;
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun if (!rdev->constraints->state_mem.changeable)
159*4882a593Smuzhiyun return 0;
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun ret = rk860x_set_suspend_enable(rdev);
162*4882a593Smuzhiyun if (ret)
163*4882a593Smuzhiyun return ret;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun return regulator_suspend_enable(rdev, PM_SUSPEND_MEM);
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
rk860x_set_enable(struct regulator_dev * rdev)168*4882a593Smuzhiyun static int rk860x_set_enable(struct regulator_dev *rdev)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun struct rk860x_device_info *di = rdev_get_drvdata(rdev);
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun if (di->vsel_gpio) {
173*4882a593Smuzhiyun gpiod_set_raw_value(di->vsel_gpio, !di->sleep_vsel_id);
174*4882a593Smuzhiyun return 0;
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun return regmap_update_bits(di->regmap, di->en_reg,
178*4882a593Smuzhiyun VSEL_BUCK_EN, VSEL_BUCK_EN);
179*4882a593Smuzhiyun }
180*4882a593Smuzhiyun
rk860x_set_disable(struct regulator_dev * rdev)181*4882a593Smuzhiyun static int rk860x_set_disable(struct regulator_dev *rdev)
182*4882a593Smuzhiyun {
183*4882a593Smuzhiyun struct rk860x_device_info *di = rdev_get_drvdata(rdev);
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun if (di->vsel_gpio) {
186*4882a593Smuzhiyun gpiod_set_raw_value(di->vsel_gpio, di->sleep_vsel_id);
187*4882a593Smuzhiyun return 0;
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun return regmap_update_bits(di->regmap, di->en_reg,
191*4882a593Smuzhiyun VSEL_BUCK_EN, 0);
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun
rk860x_is_enabled(struct regulator_dev * rdev)194*4882a593Smuzhiyun static int rk860x_is_enabled(struct regulator_dev *rdev)
195*4882a593Smuzhiyun {
196*4882a593Smuzhiyun struct rk860x_device_info *di = rdev_get_drvdata(rdev);
197*4882a593Smuzhiyun unsigned int val;
198*4882a593Smuzhiyun int ret = 0;
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun if (di->vsel_gpio) {
201*4882a593Smuzhiyun if (di->sleep_vsel_id)
202*4882a593Smuzhiyun return !gpiod_get_raw_value(di->vsel_gpio);
203*4882a593Smuzhiyun else
204*4882a593Smuzhiyun return gpiod_get_raw_value(di->vsel_gpio);
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun ret = regmap_read(di->regmap, di->en_reg, &val);
208*4882a593Smuzhiyun if (ret < 0)
209*4882a593Smuzhiyun return ret;
210*4882a593Smuzhiyun if (val & VSEL_BUCK_EN)
211*4882a593Smuzhiyun return 1;
212*4882a593Smuzhiyun else
213*4882a593Smuzhiyun return 0;
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun
rk860x_set_mode(struct regulator_dev * rdev,unsigned int mode)216*4882a593Smuzhiyun static int rk860x_set_mode(struct regulator_dev *rdev, unsigned int mode)
217*4882a593Smuzhiyun {
218*4882a593Smuzhiyun struct rk860x_device_info *di = rdev_get_drvdata(rdev);
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun switch (mode) {
221*4882a593Smuzhiyun case REGULATOR_MODE_FAST:
222*4882a593Smuzhiyun regmap_update_bits(di->regmap, di->mode_reg,
223*4882a593Smuzhiyun di->mode_mask, di->mode_mask);
224*4882a593Smuzhiyun break;
225*4882a593Smuzhiyun case REGULATOR_MODE_NORMAL:
226*4882a593Smuzhiyun regmap_update_bits(di->regmap, di->mode_reg, di->mode_mask, 0);
227*4882a593Smuzhiyun break;
228*4882a593Smuzhiyun default:
229*4882a593Smuzhiyun return -EINVAL;
230*4882a593Smuzhiyun }
231*4882a593Smuzhiyun return 0;
232*4882a593Smuzhiyun }
233*4882a593Smuzhiyun
rk860x_get_mode(struct regulator_dev * rdev)234*4882a593Smuzhiyun static unsigned int rk860x_get_mode(struct regulator_dev *rdev)
235*4882a593Smuzhiyun {
236*4882a593Smuzhiyun struct rk860x_device_info *di = rdev_get_drvdata(rdev);
237*4882a593Smuzhiyun unsigned int val;
238*4882a593Smuzhiyun int ret = 0;
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun ret = regmap_read(di->regmap, di->mode_reg, &val);
241*4882a593Smuzhiyun if (ret < 0)
242*4882a593Smuzhiyun return ret;
243*4882a593Smuzhiyun if (val & di->mode_mask)
244*4882a593Smuzhiyun return REGULATOR_MODE_FAST;
245*4882a593Smuzhiyun else
246*4882a593Smuzhiyun return REGULATOR_MODE_NORMAL;
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun static const int slew_rates[] = {
250*4882a593Smuzhiyun 64000,
251*4882a593Smuzhiyun 32000,
252*4882a593Smuzhiyun 16000,
253*4882a593Smuzhiyun 8000,
254*4882a593Smuzhiyun 4000,
255*4882a593Smuzhiyun 2000,
256*4882a593Smuzhiyun 1000,
257*4882a593Smuzhiyun 500,
258*4882a593Smuzhiyun };
259*4882a593Smuzhiyun
rk860x_set_ramp(struct regulator_dev * rdev,int ramp)260*4882a593Smuzhiyun static int rk860x_set_ramp(struct regulator_dev *rdev, int ramp)
261*4882a593Smuzhiyun {
262*4882a593Smuzhiyun struct rk860x_device_info *di = rdev_get_drvdata(rdev);
263*4882a593Smuzhiyun int regval = -1, i;
264*4882a593Smuzhiyun const int *slew_rate_t;
265*4882a593Smuzhiyun int slew_rate_n;
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun slew_rate_t = slew_rates;
268*4882a593Smuzhiyun slew_rate_n = ARRAY_SIZE(slew_rates);
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun for (i = 0; i < slew_rate_n; i++) {
271*4882a593Smuzhiyun if (ramp <= slew_rate_t[i])
272*4882a593Smuzhiyun regval = i;
273*4882a593Smuzhiyun else
274*4882a593Smuzhiyun break;
275*4882a593Smuzhiyun }
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun if (regval < 0) {
278*4882a593Smuzhiyun dev_err(di->dev, "unsupported ramp value %d\n", ramp);
279*4882a593Smuzhiyun return -EINVAL;
280*4882a593Smuzhiyun }
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun return regmap_update_bits(di->regmap, di->slew_reg,
283*4882a593Smuzhiyun di->slew_mask, regval << di->slew_shift);
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun static const struct regulator_ops rk860x_regulator_ops = {
287*4882a593Smuzhiyun .set_voltage_sel = regulator_set_voltage_sel_regmap,
288*4882a593Smuzhiyun .get_voltage_sel = rk860x_get_voltage,
289*4882a593Smuzhiyun .set_voltage_time_sel = regulator_set_voltage_time_sel,
290*4882a593Smuzhiyun .map_voltage = regulator_map_voltage_linear,
291*4882a593Smuzhiyun .list_voltage = regulator_list_voltage_linear,
292*4882a593Smuzhiyun .set_suspend_voltage = rk860x_set_suspend_voltage,
293*4882a593Smuzhiyun .enable = rk860x_set_enable,
294*4882a593Smuzhiyun .disable = rk860x_set_disable,
295*4882a593Smuzhiyun .is_enabled = rk860x_is_enabled,
296*4882a593Smuzhiyun .set_mode = rk860x_set_mode,
297*4882a593Smuzhiyun .get_mode = rk860x_get_mode,
298*4882a593Smuzhiyun .set_ramp_delay = rk860x_set_ramp,
299*4882a593Smuzhiyun .set_suspend_enable = rk860x_set_suspend_enable,
300*4882a593Smuzhiyun .set_suspend_disable = rk860x_set_suspend_disable,
301*4882a593Smuzhiyun .resume = rk860x_resume,
302*4882a593Smuzhiyun };
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun /* For 00,01 options:
305*4882a593Smuzhiyun * VOUT = 0.7125V + NSELx * 12.5mV, from 0.7125 to 1.5V.
306*4882a593Smuzhiyun * For 02,03 options:
307*4882a593Smuzhiyun * VOUT = 0.5V + NSELx * 6.25mV, from 0.5 to 1.5V.
308*4882a593Smuzhiyun */
rk860x_device_setup(struct rk860x_device_info * di,struct rk860x_platform_data * pdata)309*4882a593Smuzhiyun static int rk860x_device_setup(struct rk860x_device_info *di,
310*4882a593Smuzhiyun struct rk860x_platform_data *pdata)
311*4882a593Smuzhiyun {
312*4882a593Smuzhiyun int ret = 0;
313*4882a593Smuzhiyun u32 val = 0;
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun switch (di->chip_id) {
316*4882a593Smuzhiyun case RK860X_CHIP_ID_00:
317*4882a593Smuzhiyun case RK860X_CHIP_ID_01:
318*4882a593Smuzhiyun di->vsel_min = 712500;
319*4882a593Smuzhiyun di->vsel_step = 12500;
320*4882a593Smuzhiyun di->n_voltages = RK860X_NVOLTAGES_64;
321*4882a593Smuzhiyun di->vol_mask = VSEL_A_NSEL_MASK;
322*4882a593Smuzhiyun if (di->sleep_vsel_id) {
323*4882a593Smuzhiyun di->sleep_reg = RK860X_VSEL1_A;
324*4882a593Smuzhiyun di->vol_reg = RK860X_VSEL0_A;
325*4882a593Smuzhiyun di->mode_reg = RK860X_VSEL0_A;
326*4882a593Smuzhiyun di->en_reg = RK860X_VSEL0_A;
327*4882a593Smuzhiyun di->sleep_en_reg = RK860X_VSEL1_A;
328*4882a593Smuzhiyun } else {
329*4882a593Smuzhiyun di->sleep_reg = RK860X_VSEL0_A;
330*4882a593Smuzhiyun di->vol_reg = RK860X_VSEL1_A;
331*4882a593Smuzhiyun di->mode_reg = RK860X_VSEL1_A;
332*4882a593Smuzhiyun di->en_reg = RK860X_VSEL1_A;
333*4882a593Smuzhiyun di->sleep_en_reg = RK860X_VSEL0_A;
334*4882a593Smuzhiyun }
335*4882a593Smuzhiyun break;
336*4882a593Smuzhiyun case RK860X_CHIP_ID_02:
337*4882a593Smuzhiyun case RK860X_CHIP_ID_03:
338*4882a593Smuzhiyun di->vsel_min = 500000;
339*4882a593Smuzhiyun di->vsel_step = 6250;
340*4882a593Smuzhiyun di->n_voltages = RK860X_NVOLTAGES_160;
341*4882a593Smuzhiyun di->vol_mask = VSEL_B_NSEL_MASK;
342*4882a593Smuzhiyun if (di->sleep_vsel_id) {
343*4882a593Smuzhiyun di->sleep_reg = RK860X_VSEL1_B;
344*4882a593Smuzhiyun di->vol_reg = RK860X_VSEL0_B;
345*4882a593Smuzhiyun di->mode_reg = RK860X_VSEL0_A;
346*4882a593Smuzhiyun di->en_reg = RK860X_VSEL0_A;
347*4882a593Smuzhiyun di->sleep_en_reg = RK860X_VSEL1_A;
348*4882a593Smuzhiyun } else {
349*4882a593Smuzhiyun di->sleep_reg = RK860X_VSEL0_B;
350*4882a593Smuzhiyun di->vol_reg = RK860X_VSEL1_B;
351*4882a593Smuzhiyun di->mode_reg = RK860X_VSEL1_A;
352*4882a593Smuzhiyun di->en_reg = RK860X_VSEL1_A;
353*4882a593Smuzhiyun di->sleep_en_reg = RK860X_VSEL0_A;
354*4882a593Smuzhiyun }
355*4882a593Smuzhiyun break;
356*4882a593Smuzhiyun default:
357*4882a593Smuzhiyun dev_err(di->dev, "Chip ID %d not supported!\n", di->chip_id);
358*4882a593Smuzhiyun return -EINVAL;
359*4882a593Smuzhiyun }
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun di->mode_mask = VSEL_MODE;
362*4882a593Smuzhiyun di->slew_reg = RK860X_CONTROL;
363*4882a593Smuzhiyun di->slew_mask = CTL_SLEW_MASK;
364*4882a593Smuzhiyun di->slew_shift = CTL_SLEW_SHIFT;
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun if (pdata->limit_volt) {
367*4882a593Smuzhiyun if (pdata->limit_volt < di->vsel_min ||
368*4882a593Smuzhiyun pdata->limit_volt > 1500000)
369*4882a593Smuzhiyun pdata->limit_volt = 1500000;
370*4882a593Smuzhiyun val = (pdata->limit_volt - di->vsel_min) / di->vsel_step;
371*4882a593Smuzhiyun ret = regmap_write(di->regmap, RK860X_MAX_SET, val);
372*4882a593Smuzhiyun if (ret < 0) {
373*4882a593Smuzhiyun dev_err(di->dev, "Failed to set limit voltage!\n");
374*4882a593Smuzhiyun return ret;
375*4882a593Smuzhiyun }
376*4882a593Smuzhiyun }
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun return ret;
379*4882a593Smuzhiyun }
380*4882a593Smuzhiyun
rk860x_regulator_register(struct rk860x_device_info * di,struct regulator_config * config)381*4882a593Smuzhiyun static int rk860x_regulator_register(struct rk860x_device_info *di,
382*4882a593Smuzhiyun struct regulator_config *config)
383*4882a593Smuzhiyun {
384*4882a593Smuzhiyun struct regulator_desc *rdesc = &di->desc;
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun rdesc->name = "rk860x-reg";
387*4882a593Smuzhiyun rdesc->supply_name = "vin";
388*4882a593Smuzhiyun rdesc->ops = &rk860x_regulator_ops;
389*4882a593Smuzhiyun rdesc->type = REGULATOR_VOLTAGE;
390*4882a593Smuzhiyun rdesc->n_voltages = di->n_voltages;
391*4882a593Smuzhiyun rdesc->enable_reg = di->en_reg;
392*4882a593Smuzhiyun rdesc->enable_mask = VSEL_BUCK_EN;
393*4882a593Smuzhiyun rdesc->min_uV = di->vsel_min;
394*4882a593Smuzhiyun rdesc->uV_step = di->vsel_step;
395*4882a593Smuzhiyun rdesc->vsel_reg = di->vol_reg;
396*4882a593Smuzhiyun rdesc->vsel_mask = di->vol_mask;
397*4882a593Smuzhiyun rdesc->owner = THIS_MODULE;
398*4882a593Smuzhiyun rdesc->enable_time = 400;
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun di->rdev = devm_regulator_register(di->dev, &di->desc, config);
401*4882a593Smuzhiyun return PTR_ERR_OR_ZERO(di->rdev);
402*4882a593Smuzhiyun }
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun static const struct regmap_config rk860x_regmap_config = {
405*4882a593Smuzhiyun .reg_bits = 8,
406*4882a593Smuzhiyun .val_bits = 8,
407*4882a593Smuzhiyun };
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun static struct rk860x_platform_data *
rk860x_parse_dt(struct device * dev,struct device_node * np,const struct regulator_desc * desc)410*4882a593Smuzhiyun rk860x_parse_dt(struct device *dev, struct device_node *np,
411*4882a593Smuzhiyun const struct regulator_desc *desc)
412*4882a593Smuzhiyun {
413*4882a593Smuzhiyun struct rk860x_platform_data *pdata;
414*4882a593Smuzhiyun int ret, flag, limit_volt;
415*4882a593Smuzhiyun u32 tmp;
416*4882a593Smuzhiyun
417*4882a593Smuzhiyun pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
418*4882a593Smuzhiyun if (!pdata)
419*4882a593Smuzhiyun return NULL;
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun pdata->regulator = of_get_regulator_init_data(dev, np, desc);
422*4882a593Smuzhiyun pdata->regulator->constraints.initial_state = PM_SUSPEND_MEM;
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun if (!(of_property_read_u32(np, "limit-microvolt", &limit_volt)))
425*4882a593Smuzhiyun pdata->limit_volt = limit_volt;
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun ret = of_property_read_u32(np, "rockchip,suspend-voltage-selector",
428*4882a593Smuzhiyun &tmp);
429*4882a593Smuzhiyun if (!ret)
430*4882a593Smuzhiyun pdata->sleep_vsel_id = tmp;
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun if (pdata->sleep_vsel_id)
433*4882a593Smuzhiyun flag = GPIOD_OUT_LOW;
434*4882a593Smuzhiyun else
435*4882a593Smuzhiyun flag = GPIOD_OUT_HIGH;
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun pdata->vsel_gpio = devm_gpiod_get_index_optional(dev, "vsel", 0, flag);
438*4882a593Smuzhiyun if (IS_ERR(pdata->vsel_gpio)) {
439*4882a593Smuzhiyun ret = PTR_ERR(pdata->vsel_gpio);
440*4882a593Smuzhiyun dev_err(dev, "failed to get vesl gpio (%d)\n", ret);
441*4882a593Smuzhiyun pdata->vsel_gpio = NULL;
442*4882a593Smuzhiyun }
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun return pdata;
445*4882a593Smuzhiyun }
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun static const struct of_device_id rk860x_dt_ids[] = {
448*4882a593Smuzhiyun {
449*4882a593Smuzhiyun .compatible = "rockchip,rk8600",
450*4882a593Smuzhiyun .data = (void *)RK860X_CHIP_ID_00
451*4882a593Smuzhiyun },
452*4882a593Smuzhiyun {
453*4882a593Smuzhiyun .compatible = "rockchip,rk8601",
454*4882a593Smuzhiyun .data = (void *)RK860X_CHIP_ID_01
455*4882a593Smuzhiyun },
456*4882a593Smuzhiyun {
457*4882a593Smuzhiyun .compatible = "rockchip,rk8602",
458*4882a593Smuzhiyun .data = (void *)RK860X_CHIP_ID_02
459*4882a593Smuzhiyun },
460*4882a593Smuzhiyun {
461*4882a593Smuzhiyun .compatible = "rockchip,rk8603",
462*4882a593Smuzhiyun .data = (void *)RK860X_CHIP_ID_03
463*4882a593Smuzhiyun },
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun { }
466*4882a593Smuzhiyun };
467*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, rk860x_dt_ids);
468*4882a593Smuzhiyun
rk860x_regulator_probe(struct i2c_client * client,const struct i2c_device_id * id)469*4882a593Smuzhiyun static int rk860x_regulator_probe(struct i2c_client *client,
470*4882a593Smuzhiyun const struct i2c_device_id *id)
471*4882a593Smuzhiyun {
472*4882a593Smuzhiyun struct device_node *np = client->dev.of_node;
473*4882a593Smuzhiyun struct rk860x_device_info *di;
474*4882a593Smuzhiyun struct rk860x_platform_data *pdata;
475*4882a593Smuzhiyun struct regulator_config config = { };
476*4882a593Smuzhiyun unsigned int val;
477*4882a593Smuzhiyun int ret;
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun di = devm_kzalloc(&client->dev, sizeof(*di), GFP_KERNEL);
480*4882a593Smuzhiyun if (!di)
481*4882a593Smuzhiyun return -ENOMEM;
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun di->desc.of_map_mode = rk860x_map_mode;
484*4882a593Smuzhiyun
485*4882a593Smuzhiyun pdata = dev_get_platdata(&client->dev);
486*4882a593Smuzhiyun if (!pdata)
487*4882a593Smuzhiyun pdata = rk860x_parse_dt(&client->dev, np, &di->desc);
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun if (!pdata || !pdata->regulator) {
490*4882a593Smuzhiyun dev_err(&client->dev, "Platform data not found!\n");
491*4882a593Smuzhiyun return -ENODEV;
492*4882a593Smuzhiyun }
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun di->vsel_gpio = pdata->vsel_gpio;
495*4882a593Smuzhiyun di->sleep_vsel_id = pdata->sleep_vsel_id;
496*4882a593Smuzhiyun
497*4882a593Smuzhiyun di->regulator = pdata->regulator;
498*4882a593Smuzhiyun if (client->dev.of_node) {
499*4882a593Smuzhiyun di->chip_id =
500*4882a593Smuzhiyun (unsigned long)of_device_get_match_data(&client->dev);
501*4882a593Smuzhiyun } else {
502*4882a593Smuzhiyun /* if no ramp constraint set, get the pdata ramp_delay */
503*4882a593Smuzhiyun if (!di->regulator->constraints.ramp_delay) {
504*4882a593Smuzhiyun int slew_idx = (pdata->slew_rate & 0x7)
505*4882a593Smuzhiyun ? pdata->slew_rate : 0;
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun di->regulator->constraints.ramp_delay =
508*4882a593Smuzhiyun slew_rates[slew_idx];
509*4882a593Smuzhiyun }
510*4882a593Smuzhiyun di->chip_id = id->driver_data;
511*4882a593Smuzhiyun }
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun di->regmap = devm_regmap_init_i2c(client, &rk860x_regmap_config);
514*4882a593Smuzhiyun if (IS_ERR(di->regmap)) {
515*4882a593Smuzhiyun dev_err(&client->dev, "Failed to allocate regmap!\n");
516*4882a593Smuzhiyun return PTR_ERR(di->regmap);
517*4882a593Smuzhiyun }
518*4882a593Smuzhiyun di->dev = &client->dev;
519*4882a593Smuzhiyun i2c_set_clientdata(client, di);
520*4882a593Smuzhiyun /* Get chip ID */
521*4882a593Smuzhiyun ret = regmap_read(di->regmap, RK860X_ID1, &val);
522*4882a593Smuzhiyun if (ret < 0) {
523*4882a593Smuzhiyun dev_err(&client->dev, "Failed to get chip ID!\n");
524*4882a593Smuzhiyun return ret;
525*4882a593Smuzhiyun }
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun switch (di->chip_id) {
528*4882a593Smuzhiyun case RK860X_CHIP_ID_00:
529*4882a593Smuzhiyun case RK860X_CHIP_ID_01:
530*4882a593Smuzhiyun if ((val & DIE_ID) != 0x8) {
531*4882a593Smuzhiyun dev_err(&client->dev, "Failed to match chip ID!\n");
532*4882a593Smuzhiyun return -EINVAL;
533*4882a593Smuzhiyun }
534*4882a593Smuzhiyun break;
535*4882a593Smuzhiyun case RK860X_CHIP_ID_02:
536*4882a593Smuzhiyun case RK860X_CHIP_ID_03:
537*4882a593Smuzhiyun if ((val & DIE_ID) != 0xa) {
538*4882a593Smuzhiyun dev_err(&client->dev, "Failed to match chip ID!\n");
539*4882a593Smuzhiyun return -EINVAL;
540*4882a593Smuzhiyun }
541*4882a593Smuzhiyun break;
542*4882a593Smuzhiyun default:
543*4882a593Smuzhiyun return -EINVAL;
544*4882a593Smuzhiyun }
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun /* Device init */
547*4882a593Smuzhiyun ret = rk860x_device_setup(di, pdata);
548*4882a593Smuzhiyun if (ret < 0) {
549*4882a593Smuzhiyun dev_err(&client->dev, "Failed to setup device!\n");
550*4882a593Smuzhiyun return ret;
551*4882a593Smuzhiyun }
552*4882a593Smuzhiyun /* Register regulator */
553*4882a593Smuzhiyun config.dev = di->dev;
554*4882a593Smuzhiyun config.init_data = di->regulator;
555*4882a593Smuzhiyun config.regmap = di->regmap;
556*4882a593Smuzhiyun config.driver_data = di;
557*4882a593Smuzhiyun config.of_node = np;
558*4882a593Smuzhiyun
559*4882a593Smuzhiyun ret = rk860x_regulator_register(di, &config);
560*4882a593Smuzhiyun if (ret < 0)
561*4882a593Smuzhiyun dev_err(&client->dev, "Failed to register regulator!\n");
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun return ret;
564*4882a593Smuzhiyun }
565*4882a593Smuzhiyun
rk860x_regulator_shutdown(struct i2c_client * client)566*4882a593Smuzhiyun static void rk860x_regulator_shutdown(struct i2c_client *client)
567*4882a593Smuzhiyun {
568*4882a593Smuzhiyun struct rk860x_device_info *di;
569*4882a593Smuzhiyun int ret;
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun di = i2c_get_clientdata(client);
572*4882a593Smuzhiyun
573*4882a593Smuzhiyun dev_info(di->dev, "rk860..... reset\n");
574*4882a593Smuzhiyun
575*4882a593Smuzhiyun ret = regmap_update_bits(di->regmap, di->slew_reg,
576*4882a593Smuzhiyun CTL_RESET, CTL_RESET);
577*4882a593Smuzhiyun
578*4882a593Smuzhiyun if (ret < 0)
579*4882a593Smuzhiyun dev_err(di->dev, "force rk860x_reset error! ret=%d\n", ret);
580*4882a593Smuzhiyun else
581*4882a593Smuzhiyun dev_info(di->dev, "force rk860x_reset ok!\n");
582*4882a593Smuzhiyun }
583*4882a593Smuzhiyun
584*4882a593Smuzhiyun static const struct i2c_device_id rk860x_id[] = {
585*4882a593Smuzhiyun { .name = "rk8600", .driver_data = RK860X_CHIP_ID_00 },
586*4882a593Smuzhiyun { .name = "rk8601", .driver_data = RK860X_CHIP_ID_01 },
587*4882a593Smuzhiyun { .name = "rk8602", .driver_data = RK860X_CHIP_ID_02 },
588*4882a593Smuzhiyun { .name = "rk8603", .driver_data = RK860X_CHIP_ID_03 },
589*4882a593Smuzhiyun {},
590*4882a593Smuzhiyun };
591*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, rk860x_id);
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun static struct i2c_driver rk860x_regulator_driver = {
594*4882a593Smuzhiyun .driver = {
595*4882a593Smuzhiyun .name = "rk860-regulator",
596*4882a593Smuzhiyun .of_match_table = of_match_ptr(rk860x_dt_ids),
597*4882a593Smuzhiyun },
598*4882a593Smuzhiyun .probe = rk860x_regulator_probe,
599*4882a593Smuzhiyun .shutdown = rk860x_regulator_shutdown,
600*4882a593Smuzhiyun .id_table = rk860x_id,
601*4882a593Smuzhiyun };
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun module_i2c_driver(rk860x_regulator_driver);
604*4882a593Smuzhiyun
605*4882a593Smuzhiyun MODULE_AUTHOR("Elaine Zhang <zhangqing@rock-chips.com>");
606*4882a593Smuzhiyun MODULE_DESCRIPTION("rk860x regulator driver");
607*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
608