1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun // Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun #define pr_fmt(fmt) "%s: " fmt, __func__
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <linux/err.h>
7*4882a593Smuzhiyun #include <linux/kernel.h>
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/of.h>
10*4882a593Smuzhiyun #include <linux/of_device.h>
11*4882a593Smuzhiyun #include <linux/platform_device.h>
12*4882a593Smuzhiyun #include <linux/slab.h>
13*4882a593Smuzhiyun #include <linux/string.h>
14*4882a593Smuzhiyun #include <linux/regulator/driver.h>
15*4882a593Smuzhiyun #include <linux/regulator/machine.h>
16*4882a593Smuzhiyun #include <linux/regulator/of_regulator.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #include <soc/qcom/cmd-db.h>
19*4882a593Smuzhiyun #include <soc/qcom/rpmh.h>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun /**
24*4882a593Smuzhiyun * enum rpmh_regulator_type - supported RPMh accelerator types
25*4882a593Smuzhiyun * @VRM: RPMh VRM accelerator which supports voting on enable, voltage,
26*4882a593Smuzhiyun * and mode of LDO, SMPS, and BOB type PMIC regulators.
27*4882a593Smuzhiyun * @XOB: RPMh XOB accelerator which supports voting on the enable state
28*4882a593Smuzhiyun * of PMIC regulators.
29*4882a593Smuzhiyun */
30*4882a593Smuzhiyun enum rpmh_regulator_type {
31*4882a593Smuzhiyun VRM,
32*4882a593Smuzhiyun XOB,
33*4882a593Smuzhiyun };
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #define RPMH_REGULATOR_REG_VRM_VOLTAGE 0x0
36*4882a593Smuzhiyun #define RPMH_REGULATOR_REG_ENABLE 0x4
37*4882a593Smuzhiyun #define RPMH_REGULATOR_REG_VRM_MODE 0x8
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun #define PMIC4_LDO_MODE_RETENTION 4
40*4882a593Smuzhiyun #define PMIC4_LDO_MODE_LPM 5
41*4882a593Smuzhiyun #define PMIC4_LDO_MODE_HPM 7
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun #define PMIC4_SMPS_MODE_RETENTION 4
44*4882a593Smuzhiyun #define PMIC4_SMPS_MODE_PFM 5
45*4882a593Smuzhiyun #define PMIC4_SMPS_MODE_AUTO 6
46*4882a593Smuzhiyun #define PMIC4_SMPS_MODE_PWM 7
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun #define PMIC4_BOB_MODE_PASS 0
49*4882a593Smuzhiyun #define PMIC4_BOB_MODE_PFM 1
50*4882a593Smuzhiyun #define PMIC4_BOB_MODE_AUTO 2
51*4882a593Smuzhiyun #define PMIC4_BOB_MODE_PWM 3
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun #define PMIC5_LDO_MODE_RETENTION 3
54*4882a593Smuzhiyun #define PMIC5_LDO_MODE_LPM 4
55*4882a593Smuzhiyun #define PMIC5_LDO_MODE_HPM 7
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun #define PMIC5_SMPS_MODE_RETENTION 3
58*4882a593Smuzhiyun #define PMIC5_SMPS_MODE_PFM 4
59*4882a593Smuzhiyun #define PMIC5_SMPS_MODE_AUTO 6
60*4882a593Smuzhiyun #define PMIC5_SMPS_MODE_PWM 7
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun #define PMIC5_BOB_MODE_PASS 2
63*4882a593Smuzhiyun #define PMIC5_BOB_MODE_PFM 4
64*4882a593Smuzhiyun #define PMIC5_BOB_MODE_AUTO 6
65*4882a593Smuzhiyun #define PMIC5_BOB_MODE_PWM 7
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun /**
68*4882a593Smuzhiyun * struct rpmh_vreg_hw_data - RPMh regulator hardware configurations
69*4882a593Smuzhiyun * @regulator_type: RPMh accelerator type used to manage this
70*4882a593Smuzhiyun * regulator
71*4882a593Smuzhiyun * @ops: Pointer to regulator ops callback structure
72*4882a593Smuzhiyun * @voltage_range: The single range of voltages supported by this
73*4882a593Smuzhiyun * PMIC regulator type
74*4882a593Smuzhiyun * @n_voltages: The number of unique voltage set points defined
75*4882a593Smuzhiyun * by voltage_range
76*4882a593Smuzhiyun * @hpm_min_load_uA: Minimum load current in microamps that requires
77*4882a593Smuzhiyun * high power mode (HPM) operation. This is used
78*4882a593Smuzhiyun * for LDO hardware type regulators only.
79*4882a593Smuzhiyun * @pmic_mode_map: Array indexed by regulator framework mode
80*4882a593Smuzhiyun * containing PMIC hardware modes. Must be large
81*4882a593Smuzhiyun * enough to index all framework modes supported
82*4882a593Smuzhiyun * by this regulator hardware type.
83*4882a593Smuzhiyun * @of_map_mode: Maps an RPMH_REGULATOR_MODE_* mode value defined
84*4882a593Smuzhiyun * in device tree to a regulator framework mode
85*4882a593Smuzhiyun */
86*4882a593Smuzhiyun struct rpmh_vreg_hw_data {
87*4882a593Smuzhiyun enum rpmh_regulator_type regulator_type;
88*4882a593Smuzhiyun const struct regulator_ops *ops;
89*4882a593Smuzhiyun const struct linear_range voltage_range;
90*4882a593Smuzhiyun int n_voltages;
91*4882a593Smuzhiyun int hpm_min_load_uA;
92*4882a593Smuzhiyun const int *pmic_mode_map;
93*4882a593Smuzhiyun unsigned int (*of_map_mode)(unsigned int mode);
94*4882a593Smuzhiyun };
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun /**
97*4882a593Smuzhiyun * struct rpmh_vreg - individual RPMh regulator data structure encapsulating a
98*4882a593Smuzhiyun * single regulator device
99*4882a593Smuzhiyun * @dev: Device pointer for the top-level PMIC RPMh
100*4882a593Smuzhiyun * regulator parent device. This is used as a
101*4882a593Smuzhiyun * handle in RPMh write requests.
102*4882a593Smuzhiyun * @addr: Base address of the regulator resource within
103*4882a593Smuzhiyun * an RPMh accelerator
104*4882a593Smuzhiyun * @rdesc: Regulator descriptor
105*4882a593Smuzhiyun * @hw_data: PMIC regulator configuration data for this RPMh
106*4882a593Smuzhiyun * regulator
107*4882a593Smuzhiyun * @always_wait_for_ack: Boolean flag indicating if a request must always
108*4882a593Smuzhiyun * wait for an ACK from RPMh before continuing even
109*4882a593Smuzhiyun * if it corresponds to a strictly lower power
110*4882a593Smuzhiyun * state (e.g. enabled --> disabled).
111*4882a593Smuzhiyun * @enabled: Flag indicating if the regulator is enabled or
112*4882a593Smuzhiyun * not
113*4882a593Smuzhiyun * @bypassed: Boolean indicating if the regulator is in
114*4882a593Smuzhiyun * bypass (pass-through) mode or not. This is
115*4882a593Smuzhiyun * only used by BOB rpmh-regulator resources.
116*4882a593Smuzhiyun * @voltage_selector: Selector used for get_voltage_sel() and
117*4882a593Smuzhiyun * set_voltage_sel() callbacks
118*4882a593Smuzhiyun * @mode: RPMh VRM regulator current framework mode
119*4882a593Smuzhiyun */
120*4882a593Smuzhiyun struct rpmh_vreg {
121*4882a593Smuzhiyun struct device *dev;
122*4882a593Smuzhiyun u32 addr;
123*4882a593Smuzhiyun struct regulator_desc rdesc;
124*4882a593Smuzhiyun const struct rpmh_vreg_hw_data *hw_data;
125*4882a593Smuzhiyun bool always_wait_for_ack;
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun int enabled;
128*4882a593Smuzhiyun bool bypassed;
129*4882a593Smuzhiyun int voltage_selector;
130*4882a593Smuzhiyun unsigned int mode;
131*4882a593Smuzhiyun };
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun /**
134*4882a593Smuzhiyun * struct rpmh_vreg_init_data - initialization data for an RPMh regulator
135*4882a593Smuzhiyun * @name: Name for the regulator which also corresponds
136*4882a593Smuzhiyun * to the device tree subnode name of the regulator
137*4882a593Smuzhiyun * @resource_name: RPMh regulator resource name format string.
138*4882a593Smuzhiyun * This must include exactly one field: '%s' which
139*4882a593Smuzhiyun * is filled at run-time with the PMIC ID provided
140*4882a593Smuzhiyun * by device tree property qcom,pmic-id. Example:
141*4882a593Smuzhiyun * "ldo%s1" for RPMh resource "ldoa1".
142*4882a593Smuzhiyun * @supply_name: Parent supply regulator name
143*4882a593Smuzhiyun * @hw_data: Configuration data for this PMIC regulator type
144*4882a593Smuzhiyun */
145*4882a593Smuzhiyun struct rpmh_vreg_init_data {
146*4882a593Smuzhiyun const char *name;
147*4882a593Smuzhiyun const char *resource_name;
148*4882a593Smuzhiyun const char *supply_name;
149*4882a593Smuzhiyun const struct rpmh_vreg_hw_data *hw_data;
150*4882a593Smuzhiyun };
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun /**
153*4882a593Smuzhiyun * rpmh_regulator_send_request() - send the request to RPMh
154*4882a593Smuzhiyun * @vreg: Pointer to the RPMh regulator
155*4882a593Smuzhiyun * @cmd: Pointer to the RPMh command to send
156*4882a593Smuzhiyun * @wait_for_ack: Boolean indicating if execution must wait until the
157*4882a593Smuzhiyun * request has been acknowledged as complete
158*4882a593Smuzhiyun *
159*4882a593Smuzhiyun * Return: 0 on success, errno on failure
160*4882a593Smuzhiyun */
rpmh_regulator_send_request(struct rpmh_vreg * vreg,struct tcs_cmd * cmd,bool wait_for_ack)161*4882a593Smuzhiyun static int rpmh_regulator_send_request(struct rpmh_vreg *vreg,
162*4882a593Smuzhiyun struct tcs_cmd *cmd, bool wait_for_ack)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun int ret;
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun if (wait_for_ack || vreg->always_wait_for_ack)
167*4882a593Smuzhiyun ret = rpmh_write(vreg->dev, RPMH_ACTIVE_ONLY_STATE, cmd, 1);
168*4882a593Smuzhiyun else
169*4882a593Smuzhiyun ret = rpmh_write_async(vreg->dev, RPMH_ACTIVE_ONLY_STATE, cmd,
170*4882a593Smuzhiyun 1);
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun return ret;
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun
_rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev * rdev,unsigned int selector,bool wait_for_ack)175*4882a593Smuzhiyun static int _rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev *rdev,
176*4882a593Smuzhiyun unsigned int selector, bool wait_for_ack)
177*4882a593Smuzhiyun {
178*4882a593Smuzhiyun struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
179*4882a593Smuzhiyun struct tcs_cmd cmd = {
180*4882a593Smuzhiyun .addr = vreg->addr + RPMH_REGULATOR_REG_VRM_VOLTAGE,
181*4882a593Smuzhiyun };
182*4882a593Smuzhiyun int ret;
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun /* VRM voltage control register is set with voltage in millivolts. */
185*4882a593Smuzhiyun cmd.data = DIV_ROUND_UP(regulator_list_voltage_linear_range(rdev,
186*4882a593Smuzhiyun selector), 1000);
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun ret = rpmh_regulator_send_request(vreg, &cmd, wait_for_ack);
189*4882a593Smuzhiyun if (!ret)
190*4882a593Smuzhiyun vreg->voltage_selector = selector;
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun return ret;
193*4882a593Smuzhiyun }
194*4882a593Smuzhiyun
rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev * rdev,unsigned int selector)195*4882a593Smuzhiyun static int rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev *rdev,
196*4882a593Smuzhiyun unsigned int selector)
197*4882a593Smuzhiyun {
198*4882a593Smuzhiyun struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun if (vreg->enabled == -EINVAL) {
201*4882a593Smuzhiyun /*
202*4882a593Smuzhiyun * Cache the voltage and send it later when the regulator is
203*4882a593Smuzhiyun * enabled or disabled.
204*4882a593Smuzhiyun */
205*4882a593Smuzhiyun vreg->voltage_selector = selector;
206*4882a593Smuzhiyun return 0;
207*4882a593Smuzhiyun }
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun return _rpmh_regulator_vrm_set_voltage_sel(rdev, selector,
210*4882a593Smuzhiyun selector > vreg->voltage_selector);
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun
rpmh_regulator_vrm_get_voltage_sel(struct regulator_dev * rdev)213*4882a593Smuzhiyun static int rpmh_regulator_vrm_get_voltage_sel(struct regulator_dev *rdev)
214*4882a593Smuzhiyun {
215*4882a593Smuzhiyun struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun return vreg->voltage_selector;
218*4882a593Smuzhiyun }
219*4882a593Smuzhiyun
rpmh_regulator_is_enabled(struct regulator_dev * rdev)220*4882a593Smuzhiyun static int rpmh_regulator_is_enabled(struct regulator_dev *rdev)
221*4882a593Smuzhiyun {
222*4882a593Smuzhiyun struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun return vreg->enabled;
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun
rpmh_regulator_set_enable_state(struct regulator_dev * rdev,bool enable)227*4882a593Smuzhiyun static int rpmh_regulator_set_enable_state(struct regulator_dev *rdev,
228*4882a593Smuzhiyun bool enable)
229*4882a593Smuzhiyun {
230*4882a593Smuzhiyun struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
231*4882a593Smuzhiyun struct tcs_cmd cmd = {
232*4882a593Smuzhiyun .addr = vreg->addr + RPMH_REGULATOR_REG_ENABLE,
233*4882a593Smuzhiyun .data = enable,
234*4882a593Smuzhiyun };
235*4882a593Smuzhiyun int ret;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun if (vreg->enabled == -EINVAL &&
238*4882a593Smuzhiyun vreg->voltage_selector != -ENOTRECOVERABLE) {
239*4882a593Smuzhiyun ret = _rpmh_regulator_vrm_set_voltage_sel(rdev,
240*4882a593Smuzhiyun vreg->voltage_selector, true);
241*4882a593Smuzhiyun if (ret < 0)
242*4882a593Smuzhiyun return ret;
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun ret = rpmh_regulator_send_request(vreg, &cmd, enable);
246*4882a593Smuzhiyun if (!ret)
247*4882a593Smuzhiyun vreg->enabled = enable;
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun return ret;
250*4882a593Smuzhiyun }
251*4882a593Smuzhiyun
rpmh_regulator_enable(struct regulator_dev * rdev)252*4882a593Smuzhiyun static int rpmh_regulator_enable(struct regulator_dev *rdev)
253*4882a593Smuzhiyun {
254*4882a593Smuzhiyun return rpmh_regulator_set_enable_state(rdev, true);
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun
rpmh_regulator_disable(struct regulator_dev * rdev)257*4882a593Smuzhiyun static int rpmh_regulator_disable(struct regulator_dev *rdev)
258*4882a593Smuzhiyun {
259*4882a593Smuzhiyun return rpmh_regulator_set_enable_state(rdev, false);
260*4882a593Smuzhiyun }
261*4882a593Smuzhiyun
rpmh_regulator_vrm_set_mode_bypass(struct rpmh_vreg * vreg,unsigned int mode,bool bypassed)262*4882a593Smuzhiyun static int rpmh_regulator_vrm_set_mode_bypass(struct rpmh_vreg *vreg,
263*4882a593Smuzhiyun unsigned int mode, bool bypassed)
264*4882a593Smuzhiyun {
265*4882a593Smuzhiyun struct tcs_cmd cmd = {
266*4882a593Smuzhiyun .addr = vreg->addr + RPMH_REGULATOR_REG_VRM_MODE,
267*4882a593Smuzhiyun };
268*4882a593Smuzhiyun int pmic_mode;
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun if (mode > REGULATOR_MODE_STANDBY)
271*4882a593Smuzhiyun return -EINVAL;
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun pmic_mode = vreg->hw_data->pmic_mode_map[mode];
274*4882a593Smuzhiyun if (pmic_mode < 0)
275*4882a593Smuzhiyun return pmic_mode;
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun if (bypassed)
278*4882a593Smuzhiyun cmd.data = PMIC4_BOB_MODE_PASS;
279*4882a593Smuzhiyun else
280*4882a593Smuzhiyun cmd.data = pmic_mode;
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun return rpmh_regulator_send_request(vreg, &cmd, true);
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun
rpmh_regulator_vrm_set_mode(struct regulator_dev * rdev,unsigned int mode)285*4882a593Smuzhiyun static int rpmh_regulator_vrm_set_mode(struct regulator_dev *rdev,
286*4882a593Smuzhiyun unsigned int mode)
287*4882a593Smuzhiyun {
288*4882a593Smuzhiyun struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
289*4882a593Smuzhiyun int ret;
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun if (mode == vreg->mode)
292*4882a593Smuzhiyun return 0;
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun ret = rpmh_regulator_vrm_set_mode_bypass(vreg, mode, vreg->bypassed);
295*4882a593Smuzhiyun if (!ret)
296*4882a593Smuzhiyun vreg->mode = mode;
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun return ret;
299*4882a593Smuzhiyun }
300*4882a593Smuzhiyun
rpmh_regulator_vrm_get_mode(struct regulator_dev * rdev)301*4882a593Smuzhiyun static unsigned int rpmh_regulator_vrm_get_mode(struct regulator_dev *rdev)
302*4882a593Smuzhiyun {
303*4882a593Smuzhiyun struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun return vreg->mode;
306*4882a593Smuzhiyun }
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun /**
309*4882a593Smuzhiyun * rpmh_regulator_vrm_set_load() - set the regulator mode based upon the load
310*4882a593Smuzhiyun * current requested
311*4882a593Smuzhiyun * @rdev: Regulator device pointer for the rpmh-regulator
312*4882a593Smuzhiyun * @load_uA: Aggregated load current in microamps
313*4882a593Smuzhiyun *
314*4882a593Smuzhiyun * This function is used in the regulator_ops for VRM type RPMh regulator
315*4882a593Smuzhiyun * devices.
316*4882a593Smuzhiyun *
317*4882a593Smuzhiyun * Return: 0 on success, errno on failure
318*4882a593Smuzhiyun */
rpmh_regulator_vrm_set_load(struct regulator_dev * rdev,int load_uA)319*4882a593Smuzhiyun static int rpmh_regulator_vrm_set_load(struct regulator_dev *rdev, int load_uA)
320*4882a593Smuzhiyun {
321*4882a593Smuzhiyun struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
322*4882a593Smuzhiyun unsigned int mode;
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun if (load_uA >= vreg->hw_data->hpm_min_load_uA)
325*4882a593Smuzhiyun mode = REGULATOR_MODE_NORMAL;
326*4882a593Smuzhiyun else
327*4882a593Smuzhiyun mode = REGULATOR_MODE_IDLE;
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun return rpmh_regulator_vrm_set_mode(rdev, mode);
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun
rpmh_regulator_vrm_set_bypass(struct regulator_dev * rdev,bool enable)332*4882a593Smuzhiyun static int rpmh_regulator_vrm_set_bypass(struct regulator_dev *rdev,
333*4882a593Smuzhiyun bool enable)
334*4882a593Smuzhiyun {
335*4882a593Smuzhiyun struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
336*4882a593Smuzhiyun int ret;
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun if (vreg->bypassed == enable)
339*4882a593Smuzhiyun return 0;
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun ret = rpmh_regulator_vrm_set_mode_bypass(vreg, vreg->mode, enable);
342*4882a593Smuzhiyun if (!ret)
343*4882a593Smuzhiyun vreg->bypassed = enable;
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun return ret;
346*4882a593Smuzhiyun }
347*4882a593Smuzhiyun
rpmh_regulator_vrm_get_bypass(struct regulator_dev * rdev,bool * enable)348*4882a593Smuzhiyun static int rpmh_regulator_vrm_get_bypass(struct regulator_dev *rdev,
349*4882a593Smuzhiyun bool *enable)
350*4882a593Smuzhiyun {
351*4882a593Smuzhiyun struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun *enable = vreg->bypassed;
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun return 0;
356*4882a593Smuzhiyun }
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun static const struct regulator_ops rpmh_regulator_vrm_ops = {
359*4882a593Smuzhiyun .enable = rpmh_regulator_enable,
360*4882a593Smuzhiyun .disable = rpmh_regulator_disable,
361*4882a593Smuzhiyun .is_enabled = rpmh_regulator_is_enabled,
362*4882a593Smuzhiyun .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel,
363*4882a593Smuzhiyun .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel,
364*4882a593Smuzhiyun .list_voltage = regulator_list_voltage_linear_range,
365*4882a593Smuzhiyun .set_mode = rpmh_regulator_vrm_set_mode,
366*4882a593Smuzhiyun .get_mode = rpmh_regulator_vrm_get_mode,
367*4882a593Smuzhiyun };
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun static const struct regulator_ops rpmh_regulator_vrm_drms_ops = {
370*4882a593Smuzhiyun .enable = rpmh_regulator_enable,
371*4882a593Smuzhiyun .disable = rpmh_regulator_disable,
372*4882a593Smuzhiyun .is_enabled = rpmh_regulator_is_enabled,
373*4882a593Smuzhiyun .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel,
374*4882a593Smuzhiyun .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel,
375*4882a593Smuzhiyun .list_voltage = regulator_list_voltage_linear_range,
376*4882a593Smuzhiyun .set_mode = rpmh_regulator_vrm_set_mode,
377*4882a593Smuzhiyun .get_mode = rpmh_regulator_vrm_get_mode,
378*4882a593Smuzhiyun .set_load = rpmh_regulator_vrm_set_load,
379*4882a593Smuzhiyun };
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun static const struct regulator_ops rpmh_regulator_vrm_bypass_ops = {
382*4882a593Smuzhiyun .enable = rpmh_regulator_enable,
383*4882a593Smuzhiyun .disable = rpmh_regulator_disable,
384*4882a593Smuzhiyun .is_enabled = rpmh_regulator_is_enabled,
385*4882a593Smuzhiyun .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel,
386*4882a593Smuzhiyun .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel,
387*4882a593Smuzhiyun .list_voltage = regulator_list_voltage_linear_range,
388*4882a593Smuzhiyun .set_mode = rpmh_regulator_vrm_set_mode,
389*4882a593Smuzhiyun .get_mode = rpmh_regulator_vrm_get_mode,
390*4882a593Smuzhiyun .set_bypass = rpmh_regulator_vrm_set_bypass,
391*4882a593Smuzhiyun .get_bypass = rpmh_regulator_vrm_get_bypass,
392*4882a593Smuzhiyun };
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun static const struct regulator_ops rpmh_regulator_xob_ops = {
395*4882a593Smuzhiyun .enable = rpmh_regulator_enable,
396*4882a593Smuzhiyun .disable = rpmh_regulator_disable,
397*4882a593Smuzhiyun .is_enabled = rpmh_regulator_is_enabled,
398*4882a593Smuzhiyun };
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun /**
401*4882a593Smuzhiyun * rpmh_regulator_init_vreg() - initialize all attributes of an rpmh-regulator
402*4882a593Smuzhiyun * @vreg: Pointer to the individual rpmh-regulator resource
403*4882a593Smuzhiyun * @dev: Pointer to the top level rpmh-regulator PMIC device
404*4882a593Smuzhiyun * @node: Pointer to the individual rpmh-regulator resource
405*4882a593Smuzhiyun * device node
406*4882a593Smuzhiyun * @pmic_id: String used to identify the top level rpmh-regulator
407*4882a593Smuzhiyun * PMIC device on the board
408*4882a593Smuzhiyun * @pmic_rpmh_data: Pointer to a null-terminated array of rpmh-regulator
409*4882a593Smuzhiyun * resources defined for the top level PMIC device
410*4882a593Smuzhiyun *
411*4882a593Smuzhiyun * Return: 0 on success, errno on failure
412*4882a593Smuzhiyun */
rpmh_regulator_init_vreg(struct rpmh_vreg * vreg,struct device * dev,struct device_node * node,const char * pmic_id,const struct rpmh_vreg_init_data * pmic_rpmh_data)413*4882a593Smuzhiyun static int rpmh_regulator_init_vreg(struct rpmh_vreg *vreg, struct device *dev,
414*4882a593Smuzhiyun struct device_node *node, const char *pmic_id,
415*4882a593Smuzhiyun const struct rpmh_vreg_init_data *pmic_rpmh_data)
416*4882a593Smuzhiyun {
417*4882a593Smuzhiyun struct regulator_config reg_config = {};
418*4882a593Smuzhiyun char rpmh_resource_name[20] = "";
419*4882a593Smuzhiyun const struct rpmh_vreg_init_data *rpmh_data;
420*4882a593Smuzhiyun struct regulator_init_data *init_data;
421*4882a593Smuzhiyun struct regulator_dev *rdev;
422*4882a593Smuzhiyun int ret;
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun vreg->dev = dev;
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun for (rpmh_data = pmic_rpmh_data; rpmh_data->name; rpmh_data++)
427*4882a593Smuzhiyun if (of_node_name_eq(node, rpmh_data->name))
428*4882a593Smuzhiyun break;
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun if (!rpmh_data->name) {
431*4882a593Smuzhiyun dev_err(dev, "Unknown regulator %pOFn\n", node);
432*4882a593Smuzhiyun return -EINVAL;
433*4882a593Smuzhiyun }
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun scnprintf(rpmh_resource_name, sizeof(rpmh_resource_name),
436*4882a593Smuzhiyun rpmh_data->resource_name, pmic_id);
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun vreg->addr = cmd_db_read_addr(rpmh_resource_name);
439*4882a593Smuzhiyun if (!vreg->addr) {
440*4882a593Smuzhiyun dev_err(dev, "%pOFn: could not find RPMh address for resource %s\n",
441*4882a593Smuzhiyun node, rpmh_resource_name);
442*4882a593Smuzhiyun return -ENODEV;
443*4882a593Smuzhiyun }
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun vreg->rdesc.name = rpmh_data->name;
446*4882a593Smuzhiyun vreg->rdesc.supply_name = rpmh_data->supply_name;
447*4882a593Smuzhiyun vreg->hw_data = rpmh_data->hw_data;
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun vreg->enabled = -EINVAL;
450*4882a593Smuzhiyun vreg->voltage_selector = -ENOTRECOVERABLE;
451*4882a593Smuzhiyun vreg->mode = REGULATOR_MODE_INVALID;
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun if (rpmh_data->hw_data->n_voltages) {
454*4882a593Smuzhiyun vreg->rdesc.linear_ranges = &rpmh_data->hw_data->voltage_range;
455*4882a593Smuzhiyun vreg->rdesc.n_linear_ranges = 1;
456*4882a593Smuzhiyun vreg->rdesc.n_voltages = rpmh_data->hw_data->n_voltages;
457*4882a593Smuzhiyun }
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun vreg->always_wait_for_ack = of_property_read_bool(node,
460*4882a593Smuzhiyun "qcom,always-wait-for-ack");
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun vreg->rdesc.owner = THIS_MODULE;
463*4882a593Smuzhiyun vreg->rdesc.type = REGULATOR_VOLTAGE;
464*4882a593Smuzhiyun vreg->rdesc.ops = vreg->hw_data->ops;
465*4882a593Smuzhiyun vreg->rdesc.of_map_mode = vreg->hw_data->of_map_mode;
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun init_data = of_get_regulator_init_data(dev, node, &vreg->rdesc);
468*4882a593Smuzhiyun if (!init_data)
469*4882a593Smuzhiyun return -ENOMEM;
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun if (rpmh_data->hw_data->regulator_type == XOB &&
472*4882a593Smuzhiyun init_data->constraints.min_uV &&
473*4882a593Smuzhiyun init_data->constraints.min_uV == init_data->constraints.max_uV) {
474*4882a593Smuzhiyun vreg->rdesc.fixed_uV = init_data->constraints.min_uV;
475*4882a593Smuzhiyun vreg->rdesc.n_voltages = 1;
476*4882a593Smuzhiyun }
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun reg_config.dev = dev;
479*4882a593Smuzhiyun reg_config.init_data = init_data;
480*4882a593Smuzhiyun reg_config.of_node = node;
481*4882a593Smuzhiyun reg_config.driver_data = vreg;
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun rdev = devm_regulator_register(dev, &vreg->rdesc, ®_config);
484*4882a593Smuzhiyun if (IS_ERR(rdev)) {
485*4882a593Smuzhiyun ret = PTR_ERR(rdev);
486*4882a593Smuzhiyun dev_err(dev, "%pOFn: devm_regulator_register() failed, ret=%d\n",
487*4882a593Smuzhiyun node, ret);
488*4882a593Smuzhiyun return ret;
489*4882a593Smuzhiyun }
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun dev_dbg(dev, "%pOFn regulator registered for RPMh resource %s @ 0x%05X\n",
492*4882a593Smuzhiyun node, rpmh_resource_name, vreg->addr);
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun return 0;
495*4882a593Smuzhiyun }
496*4882a593Smuzhiyun
497*4882a593Smuzhiyun static const int pmic_mode_map_pmic4_ldo[REGULATOR_MODE_STANDBY + 1] = {
498*4882a593Smuzhiyun [REGULATOR_MODE_INVALID] = -EINVAL,
499*4882a593Smuzhiyun [REGULATOR_MODE_STANDBY] = PMIC4_LDO_MODE_RETENTION,
500*4882a593Smuzhiyun [REGULATOR_MODE_IDLE] = PMIC4_LDO_MODE_LPM,
501*4882a593Smuzhiyun [REGULATOR_MODE_NORMAL] = PMIC4_LDO_MODE_HPM,
502*4882a593Smuzhiyun [REGULATOR_MODE_FAST] = -EINVAL,
503*4882a593Smuzhiyun };
504*4882a593Smuzhiyun
505*4882a593Smuzhiyun static const int pmic_mode_map_pmic5_ldo[REGULATOR_MODE_STANDBY + 1] = {
506*4882a593Smuzhiyun [REGULATOR_MODE_INVALID] = -EINVAL,
507*4882a593Smuzhiyun [REGULATOR_MODE_STANDBY] = PMIC5_LDO_MODE_RETENTION,
508*4882a593Smuzhiyun [REGULATOR_MODE_IDLE] = PMIC5_LDO_MODE_LPM,
509*4882a593Smuzhiyun [REGULATOR_MODE_NORMAL] = PMIC5_LDO_MODE_HPM,
510*4882a593Smuzhiyun [REGULATOR_MODE_FAST] = -EINVAL,
511*4882a593Smuzhiyun };
512*4882a593Smuzhiyun
rpmh_regulator_pmic4_ldo_of_map_mode(unsigned int rpmh_mode)513*4882a593Smuzhiyun static unsigned int rpmh_regulator_pmic4_ldo_of_map_mode(unsigned int rpmh_mode)
514*4882a593Smuzhiyun {
515*4882a593Smuzhiyun unsigned int mode;
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun switch (rpmh_mode) {
518*4882a593Smuzhiyun case RPMH_REGULATOR_MODE_HPM:
519*4882a593Smuzhiyun mode = REGULATOR_MODE_NORMAL;
520*4882a593Smuzhiyun break;
521*4882a593Smuzhiyun case RPMH_REGULATOR_MODE_LPM:
522*4882a593Smuzhiyun mode = REGULATOR_MODE_IDLE;
523*4882a593Smuzhiyun break;
524*4882a593Smuzhiyun case RPMH_REGULATOR_MODE_RET:
525*4882a593Smuzhiyun mode = REGULATOR_MODE_STANDBY;
526*4882a593Smuzhiyun break;
527*4882a593Smuzhiyun default:
528*4882a593Smuzhiyun mode = REGULATOR_MODE_INVALID;
529*4882a593Smuzhiyun break;
530*4882a593Smuzhiyun }
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun return mode;
533*4882a593Smuzhiyun }
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun static const int pmic_mode_map_pmic4_smps[REGULATOR_MODE_STANDBY + 1] = {
536*4882a593Smuzhiyun [REGULATOR_MODE_INVALID] = -EINVAL,
537*4882a593Smuzhiyun [REGULATOR_MODE_STANDBY] = PMIC4_SMPS_MODE_RETENTION,
538*4882a593Smuzhiyun [REGULATOR_MODE_IDLE] = PMIC4_SMPS_MODE_PFM,
539*4882a593Smuzhiyun [REGULATOR_MODE_NORMAL] = PMIC4_SMPS_MODE_AUTO,
540*4882a593Smuzhiyun [REGULATOR_MODE_FAST] = PMIC4_SMPS_MODE_PWM,
541*4882a593Smuzhiyun };
542*4882a593Smuzhiyun
543*4882a593Smuzhiyun static const int pmic_mode_map_pmic5_smps[REGULATOR_MODE_STANDBY + 1] = {
544*4882a593Smuzhiyun [REGULATOR_MODE_INVALID] = -EINVAL,
545*4882a593Smuzhiyun [REGULATOR_MODE_STANDBY] = PMIC5_SMPS_MODE_RETENTION,
546*4882a593Smuzhiyun [REGULATOR_MODE_IDLE] = PMIC5_SMPS_MODE_PFM,
547*4882a593Smuzhiyun [REGULATOR_MODE_NORMAL] = PMIC5_SMPS_MODE_AUTO,
548*4882a593Smuzhiyun [REGULATOR_MODE_FAST] = PMIC5_SMPS_MODE_PWM,
549*4882a593Smuzhiyun };
550*4882a593Smuzhiyun
551*4882a593Smuzhiyun static unsigned int
rpmh_regulator_pmic4_smps_of_map_mode(unsigned int rpmh_mode)552*4882a593Smuzhiyun rpmh_regulator_pmic4_smps_of_map_mode(unsigned int rpmh_mode)
553*4882a593Smuzhiyun {
554*4882a593Smuzhiyun unsigned int mode;
555*4882a593Smuzhiyun
556*4882a593Smuzhiyun switch (rpmh_mode) {
557*4882a593Smuzhiyun case RPMH_REGULATOR_MODE_HPM:
558*4882a593Smuzhiyun mode = REGULATOR_MODE_FAST;
559*4882a593Smuzhiyun break;
560*4882a593Smuzhiyun case RPMH_REGULATOR_MODE_AUTO:
561*4882a593Smuzhiyun mode = REGULATOR_MODE_NORMAL;
562*4882a593Smuzhiyun break;
563*4882a593Smuzhiyun case RPMH_REGULATOR_MODE_LPM:
564*4882a593Smuzhiyun mode = REGULATOR_MODE_IDLE;
565*4882a593Smuzhiyun break;
566*4882a593Smuzhiyun case RPMH_REGULATOR_MODE_RET:
567*4882a593Smuzhiyun mode = REGULATOR_MODE_STANDBY;
568*4882a593Smuzhiyun break;
569*4882a593Smuzhiyun default:
570*4882a593Smuzhiyun mode = REGULATOR_MODE_INVALID;
571*4882a593Smuzhiyun break;
572*4882a593Smuzhiyun }
573*4882a593Smuzhiyun
574*4882a593Smuzhiyun return mode;
575*4882a593Smuzhiyun }
576*4882a593Smuzhiyun
577*4882a593Smuzhiyun static const int pmic_mode_map_pmic4_bob[REGULATOR_MODE_STANDBY + 1] = {
578*4882a593Smuzhiyun [REGULATOR_MODE_INVALID] = -EINVAL,
579*4882a593Smuzhiyun [REGULATOR_MODE_STANDBY] = -EINVAL,
580*4882a593Smuzhiyun [REGULATOR_MODE_IDLE] = PMIC4_BOB_MODE_PFM,
581*4882a593Smuzhiyun [REGULATOR_MODE_NORMAL] = PMIC4_BOB_MODE_AUTO,
582*4882a593Smuzhiyun [REGULATOR_MODE_FAST] = PMIC4_BOB_MODE_PWM,
583*4882a593Smuzhiyun };
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun static const int pmic_mode_map_pmic5_bob[REGULATOR_MODE_STANDBY + 1] = {
586*4882a593Smuzhiyun [REGULATOR_MODE_INVALID] = -EINVAL,
587*4882a593Smuzhiyun [REGULATOR_MODE_STANDBY] = -EINVAL,
588*4882a593Smuzhiyun [REGULATOR_MODE_IDLE] = PMIC5_BOB_MODE_PFM,
589*4882a593Smuzhiyun [REGULATOR_MODE_NORMAL] = PMIC5_BOB_MODE_AUTO,
590*4882a593Smuzhiyun [REGULATOR_MODE_FAST] = PMIC5_BOB_MODE_PWM,
591*4882a593Smuzhiyun };
592*4882a593Smuzhiyun
rpmh_regulator_pmic4_bob_of_map_mode(unsigned int rpmh_mode)593*4882a593Smuzhiyun static unsigned int rpmh_regulator_pmic4_bob_of_map_mode(unsigned int rpmh_mode)
594*4882a593Smuzhiyun {
595*4882a593Smuzhiyun unsigned int mode;
596*4882a593Smuzhiyun
597*4882a593Smuzhiyun switch (rpmh_mode) {
598*4882a593Smuzhiyun case RPMH_REGULATOR_MODE_HPM:
599*4882a593Smuzhiyun mode = REGULATOR_MODE_FAST;
600*4882a593Smuzhiyun break;
601*4882a593Smuzhiyun case RPMH_REGULATOR_MODE_AUTO:
602*4882a593Smuzhiyun mode = REGULATOR_MODE_NORMAL;
603*4882a593Smuzhiyun break;
604*4882a593Smuzhiyun case RPMH_REGULATOR_MODE_LPM:
605*4882a593Smuzhiyun mode = REGULATOR_MODE_IDLE;
606*4882a593Smuzhiyun break;
607*4882a593Smuzhiyun default:
608*4882a593Smuzhiyun mode = REGULATOR_MODE_INVALID;
609*4882a593Smuzhiyun break;
610*4882a593Smuzhiyun }
611*4882a593Smuzhiyun
612*4882a593Smuzhiyun return mode;
613*4882a593Smuzhiyun }
614*4882a593Smuzhiyun
615*4882a593Smuzhiyun static const struct rpmh_vreg_hw_data pmic4_pldo = {
616*4882a593Smuzhiyun .regulator_type = VRM,
617*4882a593Smuzhiyun .ops = &rpmh_regulator_vrm_drms_ops,
618*4882a593Smuzhiyun .voltage_range = REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000),
619*4882a593Smuzhiyun .n_voltages = 256,
620*4882a593Smuzhiyun .hpm_min_load_uA = 10000,
621*4882a593Smuzhiyun .pmic_mode_map = pmic_mode_map_pmic4_ldo,
622*4882a593Smuzhiyun .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
623*4882a593Smuzhiyun };
624*4882a593Smuzhiyun
625*4882a593Smuzhiyun static const struct rpmh_vreg_hw_data pmic4_pldo_lv = {
626*4882a593Smuzhiyun .regulator_type = VRM,
627*4882a593Smuzhiyun .ops = &rpmh_regulator_vrm_drms_ops,
628*4882a593Smuzhiyun .voltage_range = REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000),
629*4882a593Smuzhiyun .n_voltages = 128,
630*4882a593Smuzhiyun .hpm_min_load_uA = 10000,
631*4882a593Smuzhiyun .pmic_mode_map = pmic_mode_map_pmic4_ldo,
632*4882a593Smuzhiyun .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
633*4882a593Smuzhiyun };
634*4882a593Smuzhiyun
635*4882a593Smuzhiyun static const struct rpmh_vreg_hw_data pmic4_nldo = {
636*4882a593Smuzhiyun .regulator_type = VRM,
637*4882a593Smuzhiyun .ops = &rpmh_regulator_vrm_drms_ops,
638*4882a593Smuzhiyun .voltage_range = REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
639*4882a593Smuzhiyun .n_voltages = 128,
640*4882a593Smuzhiyun .hpm_min_load_uA = 30000,
641*4882a593Smuzhiyun .pmic_mode_map = pmic_mode_map_pmic4_ldo,
642*4882a593Smuzhiyun .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
643*4882a593Smuzhiyun };
644*4882a593Smuzhiyun
645*4882a593Smuzhiyun static const struct rpmh_vreg_hw_data pmic4_hfsmps3 = {
646*4882a593Smuzhiyun .regulator_type = VRM,
647*4882a593Smuzhiyun .ops = &rpmh_regulator_vrm_ops,
648*4882a593Smuzhiyun .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
649*4882a593Smuzhiyun .n_voltages = 216,
650*4882a593Smuzhiyun .pmic_mode_map = pmic_mode_map_pmic4_smps,
651*4882a593Smuzhiyun .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
652*4882a593Smuzhiyun };
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun static const struct rpmh_vreg_hw_data pmic4_ftsmps426 = {
655*4882a593Smuzhiyun .regulator_type = VRM,
656*4882a593Smuzhiyun .ops = &rpmh_regulator_vrm_ops,
657*4882a593Smuzhiyun .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000),
658*4882a593Smuzhiyun .n_voltages = 259,
659*4882a593Smuzhiyun .pmic_mode_map = pmic_mode_map_pmic4_smps,
660*4882a593Smuzhiyun .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
661*4882a593Smuzhiyun };
662*4882a593Smuzhiyun
663*4882a593Smuzhiyun static const struct rpmh_vreg_hw_data pmic4_bob = {
664*4882a593Smuzhiyun .regulator_type = VRM,
665*4882a593Smuzhiyun .ops = &rpmh_regulator_vrm_bypass_ops,
666*4882a593Smuzhiyun .voltage_range = REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000),
667*4882a593Smuzhiyun .n_voltages = 84,
668*4882a593Smuzhiyun .pmic_mode_map = pmic_mode_map_pmic4_bob,
669*4882a593Smuzhiyun .of_map_mode = rpmh_regulator_pmic4_bob_of_map_mode,
670*4882a593Smuzhiyun };
671*4882a593Smuzhiyun
672*4882a593Smuzhiyun static const struct rpmh_vreg_hw_data pmic4_lvs = {
673*4882a593Smuzhiyun .regulator_type = XOB,
674*4882a593Smuzhiyun .ops = &rpmh_regulator_xob_ops,
675*4882a593Smuzhiyun /* LVS hardware does not support voltage or mode configuration. */
676*4882a593Smuzhiyun };
677*4882a593Smuzhiyun
678*4882a593Smuzhiyun static const struct rpmh_vreg_hw_data pmic5_pldo = {
679*4882a593Smuzhiyun .regulator_type = VRM,
680*4882a593Smuzhiyun .ops = &rpmh_regulator_vrm_drms_ops,
681*4882a593Smuzhiyun .voltage_range = REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000),
682*4882a593Smuzhiyun .n_voltages = 256,
683*4882a593Smuzhiyun .hpm_min_load_uA = 10000,
684*4882a593Smuzhiyun .pmic_mode_map = pmic_mode_map_pmic5_ldo,
685*4882a593Smuzhiyun .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
686*4882a593Smuzhiyun };
687*4882a593Smuzhiyun
688*4882a593Smuzhiyun static const struct rpmh_vreg_hw_data pmic5_pldo_lv = {
689*4882a593Smuzhiyun .regulator_type = VRM,
690*4882a593Smuzhiyun .ops = &rpmh_regulator_vrm_drms_ops,
691*4882a593Smuzhiyun .voltage_range = REGULATOR_LINEAR_RANGE(1504000, 0, 62, 8000),
692*4882a593Smuzhiyun .n_voltages = 63,
693*4882a593Smuzhiyun .hpm_min_load_uA = 10000,
694*4882a593Smuzhiyun .pmic_mode_map = pmic_mode_map_pmic5_ldo,
695*4882a593Smuzhiyun .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
696*4882a593Smuzhiyun };
697*4882a593Smuzhiyun
698*4882a593Smuzhiyun static const struct rpmh_vreg_hw_data pmic5_nldo = {
699*4882a593Smuzhiyun .regulator_type = VRM,
700*4882a593Smuzhiyun .ops = &rpmh_regulator_vrm_drms_ops,
701*4882a593Smuzhiyun .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 123, 8000),
702*4882a593Smuzhiyun .n_voltages = 124,
703*4882a593Smuzhiyun .hpm_min_load_uA = 30000,
704*4882a593Smuzhiyun .pmic_mode_map = pmic_mode_map_pmic5_ldo,
705*4882a593Smuzhiyun .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
706*4882a593Smuzhiyun };
707*4882a593Smuzhiyun
708*4882a593Smuzhiyun static const struct rpmh_vreg_hw_data pmic5_hfsmps510 = {
709*4882a593Smuzhiyun .regulator_type = VRM,
710*4882a593Smuzhiyun .ops = &rpmh_regulator_vrm_ops,
711*4882a593Smuzhiyun .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
712*4882a593Smuzhiyun .n_voltages = 216,
713*4882a593Smuzhiyun .pmic_mode_map = pmic_mode_map_pmic5_smps,
714*4882a593Smuzhiyun .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
715*4882a593Smuzhiyun };
716*4882a593Smuzhiyun
717*4882a593Smuzhiyun static const struct rpmh_vreg_hw_data pmic5_ftsmps510 = {
718*4882a593Smuzhiyun .regulator_type = VRM,
719*4882a593Smuzhiyun .ops = &rpmh_regulator_vrm_ops,
720*4882a593Smuzhiyun .voltage_range = REGULATOR_LINEAR_RANGE(300000, 0, 263, 4000),
721*4882a593Smuzhiyun .n_voltages = 264,
722*4882a593Smuzhiyun .pmic_mode_map = pmic_mode_map_pmic5_smps,
723*4882a593Smuzhiyun .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
724*4882a593Smuzhiyun };
725*4882a593Smuzhiyun
726*4882a593Smuzhiyun static const struct rpmh_vreg_hw_data pmic5_hfsmps515 = {
727*4882a593Smuzhiyun .regulator_type = VRM,
728*4882a593Smuzhiyun .ops = &rpmh_regulator_vrm_ops,
729*4882a593Smuzhiyun .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 235, 16000),
730*4882a593Smuzhiyun .n_voltages = 236,
731*4882a593Smuzhiyun .pmic_mode_map = pmic_mode_map_pmic5_smps,
732*4882a593Smuzhiyun .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
733*4882a593Smuzhiyun };
734*4882a593Smuzhiyun
735*4882a593Smuzhiyun static const struct rpmh_vreg_hw_data pmic5_hfsmps515_1 = {
736*4882a593Smuzhiyun .regulator_type = VRM,
737*4882a593Smuzhiyun .ops = &rpmh_regulator_vrm_ops,
738*4882a593Smuzhiyun .voltage_range = REGULATOR_LINEAR_RANGE(900000, 0, 4, 16000),
739*4882a593Smuzhiyun .n_voltages = 5,
740*4882a593Smuzhiyun .pmic_mode_map = pmic_mode_map_pmic5_smps,
741*4882a593Smuzhiyun .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
742*4882a593Smuzhiyun };
743*4882a593Smuzhiyun
744*4882a593Smuzhiyun static const struct rpmh_vreg_hw_data pmic5_bob = {
745*4882a593Smuzhiyun .regulator_type = VRM,
746*4882a593Smuzhiyun .ops = &rpmh_regulator_vrm_bypass_ops,
747*4882a593Smuzhiyun .voltage_range = REGULATOR_LINEAR_RANGE(3000000, 0, 31, 32000),
748*4882a593Smuzhiyun .n_voltages = 32,
749*4882a593Smuzhiyun .pmic_mode_map = pmic_mode_map_pmic5_bob,
750*4882a593Smuzhiyun .of_map_mode = rpmh_regulator_pmic4_bob_of_map_mode,
751*4882a593Smuzhiyun };
752*4882a593Smuzhiyun
753*4882a593Smuzhiyun #define RPMH_VREG(_name, _resource_name, _hw_data, _supply_name) \
754*4882a593Smuzhiyun { \
755*4882a593Smuzhiyun .name = _name, \
756*4882a593Smuzhiyun .resource_name = _resource_name, \
757*4882a593Smuzhiyun .hw_data = _hw_data, \
758*4882a593Smuzhiyun .supply_name = _supply_name, \
759*4882a593Smuzhiyun }
760*4882a593Smuzhiyun
761*4882a593Smuzhiyun static const struct rpmh_vreg_init_data pm8998_vreg_data[] = {
762*4882a593Smuzhiyun RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"),
763*4882a593Smuzhiyun RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"),
764*4882a593Smuzhiyun RPMH_VREG("smps3", "smp%s3", &pmic4_hfsmps3, "vdd-s3"),
765*4882a593Smuzhiyun RPMH_VREG("smps4", "smp%s4", &pmic4_hfsmps3, "vdd-s4"),
766*4882a593Smuzhiyun RPMH_VREG("smps5", "smp%s5", &pmic4_hfsmps3, "vdd-s5"),
767*4882a593Smuzhiyun RPMH_VREG("smps6", "smp%s6", &pmic4_ftsmps426, "vdd-s6"),
768*4882a593Smuzhiyun RPMH_VREG("smps7", "smp%s7", &pmic4_ftsmps426, "vdd-s7"),
769*4882a593Smuzhiyun RPMH_VREG("smps8", "smp%s8", &pmic4_ftsmps426, "vdd-s8"),
770*4882a593Smuzhiyun RPMH_VREG("smps9", "smp%s9", &pmic4_ftsmps426, "vdd-s9"),
771*4882a593Smuzhiyun RPMH_VREG("smps10", "smp%s10", &pmic4_ftsmps426, "vdd-s10"),
772*4882a593Smuzhiyun RPMH_VREG("smps11", "smp%s11", &pmic4_ftsmps426, "vdd-s11"),
773*4882a593Smuzhiyun RPMH_VREG("smps12", "smp%s12", &pmic4_ftsmps426, "vdd-s12"),
774*4882a593Smuzhiyun RPMH_VREG("smps13", "smp%s13", &pmic4_ftsmps426, "vdd-s13"),
775*4882a593Smuzhiyun RPMH_VREG("ldo1", "ldo%s1", &pmic4_nldo, "vdd-l1-l27"),
776*4882a593Smuzhiyun RPMH_VREG("ldo2", "ldo%s2", &pmic4_nldo, "vdd-l2-l8-l17"),
777*4882a593Smuzhiyun RPMH_VREG("ldo3", "ldo%s3", &pmic4_nldo, "vdd-l3-l11"),
778*4882a593Smuzhiyun RPMH_VREG("ldo4", "ldo%s4", &pmic4_nldo, "vdd-l4-l5"),
779*4882a593Smuzhiyun RPMH_VREG("ldo5", "ldo%s5", &pmic4_nldo, "vdd-l4-l5"),
780*4882a593Smuzhiyun RPMH_VREG("ldo6", "ldo%s6", &pmic4_pldo, "vdd-l6"),
781*4882a593Smuzhiyun RPMH_VREG("ldo7", "ldo%s7", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
782*4882a593Smuzhiyun RPMH_VREG("ldo8", "ldo%s8", &pmic4_nldo, "vdd-l2-l8-l17"),
783*4882a593Smuzhiyun RPMH_VREG("ldo9", "ldo%s9", &pmic4_pldo, "vdd-l9"),
784*4882a593Smuzhiyun RPMH_VREG("ldo10", "ldo%s10", &pmic4_pldo, "vdd-l10-l23-l25"),
785*4882a593Smuzhiyun RPMH_VREG("ldo11", "ldo%s11", &pmic4_nldo, "vdd-l3-l11"),
786*4882a593Smuzhiyun RPMH_VREG("ldo12", "ldo%s12", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
787*4882a593Smuzhiyun RPMH_VREG("ldo13", "ldo%s13", &pmic4_pldo, "vdd-l13-l19-l21"),
788*4882a593Smuzhiyun RPMH_VREG("ldo14", "ldo%s14", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
789*4882a593Smuzhiyun RPMH_VREG("ldo15", "ldo%s15", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
790*4882a593Smuzhiyun RPMH_VREG("ldo16", "ldo%s16", &pmic4_pldo, "vdd-l16-l28"),
791*4882a593Smuzhiyun RPMH_VREG("ldo17", "ldo%s17", &pmic4_nldo, "vdd-l2-l8-l17"),
792*4882a593Smuzhiyun RPMH_VREG("ldo18", "ldo%s18", &pmic4_pldo, "vdd-l18-l22"),
793*4882a593Smuzhiyun RPMH_VREG("ldo19", "ldo%s19", &pmic4_pldo, "vdd-l13-l19-l21"),
794*4882a593Smuzhiyun RPMH_VREG("ldo20", "ldo%s20", &pmic4_pldo, "vdd-l20-l24"),
795*4882a593Smuzhiyun RPMH_VREG("ldo21", "ldo%s21", &pmic4_pldo, "vdd-l13-l19-l21"),
796*4882a593Smuzhiyun RPMH_VREG("ldo22", "ldo%s22", &pmic4_pldo, "vdd-l18-l22"),
797*4882a593Smuzhiyun RPMH_VREG("ldo23", "ldo%s23", &pmic4_pldo, "vdd-l10-l23-l25"),
798*4882a593Smuzhiyun RPMH_VREG("ldo24", "ldo%s24", &pmic4_pldo, "vdd-l20-l24"),
799*4882a593Smuzhiyun RPMH_VREG("ldo25", "ldo%s25", &pmic4_pldo, "vdd-l10-l23-l25"),
800*4882a593Smuzhiyun RPMH_VREG("ldo26", "ldo%s26", &pmic4_nldo, "vdd-l26"),
801*4882a593Smuzhiyun RPMH_VREG("ldo27", "ldo%s27", &pmic4_nldo, "vdd-l1-l27"),
802*4882a593Smuzhiyun RPMH_VREG("ldo28", "ldo%s28", &pmic4_pldo, "vdd-l16-l28"),
803*4882a593Smuzhiyun RPMH_VREG("lvs1", "vs%s1", &pmic4_lvs, "vin-lvs-1-2"),
804*4882a593Smuzhiyun RPMH_VREG("lvs2", "vs%s2", &pmic4_lvs, "vin-lvs-1-2"),
805*4882a593Smuzhiyun {},
806*4882a593Smuzhiyun };
807*4882a593Smuzhiyun
808*4882a593Smuzhiyun static const struct rpmh_vreg_init_data pmi8998_vreg_data[] = {
809*4882a593Smuzhiyun RPMH_VREG("bob", "bob%s1", &pmic4_bob, "vdd-bob"),
810*4882a593Smuzhiyun {},
811*4882a593Smuzhiyun };
812*4882a593Smuzhiyun
813*4882a593Smuzhiyun static const struct rpmh_vreg_init_data pm8005_vreg_data[] = {
814*4882a593Smuzhiyun RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"),
815*4882a593Smuzhiyun RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"),
816*4882a593Smuzhiyun RPMH_VREG("smps3", "smp%s3", &pmic4_ftsmps426, "vdd-s3"),
817*4882a593Smuzhiyun RPMH_VREG("smps4", "smp%s4", &pmic4_ftsmps426, "vdd-s4"),
818*4882a593Smuzhiyun {},
819*4882a593Smuzhiyun };
820*4882a593Smuzhiyun
821*4882a593Smuzhiyun static const struct rpmh_vreg_init_data pm8150_vreg_data[] = {
822*4882a593Smuzhiyun RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
823*4882a593Smuzhiyun RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
824*4882a593Smuzhiyun RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
825*4882a593Smuzhiyun RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
826*4882a593Smuzhiyun RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
827*4882a593Smuzhiyun RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
828*4882a593Smuzhiyun RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
829*4882a593Smuzhiyun RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"),
830*4882a593Smuzhiyun RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"),
831*4882a593Smuzhiyun RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"),
832*4882a593Smuzhiyun RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l8-l11"),
833*4882a593Smuzhiyun RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l10"),
834*4882a593Smuzhiyun RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
835*4882a593Smuzhiyun RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
836*4882a593Smuzhiyun RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
837*4882a593Smuzhiyun RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9"),
838*4882a593Smuzhiyun RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-l12-l14-l15"),
839*4882a593Smuzhiyun RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l1-l8-l11"),
840*4882a593Smuzhiyun RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9"),
841*4882a593Smuzhiyun RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l2-l10"),
842*4882a593Smuzhiyun RPMH_VREG("ldo11", "ldo%s11", &pmic5_nldo, "vdd-l1-l8-l11"),
843*4882a593Smuzhiyun RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
844*4882a593Smuzhiyun RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l13-l16-l17"),
845*4882a593Smuzhiyun RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
846*4882a593Smuzhiyun RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
847*4882a593Smuzhiyun RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l13-l16-l17"),
848*4882a593Smuzhiyun RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l13-l16-l17"),
849*4882a593Smuzhiyun RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
850*4882a593Smuzhiyun {},
851*4882a593Smuzhiyun };
852*4882a593Smuzhiyun
853*4882a593Smuzhiyun static const struct rpmh_vreg_init_data pm8150l_vreg_data[] = {
854*4882a593Smuzhiyun RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
855*4882a593Smuzhiyun RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
856*4882a593Smuzhiyun RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
857*4882a593Smuzhiyun RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"),
858*4882a593Smuzhiyun RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"),
859*4882a593Smuzhiyun RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
860*4882a593Smuzhiyun RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
861*4882a593Smuzhiyun RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"),
862*4882a593Smuzhiyun RPMH_VREG("ldo1", "ldo%s1", &pmic5_pldo_lv, "vdd-l1-l8"),
863*4882a593Smuzhiyun RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l3"),
864*4882a593Smuzhiyun RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l2-l3"),
865*4882a593Smuzhiyun RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo, "vdd-l4-l5-l6"),
866*4882a593Smuzhiyun RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l4-l5-l6"),
867*4882a593Smuzhiyun RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l4-l5-l6"),
868*4882a593Smuzhiyun RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-l11"),
869*4882a593Smuzhiyun RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo_lv, "vdd-l1-l8"),
870*4882a593Smuzhiyun RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l9-l10"),
871*4882a593Smuzhiyun RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l9-l10"),
872*4882a593Smuzhiyun RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l7-l11"),
873*4882a593Smuzhiyun RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"),
874*4882a593Smuzhiyun {},
875*4882a593Smuzhiyun };
876*4882a593Smuzhiyun
877*4882a593Smuzhiyun static const struct rpmh_vreg_init_data pm8009_vreg_data[] = {
878*4882a593Smuzhiyun RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"),
879*4882a593Smuzhiyun RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps515, "vdd-s2"),
880*4882a593Smuzhiyun RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
881*4882a593Smuzhiyun RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2"),
882*4882a593Smuzhiyun RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
883*4882a593Smuzhiyun RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4"),
884*4882a593Smuzhiyun RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"),
885*4882a593Smuzhiyun RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"),
886*4882a593Smuzhiyun RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo_lv, "vdd-l7"),
887*4882a593Smuzhiyun {},
888*4882a593Smuzhiyun };
889*4882a593Smuzhiyun
890*4882a593Smuzhiyun static const struct rpmh_vreg_init_data pm8009_1_vreg_data[] = {
891*4882a593Smuzhiyun RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"),
892*4882a593Smuzhiyun RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps515_1, "vdd-s2"),
893*4882a593Smuzhiyun RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
894*4882a593Smuzhiyun RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2"),
895*4882a593Smuzhiyun RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
896*4882a593Smuzhiyun RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4"),
897*4882a593Smuzhiyun RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"),
898*4882a593Smuzhiyun RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"),
899*4882a593Smuzhiyun RPMH_VREG("ldo7", "ldo%s6", &pmic5_pldo_lv, "vdd-l7"),
900*4882a593Smuzhiyun {},
901*4882a593Smuzhiyun };
902*4882a593Smuzhiyun
903*4882a593Smuzhiyun static const struct rpmh_vreg_init_data pm6150_vreg_data[] = {
904*4882a593Smuzhiyun RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
905*4882a593Smuzhiyun RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
906*4882a593Smuzhiyun RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
907*4882a593Smuzhiyun RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
908*4882a593Smuzhiyun RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
909*4882a593Smuzhiyun RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
910*4882a593Smuzhiyun RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l3"),
911*4882a593Smuzhiyun RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l2-l3"),
912*4882a593Smuzhiyun RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4-l7-l8"),
913*4882a593Smuzhiyun RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
914*4882a593Smuzhiyun RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6"),
915*4882a593Smuzhiyun RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo, "vdd-l4-l7-l8"),
916*4882a593Smuzhiyun RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l4-l7-l8"),
917*4882a593Smuzhiyun RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l9"),
918*4882a593Smuzhiyun RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo_lv, "vdd-l10-l14-l15"),
919*4882a593Smuzhiyun RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo_lv, "vdd-l11-l12-l13"),
920*4882a593Smuzhiyun RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l11-l12-l13"),
921*4882a593Smuzhiyun RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo_lv, "vdd-l11-l12-l13"),
922*4882a593Smuzhiyun RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo_lv, "vdd-l10-l14-l15"),
923*4882a593Smuzhiyun RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo_lv, "vdd-l10-l14-l15"),
924*4882a593Smuzhiyun RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
925*4882a593Smuzhiyun RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
926*4882a593Smuzhiyun RPMH_VREG("ldo18", "ldo%s18", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
927*4882a593Smuzhiyun RPMH_VREG("ldo19", "ldo%s19", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
928*4882a593Smuzhiyun {},
929*4882a593Smuzhiyun };
930*4882a593Smuzhiyun
931*4882a593Smuzhiyun static const struct rpmh_vreg_init_data pm6150l_vreg_data[] = {
932*4882a593Smuzhiyun RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
933*4882a593Smuzhiyun RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
934*4882a593Smuzhiyun RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
935*4882a593Smuzhiyun RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"),
936*4882a593Smuzhiyun RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"),
937*4882a593Smuzhiyun RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
938*4882a593Smuzhiyun RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
939*4882a593Smuzhiyun RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"),
940*4882a593Smuzhiyun RPMH_VREG("ldo1", "ldo%s1", &pmic5_pldo_lv, "vdd-l1-l8"),
941*4882a593Smuzhiyun RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l3"),
942*4882a593Smuzhiyun RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l2-l3"),
943*4882a593Smuzhiyun RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo, "vdd-l4-l5-l6"),
944*4882a593Smuzhiyun RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l4-l5-l6"),
945*4882a593Smuzhiyun RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l4-l5-l6"),
946*4882a593Smuzhiyun RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-l11"),
947*4882a593Smuzhiyun RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo, "vdd-l1-l8"),
948*4882a593Smuzhiyun RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l9-l10"),
949*4882a593Smuzhiyun RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l9-l10"),
950*4882a593Smuzhiyun RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l7-l11"),
951*4882a593Smuzhiyun RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"),
952*4882a593Smuzhiyun {},
953*4882a593Smuzhiyun };
954*4882a593Smuzhiyun
rpmh_regulator_probe(struct platform_device * pdev)955*4882a593Smuzhiyun static int rpmh_regulator_probe(struct platform_device *pdev)
956*4882a593Smuzhiyun {
957*4882a593Smuzhiyun struct device *dev = &pdev->dev;
958*4882a593Smuzhiyun const struct rpmh_vreg_init_data *vreg_data;
959*4882a593Smuzhiyun struct device_node *node;
960*4882a593Smuzhiyun struct rpmh_vreg *vreg;
961*4882a593Smuzhiyun const char *pmic_id;
962*4882a593Smuzhiyun int ret;
963*4882a593Smuzhiyun
964*4882a593Smuzhiyun vreg_data = of_device_get_match_data(dev);
965*4882a593Smuzhiyun if (!vreg_data)
966*4882a593Smuzhiyun return -ENODEV;
967*4882a593Smuzhiyun
968*4882a593Smuzhiyun ret = of_property_read_string(dev->of_node, "qcom,pmic-id", &pmic_id);
969*4882a593Smuzhiyun if (ret < 0) {
970*4882a593Smuzhiyun dev_err(dev, "qcom,pmic-id missing in DT node\n");
971*4882a593Smuzhiyun return ret;
972*4882a593Smuzhiyun }
973*4882a593Smuzhiyun
974*4882a593Smuzhiyun for_each_available_child_of_node(dev->of_node, node) {
975*4882a593Smuzhiyun vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL);
976*4882a593Smuzhiyun if (!vreg) {
977*4882a593Smuzhiyun of_node_put(node);
978*4882a593Smuzhiyun return -ENOMEM;
979*4882a593Smuzhiyun }
980*4882a593Smuzhiyun
981*4882a593Smuzhiyun ret = rpmh_regulator_init_vreg(vreg, dev, node, pmic_id,
982*4882a593Smuzhiyun vreg_data);
983*4882a593Smuzhiyun if (ret < 0) {
984*4882a593Smuzhiyun of_node_put(node);
985*4882a593Smuzhiyun return ret;
986*4882a593Smuzhiyun }
987*4882a593Smuzhiyun }
988*4882a593Smuzhiyun
989*4882a593Smuzhiyun return 0;
990*4882a593Smuzhiyun }
991*4882a593Smuzhiyun
992*4882a593Smuzhiyun static const struct of_device_id __maybe_unused rpmh_regulator_match_table[] = {
993*4882a593Smuzhiyun {
994*4882a593Smuzhiyun .compatible = "qcom,pm8005-rpmh-regulators",
995*4882a593Smuzhiyun .data = pm8005_vreg_data,
996*4882a593Smuzhiyun },
997*4882a593Smuzhiyun {
998*4882a593Smuzhiyun .compatible = "qcom,pm8009-rpmh-regulators",
999*4882a593Smuzhiyun .data = pm8009_vreg_data,
1000*4882a593Smuzhiyun },
1001*4882a593Smuzhiyun {
1002*4882a593Smuzhiyun .compatible = "qcom,pm8009-1-rpmh-regulators",
1003*4882a593Smuzhiyun .data = pm8009_1_vreg_data,
1004*4882a593Smuzhiyun },
1005*4882a593Smuzhiyun {
1006*4882a593Smuzhiyun .compatible = "qcom,pm8150-rpmh-regulators",
1007*4882a593Smuzhiyun .data = pm8150_vreg_data,
1008*4882a593Smuzhiyun },
1009*4882a593Smuzhiyun {
1010*4882a593Smuzhiyun .compatible = "qcom,pm8150l-rpmh-regulators",
1011*4882a593Smuzhiyun .data = pm8150l_vreg_data,
1012*4882a593Smuzhiyun },
1013*4882a593Smuzhiyun {
1014*4882a593Smuzhiyun .compatible = "qcom,pm8998-rpmh-regulators",
1015*4882a593Smuzhiyun .data = pm8998_vreg_data,
1016*4882a593Smuzhiyun },
1017*4882a593Smuzhiyun {
1018*4882a593Smuzhiyun .compatible = "qcom,pmi8998-rpmh-regulators",
1019*4882a593Smuzhiyun .data = pmi8998_vreg_data,
1020*4882a593Smuzhiyun },
1021*4882a593Smuzhiyun {
1022*4882a593Smuzhiyun .compatible = "qcom,pm6150-rpmh-regulators",
1023*4882a593Smuzhiyun .data = pm6150_vreg_data,
1024*4882a593Smuzhiyun },
1025*4882a593Smuzhiyun {
1026*4882a593Smuzhiyun .compatible = "qcom,pm6150l-rpmh-regulators",
1027*4882a593Smuzhiyun .data = pm6150l_vreg_data,
1028*4882a593Smuzhiyun },
1029*4882a593Smuzhiyun {}
1030*4882a593Smuzhiyun };
1031*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, rpmh_regulator_match_table);
1032*4882a593Smuzhiyun
1033*4882a593Smuzhiyun static struct platform_driver rpmh_regulator_driver = {
1034*4882a593Smuzhiyun .driver = {
1035*4882a593Smuzhiyun .name = "qcom-rpmh-regulator",
1036*4882a593Smuzhiyun .of_match_table = of_match_ptr(rpmh_regulator_match_table),
1037*4882a593Smuzhiyun },
1038*4882a593Smuzhiyun .probe = rpmh_regulator_probe,
1039*4882a593Smuzhiyun };
1040*4882a593Smuzhiyun module_platform_driver(rpmh_regulator_driver);
1041*4882a593Smuzhiyun
1042*4882a593Smuzhiyun MODULE_DESCRIPTION("Qualcomm RPMh regulator driver");
1043*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
1044