1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0+ */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * pv88090-regulator.h - Regulator definitions for PV88090 4*4882a593Smuzhiyun * Copyright (C) 2015 Powerventure Semiconductor Ltd. 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __PV88090_REGISTERS_H__ 8*4882a593Smuzhiyun #define __PV88090_REGISTERS_H__ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun /* System Control and Event Registers */ 11*4882a593Smuzhiyun #define PV88090_REG_EVENT_A 0x03 12*4882a593Smuzhiyun #define PV88090_REG_MASK_A 0x06 13*4882a593Smuzhiyun #define PV88090_REG_MASK_B 0x07 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun /* Regulator Registers */ 16*4882a593Smuzhiyun #define PV88090_REG_BUCK1_CONF0 0x18 17*4882a593Smuzhiyun #define PV88090_REG_BUCK1_CONF1 0x19 18*4882a593Smuzhiyun #define PV88090_REG_BUCK1_CONF2 0x1a 19*4882a593Smuzhiyun #define PV88090_REG_BUCK2_CONF0 0x1b 20*4882a593Smuzhiyun #define PV88090_REG_BUCK2_CONF1 0x1c 21*4882a593Smuzhiyun #define PV88090_REG_BUCK2_CONF2 0x58 22*4882a593Smuzhiyun #define PV88090_REG_BUCK3_CONF0 0x1d 23*4882a593Smuzhiyun #define PV88090_REG_BUCK3_CONF1 0x1e 24*4882a593Smuzhiyun #define PV88090_REG_BUCK3_CONF2 0x5c 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #define PV88090_REG_LDO1_CONT 0x1f 27*4882a593Smuzhiyun #define PV88090_REG_LDO2_CONT 0x20 28*4882a593Smuzhiyun #define PV88090_REG_LDO3_CONT 0x21 29*4882a593Smuzhiyun #define PV88090_REG_BUCK_FOLD_RANGE 0x61 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun /* PV88090_REG_EVENT_A (addr=0x03) */ 32*4882a593Smuzhiyun #define PV88090_E_VDD_FLT 0x01 33*4882a593Smuzhiyun #define PV88090_E_OVER_TEMP 0x02 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun /* PV88090_REG_MASK_A (addr=0x06) */ 36*4882a593Smuzhiyun #define PV88090_M_VDD_FLT 0x01 37*4882a593Smuzhiyun #define PV88090_M_OVER_TEMP 0x02 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun /* PV88090_REG_BUCK1_CONF0 (addr=0x18) */ 40*4882a593Smuzhiyun #define PV88090_BUCK1_EN 0x80 41*4882a593Smuzhiyun #define PV88090_VBUCK1_MASK 0x7F 42*4882a593Smuzhiyun /* PV88090_REG_BUCK2_CONF0 (addr=0x1b) */ 43*4882a593Smuzhiyun #define PV88090_BUCK2_EN 0x80 44*4882a593Smuzhiyun #define PV88090_VBUCK2_MASK 0x7F 45*4882a593Smuzhiyun /* PV88090_REG_BUCK3_CONF0 (addr=0x1d) */ 46*4882a593Smuzhiyun #define PV88090_BUCK3_EN 0x80 47*4882a593Smuzhiyun #define PV88090_VBUCK3_MASK 0x7F 48*4882a593Smuzhiyun /* PV88090_REG_LDO1_CONT (addr=0x1f) */ 49*4882a593Smuzhiyun #define PV88090_LDO1_EN 0x40 50*4882a593Smuzhiyun #define PV88090_VLDO1_MASK 0x3F 51*4882a593Smuzhiyun /* PV88090_REG_LDO2_CONT (addr=0x20) */ 52*4882a593Smuzhiyun #define PV88090_LDO2_EN 0x40 53*4882a593Smuzhiyun #define PV88090_VLDO2_MASK 0x3F 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun /* PV88090_REG_BUCK1_CONF1 (addr=0x19) */ 56*4882a593Smuzhiyun #define PV88090_BUCK1_ILIM_SHIFT 2 57*4882a593Smuzhiyun #define PV88090_BUCK1_ILIM_MASK 0x7C 58*4882a593Smuzhiyun #define PV88090_BUCK1_MODE_MASK 0x03 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun /* PV88090_REG_BUCK2_CONF1 (addr=0x1c) */ 61*4882a593Smuzhiyun #define PV88090_BUCK2_ILIM_SHIFT 2 62*4882a593Smuzhiyun #define PV88090_BUCK2_ILIM_MASK 0x0C 63*4882a593Smuzhiyun #define PV88090_BUCK2_MODE_MASK 0x03 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun /* PV88090_REG_BUCK3_CONF1 (addr=0x1e) */ 66*4882a593Smuzhiyun #define PV88090_BUCK3_ILIM_SHIFT 2 67*4882a593Smuzhiyun #define PV88090_BUCK3_ILIM_MASK 0x0C 68*4882a593Smuzhiyun #define PV88090_BUCK3_MODE_MASK 0x03 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun #define PV88090_BUCK_MODE_SLEEP 0x00 71*4882a593Smuzhiyun #define PV88090_BUCK_MODE_AUTO 0x01 72*4882a593Smuzhiyun #define PV88090_BUCK_MODE_SYNC 0x02 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun /* PV88090_REG_BUCK2_CONF2 (addr=0x58) */ 75*4882a593Smuzhiyun /* PV88090_REG_BUCK3_CONF2 (addr=0x5c) */ 76*4882a593Smuzhiyun #define PV88090_BUCK_VDAC_RANGE_SHIFT 7 77*4882a593Smuzhiyun #define PV88090_BUCK_VDAC_RANGE_MASK 0x01 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun #define PV88090_BUCK_VDAC_RANGE_1 0x00 80*4882a593Smuzhiyun #define PV88090_BUCK_VDAC_RANGE_2 0x01 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun /* PV88090_REG_BUCK_FOLD_RANGE (addr=0x61) */ 83*4882a593Smuzhiyun #define PV88090_BUCK_VRANGE_GAIN_SHIFT 3 84*4882a593Smuzhiyun #define PV88090_BUCK_VRANGE_GAIN_MASK 0x01 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun #define PV88090_BUCK_VRANGE_GAIN_1 0x00 87*4882a593Smuzhiyun #define PV88090_BUCK_VRANGE_GAIN_2 0x01 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun #endif /* __PV88090_REGISTERS_H__ */ 90